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1 /* Target-dependent code for the Mitsubishi m32r for GDB, the GNU debugger.
2 Copyright 1996, 2001 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include "defs.h"
22 #include "frame.h"
23 #include "inferior.h"
24 #include "obstack.h"
25 #include "target.h"
26 #include "value.h"
27 #include "bfd.h"
28 #include "gdb_string.h"
29 #include "gdbcore.h"
30 #include "symfile.h"
31 #include "regcache.h"
32
33 /* Function: m32r_use_struct_convention
34 Return nonzero if call_function should allocate stack space for a
35 struct return? */
36 int
37 m32r_use_struct_convention (int gcc_p, struct type *type)
38 {
39 return (TYPE_LENGTH (type) > 8);
40 }
41
42 /* Function: frame_find_saved_regs
43 Return the frame_saved_regs structure for the frame.
44 Doesn't really work for dummy frames, but it does pass back
45 an empty frame_saved_regs, so I guess that's better than total failure */
46
47 void
48 m32r_frame_find_saved_regs (struct frame_info *fi,
49 struct frame_saved_regs *regaddr)
50 {
51 memcpy (regaddr, &fi->fsr, sizeof (struct frame_saved_regs));
52 }
53
54 /* Turn this on if you want to see just how much instruction decoding
55 if being done, its quite a lot
56 */
57 #if 0
58 static void
59 dump_insn (char *commnt, CORE_ADDR pc, int insn)
60 {
61 printf_filtered (" %s %08x %08x ",
62 commnt, (unsigned int) pc, (unsigned int) insn);
63 (*tm_print_insn) (pc, &tm_print_insn_info);
64 printf_filtered ("\n");
65 }
66 #define insn_debug(args) { printf_filtered args; }
67 #else
68 #define dump_insn(a,b,c) {}
69 #define insn_debug(args) {}
70 #endif
71
72 #define DEFAULT_SEARCH_LIMIT 44
73
74 /* Function: scan_prologue
75 This function decodes the target function prologue to determine
76 1) the size of the stack frame, and 2) which registers are saved on it.
77 It saves the offsets of saved regs in the frame_saved_regs argument,
78 and returns the frame size. */
79
80 /*
81 The sequence it currently generates is:
82
83 if (varargs function) { ddi sp,#n }
84 push registers
85 if (additional stack <= 256) { addi sp,#-stack }
86 else if (additional stack < 65k) { add3 sp,sp,#-stack
87
88 } else if (additional stack) {
89 seth sp,#(stack & 0xffff0000)
90 or3 sp,sp,#(stack & 0x0000ffff)
91 sub sp,r4
92 }
93 if (frame pointer) {
94 mv sp,fp
95 }
96
97 These instructions are scheduled like everything else, so you should stop at
98 the first branch instruction.
99
100 */
101
102 /* This is required by skip prologue and by m32r_init_extra_frame_info.
103 The results of decoding a prologue should be cached because this
104 thrashing is getting nuts.
105 I am thinking of making a container class with two indexes, name and
106 address. It may be better to extend the symbol table.
107 */
108
109 static void
110 decode_prologue (CORE_ADDR start_pc, CORE_ADDR scan_limit, CORE_ADDR *pl_endptr, /* var parameter */
111 unsigned long *framelength, struct frame_info *fi,
112 struct frame_saved_regs *fsr)
113 {
114 unsigned long framesize;
115 int insn;
116 int op1;
117 int maybe_one_more = 0;
118 CORE_ADDR after_prologue = 0;
119 CORE_ADDR after_stack_adjust = 0;
120 CORE_ADDR current_pc;
121
122
123 framesize = 0;
124 after_prologue = 0;
125 insn_debug (("rd prolog l(%d)\n", scan_limit - current_pc));
126
127 for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
128 {
129
130 insn = read_memory_unsigned_integer (current_pc, 2);
131 dump_insn ("insn-1", current_pc, insn); /* MTZ */
132
133 /* If this is a 32 bit instruction, we dont want to examine its
134 immediate data as though it were an instruction */
135 if (current_pc & 0x02)
136 { /* Clear the parallel execution bit from 16 bit instruction */
137 if (maybe_one_more)
138 { /* The last instruction was a branch, usually terminates
139 the series, but if this is a parallel instruction,
140 it may be a stack framing instruction */
141 if (!(insn & 0x8000))
142 {
143 insn_debug (("Really done"));
144 break; /* nope, we are really done */
145 }
146 }
147 insn &= 0x7fff; /* decode this instruction further */
148 }
149 else
150 {
151 if (maybe_one_more)
152 break; /* This isnt the one more */
153 if (insn & 0x8000)
154 {
155 insn_debug (("32 bit insn\n"));
156 if (current_pc == scan_limit)
157 scan_limit += 2; /* extend the search */
158 current_pc += 2; /* skip the immediate data */
159 if (insn == 0x8faf) /* add3 sp, sp, xxxx */
160 /* add 16 bit sign-extended offset */
161 {
162 insn_debug (("stack increment\n"));
163 framesize += -((short) read_memory_unsigned_integer (current_pc, 2));
164 }
165 else
166 {
167 if (((insn >> 8) == 0xe4) && /* ld24 r4, xxxxxx; sub sp, r4 */
168 read_memory_unsigned_integer (current_pc + 2, 2) == 0x0f24)
169 { /* subtract 24 bit sign-extended negative-offset */
170 dump_insn ("insn-2", current_pc + 2, insn);
171 insn = read_memory_unsigned_integer (current_pc - 2, 4);
172 dump_insn ("insn-3(l4)", current_pc - 2, insn);
173 if (insn & 0x00800000) /* sign extend */
174 insn |= 0xff000000; /* negative */
175 else
176 insn &= 0x00ffffff; /* positive */
177 framesize += insn;
178 }
179 }
180 after_prologue = current_pc;
181 continue;
182 }
183 }
184 op1 = insn & 0xf000; /* isolate just the first nibble */
185
186 if ((insn & 0xf0ff) == 0x207f)
187 { /* st reg, @-sp */
188 int regno;
189 insn_debug (("push\n"));
190 #if 0 /* No, PUSH FP is not an indication that we will use a frame pointer. */
191 if (((insn & 0xffff) == 0x2d7f) && fi)
192 fi->using_frame_pointer = 1;
193 #endif
194 framesize += 4;
195 #if 0
196 /* Why should we increase the scan limit, just because we did a push?
197 And if there is a reason, surely we would only want to do it if we
198 had already reached the scan limit... */
199 if (current_pc == scan_limit)
200 scan_limit += 2;
201 #endif
202 regno = ((insn >> 8) & 0xf);
203 if (fsr) /* save_regs offset */
204 fsr->regs[regno] = framesize;
205 after_prologue = 0;
206 continue;
207 }
208 if ((insn >> 8) == 0x4f) /* addi sp, xx */
209 /* add 8 bit sign-extended offset */
210 {
211 int stack_adjust = (char) (insn & 0xff);
212
213 /* there are probably two of these stack adjustments:
214 1) A negative one in the prologue, and
215 2) A positive one in the epilogue.
216 We are only interested in the first one. */
217
218 if (stack_adjust < 0)
219 {
220 framesize -= stack_adjust;
221 after_prologue = 0;
222 /* A frameless function may have no "mv fp, sp".
223 In that case, this is the end of the prologue. */
224 after_stack_adjust = current_pc + 2;
225 }
226 continue;
227 }
228 if (insn == 0x1d8f)
229 { /* mv fp, sp */
230 if (fi)
231 fi->using_frame_pointer = 1; /* fp is now valid */
232 insn_debug (("done fp found\n"));
233 after_prologue = current_pc + 2;
234 break; /* end of stack adjustments */
235 }
236 if (insn == 0x7000) /* Nop looks like a branch, continue explicitly */
237 {
238 insn_debug (("nop\n"));
239 after_prologue = current_pc + 2;
240 continue; /* nop occurs between pushes */
241 }
242 /* End of prolog if any of these are branch instructions */
243 if ((op1 == 0x7000)
244 || (op1 == 0xb000)
245 || (op1 == 0xf000))
246 {
247 after_prologue = current_pc;
248 insn_debug (("Done: branch\n"));
249 maybe_one_more = 1;
250 continue;
251 }
252 /* Some of the branch instructions are mixed with other types */
253 if (op1 == 0x1000)
254 {
255 int subop = insn & 0x0ff0;
256 if ((subop == 0x0ec0) || (subop == 0x0fc0))
257 {
258 insn_debug (("done: jmp\n"));
259 after_prologue = current_pc;
260 maybe_one_more = 1;
261 continue; /* jmp , jl */
262 }
263 }
264 }
265
266 if (current_pc >= scan_limit)
267 {
268 if (pl_endptr)
269 {
270 #if 1
271 if (after_stack_adjust != 0)
272 /* We did not find a "mv fp,sp", but we DID find
273 a stack_adjust. Is it safe to use that as the
274 end of the prologue? I just don't know. */
275 {
276 *pl_endptr = after_stack_adjust;
277 if (framelength)
278 *framelength = framesize;
279 }
280 else
281 #endif
282 /* We reached the end of the loop without finding the end
283 of the prologue. No way to win -- we should report failure.
284 The way we do that is to return the original start_pc.
285 GDB will set a breakpoint at the start of the function (etc.) */
286 *pl_endptr = start_pc;
287 }
288 return;
289 }
290 if (after_prologue == 0)
291 after_prologue = current_pc;
292
293 insn_debug ((" framesize %d, firstline %08x\n", framesize, after_prologue));
294 if (framelength)
295 *framelength = framesize;
296 if (pl_endptr)
297 *pl_endptr = after_prologue;
298 } /* decode_prologue */
299
300 /* Function: skip_prologue
301 Find end of function prologue */
302
303 CORE_ADDR
304 m32r_skip_prologue (CORE_ADDR pc)
305 {
306 CORE_ADDR func_addr, func_end;
307 struct symtab_and_line sal;
308
309 /* See what the symbol table says */
310
311 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
312 {
313 sal = find_pc_line (func_addr, 0);
314
315 if (sal.line != 0 && sal.end <= func_end)
316 {
317
318 insn_debug (("BP after prologue %08x\n", sal.end));
319 func_end = sal.end;
320 }
321 else
322 /* Either there's no line info, or the line after the prologue is after
323 the end of the function. In this case, there probably isn't a
324 prologue. */
325 {
326 insn_debug (("No line info, line(%x) sal_end(%x) funcend(%x)\n",
327 sal.line, sal.end, func_end));
328 func_end = min (func_end, func_addr + DEFAULT_SEARCH_LIMIT);
329 }
330 }
331 else
332 func_end = pc + DEFAULT_SEARCH_LIMIT;
333 decode_prologue (pc, func_end, &sal.end, 0, 0, 0);
334 return sal.end;
335 }
336
337 static unsigned long
338 m32r_scan_prologue (struct frame_info *fi, struct frame_saved_regs *fsr)
339 {
340 struct symtab_and_line sal;
341 CORE_ADDR prologue_start, prologue_end, current_pc;
342 unsigned long framesize = 0;
343
344 /* this code essentially duplicates skip_prologue,
345 but we need the start address below. */
346
347 if (find_pc_partial_function (fi->pc, NULL, &prologue_start, &prologue_end))
348 {
349 sal = find_pc_line (prologue_start, 0);
350
351 if (sal.line == 0) /* no line info, use current PC */
352 if (prologue_start == entry_point_address ())
353 return 0;
354 }
355 else
356 {
357 prologue_start = fi->pc;
358 prologue_end = prologue_start + 48; /* We're in the boondocks:
359 allow for 16 pushes, an add,
360 and "mv fp,sp" */
361 }
362 #if 0
363 prologue_end = min (prologue_end, fi->pc);
364 #endif
365 insn_debug (("fipc(%08x) start(%08x) end(%08x)\n",
366 fi->pc, prologue_start, prologue_end));
367 prologue_end = min (prologue_end, prologue_start + DEFAULT_SEARCH_LIMIT);
368 decode_prologue (prologue_start, prologue_end, &prologue_end, &framesize,
369 fi, fsr);
370 return framesize;
371 }
372
373 /* Function: init_extra_frame_info
374 This function actually figures out the frame address for a given pc and
375 sp. This is tricky on the m32r because we sometimes don't use an explicit
376 frame pointer, and the previous stack pointer isn't necessarily recorded
377 on the stack. The only reliable way to get this info is to
378 examine the prologue. */
379
380 void
381 m32r_init_extra_frame_info (struct frame_info *fi)
382 {
383 int reg;
384
385 if (fi->next)
386 fi->pc = FRAME_SAVED_PC (fi->next);
387
388 memset (fi->fsr.regs, '\000', sizeof fi->fsr.regs);
389
390 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
391 {
392 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
393 by assuming it's always FP. */
394 fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
395 fi->framesize = 0;
396 return;
397 }
398 else
399 {
400 fi->using_frame_pointer = 0;
401 fi->framesize = m32r_scan_prologue (fi, &fi->fsr);
402
403 if (!fi->next)
404 if (fi->using_frame_pointer)
405 {
406 fi->frame = read_register (FP_REGNUM);
407 }
408 else
409 fi->frame = read_register (SP_REGNUM);
410 else
411 /* fi->next means this is not the innermost frame */ if (fi->using_frame_pointer)
412 /* we have an FP */
413 if (fi->next->fsr.regs[FP_REGNUM] != 0) /* caller saved our FP */
414 fi->frame = read_memory_integer (fi->next->fsr.regs[FP_REGNUM], 4);
415 for (reg = 0; reg < NUM_REGS; reg++)
416 if (fi->fsr.regs[reg] != 0)
417 fi->fsr.regs[reg] = fi->frame + fi->framesize - fi->fsr.regs[reg];
418 }
419 }
420
421 /* Function: mn10300_virtual_frame_pointer
422 Return the register that the function uses for a frame pointer,
423 plus any necessary offset to be applied to the register before
424 any frame pointer offsets. */
425
426 void
427 m32r_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset)
428 {
429 struct frame_info fi;
430
431 /* Set up a dummy frame_info. */
432 fi.next = NULL;
433 fi.prev = NULL;
434 fi.frame = 0;
435 fi.pc = pc;
436
437 /* Analyze the prolog and fill in the extra info. */
438 m32r_init_extra_frame_info (&fi);
439
440
441 /* Results will tell us which type of frame it uses. */
442 if (fi.using_frame_pointer)
443 {
444 *reg = FP_REGNUM;
445 *offset = 0;
446 }
447 else
448 {
449 *reg = SP_REGNUM;
450 *offset = 0;
451 }
452 }
453
454 /* Function: find_callers_reg
455 Find REGNUM on the stack. Otherwise, it's in an active register. One thing
456 we might want to do here is to check REGNUM against the clobber mask, and
457 somehow flag it as invalid if it isn't saved on the stack somewhere. This
458 would provide a graceful failure mode when trying to get the value of
459 caller-saves registers for an inner frame. */
460
461 CORE_ADDR
462 m32r_find_callers_reg (struct frame_info *fi, int regnum)
463 {
464 for (; fi; fi = fi->next)
465 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
466 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
467 else if (fi->fsr.regs[regnum] != 0)
468 return read_memory_integer (fi->fsr.regs[regnum],
469 REGISTER_RAW_SIZE (regnum));
470 return read_register (regnum);
471 }
472
473 /* Function: frame_chain
474 Given a GDB frame, determine the address of the calling function's frame.
475 This will be used to create a new GDB frame struct, and then
476 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
477 For m32r, we save the frame size when we initialize the frame_info. */
478
479 CORE_ADDR
480 m32r_frame_chain (struct frame_info *fi)
481 {
482 CORE_ADDR fn_start, callers_pc, fp;
483
484 /* is this a dummy frame? */
485 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
486 return fi->frame; /* dummy frame same as caller's frame */
487
488 /* is caller-of-this a dummy frame? */
489 callers_pc = FRAME_SAVED_PC (fi); /* find out who called us: */
490 fp = m32r_find_callers_reg (fi, FP_REGNUM);
491 if (PC_IN_CALL_DUMMY (callers_pc, fp, fp))
492 return fp; /* dummy frame's frame may bear no relation to ours */
493
494 if (find_pc_partial_function (fi->pc, 0, &fn_start, 0))
495 if (fn_start == entry_point_address ())
496 return 0; /* in _start fn, don't chain further */
497 if (fi->framesize == 0)
498 {
499 printf_filtered ("cannot determine frame size @ %s , pc(%s)\n",
500 paddr (fi->frame),
501 paddr (fi->pc));
502 return 0;
503 }
504 insn_debug (("m32rx frame %08x\n", fi->frame + fi->framesize));
505 return fi->frame + fi->framesize;
506 }
507
508 /* Function: push_return_address (pc)
509 Set up the return address for the inferior function call.
510 Necessary for targets that don't actually execute a JSR/BSR instruction
511 (ie. when using an empty CALL_DUMMY) */
512
513 CORE_ADDR
514 m32r_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
515 {
516 write_register (RP_REGNUM, CALL_DUMMY_ADDRESS ());
517 return sp;
518 }
519
520
521 /* Function: pop_frame
522 Discard from the stack the innermost frame,
523 restoring all saved registers. */
524
525 struct frame_info *
526 m32r_pop_frame (struct frame_info *frame)
527 {
528 int regnum;
529
530 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
531 generic_pop_dummy_frame ();
532 else
533 {
534 for (regnum = 0; regnum < NUM_REGS; regnum++)
535 if (frame->fsr.regs[regnum] != 0)
536 write_register (regnum,
537 read_memory_integer (frame->fsr.regs[regnum], 4));
538
539 write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
540 write_register (SP_REGNUM, read_register (FP_REGNUM));
541 if (read_register (PSW_REGNUM) & 0x80)
542 write_register (SPU_REGNUM, read_register (SP_REGNUM));
543 else
544 write_register (SPI_REGNUM, read_register (SP_REGNUM));
545 }
546 flush_cached_frames ();
547 return NULL;
548 }
549
550 /* Function: frame_saved_pc
551 Find the caller of this frame. We do this by seeing if RP_REGNUM is saved
552 in the stack anywhere, otherwise we get it from the registers. */
553
554 CORE_ADDR
555 m32r_frame_saved_pc (struct frame_info *fi)
556 {
557 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
558 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
559 else
560 return m32r_find_callers_reg (fi, RP_REGNUM);
561 }
562
563 /* Function: push_arguments
564 Setup the function arguments for calling a function in the inferior.
565
566 On the Mitsubishi M32R architecture, there are four registers (R0 to R3)
567 which are dedicated for passing function arguments. Up to the first
568 four arguments (depending on size) may go into these registers.
569 The rest go on the stack.
570
571 Arguments that are smaller than 4 bytes will still take up a whole
572 register or a whole 32-bit word on the stack, and will be
573 right-justified in the register or the stack word. This includes
574 chars, shorts, and small aggregate types.
575
576 Arguments of 8 bytes size are split between two registers, if
577 available. If only one register is available, the argument will
578 be split between the register and the stack. Otherwise it is
579 passed entirely on the stack. Aggregate types with sizes between
580 4 and 8 bytes are passed entirely on the stack, and are left-justified
581 within the double-word (as opposed to aggregates smaller than 4 bytes
582 which are right-justified).
583
584 Aggregates of greater than 8 bytes are first copied onto the stack,
585 and then a pointer to the copy is passed in the place of the normal
586 argument (either in a register if available, or on the stack).
587
588 Functions that must return an aggregate type can return it in the
589 normal return value registers (R0 and R1) if its size is 8 bytes or
590 less. For larger return values, the caller must allocate space for
591 the callee to copy the return value to. A pointer to this space is
592 passed as an implicit first argument, always in R0. */
593
594 CORE_ADDR
595 m32r_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
596 unsigned char struct_return, CORE_ADDR struct_addr)
597 {
598 int stack_offset, stack_alloc;
599 int argreg;
600 int argnum;
601 struct type *type;
602 CORE_ADDR regval;
603 char *val;
604 char valbuf[4];
605 int len;
606 int odd_sized_struct;
607
608 /* first force sp to a 4-byte alignment */
609 sp = sp & ~3;
610
611 argreg = ARG0_REGNUM;
612 /* The "struct return pointer" pseudo-argument goes in R0 */
613 if (struct_return)
614 write_register (argreg++, struct_addr);
615
616 /* Now make sure there's space on the stack */
617 for (argnum = 0, stack_alloc = 0;
618 argnum < nargs; argnum++)
619 stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
620 sp -= stack_alloc; /* make room on stack for args */
621
622
623 /* Now load as many as possible of the first arguments into
624 registers, and push the rest onto the stack. There are 16 bytes
625 in four registers available. Loop thru args from first to last. */
626
627 argreg = ARG0_REGNUM;
628 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
629 {
630 type = VALUE_TYPE (args[argnum]);
631 len = TYPE_LENGTH (type);
632 memset (valbuf, 0, sizeof (valbuf));
633 if (len < 4)
634 { /* value gets right-justified in the register or stack word */
635 memcpy (valbuf + (4 - len),
636 (char *) VALUE_CONTENTS (args[argnum]), len);
637 val = valbuf;
638 }
639 else
640 val = (char *) VALUE_CONTENTS (args[argnum]);
641
642 if (len > 4 && (len & 3) != 0)
643 odd_sized_struct = 1; /* such structs go entirely on stack */
644 else
645 odd_sized_struct = 0;
646 while (len > 0)
647 {
648 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
649 { /* must go on the stack */
650 write_memory (sp + stack_offset, val, 4);
651 stack_offset += 4;
652 }
653 /* NOTE WELL!!!!! This is not an "else if" clause!!!
654 That's because some *&^%$ things get passed on the stack
655 AND in the registers! */
656 if (argreg <= ARGLAST_REGNUM)
657 { /* there's room in a register */
658 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
659 write_register (argreg++, regval);
660 }
661 /* Store the value 4 bytes at a time. This means that things
662 larger than 4 bytes may go partly in registers and partly
663 on the stack. */
664 len -= REGISTER_RAW_SIZE (argreg);
665 val += REGISTER_RAW_SIZE (argreg);
666 }
667 }
668 return sp;
669 }
670
671 /* Function: fix_call_dummy
672 If there is real CALL_DUMMY code (eg. on the stack), this function
673 has the responsability to insert the address of the actual code that
674 is the target of the target function call. */
675
676 void
677 m32r_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
678 value_ptr *args, struct type *type, int gcc_p)
679 {
680 /* ld24 r8, <(imm24) fun> */
681 *(unsigned long *) (dummy) = (fun & 0x00ffffff) | 0xe8000000;
682 }
683
684
685 /* Function: m32r_write_sp
686 Because SP is really a read-only register that mirrors either SPU or SPI,
687 we must actually write one of those two as well, depending on PSW. */
688
689 void
690 m32r_write_sp (CORE_ADDR val)
691 {
692 unsigned long psw = read_register (PSW_REGNUM);
693
694 if (psw & 0x80) /* stack mode: user or interrupt */
695 write_register (SPU_REGNUM, val);
696 else
697 write_register (SPI_REGNUM, val);
698 write_register (SP_REGNUM, val);
699 }
700
701 void
702 _initialize_m32r_tdep (void)
703 {
704 tm_print_insn = print_insn_m32r;
705 }