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1 /* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger
2 Copyright 1999, 2001 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "symtab.h"
23 #include "value.h"
24 #include "gdbcmd.h"
25 #include "regcache.h"
26
27 /* Functions declared and used only in this file */
28
29 static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue);
30
31 static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame);
32
33 static int get_insn (CORE_ADDR pc);
34
35 /* Functions exported from this file */
36
37 int mcore_use_struct_convention (int gcc_p, struct type *type);
38
39 void _initialize_mcore (void);
40
41 void mcore_init_extra_frame_info (struct frame_info *fi);
42
43 CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi);
44
45 CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum);
46
47 CORE_ADDR mcore_frame_args_address (struct frame_info *fi);
48
49 CORE_ADDR mcore_frame_locals_address (struct frame_info *fi);
50
51 void mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset);
52
53 CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
54
55 CORE_ADDR mcore_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp,
56 unsigned char struct_return, CORE_ADDR struct_addr);
57
58 void mcore_pop_frame (struct frame_info *fi);
59
60 CORE_ADDR mcore_skip_prologue (CORE_ADDR pc);
61
62 CORE_ADDR mcore_frame_chain (struct frame_info *fi);
63
64 unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size);
65
66 int mcore_use_struct_convention (int gcc_p, struct type *type);
67
68 void mcore_store_return_value (struct type *type, char *valbuf);
69
70 CORE_ADDR mcore_extract_struct_value_address (char *regbuf);
71
72 void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf);
73
74 #ifdef MCORE_DEBUG
75 int mcore_debug = 0;
76 #endif
77
78 /* The registers of the Motorola MCore processors */
79 /* *INDENT-OFF* */
80 char *mcore_register_names[] =
81 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
82 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
83 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
84 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
85 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
86 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
87 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
88 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
89 "pc" };
90 /* *INDENT-ON* */
91
92
93
94 /* Additional info that we use for managing frames */
95 struct frame_extra_info
96 {
97 /* A generic status word */
98 int status;
99
100 /* Size of this frame */
101 int framesize;
102
103 /* The register that is acting as a frame pointer, if
104 it is being used. This is undefined if status
105 does not contain the flag MY_FRAME_IN_FP. */
106 int fp_regnum;
107 };
108
109 /* frame_extra_info status flags */
110
111 /* The base of the current frame is actually in the stack pointer.
112 This happens when there is no frame pointer (MCore ABI does not
113 require a frame pointer) or when we're stopped in the prologue or
114 epilogue itself. In these cases, mcore_analyze_prologue will need
115 to update fi->frame before returning or analyzing the register
116 save instructions. */
117 #define MY_FRAME_IN_SP 0x1
118
119 /* The base of the current frame is in a frame pointer register.
120 This register is noted in frame_extra_info->fp_regnum.
121
122 Note that the existence of an FP might also indicate that the
123 function has called alloca. */
124 #define MY_FRAME_IN_FP 0x2
125
126 /* This flag is set to indicate that this frame is the top-most
127 frame. This tells frame chain not to bother trying to unwind
128 beyond this frame. */
129 #define NO_MORE_FRAMES 0x4
130
131 /* Instruction macros used for analyzing the prologue */
132 #define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */
133 #define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */
134 #define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */
135 #define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */
136 #define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */
137 #define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */
138 #define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */
139 #define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */
140 #define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */
141 #define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */
142 #define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */
143 #define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */
144 #define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */
145 #define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */
146 #define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */
147 #define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */
148 #define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */
149 #define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */
150 #define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */
151 #define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */
152
153 #define IS_R1_ADJUSTER(x) \
154 (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \
155 || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \
156 || IS_IXH1(x) || IS_IXW1(x))
157 \f
158
159 #ifdef MCORE_DEBUG
160 static void
161 mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn)
162 {
163 if (mcore_debug)
164 {
165 printf_filtered ("MCORE: %s %08x %08x ",
166 commnt, (unsigned int) pc, (unsigned int) insn);
167 (*tm_print_insn) (pc, &tm_print_insn_info);
168 printf_filtered ("\n");
169 }
170 }
171 #define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; }
172 #else /* !MCORE_DEBUG */
173 #define mcore_dump_insn(a,b,c) {}
174 #define mcore_insn_debug(args) {}
175 #endif
176
177 /* Given the address at which to insert a breakpoint (BP_ADDR),
178 what will that breakpoint be?
179
180 For MCore, we have a breakpoint instruction. Since all MCore
181 instructions are 16 bits, this is all we need, regardless of
182 address. bpkt = 0x0000 */
183
184 unsigned char *
185 mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size)
186 {
187 static char breakpoint[] =
188 {0x00, 0x00};
189 *bp_size = 2;
190 return breakpoint;
191 }
192
193 /* Helper function for several routines below. This funtion simply
194 sets up a fake, aka dummy, frame (not a _call_ dummy frame) that
195 we can analyze with mcore_analyze_prologue. */
196
197 static struct frame_info *
198 analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame)
199 {
200 static struct frame_info *dummy = NULL;
201
202 if (dummy == NULL)
203 {
204 dummy = (struct frame_info *) xmalloc (sizeof (struct frame_info));
205 dummy->saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS);
206 dummy->extra_info =
207 (struct frame_extra_info *) xmalloc (sizeof (struct frame_extra_info));
208 }
209
210 dummy->next = NULL;
211 dummy->prev = NULL;
212 dummy->pc = pc;
213 dummy->frame = frame;
214 dummy->extra_info->status = 0;
215 dummy->extra_info->framesize = 0;
216 memset (dummy->saved_regs, '\000', SIZEOF_FRAME_SAVED_REGS);
217 mcore_analyze_prologue (dummy, 0, 0);
218 return dummy;
219 }
220
221 /* Function prologues on the Motorola MCore processors consist of:
222
223 - adjustments to the stack pointer (r1 used as scratch register)
224 - store word/multiples that use r0 as the base address
225 - making a copy of r0 into another register (a "frame" pointer)
226
227 Note that the MCore really doesn't have a real frame pointer.
228 Instead, the compiler may copy the SP into a register (usually
229 r8) to act as an arg pointer. For our target-dependent purposes,
230 the frame info's "frame" member will be the beginning of the
231 frame. The SP could, in fact, point below this.
232
233 The prologue ends when an instruction fails to meet either of
234 the first two criteria or when an FP is made. We make a special
235 exception for gcc. When compiling unoptimized code, gcc will
236 setup stack slots. We need to make sure that we skip the filling
237 of these stack slots as much as possible. This is only done
238 when SKIP_PROLOGUE is set, so that it does not mess up
239 backtraces. */
240
241 /* Analyze the prologue of frame FI to determine where registers are saved,
242 the end of the prologue, etc. Return the address of the first line
243 of "real" code (i.e., the end of the prologue). */
244
245 static CORE_ADDR
246 mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue)
247 {
248 CORE_ADDR func_addr, func_end, addr, stop;
249 CORE_ADDR stack_size;
250 int insn, rn;
251 int status, fp_regnum, flags;
252 int framesize;
253 int register_offsets[NUM_REGS];
254 char *name;
255
256 /* If provided, use the PC in the frame to look up the
257 start of this function. */
258 pc = (fi == NULL ? pc : fi->pc);
259
260 /* Find the start of this function. */
261 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
262
263 /* If the start of this function could not be found or if the debbuger
264 is stopped at the first instruction of the prologue, do nothing. */
265 if (status == 0)
266 return pc;
267
268 /* If the debugger is entry function, give up. */
269 if (func_addr == entry_point_address ())
270 {
271 if (fi != NULL)
272 fi->extra_info->status |= NO_MORE_FRAMES;
273 return pc;
274 }
275
276 /* At the start of a function, our frame is in the stack pointer. */
277 flags = MY_FRAME_IN_SP;
278
279 /* Start decoding the prologue. We start by checking two special cases:
280
281 1. We're about to return
282 2. We're at the first insn of the prologue.
283
284 If we're about to return, our frame has already been deallocated.
285 If we are stopped at the first instruction of a prologue,
286 then our frame has not yet been set up. */
287
288 /* Get the first insn from memory (all MCore instructions are 16 bits) */
289 mcore_insn_debug (("MCORE: starting prologue decoding\n"));
290 insn = get_insn (pc);
291 mcore_dump_insn ("got 1: ", pc, insn);
292
293 /* Check for return. */
294 if (fi != NULL && IS_RTS (insn))
295 {
296 mcore_insn_debug (("MCORE: got jmp r15"));
297 if (fi->next == NULL)
298 fi->frame = read_sp ();
299 return fi->pc;
300 }
301
302 /* Check for first insn of prologue */
303 if (fi != NULL && fi->pc == func_addr)
304 {
305 if (fi->next == NULL)
306 fi->frame = read_sp ();
307 return fi->pc;
308 }
309
310 /* Figure out where to stop scanning */
311 stop = (fi ? fi->pc : func_end);
312
313 /* Don't walk off the end of the function */
314 stop = (stop > func_end ? func_end : stop);
315
316 /* REGISTER_OFFSETS will contain offsets, from the top of the frame
317 (NOT the frame pointer), for the various saved registers or -1
318 if the register is not saved. */
319 for (rn = 0; rn < NUM_REGS; rn++)
320 register_offsets[rn] = -1;
321
322 /* Analyze the prologue. Things we determine from analyzing the
323 prologue include:
324 * the size of the frame
325 * where saved registers are located (and which are saved)
326 * FP used? */
327 mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n",
328 (unsigned int) func_addr, (unsigned int) stop));
329
330 framesize = 0;
331 for (addr = func_addr; addr < stop; addr += 2)
332 {
333 /* Get next insn */
334 insn = get_insn (addr);
335 mcore_dump_insn ("got 2: ", addr, insn);
336
337 if (IS_SUBI0 (insn))
338 {
339 int offset = 1 + ((insn >> 4) & 0x1f);
340 mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset));
341 framesize += offset;
342 continue;
343 }
344 else if (IS_STM (insn))
345 {
346 /* Spill register(s) */
347 int offset;
348 int start_register;
349
350 /* BIG WARNING! The MCore ABI does not restrict functions
351 to taking only one stack allocation. Therefore, when
352 we save a register, we record the offset of where it was
353 saved relative to the current framesize. This will
354 then give an offset from the SP upon entry to our
355 function. Remember, framesize is NOT constant until
356 we're done scanning the prologue. */
357 start_register = (insn & 0xf);
358 mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register));
359
360 for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4)
361 {
362 register_offsets[rn] = framesize - offset;
363 mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn,
364 register_offsets[rn], offset));
365 }
366 mcore_insn_debug (("MCORE: continuing\n"));
367 continue;
368 }
369 else if (IS_STWx0 (insn))
370 {
371 /* Spill register: see note for IS_STM above. */
372 int imm;
373
374 rn = (insn >> 8) & 0xf;
375 imm = (insn >> 4) & 0xf;
376 register_offsets[rn] = framesize - (imm << 2);
377 mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn]));
378 mcore_insn_debug (("MCORE: continuing\n"));
379 continue;
380 }
381 else if (IS_MOVx0 (insn))
382 {
383 /* We have a frame pointer, so this prologue is over. Note
384 the register which is acting as the frame pointer. */
385 flags |= MY_FRAME_IN_FP;
386 flags &= ~MY_FRAME_IN_SP;
387 fp_regnum = insn & 0xf;
388 mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum));
389
390 /* If we found an FP, we're at the end of the prologue. */
391 mcore_insn_debug (("MCORE: end of prologue\n"));
392 if (skip_prologue)
393 continue;
394
395 /* If we're decoding prologue, stop here. */
396 addr += 2;
397 break;
398 }
399 else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum))
400 {
401 /* Special case. Skip over stack slot allocs, too. */
402 mcore_insn_debug (("MCORE: push arg onto stack.\n"));
403 continue;
404 }
405 else if (IS_LRW1 (insn) || IS_MOVI1 (insn)
406 || IS_BGENI1 (insn) || IS_BMASKI1 (insn))
407 {
408 int adjust = 0;
409 int offset = 0;
410 int insn2;
411
412 mcore_insn_debug (("MCORE: looking at large frame\n"));
413 if (IS_LRW1 (insn))
414 {
415 adjust =
416 read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4);
417 }
418 else if (IS_MOVI1 (insn))
419 adjust = (insn >> 4) & 0x7f;
420 else if (IS_BGENI1 (insn))
421 adjust = 1 << ((insn >> 4) & 0x1f);
422 else /* IS_BMASKI (insn) */
423 adjust = (1 << (adjust >> 4) & 0x1f) - 1;
424
425 mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust));
426
427 /* May have zero or more insns which modify r1 */
428 mcore_insn_debug (("MCORE: looking for r1 adjusters...\n"));
429 offset = 2;
430 insn2 = get_insn (addr + offset);
431 while (IS_R1_ADJUSTER (insn2))
432 {
433 int imm;
434
435 imm = (insn2 >> 4) & 0x1f;
436 mcore_dump_insn ("got 3: ", addr + offset, insn);
437 if (IS_ADDI1 (insn2))
438 {
439 adjust += (imm + 1);
440 mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1));
441 }
442 else if (IS_SUBI1 (insn2))
443 {
444 adjust -= (imm + 1);
445 mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1));
446 }
447 else if (IS_RSUBI1 (insn2))
448 {
449 adjust = imm - adjust;
450 mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1));
451 }
452 else if (IS_NOT1 (insn2))
453 {
454 adjust = ~adjust;
455 mcore_insn_debug (("MCORE: not r1\n"));
456 }
457 else if (IS_ROTLI1 (insn2))
458 {
459 adjust <<= imm;
460 mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1));
461 }
462 else if (IS_BSETI1 (insn2))
463 {
464 adjust |= (1 << imm);
465 mcore_insn_debug (("MCORE: bseti r1,%d\n", imm));
466 }
467 else if (IS_BCLRI1 (insn2))
468 {
469 adjust &= ~(1 << imm);
470 mcore_insn_debug (("MCORE: bclri r1,%d\n", imm));
471 }
472 else if (IS_IXH1 (insn2))
473 {
474 adjust *= 3;
475 mcore_insn_debug (("MCORE: ix.h r1,r1\n"));
476 }
477 else if (IS_IXW1 (insn2))
478 {
479 adjust *= 5;
480 mcore_insn_debug (("MCORE: ix.w r1,r1\n"));
481 }
482
483 offset += 2;
484 insn2 = get_insn (addr + offset);
485 };
486
487 mcore_insn_debug (("MCORE: done looking for r1 adjusters\n"));
488
489 /* If the next insn adjusts the stack pointer, we keep everything;
490 if not, we scrap it and we've found the end of the prologue. */
491 if (IS_SUB01 (insn2))
492 {
493 addr += offset;
494 framesize += adjust;
495 mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust));
496 mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr));
497 mcore_insn_debug (("MCORE: continuing\n"));
498 continue;
499 }
500
501 /* None of these instructions are prologue, so don't touch
502 anything. */
503 mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n"));
504 break;
505 }
506
507 /* This is not a prologue insn, so stop here. */
508 mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n"));
509 break;
510 }
511
512 mcore_insn_debug (("MCORE: done analyzing prologue\n"));
513 mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr));
514
515 /* Save everything we have learned about this frame into FI. */
516 if (fi != NULL)
517 {
518 fi->extra_info->framesize = framesize;
519 fi->extra_info->fp_regnum = fp_regnum;
520 fi->extra_info->status = flags;
521
522 /* Fix the frame pointer. When gcc uses r8 as a frame pointer,
523 it is really an arg ptr. We adjust fi->frame to be a "real"
524 frame pointer. */
525 if (fi->next == NULL)
526 {
527 if (fi->extra_info->status & MY_FRAME_IN_SP)
528 fi->frame = read_sp () + framesize;
529 else
530 fi->frame = read_register (fp_regnum) + framesize;
531 }
532
533 /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS
534 are computed relative to the top of the frame. */
535 for (rn = 0; rn < NUM_REGS; rn++)
536 {
537 if (register_offsets[rn] >= 0)
538 {
539 fi->saved_regs[rn] = fi->frame - register_offsets[rn];
540 mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n",
541 mcore_register_names[rn], fi->saved_regs[rn],
542 read_memory_integer (fi->saved_regs[rn], 4)));
543 }
544 }
545 }
546
547 /* Return addr of first non-prologue insn. */
548 return addr;
549 }
550
551 /* Given a GDB frame, determine the address of the calling function's frame.
552 This will be used to create a new GDB frame struct, and then
553 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */
554
555 CORE_ADDR
556 mcore_frame_chain (struct frame_info * fi)
557 {
558 struct frame_info *dummy;
559 CORE_ADDR callers_addr;
560
561 /* Analyze the prologue of this function. */
562 if (fi->extra_info->status == 0)
563 mcore_analyze_prologue (fi, 0, 0);
564
565 /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */
566 if (fi->extra_info->status & NO_MORE_FRAMES)
567 return 0;
568
569 /* Now that we've analyzed our prologue, we can start to ask
570 for information about our caller. The easiest way to do
571 this is to analyze our caller's prologue.
572
573 If our caller has a frame pointer, then we need to find
574 the value of that register upon entry to our frame.
575 This value is either in fi->saved_regs[rn] if it's saved,
576 or it's still in a register.
577
578 If our caller does not have a frame pointer, then his frame base
579 is <our base> + -<caller's frame size>. */
580 dummy = analyze_dummy_frame (FRAME_SAVED_PC (fi), fi->frame);
581
582 if (dummy->extra_info->status & MY_FRAME_IN_FP)
583 {
584 int fp = dummy->extra_info->fp_regnum;
585
586 /* Our caller has a frame pointer. */
587 if (fi->saved_regs[fp] != 0)
588 {
589 /* The "FP" was saved on the stack. Don't forget to adjust
590 the "FP" with the framesize to get a real FP. */
591 callers_addr = read_memory_integer (fi->saved_regs[fp], REGISTER_SIZE)
592 + dummy->extra_info->framesize;
593 }
594 else
595 {
596 /* It's still in the register. Don't forget to adjust
597 the "FP" with the framesize to get a real FP. */
598 callers_addr = read_register (fp) + dummy->extra_info->framesize;
599 }
600 }
601 else
602 {
603 /* Our caller does not have a frame pointer. */
604 callers_addr = fi->frame + dummy->extra_info->framesize;
605 }
606
607 return callers_addr;
608 }
609
610 /* Skip the prologue of the function at PC. */
611
612 CORE_ADDR
613 mcore_skip_prologue (CORE_ADDR pc)
614 {
615 CORE_ADDR func_addr, func_end;
616 struct symtab_and_line sal;
617
618 /* If we have line debugging information, then the end of the
619 prologue should be the first assembly instruction of the first
620 source line */
621 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
622 {
623 sal = find_pc_line (func_addr, 0);
624 if (sal.end && sal.end < func_end)
625 return sal.end;
626 }
627
628 return mcore_analyze_prologue (NULL, pc, 1);
629 }
630
631 /* Return the address at which function arguments are offset. */
632 CORE_ADDR
633 mcore_frame_args_address (struct frame_info * fi)
634 {
635 return fi->frame - fi->extra_info->framesize;
636 }
637
638 CORE_ADDR
639 mcore_frame_locals_address (struct frame_info * fi)
640 {
641 return fi->frame - fi->extra_info->framesize;
642 }
643
644 /* Return the frame pointer in use at address PC. */
645
646 void
647 mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset)
648 {
649 struct frame_info *dummy = analyze_dummy_frame (pc, 0);
650 if (dummy->extra_info->status & MY_FRAME_IN_SP)
651 {
652 *reg = SP_REGNUM;
653 *offset = 0;
654 }
655 else
656 {
657 *reg = dummy->extra_info->fp_regnum;
658 *offset = 0;
659 }
660 }
661
662 /* Find the value of register REGNUM in frame FI. */
663
664 CORE_ADDR
665 mcore_find_callers_reg (struct frame_info *fi, int regnum)
666 {
667 for (; fi != NULL; fi = fi->next)
668 {
669 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
670 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
671 else if (fi->saved_regs[regnum] != 0)
672 return read_memory_integer (fi->saved_regs[regnum],
673 REGISTER_SIZE);
674 }
675
676 return read_register (regnum);
677 }
678
679 /* Find the saved pc in frame FI. */
680
681 CORE_ADDR
682 mcore_frame_saved_pc (struct frame_info * fi)
683 {
684
685 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
686 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
687 else
688 return mcore_find_callers_reg (fi, PR_REGNUM);
689 }
690 \f
691 /* INFERIOR FUNCTION CALLS */
692
693 /* This routine gets called when either the user uses the "return"
694 command, or the call dummy breakpoint gets hit. */
695
696 void
697 mcore_pop_frame (struct frame_info *fi)
698 {
699 int rn;
700
701 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
702 generic_pop_dummy_frame ();
703 else
704 {
705 /* Write out the PC we saved. */
706 write_register (PC_REGNUM, FRAME_SAVED_PC (fi));
707
708 /* Restore any saved registers. */
709 for (rn = 0; rn < NUM_REGS; rn++)
710 {
711 if (fi->saved_regs[rn] != 0)
712 {
713 ULONGEST value;
714
715 value = read_memory_unsigned_integer (fi->saved_regs[rn],
716 REGISTER_SIZE);
717 write_register (rn, value);
718 }
719 }
720
721 /* Actually cut back the stack. */
722 write_register (SP_REGNUM, FRAME_FP (fi));
723 }
724
725 /* Finally, throw away any cached frame information. */
726 flush_cached_frames ();
727 }
728
729 /* Setup arguments and PR for a call to the target. First six arguments
730 go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack.
731
732 * Types with lengths greater than REGISTER_SIZE may not be split
733 between registers and the stack, and they must start in an even-numbered
734 register. Subsequent args will go onto the stack.
735
736 * Structs may be split between registers and stack, left-aligned.
737
738 * If the function returns a struct which will not fit into registers (it's
739 more than eight bytes), we must allocate for that, too. Gdb will tell
740 us where this buffer is (STRUCT_ADDR), and we simply place it into
741 FIRST_ARGREG, since the MCORE treats struct returns (of less than eight
742 bytes) as hidden first arguments. */
743
744 CORE_ADDR
745 mcore_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp,
746 unsigned char struct_return, CORE_ADDR struct_addr)
747 {
748 int argreg;
749 int argnum;
750 struct stack_arg
751 {
752 int len;
753 char *val;
754 }
755 *stack_args;
756 int nstack_args = 0;
757
758 stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg));
759
760 argreg = FIRST_ARGREG;
761
762 /* Align the stack. This is mostly a nop, but not always. It will be needed
763 if we call a function which has argument overflow. */
764 sp &= ~3;
765
766 /* If this function returns a struct which does not fit in the
767 return registers, we must pass a buffer to the function
768 which it can use to save the return value. */
769 if (struct_return)
770 write_register (argreg++, struct_addr);
771
772 /* FIXME: what about unions? */
773 for (argnum = 0; argnum < nargs; argnum++)
774 {
775 char *val = (char *) VALUE_CONTENTS (args[argnum]);
776 int len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
777 struct type *type = VALUE_TYPE (args[argnum]);
778 int olen;
779
780 mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n",
781 argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct"));
782 /* Arguments larger than a register must start in an even
783 numbered register. */
784 olen = len;
785
786 if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2)
787 {
788 mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n",
789 len, mcore_register_names[argreg]));
790 argreg++;
791 }
792
793 if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE)
794 || (TYPE_CODE (type) == TYPE_CODE_STRUCT))
795 {
796 /* Something that will fit entirely into registers (or a struct
797 which may be split between registers and stack). */
798 mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum));
799
800 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE)
801 {
802 /* Small structs must be right aligned within the register,
803 the most significant bits are undefined. */
804 write_register (argreg, extract_unsigned_integer (val, len));
805 argreg++;
806 len = 0;
807 }
808
809 while (len > 0 && argreg <= LAST_ARGREG)
810 {
811 write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE));
812 argreg++;
813 val += REGISTER_SIZE;
814 len -= REGISTER_SIZE;
815 }
816
817 /* Any remainder for the stack is noted below... */
818 }
819 else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT
820 && len > REGISTER_SIZE)
821 {
822 /* All subsequent args go onto the stack. */
823 mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n"));
824 argnum = LAST_ARGREG + 1;
825 }
826
827 if (len > 0)
828 {
829 /* Note that this must be saved onto the stack */
830 mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum));
831 stack_args[nstack_args].val = val;
832 stack_args[nstack_args].len = len;
833 nstack_args++;
834 }
835
836 }
837
838 /* We're done with registers and stack allocation. Now do the actual
839 stack pushes. */
840 while (nstack_args--)
841 {
842 sp -= stack_args[nstack_args].len;
843 write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len);
844 }
845
846 /* Return adjusted stack pointer. */
847 return sp;
848 }
849
850 /* Store the return address for the call dummy. For MCore, we've
851 opted to use generic call dummies, so we simply store the
852 CALL_DUMMY_ADDRESS into the PR register (r15). */
853
854 CORE_ADDR
855 mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
856 {
857 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
858 return sp;
859 }
860
861 /* Setting/getting return values from functions.
862
863 The Motorola MCore processors use r2/r3 to return anything
864 not larger than 32 bits. Everything else goes into a caller-
865 supplied buffer, which is passed in via a hidden first
866 argument.
867
868 For gdb, this leaves us two routes, based on what
869 USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns.
870 If this macro returns 1, gdb will call STORE_STRUCT_RETURN and
871 EXTRACT_STRUCT_VALUE_ADDRESS.
872
873 If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
874 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */
875
876 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
877 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
878 and TYPE is the type (which is known to be struct, union or array). */
879
880 int
881 mcore_use_struct_convention (int gcc_p, struct type *type)
882 {
883 return (TYPE_LENGTH (type) > 8);
884 }
885
886 /* Where is the return value saved? For MCore, a pointer to
887 this buffer was passed as a hidden first argument, so
888 just return that address. */
889
890 CORE_ADDR
891 mcore_extract_struct_value_address (char *regbuf)
892 {
893 return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE);
894 }
895
896 /* Given a function which returns a value of type TYPE, extract the
897 the function's return value and place the result into VALBUF.
898 REGBUF is the register contents of the target. */
899
900 void
901 mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf)
902 {
903 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
904 /* Only getting the first byte! if len = 1, we need the last byte of
905 the register, not the first. */
906 memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) +
907 (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type));
908 }
909
910 /* Store the return value in VALBUF (of type TYPE) where the caller
911 expects to see it.
912
913 Values less than 32 bits are stored in r2, right justified and
914 sign or zero extended.
915
916 Values between 32 and 64 bits are stored in r2 (most
917 significant word) and r3 (least significant word, left justified).
918 Note that this includes structures of less than eight bytes, too. */
919
920 void
921 mcore_store_return_value (struct type *type, char *valbuf)
922 {
923 int value_size;
924 int return_size;
925 int offset;
926 char *zeros;
927
928 value_size = TYPE_LENGTH (type);
929
930 /* Return value fits into registers. */
931 return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1);
932 offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size);
933 zeros = alloca (return_size);
934 memset (zeros, 0, return_size);
935
936 write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, return_size);
937 write_register_bytes (offset, valbuf, value_size);
938 }
939
940 /* Initialize our target-dependent "stuff" for this newly created frame.
941
942 This includes allocating space for saved registers and analyzing
943 the prologue of this frame. */
944
945 void
946 mcore_init_extra_frame_info (struct frame_info *fi)
947 {
948 if (fi->next)
949 fi->pc = FRAME_SAVED_PC (fi->next);
950
951 frame_saved_regs_zalloc (fi);
952
953 fi->extra_info = (struct frame_extra_info *)
954 frame_obstack_alloc (sizeof (struct frame_extra_info));
955 fi->extra_info->status = 0;
956 fi->extra_info->framesize = 0;
957
958 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
959 {
960 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
961 by assuming it's always FP. */
962 fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
963 }
964 else
965 mcore_analyze_prologue (fi, 0, 0);
966 }
967
968 /* Get an insturction from memory. */
969
970 static int
971 get_insn (CORE_ADDR pc)
972 {
973 char buf[4];
974 int status = read_memory_nobpt (pc, buf, 2);
975 if (status != 0)
976 return 0;
977
978 return extract_unsigned_integer (buf, 2);
979 }
980
981 void
982 _initialize_mcore_tdep (void)
983 {
984 extern int print_insn_mcore (bfd_vma, disassemble_info *);
985 tm_print_insn = print_insn_mcore;
986
987 #ifdef MCORE_DEBUG
988 add_show_from_set (add_set_cmd ("mcoredebug", no_class,
989 var_boolean, (char *) &mcore_debug,
990 "Set mcore debugging.\n", &setlist),
991 &showlist);
992 #endif
993 }