gdb/microblaze-tdep.c

   1 /* Target-dependent code for Xilinx MicroBlaze.
   2
   3    Copyright (C) 2009-2015 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "defs.h"
  21 #include "arch-utils.h"
  22 #include "dis-asm.h"
  23 #include "frame.h"
  24 #include "trad-frame.h"
  25 #include "symtab.h"
  26 #include "value.h"
  27 #include "gdbcmd.h"
  28 #include "breakpoint.h"
  29 #include "inferior.h"
  30 #include "regcache.h"
  31 #include "target.h"
  32 #include "frame-base.h"
  33 #include "frame-unwind.h"
  34 #include "dwarf2-frame.h"
  35 #include "osabi.h"
  36 #include "target-descriptions.h"
  37 #include "opcodes/microblaze-opcm.h"
  38 #include "opcodes/microblaze-dis.h"
  39 #include "microblaze-tdep.h"
  40 #include "remote.h"
  41
  42 #include "features/microblaze-with-stack-protect.c"
  43 #include "features/microblaze.c"
  44 \f
  45 /* Instruction macros used for analyzing the prologue.  */
  46 /* This set of instruction macros need to be changed whenever the
  47    prologue generated by the compiler could have more instructions or
  48    different type of instructions.
  49    This set also needs to be verified if it is complete.  */
  50 #define IS_RETURN(op) (op == rtsd || op == rtid)
  51 #define IS_UPDATE_SP(op, rd, ra) \
  52   ((op == addik || op == addi) && rd == REG_SP && ra == REG_SP)
  53 #define IS_SPILL_SP(op, rd, ra) \
  54   ((op == swi || op == sw) && rd == REG_SP && ra == REG_SP)
  55 #define IS_SPILL_REG(op, rd, ra) \
  56   ((op == swi || op == sw) && rd != REG_SP && ra == REG_SP)
  57 #define IS_ALSO_SPILL_REG(op, rd, ra, rb) \
  58   ((op == swi || op == sw) && rd != REG_SP && ra == 0 && rb == REG_SP)
  59 #define IS_SETUP_FP(op, ra, rb) \
  60   ((op == add || op == addik || op == addk) && ra == REG_SP && rb == 0)
  61 #define IS_SPILL_REG_FP(op, rd, ra, fpregnum) \
  62   ((op == swi || op == sw) && rd != REG_SP && ra == fpregnum && ra != 0)
  63 #define IS_SAVE_HIDDEN_PTR(op, rd, ra, rb) \
  64   ((op == add || op == addik) && ra == MICROBLAZE_FIRST_ARGREG && rb == 0)
  65
  66 /* The registers of the Xilinx microblaze processor.  */
  67
  68 static const char *microblaze_register_names[] =
  69 {
  70   "r0",   "r1",  "r2",    "r3",   "r4",   "r5",   "r6",   "r7",
  71   "r8",   "r9",  "r10",   "r11",  "r12",  "r13",  "r14",  "r15",
  72   "r16",  "r17", "r18",   "r19",  "r20",  "r21",  "r22",  "r23",
  73   "r24",  "r25", "r26",   "r27",  "r28",  "r29",  "r30",  "r31",
  74   "rpc",  "rmsr", "rear", "resr", "rfsr", "rbtr",
  75   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
  76   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
  77   "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
  78   "rslr", "rshr"
  79 };
  80
  81 #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
  82 \f
  83 static unsigned int microblaze_debug_flag = 0;
  84
  85 static void
  86 microblaze_debug (const char *fmt, ...)
  87 {
  88   if (microblaze_debug_flag)
  89     {
  90        va_list args;
  91
  92        va_start (args, fmt);
  93        printf_unfiltered ("MICROBLAZE: ");
  94        vprintf_unfiltered (fmt, args);
  95        va_end (args);
  96     }
  97 }
  98 \f
  99 /* Return the name of register REGNUM.  */
 100
 101 static const char *
 102 microblaze_register_name (struct gdbarch *gdbarch, int regnum)
 103 {
 104   if (regnum >= 0 && regnum < MICROBLAZE_NUM_REGS)
 105     return microblaze_register_names[regnum];
 106   return NULL;
 107 }
 108
 109 static struct type *
 110 microblaze_register_type (struct gdbarch *gdbarch, int regnum)
 111 {
 112   if (regnum == MICROBLAZE_SP_REGNUM)
 113     return builtin_type (gdbarch)->builtin_data_ptr;
 114
 115   if (regnum == MICROBLAZE_PC_REGNUM)
 116     return builtin_type (gdbarch)->builtin_func_ptr;
 117
 118   return builtin_type (gdbarch)->builtin_int;
 119 }
 120
 121 \f
 122 /* Fetch the instruction at PC.  */
 123
 124 static unsigned long
 125 microblaze_fetch_instruction (CORE_ADDR pc)
 126 {
 127   enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
 128   gdb_byte buf[4];
 129
 130   /* If we can't read the instruction at PC, return zero.  */
 131   if (target_read_code (pc, buf, sizeof (buf)))
 132     return 0;
 133
 134   return extract_unsigned_integer (buf, 4, byte_order);
 135 }
 136 \f
 137 static const gdb_byte *
 138 microblaze_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc,
 139                                int *len)
 140 {
 141   static gdb_byte break_insn[] = MICROBLAZE_BREAKPOINT;
 142
 143   *len = sizeof (break_insn);
 144   return break_insn;
 145 }
 146 \f
 147 /* Allocate and initialize a frame cache.  */
 148
 149 static struct microblaze_frame_cache *
 150 microblaze_alloc_frame_cache (void)
 151 {
 152   struct microblaze_frame_cache *cache;
 153
 154   cache = FRAME_OBSTACK_ZALLOC (struct microblaze_frame_cache);
 155
 156   /* Base address.  */
 157   cache->base = 0;
 158   cache->pc = 0;
 159
 160   /* Frameless until proven otherwise.  */
 161   cache->frameless_p = 1;
 162
 163   return cache;
 164 }
 165
 166 /* The base of the current frame is actually in the stack pointer.
 167    This happens when there is no frame pointer (microblaze ABI does not
 168    require a frame pointer) or when we're stopped in the prologue or
 169    epilogue itself.  In these cases, microblaze_analyze_prologue will need
 170    to update fi->frame before returning or analyzing the register
 171    save instructions.  */
 172 #define MICROBLAZE_MY_FRAME_IN_SP 0x1
 173
 174 /* The base of the current frame is in a frame pointer register.
 175    This register is noted in frame_extra_info->fp_regnum.
 176
 177    Note that the existance of an FP might also indicate that the
 178    function has called alloca.  */
 179 #define MICROBLAZE_MY_FRAME_IN_FP 0x2
 180
 181 /* Function prologues on the Xilinx microblaze processors consist of:
 182
 183    - adjustments to the stack pointer (r1) (addi r1, r1, imm)
 184    - making a copy of r1 into another register (a "frame" pointer)
 185      (add r?, r1, r0)
 186    - store word/multiples that use r1 or the frame pointer as the
 187      base address (swi r?, r1, imm OR swi r?, fp, imm)
 188
 189    Note that microblaze really doesn't have a real frame pointer.
 190    Instead, the compiler may copy the SP into a register (usually
 191    r19) to act as an arg pointer.  For our target-dependent purposes,
 192    the frame info's "frame" member will be the beginning of the
 193    frame.  The SP could, in fact, point below this.
 194
 195    The prologue ends when an instruction fails to meet either of
 196    these criteria.  */
 197
 198 /* Analyze the prologue to determine where registers are saved,
 199    the end of the prologue, etc.  Return the address of the first line
 200    of "real" code (i.e., the end of the prologue).  */
 201
 202 static CORE_ADDR
 203 microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
 204                              CORE_ADDR current_pc,
 205                              struct microblaze_frame_cache *cache)
 206 {
 207   const char *name;
 208   CORE_ADDR func_addr, func_end, addr, stop, prologue_end_addr = 0;
 209   unsigned long insn;
 210   int rd, ra, rb, imm;
 211   enum microblaze_instr op;
 212   int flags = 0;
 213   int save_hidden_pointer_found = 0;
 214   int non_stack_instruction_found = 0;
 215
 216   /* Find the start of this function.  */
 217   find_pc_partial_function (pc, &name, &func_addr, &func_end);
 218   if (func_addr < pc)
 219     pc = func_addr;
 220
 221   if (current_pc < pc)
 222     return current_pc;
 223
 224    /* Initialize info about frame.  */
 225    cache->framesize = 0;
 226    cache->fp_regnum = MICROBLAZE_SP_REGNUM;
 227    cache->frameless_p = 1;
 228
 229   /* Start decoding the prologue.  We start by checking two special cases:
 230
 231      1. We're about to return
 232      2. We're at the first insn of the prologue.
 233
 234      If we're about to return, our frame has already been deallocated.
 235      If we are stopped at the first instruction of a prologue,
 236      then our frame has not yet been set up.  */
 237
 238   /* Get the first insn from memory.  */
 239
 240   insn = microblaze_fetch_instruction (pc);
 241   op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm);
 242
 243   if (IS_RETURN(op))
 244     return pc;
 245
 246   /* Start at beginning of function and analyze until we get to the
 247      current pc, or the end of the function, whichever is first.  */
 248   stop = (current_pc < func_end ? current_pc : func_end);
 249
 250   microblaze_debug ("Scanning prologue: name=%s, func_addr=%s, stop=%s\n",
 251                     name, paddress (gdbarch, func_addr),
 252                     paddress (gdbarch, stop));
 253
 254   for (addr = func_addr; addr < stop; addr += INST_WORD_SIZE)
 255     {
 256       insn = microblaze_fetch_instruction (addr);
 257       op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm);
 258       microblaze_debug ("%s %08lx\n", paddress (gdbarch, pc), insn);
 259
 260       /* This code is very sensitive to what functions are present in the
 261          prologue.  It assumes that the (addi, addik, swi, sw) can be the
 262          only instructions in the prologue.  */
 263       if (IS_UPDATE_SP(op, rd, ra))
 264         {
 265           microblaze_debug ("got addi r1,r1,%d; contnuing\n", imm);
 266           if (cache->framesize)
 267             break;      /* break if framesize already computed.  */
 268           cache->framesize = -imm; /* stack grows towards low memory.  */
 269           cache->frameless_p = 0; /* Frame found.  */
 270           save_hidden_pointer_found = 0;
 271           non_stack_instruction_found = 0;
 272           continue;
 273         }
 274       else if (IS_SPILL_SP(op, rd, ra))
 275         {
 276           /* Spill stack pointer.  */
 277           cache->register_offsets[rd] = imm; /* SP spilled before updating.  */
 278
 279           microblaze_debug ("swi r1 r1 %d, continuing\n", imm);
 280           save_hidden_pointer_found = 0;
 281           if (!cache->framesize)
 282             non_stack_instruction_found = 0;
 283           continue;
 284         }
 285       else if (IS_SPILL_REG(op, rd, ra))
 286         {
 287           /* Spill register.  */
 288           cache->register_offsets[rd] = imm - cache->framesize;
 289
 290           microblaze_debug ("swi %d r1 %d, continuing\n", rd, imm);
 291           save_hidden_pointer_found = 0;
 292           if (!cache->framesize)
 293             non_stack_instruction_found = 0;
 294           continue;
 295         }
 296       else if (IS_ALSO_SPILL_REG(op, rd, ra, rb))
 297         {
 298           /* Spill register.  */
 299           cache->register_offsets[rd] = 0 - cache->framesize;
 300
 301           microblaze_debug ("sw %d r0 r1, continuing\n", rd);
 302           save_hidden_pointer_found = 0;
 303           if (!cache->framesize)
 304             non_stack_instruction_found = 0;
 305           continue;
 306         }
 307       else if (IS_SETUP_FP(op, ra, rb))
 308         {
 309           /* We have a frame pointer.  Note the register which is
 310              acting as the frame pointer.  */
 311           flags |= MICROBLAZE_MY_FRAME_IN_FP;
 312           flags &= ~MICROBLAZE_MY_FRAME_IN_SP;
 313           cache->fp_regnum = rd;
 314           microblaze_debug ("Found a frame pointer: r%d\n", cache->fp_regnum);
 315           save_hidden_pointer_found = 0;
 316           if (!cache->framesize)
 317             non_stack_instruction_found = 0;
 318           continue;
 319         }
 320       else if (IS_SPILL_REG_FP(op, rd, ra, cache->fp_regnum))
 321         {
 322           /* reg spilled after updating.  */
 323           cache->register_offsets[rd] = imm - cache->framesize;
 324
 325           microblaze_debug ("swi %d %d %d, continuing\n", rd, ra, imm);
 326           save_hidden_pointer_found = 0;
 327           if (!cache->framesize)
 328             non_stack_instruction_found = 0;
 329           continue;
 330         }
 331       else if (IS_SAVE_HIDDEN_PTR(op, rd, ra, rb))
 332         {
 333           /* If the first argument is a hidden pointer to the area where the
 334              return structure is to be saved, then it is saved as part of the
 335              prologue.  */
 336
 337           microblaze_debug ("add %d %d %d, continuing\n", rd, ra, rb);
 338           save_hidden_pointer_found = 1;
 339           if (!cache->framesize)
 340             non_stack_instruction_found = 0;
 341           continue;
 342         }
 343
 344       /* As a result of the modification in the next step where we continue
 345          to analyze the prologue till we reach a control flow instruction,
 346          we need another variable to store when exactly a non-stack
 347          instruction was encountered, which is the current definition
 348          of a prologue.  */
 349       if (!non_stack_instruction_found)
 350         prologue_end_addr = addr;
 351       non_stack_instruction_found = 1;
 352
 353       /* When optimizations are enabled, it is not guaranteed that prologue
 354          instructions are not mixed in with other instructions from the
 355          program.  Some programs show this behavior at -O2.  This can be
 356          avoided by adding -fno-schedule-insns2 switch as of now (edk 8.1)
 357          In such cases, we scan the function until we see the first control
 358          instruction.  */
 359
 360       {
 361         unsigned op = (unsigned)insn >> 26;
 362
 363         /* continue if not control flow (branch, return).  */
 364         if (op != 0x26 && op != 0x27 && op != 0x2d && op != 0x2e && op != 0x2f)
 365           continue;
 366         else if (op == 0x2c)
 367           continue;    /* continue if imm.  */
 368       }
 369
 370       /* This is not a prologue insn, so stop here.  */
 371       microblaze_debug ("insn is not a prologue insn -- ending scan\n");
 372       break;
 373     }
 374
 375   microblaze_debug ("done analyzing prologue\n");
 376   microblaze_debug ("prologue end = 0x%x\n", (int) addr);
 377
 378   /* If the last instruction was an add rd, r5, r0 then don't count it as
 379      part of the prologue.  */
 380   if (save_hidden_pointer_found)
 381     prologue_end_addr -= INST_WORD_SIZE;
 382
 383   return prologue_end_addr;
 384 }
 385
 386 static CORE_ADDR
 387 microblaze_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
 388 {
 389   gdb_byte buf[4];
 390   CORE_ADDR pc;
 391
 392   frame_unwind_register (next_frame, MICROBLAZE_PC_REGNUM, buf);
 393   pc = extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr);
 394   /* For sentinel frame, return address is actual PC.  For other frames,
 395      return address is pc+8.  This is a workaround because gcc does not
 396      generate correct return address in CIE.  */
 397   if (frame_relative_level (next_frame) >= 0)
 398     pc += 8;
 399   return pc;
 400 }
 401
 402 /* Return PC of first real instruction of the function starting at
 403    START_PC.  */
 404
 405 static CORE_ADDR
 406 microblaze_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
 407 {
 408   struct symtab_and_line sal;
 409   CORE_ADDR func_start, func_end, ostart_pc;
 410   struct microblaze_frame_cache cache;
 411
 412   /* This is the preferred method, find the end of the prologue by
 413      using the debugging information.  Debugging info does not always
 414      give the right answer since parameters are stored on stack after this.
 415      Always analyze the prologue.  */
 416   if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
 417     {
 418       sal = find_pc_line (func_start, 0);
 419
 420       if (sal.end < func_end
 421           && start_pc <= sal.end)
 422         start_pc = sal.end;
 423     }
 424
 425   ostart_pc = microblaze_analyze_prologue (gdbarch, func_start, 0xffffffffUL,
 426                                            &cache);
 427
 428   if (ostart_pc > start_pc)
 429     return ostart_pc;
 430   return start_pc;
 431 }
 432
 433 /* Normal frames.  */
 434
 435 static struct microblaze_frame_cache *
 436 microblaze_frame_cache (struct frame_info *next_frame, void **this_cache)
 437 {
 438   struct microblaze_frame_cache *cache;
 439   struct gdbarch *gdbarch = get_frame_arch (next_frame);
 440   CORE_ADDR func;
 441   int rn;
 442
 443   if (*this_cache)
 444     return (struct microblaze_frame_cache *) *this_cache;
 445
 446   cache = microblaze_alloc_frame_cache ();
 447   *this_cache = cache;
 448   cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
 449
 450   /* Clear offsets to saved regs in frame.  */
 451   for (rn = 0; rn < gdbarch_num_regs (gdbarch); rn++)
 452     cache->register_offsets[rn] = -1;
 453
 454   func = get_frame_func (next_frame);
 455
 456   cache->pc = get_frame_address_in_block (next_frame);
 457
 458   return cache;
 459 }
 460
 461 static void
 462 microblaze_frame_this_id (struct frame_info *next_frame, void **this_cache,
 463                        struct frame_id *this_id)
 464 {
 465   struct microblaze_frame_cache *cache =
 466     microblaze_frame_cache (next_frame, this_cache);
 467
 468   /* This marks the outermost frame.  */
 469   if (cache->base == 0)
 470     return;
 471
 472   (*this_id) = frame_id_build (cache->base, cache->pc);
 473 }
 474
 475 static struct value *
 476 microblaze_frame_prev_register (struct frame_info *this_frame,
 477                                  void **this_cache, int regnum)
 478 {
 479   struct microblaze_frame_cache *cache =
 480     microblaze_frame_cache (this_frame, this_cache);
 481
 482   if (cache->frameless_p)
 483     {
 484       if (regnum == MICROBLAZE_PC_REGNUM)
 485         regnum = 15;
 486       if (regnum == MICROBLAZE_SP_REGNUM)
 487         regnum = 1;
 488       return trad_frame_get_prev_register (this_frame,
 489                                            cache->saved_regs, regnum);
 490     }
 491   else
 492     return trad_frame_get_prev_register (this_frame, cache->saved_regs,
 493                                          regnum);
 494
 495 }
 496
 497 static const struct frame_unwind microblaze_frame_unwind =
 498 {
 499   NORMAL_FRAME,
 500   default_frame_unwind_stop_reason,
 501   microblaze_frame_this_id,
 502   microblaze_frame_prev_register,
 503   NULL,
 504   default_frame_sniffer
 505 };
 506 \f
 507 static CORE_ADDR
 508 microblaze_frame_base_address (struct frame_info *next_frame,
 509                                void **this_cache)
 510 {
 511   struct microblaze_frame_cache *cache =
 512     microblaze_frame_cache (next_frame, this_cache);
 513
 514   return cache->base;
 515 }
 516
 517 static const struct frame_base microblaze_frame_base =
 518 {
 519   &microblaze_frame_unwind,
 520   microblaze_frame_base_address,
 521   microblaze_frame_base_address,
 522   microblaze_frame_base_address
 523 };
 524 \f
 525 /* Extract from an array REGBUF containing the (raw) register state, a
 526    function return value of TYPE, and copy that into VALBUF.  */
 527 static void
 528 microblaze_extract_return_value (struct type *type, struct regcache *regcache,
 529                                  gdb_byte *valbuf)
 530 {
 531   gdb_byte buf[8];
 532
 533   /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF.  */
 534   switch (TYPE_LENGTH (type))
 535     {
 536       case 1:   /* return last byte in the register.  */
 537         regcache_cooked_read (regcache, MICROBLAZE_RETVAL_REGNUM, buf);
 538         memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1);
 539         return;
 540       case 2:   /* return last 2 bytes in register.  */
 541         regcache_cooked_read (regcache, MICROBLAZE_RETVAL_REGNUM, buf);
 542         memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2);
 543         return;
 544       case 4:   /* for sizes 4 or 8, copy the required length.  */
 545       case 8:
 546         regcache_cooked_read (regcache, MICROBLAZE_RETVAL_REGNUM, buf);
 547         regcache_cooked_read (regcache, MICROBLAZE_RETVAL_REGNUM+1, buf+4);
 548         memcpy (valbuf, buf, TYPE_LENGTH (type));
 549         return;
 550       default:
 551         internal_error (__FILE__, __LINE__,
 552                         _("Unsupported return value size requested"));
 553     }
 554 }
 555
 556 /* Store the return value in VALBUF (of type TYPE) where the caller
 557    expects to see it.
 558
 559    Integers up to four bytes are stored in r3.
 560
 561    Longs are stored in r3 (most significant word) and r4 (least
 562    significant word).
 563
 564    Small structures are always returned on stack.  */
 565
 566 static void
 567 microblaze_store_return_value (struct type *type, struct regcache *regcache,
 568                                const gdb_byte *valbuf)
 569 {
 570   int len = TYPE_LENGTH (type);
 571   gdb_byte buf[8];
 572
 573   memset (buf, 0, sizeof(buf));
 574
 575   /* Integral and pointer return values.  */
 576
 577   if (len > 4)
 578     {
 579        gdb_assert (len == 8);
 580        memcpy (buf, valbuf, 8);
 581        regcache_cooked_write (regcache, MICROBLAZE_RETVAL_REGNUM+1, buf + 4);
 582     }
 583   else
 584     /* ??? Do we need to do any sign-extension here?  */
 585     memcpy (buf + 4 - len, valbuf, len);
 586
 587   regcache_cooked_write (regcache, MICROBLAZE_RETVAL_REGNUM, buf);
 588 }
 589
 590 static enum return_value_convention
 591 microblaze_return_value (struct gdbarch *gdbarch, struct value *function,
 592                          struct type *type, struct regcache *regcache,
 593                          gdb_byte *readbuf, const gdb_byte *writebuf)
 594 {
 595   if (readbuf)
 596     microblaze_extract_return_value (type, regcache, readbuf);
 597   if (writebuf)
 598     microblaze_store_return_value (type, regcache, writebuf);
 599
 600   return RETURN_VALUE_REGISTER_CONVENTION;
 601 }
 602
 603 static int
 604 microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
 605 {
 606   return (TYPE_LENGTH (type) == 16);
 607 }
 608
 609 static void
 610 microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
 611 {
 612   regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
 613 }
 614 \f
 615 static int dwarf2_to_reg_map[78] =
 616 { 0  /* r0  */,   1  /* r1  */,   2  /* r2  */,   3  /* r3  */,  /*  0- 3 */
 617   4  /* r4  */,   5  /* r5  */,   6  /* r6  */,   7  /* r7  */,  /*  4- 7 */
 618   8  /* r8  */,   9  /* r9  */,  10  /* r10 */,  11  /* r11 */,  /*  8-11 */
 619   12 /* r12 */,  13  /* r13 */,  14  /* r14 */,  15  /* r15 */,  /* 12-15 */
 620   16 /* r16 */,  17  /* r17 */,  18  /* r18 */,  19  /* r19 */,  /* 16-19 */
 621   20 /* r20 */,  21  /* r21 */,  22  /* r22 */,  23  /* r23 */,  /* 20-23 */
 622   24 /* r24 */,  25  /* r25 */,  26  /* r26 */,  27  /* r27 */,  /* 24-25 */
 623   28 /* r28 */,  29  /* r29 */,  30  /* r30 */,  31  /* r31 */,  /* 28-31 */
 624   -1 /* $f0 */,  -1  /* $f1 */,  -1  /* $f2 */,  -1  /* $f3 */,  /* 32-35 */
 625   -1 /* $f4 */,  -1  /* $f5 */,  -1  /* $f6 */,  -1  /* $f7 */,  /* 36-39 */
 626   -1 /* $f8 */,  -1  /* $f9 */,  -1  /* $f10 */, -1  /* $f11 */, /* 40-43 */
 627   -1 /* $f12 */, -1  /* $f13 */, -1  /* $f14 */, -1  /* $f15 */, /* 44-47 */
 628   -1 /* $f16 */, -1  /* $f17 */, -1  /* $f18 */, -1  /* $f19 */, /* 48-51 */
 629   -1 /* $f20 */, -1  /* $f21 */, -1  /* $f22 */, -1  /* $f23 */, /* 52-55 */
 630   -1 /* $f24 */, -1  /* $f25 */, -1  /* $f26 */, -1  /* $f27 */, /* 56-59 */
 631   -1 /* $f28 */, -1  /* $f29 */, -1  /* $f30 */, -1  /* $f31 */, /* 60-63 */
 632   -1 /* hi   */, -1  /* lo   */, -1  /* accum*/, 33  /* rmsr */, /* 64-67 */
 633   -1 /* $fcc1*/, -1  /* $fcc2*/, -1  /* $fcc3*/, -1  /* $fcc4*/, /* 68-71 */
 634   -1 /* $fcc5*/, -1  /* $fcc6*/, -1  /* $fcc7*/, -1  /* $ap  */, /* 72-75 */
 635   -1 /* $rap */, -1  /* $frp */                                  /* 76-77 */
 636 };
 637
 638 static int
 639 microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
 640 {
 641   if (reg >= 0 && reg < sizeof (dwarf2_to_reg_map))
 642     return dwarf2_to_reg_map[reg];
 643   return -1;
 644 }
 645
 646 static void
 647 microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
 648 {
 649   register_remote_g_packet_guess (gdbarch,
 650                                   4 * MICROBLAZE_NUM_CORE_REGS,
 651                                   tdesc_microblaze);
 652
 653   register_remote_g_packet_guess (gdbarch,
 654                                   4 * MICROBLAZE_NUM_REGS,
 655                                   tdesc_microblaze_with_stack_protect);
 656 }
 657
 658 static struct gdbarch *
 659 microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 660 {
 661   struct gdbarch_tdep *tdep;
 662   struct gdbarch *gdbarch;
 663   struct tdesc_arch_data *tdesc_data = NULL;
 664   const struct target_desc *tdesc = info.target_desc;
 665
 666   /* If there is already a candidate, use it.  */
 667   arches = gdbarch_list_lookup_by_info (arches, &info);
 668   if (arches != NULL)
 669     return arches->gdbarch;
 670   if (tdesc == NULL)
 671     tdesc = tdesc_microblaze;
 672
 673   /* Check any target description for validity.  */
 674   if (tdesc_has_registers (tdesc))
 675     {
 676       const struct tdesc_feature *feature;
 677       int valid_p;
 678       int i;
 679
 680       feature = tdesc_find_feature (tdesc,
 681                                     "org.gnu.gdb.microblaze.core");
 682       if (feature == NULL)
 683         return NULL;
 684       tdesc_data = tdesc_data_alloc ();
 685
 686       valid_p = 1;
 687       for (i = 0; i < MICROBLAZE_NUM_CORE_REGS; i++)
 688         valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
 689                                             microblaze_register_names[i]);
 690       feature = tdesc_find_feature (tdesc,
 691                                     "org.gnu.gdb.microblaze.stack-protect");
 692       if (feature != NULL)
 693         {
 694           valid_p = 1;
 695           valid_p &= tdesc_numbered_register (feature, tdesc_data,
 696                                               MICROBLAZE_SLR_REGNUM,
 697                                               "rslr");
 698           valid_p &= tdesc_numbered_register (feature, tdesc_data,
 699                                               MICROBLAZE_SHR_REGNUM,
 700                                               "rshr");
 701         }
 702
 703       if (!valid_p)
 704         {
 705           tdesc_data_cleanup (tdesc_data);
 706           return NULL;
 707         }
 708     }
 709
 710   /* Allocate space for the new architecture.  */
 711   tdep = XNEW (struct gdbarch_tdep);
 712   gdbarch = gdbarch_alloc (&info, tdep);
 713
 714   set_gdbarch_long_double_bit (gdbarch, 128);
 715
 716   set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
 717   set_gdbarch_register_name (gdbarch, microblaze_register_name);
 718   set_gdbarch_register_type (gdbarch, microblaze_register_type);
 719
 720   /* Register numbers of various important registers.  */
 721   set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM);
 722   set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM);
 723
 724   /* Map Dwarf2 registers to GDB registers.  */
 725   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum);
 726
 727   /* Call dummy code.  */
 728   set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
 729
 730   set_gdbarch_return_value (gdbarch, microblaze_return_value);
 731   set_gdbarch_stabs_argument_has_addr
 732     (gdbarch, microblaze_stabs_argument_has_addr);
 733
 734   set_gdbarch_skip_prologue (gdbarch, microblaze_skip_prologue);
 735
 736   /* Stack grows downward.  */
 737   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
 738
 739   set_gdbarch_breakpoint_from_pc (gdbarch, microblaze_breakpoint_from_pc);
 740
 741   set_gdbarch_frame_args_skip (gdbarch, 8);
 742
 743   set_gdbarch_print_insn (gdbarch, print_insn_microblaze);
 744
 745   set_gdbarch_write_pc (gdbarch, microblaze_write_pc);
 746
 747   set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc);
 748
 749   microblaze_register_g_packet_guesses (gdbarch);
 750
 751   frame_base_set_default (gdbarch, &microblaze_frame_base);
 752
 753   /* Hook in ABI-specific overrides, if they have been registered.  */
 754   gdbarch_init_osabi (info, gdbarch);
 755
 756   /* Unwind the frame.  */
 757   dwarf2_append_unwinders (gdbarch);
 758   frame_unwind_append_unwinder (gdbarch, &microblaze_frame_unwind);
 759   frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
 760   if (tdesc_data != NULL)
 761     tdesc_use_registers (gdbarch, tdesc, tdesc_data);
 762
 763   return gdbarch;
 764 }
 765
 766 /* Provide a prototype to silence -Wmissing-prototypes.  */
 767 void _initialize_microblaze_tdep (void);
 768
 769 void
 770 _initialize_microblaze_tdep (void)
 771 {
 772   register_gdbarch_init (bfd_arch_microblaze, microblaze_gdbarch_init);
 773
 774   initialize_tdesc_microblaze_with_stack_protect ();
 775   initialize_tdesc_microblaze ();
 776   /* Debug this files internals.  */
 777   add_setshow_zuinteger_cmd ("microblaze", class_maintenance,
 778                              &microblaze_debug_flag, _("\
 779 Set microblaze debugging."), _("\
 780 Show microblaze debugging."), _("\
 781 When non-zero, microblaze specific debugging is enabled."),
 782                              NULL,
 783                              NULL,
 784                              &setdebuglist, &showdebuglist);
 785
 786 }