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Remove some uses of MAX_REGISTER_SIZE from mips-linux-tdep.c
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1 /* Target-dependent code for GNU/Linux on MIPS processors.
2
3 Copyright (C) 2001-2017 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21 #include "gdbcore.h"
22 #include "target.h"
23 #include "solib-svr4.h"
24 #include "osabi.h"
25 #include "mips-tdep.h"
26 #include "frame.h"
27 #include "regcache.h"
28 #include "trad-frame.h"
29 #include "tramp-frame.h"
30 #include "gdbtypes.h"
31 #include "objfiles.h"
32 #include "solib.h"
33 #include "solist.h"
34 #include "symtab.h"
35 #include "target-descriptions.h"
36 #include "regset.h"
37 #include "mips-linux-tdep.h"
38 #include "glibc-tdep.h"
39 #include "linux-tdep.h"
40 #include "xml-syscall.h"
41 #include "gdb_signals.h"
42
43 static struct target_so_ops mips_svr4_so_ops;
44
45 /* This enum represents the signals' numbers on the MIPS
46 architecture. It just contains the signal definitions which are
47 different from the generic implementation.
48
49 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
50 from the Linux kernel tree. */
51
52 enum
53 {
54 MIPS_LINUX_SIGEMT = 7,
55 MIPS_LINUX_SIGBUS = 10,
56 MIPS_LINUX_SIGSYS = 12,
57 MIPS_LINUX_SIGUSR1 = 16,
58 MIPS_LINUX_SIGUSR2 = 17,
59 MIPS_LINUX_SIGCHLD = 18,
60 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD,
61 MIPS_LINUX_SIGPWR = 19,
62 MIPS_LINUX_SIGWINCH = 20,
63 MIPS_LINUX_SIGURG = 21,
64 MIPS_LINUX_SIGIO = 22,
65 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO,
66 MIPS_LINUX_SIGSTOP = 23,
67 MIPS_LINUX_SIGTSTP = 24,
68 MIPS_LINUX_SIGCONT = 25,
69 MIPS_LINUX_SIGTTIN = 26,
70 MIPS_LINUX_SIGTTOU = 27,
71 MIPS_LINUX_SIGVTALRM = 28,
72 MIPS_LINUX_SIGPROF = 29,
73 MIPS_LINUX_SIGXCPU = 30,
74 MIPS_LINUX_SIGXFSZ = 31,
75
76 MIPS_LINUX_SIGRTMIN = 32,
77 MIPS_LINUX_SIGRT64 = 64,
78 MIPS_LINUX_SIGRTMAX = 127,
79 };
80
81 /* Figure out where the longjmp will land.
82 We expect the first arg to be a pointer to the jmp_buf structure
83 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
84 at. The pc is copied into PC. This routine returns 1 on
85 success. */
86
87 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
88 #define MIPS_LINUX_JB_PC 0
89
90 static int
91 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
92 {
93 CORE_ADDR jb_addr;
94 struct gdbarch *gdbarch = get_frame_arch (frame);
95 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
96 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
97
98 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
99
100 if (target_read_memory ((jb_addr
101 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
102 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
103 return 0;
104
105 *pc = extract_unsigned_integer (buf,
106 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
107 byte_order);
108
109 return 1;
110 }
111
112 /* Transform the bits comprising a 32-bit register to the right size
113 for regcache_raw_supply(). This is needed when mips_isa_regsize()
114 is 8. */
115
116 static void
117 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
118 {
119 struct gdbarch *gdbarch = get_regcache_arch (regcache);
120 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
121 gdb_byte buf[MAX_REGISTER_SIZE];
122 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
123 extract_signed_integer ((const gdb_byte *) addr, 4,
124 byte_order));
125 regcache_raw_supply (regcache, regnum, buf);
126 }
127
128 /* Unpack an elf_gregset_t into GDB's register cache. */
129
130 void
131 mips_supply_gregset (struct regcache *regcache,
132 const mips_elf_gregset_t *gregsetp)
133 {
134 int regi;
135 const mips_elf_greg_t *regp = *gregsetp;
136 struct gdbarch *gdbarch = get_regcache_arch (regcache);
137
138 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
139 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
140
141 if (mips_linux_restart_reg_p (gdbarch))
142 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
143
144 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
145 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
146
147 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
148 regp + EF_CP0_EPC);
149 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
150 regp + EF_CP0_BADVADDR);
151 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
152 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
153 regp + EF_CP0_CAUSE);
154
155 /* Fill the inaccessible zero register with zero. */
156 regcache->raw_supply_zeroed (MIPS_ZERO_REGNUM);
157 }
158
159 static void
160 mips_supply_gregset_wrapper (const struct regset *regset,
161 struct regcache *regcache,
162 int regnum, const void *gregs, size_t len)
163 {
164 gdb_assert (len >= sizeof (mips_elf_gregset_t));
165
166 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
167 }
168
169 /* Pack our registers (or one register) into an elf_gregset_t. */
170
171 void
172 mips_fill_gregset (const struct regcache *regcache,
173 mips_elf_gregset_t *gregsetp, int regno)
174 {
175 struct gdbarch *gdbarch = get_regcache_arch (regcache);
176 int regaddr, regi;
177 mips_elf_greg_t *regp = *gregsetp;
178 void *dst;
179
180 if (regno == -1)
181 {
182 memset (regp, 0, sizeof (mips_elf_gregset_t));
183 for (regi = 1; regi < 32; regi++)
184 mips_fill_gregset (regcache, gregsetp, regi);
185 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
186 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
187 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
188 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
189 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
191 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
192 return;
193 }
194
195 if (regno > 0 && regno < 32)
196 {
197 dst = regp + regno + EF_REG0;
198 regcache_raw_collect (regcache, regno, dst);
199 return;
200 }
201
202 if (regno == mips_regnum (gdbarch)->lo)
203 regaddr = EF_LO;
204 else if (regno == mips_regnum (gdbarch)->hi)
205 regaddr = EF_HI;
206 else if (regno == mips_regnum (gdbarch)->pc)
207 regaddr = EF_CP0_EPC;
208 else if (regno == mips_regnum (gdbarch)->badvaddr)
209 regaddr = EF_CP0_BADVADDR;
210 else if (regno == MIPS_PS_REGNUM)
211 regaddr = EF_CP0_STATUS;
212 else if (regno == mips_regnum (gdbarch)->cause)
213 regaddr = EF_CP0_CAUSE;
214 else if (mips_linux_restart_reg_p (gdbarch)
215 && regno == MIPS_RESTART_REGNUM)
216 regaddr = EF_REG0;
217 else
218 regaddr = -1;
219
220 if (regaddr != -1)
221 {
222 dst = regp + regaddr;
223 regcache_raw_collect (regcache, regno, dst);
224 }
225 }
226
227 static void
228 mips_fill_gregset_wrapper (const struct regset *regset,
229 const struct regcache *regcache,
230 int regnum, void *gregs, size_t len)
231 {
232 gdb_assert (len >= sizeof (mips_elf_gregset_t));
233
234 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
235 }
236
237 /* Likewise, unpack an elf_fpregset_t. */
238
239 void
240 mips_supply_fpregset (struct regcache *regcache,
241 const mips_elf_fpregset_t *fpregsetp)
242 {
243 struct gdbarch *gdbarch = get_regcache_arch (regcache);
244 int regi;
245
246 for (regi = 0; regi < 32; regi++)
247 regcache_raw_supply (regcache,
248 gdbarch_fp0_regnum (gdbarch) + regi,
249 *fpregsetp + regi);
250
251 regcache_raw_supply (regcache,
252 mips_regnum (gdbarch)->fp_control_status,
253 *fpregsetp + 32);
254
255 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
256 regcache->raw_supply_zeroed
257 (mips_regnum (gdbarch)->fp_implementation_revision);
258 }
259
260 static void
261 mips_supply_fpregset_wrapper (const struct regset *regset,
262 struct regcache *regcache,
263 int regnum, const void *gregs, size_t len)
264 {
265 gdb_assert (len >= sizeof (mips_elf_fpregset_t));
266
267 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs);
268 }
269
270 /* Likewise, pack one or all floating point registers into an
271 elf_fpregset_t. */
272
273 void
274 mips_fill_fpregset (const struct regcache *regcache,
275 mips_elf_fpregset_t *fpregsetp, int regno)
276 {
277 struct gdbarch *gdbarch = get_regcache_arch (regcache);
278 char *to;
279
280 if ((regno >= gdbarch_fp0_regnum (gdbarch))
281 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
282 {
283 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
284 regcache_raw_collect (regcache, regno, to);
285 }
286 else if (regno == mips_regnum (gdbarch)->fp_control_status)
287 {
288 to = (char *) (*fpregsetp + 32);
289 regcache_raw_collect (regcache, regno, to);
290 }
291 else if (regno == -1)
292 {
293 int regi;
294
295 for (regi = 0; regi < 32; regi++)
296 mips_fill_fpregset (regcache, fpregsetp,
297 gdbarch_fp0_regnum (gdbarch) + regi);
298 mips_fill_fpregset (regcache, fpregsetp,
299 mips_regnum (gdbarch)->fp_control_status);
300 }
301 }
302
303 static void
304 mips_fill_fpregset_wrapper (const struct regset *regset,
305 const struct regcache *regcache,
306 int regnum, void *gregs, size_t len)
307 {
308 gdb_assert (len >= sizeof (mips_elf_fpregset_t));
309
310 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum);
311 }
312
313 /* Support for 64-bit ABIs. */
314
315 /* Figure out where the longjmp will land.
316 We expect the first arg to be a pointer to the jmp_buf structure
317 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
318 at. The pc is copied into PC. This routine returns 1 on
319 success. */
320
321 /* Details about jmp_buf. */
322
323 #define MIPS64_LINUX_JB_PC 0
324
325 static int
326 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
327 {
328 CORE_ADDR jb_addr;
329 struct gdbarch *gdbarch = get_frame_arch (frame);
330 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
331 gdb_byte *buf
332 = (gdb_byte *) alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
333 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
334
335 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
336
337 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
338 buf,
339 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
340 return 0;
341
342 *pc = extract_unsigned_integer (buf,
343 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
344 byte_order);
345
346 return 1;
347 }
348
349 /* Register set support functions. These operate on standard 64-bit
350 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
351 target will still use the 64-bit format for PTRACE_GETREGS. */
352
353 /* Supply a 64-bit register. */
354
355 static void
356 supply_64bit_reg (struct regcache *regcache, int regnum,
357 const gdb_byte *buf)
358 {
359 struct gdbarch *gdbarch = get_regcache_arch (regcache);
360 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
361 && register_size (gdbarch, regnum) == 4)
362 regcache_raw_supply (regcache, regnum, buf + 4);
363 else
364 regcache_raw_supply (regcache, regnum, buf);
365 }
366
367 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
368
369 void
370 mips64_supply_gregset (struct regcache *regcache,
371 const mips64_elf_gregset_t *gregsetp)
372 {
373 int regi;
374 const mips64_elf_greg_t *regp = *gregsetp;
375 struct gdbarch *gdbarch = get_regcache_arch (regcache);
376
377 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
378 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
379 (const gdb_byte *) (regp + regi));
380
381 if (mips_linux_restart_reg_p (gdbarch))
382 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
383 (const gdb_byte *) (regp + MIPS64_EF_REG0));
384
385 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
386 (const gdb_byte *) (regp + MIPS64_EF_LO));
387 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
388 (const gdb_byte *) (regp + MIPS64_EF_HI));
389
390 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
391 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
392 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
393 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
394 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
395 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
396 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
397 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
398
399 /* Fill the inaccessible zero register with zero. */
400 regcache->raw_supply_zeroed (MIPS_ZERO_REGNUM);
401 }
402
403 static void
404 mips64_supply_gregset_wrapper (const struct regset *regset,
405 struct regcache *regcache,
406 int regnum, const void *gregs, size_t len)
407 {
408 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
409
410 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
411 }
412
413 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
414
415 void
416 mips64_fill_gregset (const struct regcache *regcache,
417 mips64_elf_gregset_t *gregsetp, int regno)
418 {
419 struct gdbarch *gdbarch = get_regcache_arch (regcache);
420 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
421 int regaddr, regi;
422 mips64_elf_greg_t *regp = *gregsetp;
423 void *dst;
424
425 if (regno == -1)
426 {
427 memset (regp, 0, sizeof (mips64_elf_gregset_t));
428 for (regi = 1; regi < 32; regi++)
429 mips64_fill_gregset (regcache, gregsetp, regi);
430 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
431 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
432 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
433 mips64_fill_gregset (regcache, gregsetp,
434 mips_regnum (gdbarch)->badvaddr);
435 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
436 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
437 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
438 return;
439 }
440
441 if (regno > 0 && regno < 32)
442 regaddr = regno + MIPS64_EF_REG0;
443 else if (regno == mips_regnum (gdbarch)->lo)
444 regaddr = MIPS64_EF_LO;
445 else if (regno == mips_regnum (gdbarch)->hi)
446 regaddr = MIPS64_EF_HI;
447 else if (regno == mips_regnum (gdbarch)->pc)
448 regaddr = MIPS64_EF_CP0_EPC;
449 else if (regno == mips_regnum (gdbarch)->badvaddr)
450 regaddr = MIPS64_EF_CP0_BADVADDR;
451 else if (regno == MIPS_PS_REGNUM)
452 regaddr = MIPS64_EF_CP0_STATUS;
453 else if (regno == mips_regnum (gdbarch)->cause)
454 regaddr = MIPS64_EF_CP0_CAUSE;
455 else if (mips_linux_restart_reg_p (gdbarch)
456 && regno == MIPS_RESTART_REGNUM)
457 regaddr = MIPS64_EF_REG0;
458 else
459 regaddr = -1;
460
461 if (regaddr != -1)
462 {
463 gdb_byte buf[MAX_REGISTER_SIZE];
464 LONGEST val;
465
466 regcache_raw_collect (regcache, regno, buf);
467 val = extract_signed_integer (buf, register_size (gdbarch, regno),
468 byte_order);
469 dst = regp + regaddr;
470 store_signed_integer ((gdb_byte *) dst, 8, byte_order, val);
471 }
472 }
473
474 static void
475 mips64_fill_gregset_wrapper (const struct regset *regset,
476 const struct regcache *regcache,
477 int regnum, void *gregs, size_t len)
478 {
479 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
480
481 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
482 }
483
484 /* Likewise, unpack an elf_fpregset_t. */
485
486 void
487 mips64_supply_fpregset (struct regcache *regcache,
488 const mips64_elf_fpregset_t *fpregsetp)
489 {
490 struct gdbarch *gdbarch = get_regcache_arch (regcache);
491 int regi;
492
493 /* See mips_linux_o32_sigframe_init for a description of the
494 peculiar FP register layout. */
495 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
496 for (regi = 0; regi < 32; regi++)
497 {
498 const gdb_byte *reg_ptr
499 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
500 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
501 reg_ptr += 4;
502 regcache_raw_supply (regcache,
503 gdbarch_fp0_regnum (gdbarch) + regi,
504 reg_ptr);
505 }
506 else
507 for (regi = 0; regi < 32; regi++)
508 regcache_raw_supply (regcache,
509 gdbarch_fp0_regnum (gdbarch) + regi,
510 (const char *) (*fpregsetp + regi));
511
512 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
513 (const gdb_byte *) (*fpregsetp + 32));
514
515 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
516 include it - but the result of PTRACE_GETFPREGS does. The best we
517 can do is to assume that its value is present. */
518 supply_32bit_reg (regcache,
519 mips_regnum (gdbarch)->fp_implementation_revision,
520 (const gdb_byte *) (*fpregsetp + 32) + 4);
521 }
522
523 static void
524 mips64_supply_fpregset_wrapper (const struct regset *regset,
525 struct regcache *regcache,
526 int regnum, const void *gregs, size_t len)
527 {
528 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
529
530 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
531 }
532
533 /* Likewise, pack one or all floating point registers into an
534 elf_fpregset_t. */
535
536 void
537 mips64_fill_fpregset (const struct regcache *regcache,
538 mips64_elf_fpregset_t *fpregsetp, int regno)
539 {
540 struct gdbarch *gdbarch = get_regcache_arch (regcache);
541 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
542 gdb_byte *to;
543
544 if ((regno >= gdbarch_fp0_regnum (gdbarch))
545 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
546 {
547 /* See mips_linux_o32_sigframe_init for a description of the
548 peculiar FP register layout. */
549 if (register_size (gdbarch, regno) == 4)
550 {
551 int regi = regno - gdbarch_fp0_regnum (gdbarch);
552
553 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
554 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
555 to += 4;
556 regcache_raw_collect (regcache, regno, to);
557 }
558 else
559 {
560 to = (gdb_byte *) (*fpregsetp + regno
561 - gdbarch_fp0_regnum (gdbarch));
562 regcache_raw_collect (regcache, regno, to);
563 }
564 }
565 else if (regno == mips_regnum (gdbarch)->fp_control_status)
566 {
567 gdb_byte buf[MAX_REGISTER_SIZE];
568 LONGEST val;
569
570 regcache_raw_collect (regcache, regno, buf);
571 val = extract_signed_integer (buf, register_size (gdbarch, regno),
572 byte_order);
573 to = (gdb_byte *) (*fpregsetp + 32);
574 store_signed_integer (to, 4, byte_order, val);
575 }
576 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
577 {
578 gdb_byte buf[MAX_REGISTER_SIZE];
579 LONGEST val;
580
581 regcache_raw_collect (regcache, regno, buf);
582 val = extract_signed_integer (buf, register_size (gdbarch, regno),
583 byte_order);
584 to = (gdb_byte *) (*fpregsetp + 32) + 4;
585 store_signed_integer (to, 4, byte_order, val);
586 }
587 else if (regno == -1)
588 {
589 int regi;
590
591 for (regi = 0; regi < 32; regi++)
592 mips64_fill_fpregset (regcache, fpregsetp,
593 gdbarch_fp0_regnum (gdbarch) + regi);
594 mips64_fill_fpregset (regcache, fpregsetp,
595 mips_regnum (gdbarch)->fp_control_status);
596 mips64_fill_fpregset (regcache, fpregsetp,
597 mips_regnum (gdbarch)->fp_implementation_revision);
598 }
599 }
600
601 static void
602 mips64_fill_fpregset_wrapper (const struct regset *regset,
603 const struct regcache *regcache,
604 int regnum, void *gregs, size_t len)
605 {
606 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
607
608 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
609 }
610
611 static const struct regset mips_linux_gregset =
612 {
613 NULL, mips_supply_gregset_wrapper, mips_fill_gregset_wrapper
614 };
615
616 static const struct regset mips64_linux_gregset =
617 {
618 NULL, mips64_supply_gregset_wrapper, mips64_fill_gregset_wrapper
619 };
620
621 static const struct regset mips_linux_fpregset =
622 {
623 NULL, mips_supply_fpregset_wrapper, mips_fill_fpregset_wrapper
624 };
625
626 static const struct regset mips64_linux_fpregset =
627 {
628 NULL, mips64_supply_fpregset_wrapper, mips64_fill_fpregset_wrapper
629 };
630
631 static void
632 mips_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
633 iterate_over_regset_sections_cb *cb,
634 void *cb_data,
635 const struct regcache *regcache)
636 {
637 if (register_size (gdbarch, MIPS_ZERO_REGNUM) == 4)
638 {
639 cb (".reg", sizeof (mips_elf_gregset_t), &mips_linux_gregset,
640 NULL, cb_data);
641 cb (".reg2", sizeof (mips_elf_fpregset_t), &mips_linux_fpregset,
642 NULL, cb_data);
643 }
644 else
645 {
646 cb (".reg", sizeof (mips64_elf_gregset_t), &mips64_linux_gregset,
647 NULL, cb_data);
648 cb (".reg2", sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset,
649 NULL, cb_data);
650 }
651 }
652
653 static const struct target_desc *
654 mips_linux_core_read_description (struct gdbarch *gdbarch,
655 struct target_ops *target,
656 bfd *abfd)
657 {
658 asection *section = bfd_get_section_by_name (abfd, ".reg");
659 if (! section)
660 return NULL;
661
662 switch (bfd_section_size (abfd, section))
663 {
664 case sizeof (mips_elf_gregset_t):
665 return mips_tdesc_gp32;
666
667 case sizeof (mips64_elf_gregset_t):
668 return mips_tdesc_gp64;
669
670 default:
671 return NULL;
672 }
673 }
674
675
676 /* Check the code at PC for a dynamic linker lazy resolution stub.
677 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
678 section uniformly since version 2.15. If the pc is in that section,
679 then we are in such a stub. Before that ".stub" was used in 32-bit
680 ELF binaries, however we do not bother checking for that since we
681 have never had and that case should be extremely rare these days.
682 Instead we pattern-match on the code generated by GNU ld. They look
683 like this:
684
685 lw t9,0x8010(gp)
686 addu t7,ra
687 jalr t9,ra
688 addiu t8,zero,INDEX
689
690 (with the appropriate doubleword instructions for N64). As any lazy
691 resolution stubs in microMIPS binaries will always be in a
692 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
693
694 static int
695 mips_linux_in_dynsym_stub (CORE_ADDR pc)
696 {
697 gdb_byte buf[28], *p;
698 ULONGEST insn, insn1;
699 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64);
700 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
701
702 if (in_mips_stubs_section (pc))
703 return 1;
704
705 read_memory (pc - 12, buf, 28);
706
707 if (n64)
708 {
709 /* ld t9,0x8010(gp) */
710 insn1 = 0xdf998010;
711 }
712 else
713 {
714 /* lw t9,0x8010(gp) */
715 insn1 = 0x8f998010;
716 }
717
718 p = buf + 12;
719 while (p >= buf)
720 {
721 insn = extract_unsigned_integer (p, 4, byte_order);
722 if (insn == insn1)
723 break;
724 p -= 4;
725 }
726 if (p < buf)
727 return 0;
728
729 insn = extract_unsigned_integer (p + 4, 4, byte_order);
730 if (n64)
731 {
732 /* 'daddu t7,ra' or 'or t7, ra, zero'*/
733 if (insn != 0x03e0782d || insn != 0x03e07825)
734 return 0;
735
736 }
737 else
738 {
739 /* 'addu t7,ra' or 'or t7, ra, zero'*/
740 if (insn != 0x03e07821 || insn != 0x03e07825)
741 return 0;
742
743 }
744
745 insn = extract_unsigned_integer (p + 8, 4, byte_order);
746 /* jalr t9,ra */
747 if (insn != 0x0320f809)
748 return 0;
749
750 insn = extract_unsigned_integer (p + 12, 4, byte_order);
751 if (n64)
752 {
753 /* daddiu t8,zero,0 */
754 if ((insn & 0xffff0000) != 0x64180000)
755 return 0;
756 }
757 else
758 {
759 /* addiu t8,zero,0 */
760 if ((insn & 0xffff0000) != 0x24180000)
761 return 0;
762 }
763
764 return 1;
765 }
766
767 /* Return non-zero iff PC belongs to the dynamic linker resolution
768 code, a PLT entry, or a lazy binding stub. */
769
770 static int
771 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
772 {
773 /* Check whether PC is in the dynamic linker. This also checks
774 whether it is in the .plt section, used by non-PIC executables. */
775 if (svr4_in_dynsym_resolve_code (pc))
776 return 1;
777
778 /* Likewise for the stubs. They live in the .MIPS.stubs section these
779 days, so we check if the PC is within, than fall back to a pattern
780 match. */
781 if (mips_linux_in_dynsym_stub (pc))
782 return 1;
783
784 return 0;
785 }
786
787 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
788 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
789 implementation of this triggers at "fixup" from the same objfile as
790 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
791 "__dl_runtime_resolve" directly. An unresolved lazy binding
792 stub will point to _dl_runtime_resolve, which will first call
793 __dl_runtime_resolve, and then pass control to the resolved
794 function. */
795
796 static CORE_ADDR
797 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
798 {
799 struct bound_minimal_symbol resolver;
800
801 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
802
803 if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
804 return frame_unwind_caller_pc (get_current_frame ());
805
806 return glibc_skip_solib_resolver (gdbarch, pc);
807 }
808
809 /* Signal trampoline support. There are four supported layouts for a
810 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
811 n64 rt_sigframe. We handle them all independently; not the most
812 efficient way, but simplest. First, declare all the unwinders. */
813
814 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
815 struct frame_info *this_frame,
816 struct trad_frame_cache *this_cache,
817 CORE_ADDR func);
818
819 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
820 struct frame_info *this_frame,
821 struct trad_frame_cache *this_cache,
822 CORE_ADDR func);
823
824 static int mips_linux_sigframe_validate (const struct tramp_frame *self,
825 struct frame_info *this_frame,
826 CORE_ADDR *pc);
827
828 static int micromips_linux_sigframe_validate (const struct tramp_frame *self,
829 struct frame_info *this_frame,
830 CORE_ADDR *pc);
831
832 #define MIPS_NR_LINUX 4000
833 #define MIPS_NR_N64_LINUX 5000
834 #define MIPS_NR_N32_LINUX 6000
835
836 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
837 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
838 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
839 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
840
841 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
842 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
843 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
844 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
845 #define MIPS_INST_SYSCALL 0x0000000c
846
847 #define MICROMIPS_INST_LI_V0 0x3040
848 #define MICROMIPS_INST_POOL32A 0x0000
849 #define MICROMIPS_INST_SYSCALL 0x8b7c
850
851 static const struct tramp_frame mips_linux_o32_sigframe = {
852 SIGTRAMP_FRAME,
853 4,
854 {
855 { MIPS_INST_LI_V0_SIGRETURN, -1 },
856 { MIPS_INST_SYSCALL, -1 },
857 { TRAMP_SENTINEL_INSN, -1 }
858 },
859 mips_linux_o32_sigframe_init,
860 mips_linux_sigframe_validate
861 };
862
863 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
864 SIGTRAMP_FRAME,
865 4,
866 {
867 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
868 { MIPS_INST_SYSCALL, -1 },
869 { TRAMP_SENTINEL_INSN, -1 } },
870 mips_linux_o32_sigframe_init,
871 mips_linux_sigframe_validate
872 };
873
874 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
875 SIGTRAMP_FRAME,
876 4,
877 {
878 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
879 { MIPS_INST_SYSCALL, -1 },
880 { TRAMP_SENTINEL_INSN, -1 }
881 },
882 mips_linux_n32n64_sigframe_init,
883 mips_linux_sigframe_validate
884 };
885
886 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
887 SIGTRAMP_FRAME,
888 4,
889 {
890 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
891 { MIPS_INST_SYSCALL, -1 },
892 { TRAMP_SENTINEL_INSN, -1 }
893 },
894 mips_linux_n32n64_sigframe_init,
895 mips_linux_sigframe_validate
896 };
897
898 static const struct tramp_frame micromips_linux_o32_sigframe = {
899 SIGTRAMP_FRAME,
900 2,
901 {
902 { MICROMIPS_INST_LI_V0, -1 },
903 { MIPS_NR_sigreturn, -1 },
904 { MICROMIPS_INST_POOL32A, -1 },
905 { MICROMIPS_INST_SYSCALL, -1 },
906 { TRAMP_SENTINEL_INSN, -1 }
907 },
908 mips_linux_o32_sigframe_init,
909 micromips_linux_sigframe_validate
910 };
911
912 static const struct tramp_frame micromips_linux_o32_rt_sigframe = {
913 SIGTRAMP_FRAME,
914 2,
915 {
916 { MICROMIPS_INST_LI_V0, -1 },
917 { MIPS_NR_rt_sigreturn, -1 },
918 { MICROMIPS_INST_POOL32A, -1 },
919 { MICROMIPS_INST_SYSCALL, -1 },
920 { TRAMP_SENTINEL_INSN, -1 }
921 },
922 mips_linux_o32_sigframe_init,
923 micromips_linux_sigframe_validate
924 };
925
926 static const struct tramp_frame micromips_linux_n32_rt_sigframe = {
927 SIGTRAMP_FRAME,
928 2,
929 {
930 { MICROMIPS_INST_LI_V0, -1 },
931 { MIPS_NR_N32_rt_sigreturn, -1 },
932 { MICROMIPS_INST_POOL32A, -1 },
933 { MICROMIPS_INST_SYSCALL, -1 },
934 { TRAMP_SENTINEL_INSN, -1 }
935 },
936 mips_linux_n32n64_sigframe_init,
937 micromips_linux_sigframe_validate
938 };
939
940 static const struct tramp_frame micromips_linux_n64_rt_sigframe = {
941 SIGTRAMP_FRAME,
942 2,
943 {
944 { MICROMIPS_INST_LI_V0, -1 },
945 { MIPS_NR_N64_rt_sigreturn, -1 },
946 { MICROMIPS_INST_POOL32A, -1 },
947 { MICROMIPS_INST_SYSCALL, -1 },
948 { TRAMP_SENTINEL_INSN, -1 }
949 },
950 mips_linux_n32n64_sigframe_init,
951 micromips_linux_sigframe_validate
952 };
953
954 /* *INDENT-OFF* */
955 /* The unwinder for o32 signal frames. The legacy structures look
956 like this:
957
958 struct sigframe {
959 u32 sf_ass[4]; [argument save space for o32]
960 u32 sf_code[2]; [signal trampoline or fill]
961 struct sigcontext sf_sc;
962 sigset_t sf_mask;
963 };
964
965 Pre-2.6.12 sigcontext:
966
967 struct sigcontext {
968 unsigned int sc_regmask; [Unused]
969 unsigned int sc_status;
970 unsigned long long sc_pc;
971 unsigned long long sc_regs[32];
972 unsigned long long sc_fpregs[32];
973 unsigned int sc_ownedfp;
974 unsigned int sc_fpc_csr;
975 unsigned int sc_fpc_eir; [Unused]
976 unsigned int sc_used_math;
977 unsigned int sc_ssflags; [Unused]
978 [Alignment hole of four bytes]
979 unsigned long long sc_mdhi;
980 unsigned long long sc_mdlo;
981
982 unsigned int sc_cause; [Unused]
983 unsigned int sc_badvaddr; [Unused]
984
985 unsigned long sc_sigset[4]; [kernel's sigset_t]
986 };
987
988 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
989
990 struct sigcontext {
991 unsigned int sc_regmask; [Unused]
992 unsigned int sc_status; [Unused]
993 unsigned long long sc_pc;
994 unsigned long long sc_regs[32];
995 unsigned long long sc_fpregs[32];
996 unsigned int sc_acx;
997 unsigned int sc_fpc_csr;
998 unsigned int sc_fpc_eir; [Unused]
999 unsigned int sc_used_math;
1000 unsigned int sc_dsp;
1001 [Alignment hole of four bytes]
1002 unsigned long long sc_mdhi;
1003 unsigned long long sc_mdlo;
1004 unsigned long sc_hi1;
1005 unsigned long sc_lo1;
1006 unsigned long sc_hi2;
1007 unsigned long sc_lo2;
1008 unsigned long sc_hi3;
1009 unsigned long sc_lo3;
1010 };
1011
1012 The RT signal frames look like this:
1013
1014 struct rt_sigframe {
1015 u32 rs_ass[4]; [argument save space for o32]
1016 u32 rs_code[2] [signal trampoline or fill]
1017 struct siginfo rs_info;
1018 struct ucontext rs_uc;
1019 };
1020
1021 struct ucontext {
1022 unsigned long uc_flags;
1023 struct ucontext *uc_link;
1024 stack_t uc_stack;
1025 [Alignment hole of four bytes]
1026 struct sigcontext uc_mcontext;
1027 sigset_t uc_sigmask;
1028 }; */
1029 /* *INDENT-ON* */
1030
1031 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
1032
1033 #define RTSIGFRAME_SIGINFO_SIZE 128
1034 #define STACK_T_SIZE (3 * 4)
1035 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
1036 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1037 + RTSIGFRAME_SIGINFO_SIZE \
1038 + UCONTEXT_SIGCONTEXT_OFFSET)
1039
1040 #define SIGCONTEXT_PC (1 * 8)
1041 #define SIGCONTEXT_REGS (2 * 8)
1042 #define SIGCONTEXT_FPREGS (34 * 8)
1043 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
1044 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
1045 #define SIGCONTEXT_HI (69 * 8)
1046 #define SIGCONTEXT_LO (70 * 8)
1047 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
1048 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
1049 #define SIGCONTEXT_HI1 (71 * 8 + 0)
1050 #define SIGCONTEXT_LO1 (71 * 8 + 4)
1051 #define SIGCONTEXT_HI2 (72 * 8 + 0)
1052 #define SIGCONTEXT_LO2 (72 * 8 + 4)
1053 #define SIGCONTEXT_HI3 (73 * 8 + 0)
1054 #define SIGCONTEXT_LO3 (73 * 8 + 4)
1055
1056 #define SIGCONTEXT_REG_SIZE 8
1057
1058 static void
1059 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
1060 struct frame_info *this_frame,
1061 struct trad_frame_cache *this_cache,
1062 CORE_ADDR func)
1063 {
1064 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1065 int ireg;
1066 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1067 CORE_ADDR sigcontext_base;
1068 const struct mips_regnum *regs = mips_regnum (gdbarch);
1069 CORE_ADDR regs_base;
1070
1071 if (self == &mips_linux_o32_sigframe
1072 || self == &micromips_linux_o32_sigframe)
1073 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
1074 else
1075 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
1076
1077 /* I'm not proud of this hack. Eventually we will have the
1078 infrastructure to indicate the size of saved registers on a
1079 per-frame basis, but right now we don't; the kernel saves eight
1080 bytes but we only want four. Use regs_base to access any
1081 64-bit fields. */
1082 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1083 regs_base = sigcontext_base + 4;
1084 else
1085 regs_base = sigcontext_base;
1086
1087 if (mips_linux_restart_reg_p (gdbarch))
1088 trad_frame_set_reg_addr (this_cache,
1089 (MIPS_RESTART_REGNUM
1090 + gdbarch_num_regs (gdbarch)),
1091 regs_base + SIGCONTEXT_REGS);
1092
1093 for (ireg = 1; ireg < 32; ireg++)
1094 trad_frame_set_reg_addr (this_cache,
1095 (ireg + MIPS_ZERO_REGNUM
1096 + gdbarch_num_regs (gdbarch)),
1097 (regs_base + SIGCONTEXT_REGS
1098 + ireg * SIGCONTEXT_REG_SIZE));
1099
1100 /* The way that floating point registers are saved, unfortunately,
1101 depends on the architecture the kernel is built for. For the r3000 and
1102 tx39, four bytes of each register are at the beginning of each of the
1103 32 eight byte slots. For everything else, the registers are saved
1104 using double precision; only the even-numbered slots are initialized,
1105 and the high bits are the odd-numbered register. Assume the latter
1106 layout, since we can't tell, and it's much more common. Which bits are
1107 the "high" bits depends on endianness. */
1108 for (ireg = 0; ireg < 32; ireg++)
1109 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
1110 trad_frame_set_reg_addr (this_cache,
1111 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1112 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1113 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1114 else
1115 trad_frame_set_reg_addr (this_cache,
1116 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1117 (sigcontext_base + SIGCONTEXT_FPREGS
1118 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1119
1120 trad_frame_set_reg_addr (this_cache,
1121 regs->pc + gdbarch_num_regs (gdbarch),
1122 regs_base + SIGCONTEXT_PC);
1123
1124 trad_frame_set_reg_addr (this_cache,
1125 (regs->fp_control_status
1126 + gdbarch_num_regs (gdbarch)),
1127 sigcontext_base + SIGCONTEXT_FPCSR);
1128
1129 if (regs->dspctl != -1)
1130 trad_frame_set_reg_addr (this_cache,
1131 regs->dspctl + gdbarch_num_regs (gdbarch),
1132 sigcontext_base + SIGCONTEXT_DSPCTL);
1133
1134 trad_frame_set_reg_addr (this_cache,
1135 regs->hi + gdbarch_num_regs (gdbarch),
1136 regs_base + SIGCONTEXT_HI);
1137 trad_frame_set_reg_addr (this_cache,
1138 regs->lo + gdbarch_num_regs (gdbarch),
1139 regs_base + SIGCONTEXT_LO);
1140
1141 if (regs->dspacc != -1)
1142 {
1143 trad_frame_set_reg_addr (this_cache,
1144 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1145 sigcontext_base + SIGCONTEXT_HI1);
1146 trad_frame_set_reg_addr (this_cache,
1147 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1148 sigcontext_base + SIGCONTEXT_LO1);
1149 trad_frame_set_reg_addr (this_cache,
1150 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1151 sigcontext_base + SIGCONTEXT_HI2);
1152 trad_frame_set_reg_addr (this_cache,
1153 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1154 sigcontext_base + SIGCONTEXT_LO2);
1155 trad_frame_set_reg_addr (this_cache,
1156 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1157 sigcontext_base + SIGCONTEXT_HI3);
1158 trad_frame_set_reg_addr (this_cache,
1159 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1160 sigcontext_base + SIGCONTEXT_LO3);
1161 }
1162 else
1163 {
1164 trad_frame_set_reg_addr (this_cache,
1165 regs->cause + gdbarch_num_regs (gdbarch),
1166 sigcontext_base + SIGCONTEXT_CAUSE);
1167 trad_frame_set_reg_addr (this_cache,
1168 regs->badvaddr + gdbarch_num_regs (gdbarch),
1169 sigcontext_base + SIGCONTEXT_BADVADDR);
1170 }
1171
1172 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1173 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1174 }
1175
1176 /* *INDENT-OFF* */
1177 /* For N32/N64 things look different. There is no non-rt signal frame.
1178
1179 struct rt_sigframe_n32 {
1180 u32 rs_ass[4]; [ argument save space for o32 ]
1181 u32 rs_code[2]; [ signal trampoline or fill ]
1182 struct siginfo rs_info;
1183 struct ucontextn32 rs_uc;
1184 };
1185
1186 struct ucontextn32 {
1187 u32 uc_flags;
1188 s32 uc_link;
1189 stack32_t uc_stack;
1190 struct sigcontext uc_mcontext;
1191 sigset_t uc_sigmask; [ mask last for extensibility ]
1192 };
1193
1194 struct rt_sigframe {
1195 u32 rs_ass[4]; [ argument save space for o32 ]
1196 u32 rs_code[2]; [ signal trampoline ]
1197 struct siginfo rs_info;
1198 struct ucontext rs_uc;
1199 };
1200
1201 struct ucontext {
1202 unsigned long uc_flags;
1203 struct ucontext *uc_link;
1204 stack_t uc_stack;
1205 struct sigcontext uc_mcontext;
1206 sigset_t uc_sigmask; [ mask last for extensibility ]
1207 };
1208
1209 And the sigcontext is different (this is for both n32 and n64):
1210
1211 struct sigcontext {
1212 unsigned long long sc_regs[32];
1213 unsigned long long sc_fpregs[32];
1214 unsigned long long sc_mdhi;
1215 unsigned long long sc_hi1;
1216 unsigned long long sc_hi2;
1217 unsigned long long sc_hi3;
1218 unsigned long long sc_mdlo;
1219 unsigned long long sc_lo1;
1220 unsigned long long sc_lo2;
1221 unsigned long long sc_lo3;
1222 unsigned long long sc_pc;
1223 unsigned int sc_fpc_csr;
1224 unsigned int sc_used_math;
1225 unsigned int sc_dsp;
1226 unsigned int sc_reserved;
1227 };
1228
1229 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1230 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1231 included too. */
1232 /* *INDENT-ON* */
1233
1234 #define N32_STACK_T_SIZE STACK_T_SIZE
1235 #define N64_STACK_T_SIZE (2 * 8 + 4)
1236 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1237 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1238 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1239 + RTSIGFRAME_SIGINFO_SIZE \
1240 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1241 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1242 + RTSIGFRAME_SIGINFO_SIZE \
1243 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1244
1245 #define N64_SIGCONTEXT_REGS (0 * 8)
1246 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1247 #define N64_SIGCONTEXT_HI (64 * 8)
1248 #define N64_SIGCONTEXT_HI1 (65 * 8)
1249 #define N64_SIGCONTEXT_HI2 (66 * 8)
1250 #define N64_SIGCONTEXT_HI3 (67 * 8)
1251 #define N64_SIGCONTEXT_LO (68 * 8)
1252 #define N64_SIGCONTEXT_LO1 (69 * 8)
1253 #define N64_SIGCONTEXT_LO2 (70 * 8)
1254 #define N64_SIGCONTEXT_LO3 (71 * 8)
1255 #define N64_SIGCONTEXT_PC (72 * 8)
1256 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1257 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1258
1259 #define N64_SIGCONTEXT_REG_SIZE 8
1260
1261 static void
1262 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1263 struct frame_info *this_frame,
1264 struct trad_frame_cache *this_cache,
1265 CORE_ADDR func)
1266 {
1267 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1268 int ireg;
1269 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1270 CORE_ADDR sigcontext_base;
1271 const struct mips_regnum *regs = mips_regnum (gdbarch);
1272
1273 if (self == &mips_linux_n32_rt_sigframe
1274 || self == &micromips_linux_n32_rt_sigframe)
1275 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
1276 else
1277 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
1278
1279 if (mips_linux_restart_reg_p (gdbarch))
1280 trad_frame_set_reg_addr (this_cache,
1281 (MIPS_RESTART_REGNUM
1282 + gdbarch_num_regs (gdbarch)),
1283 sigcontext_base + N64_SIGCONTEXT_REGS);
1284
1285 for (ireg = 1; ireg < 32; ireg++)
1286 trad_frame_set_reg_addr (this_cache,
1287 (ireg + MIPS_ZERO_REGNUM
1288 + gdbarch_num_regs (gdbarch)),
1289 (sigcontext_base + N64_SIGCONTEXT_REGS
1290 + ireg * N64_SIGCONTEXT_REG_SIZE));
1291
1292 for (ireg = 0; ireg < 32; ireg++)
1293 trad_frame_set_reg_addr (this_cache,
1294 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1295 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1296 + ireg * N64_SIGCONTEXT_REG_SIZE));
1297
1298 trad_frame_set_reg_addr (this_cache,
1299 regs->pc + gdbarch_num_regs (gdbarch),
1300 sigcontext_base + N64_SIGCONTEXT_PC);
1301
1302 trad_frame_set_reg_addr (this_cache,
1303 (regs->fp_control_status
1304 + gdbarch_num_regs (gdbarch)),
1305 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1306
1307 trad_frame_set_reg_addr (this_cache,
1308 regs->hi + gdbarch_num_regs (gdbarch),
1309 sigcontext_base + N64_SIGCONTEXT_HI);
1310 trad_frame_set_reg_addr (this_cache,
1311 regs->lo + gdbarch_num_regs (gdbarch),
1312 sigcontext_base + N64_SIGCONTEXT_LO);
1313
1314 if (regs->dspacc != -1)
1315 {
1316 trad_frame_set_reg_addr (this_cache,
1317 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1318 sigcontext_base + N64_SIGCONTEXT_HI1);
1319 trad_frame_set_reg_addr (this_cache,
1320 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1321 sigcontext_base + N64_SIGCONTEXT_LO1);
1322 trad_frame_set_reg_addr (this_cache,
1323 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1324 sigcontext_base + N64_SIGCONTEXT_HI2);
1325 trad_frame_set_reg_addr (this_cache,
1326 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1327 sigcontext_base + N64_SIGCONTEXT_LO2);
1328 trad_frame_set_reg_addr (this_cache,
1329 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1330 sigcontext_base + N64_SIGCONTEXT_HI3);
1331 trad_frame_set_reg_addr (this_cache,
1332 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1333 sigcontext_base + N64_SIGCONTEXT_LO3);
1334 }
1335 if (regs->dspctl != -1)
1336 trad_frame_set_reg_addr (this_cache,
1337 regs->dspctl + gdbarch_num_regs (gdbarch),
1338 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1339
1340 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1341 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1342 }
1343
1344 /* Implement struct tramp_frame's "validate" method for standard MIPS code. */
1345
1346 static int
1347 mips_linux_sigframe_validate (const struct tramp_frame *self,
1348 struct frame_info *this_frame,
1349 CORE_ADDR *pc)
1350 {
1351 return mips_pc_is_mips (*pc);
1352 }
1353
1354 /* Implement struct tramp_frame's "validate" method for microMIPS code. */
1355
1356 static int
1357 micromips_linux_sigframe_validate (const struct tramp_frame *self,
1358 struct frame_info *this_frame,
1359 CORE_ADDR *pc)
1360 {
1361 if (mips_pc_is_micromips (get_frame_arch (this_frame), *pc))
1362 {
1363 *pc = mips_unmake_compact_addr (*pc);
1364 return 1;
1365 }
1366 else
1367 return 0;
1368 }
1369
1370 /* Implement the "write_pc" gdbarch method. */
1371
1372 static void
1373 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1374 {
1375 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1376
1377 mips_write_pc (regcache, pc);
1378
1379 /* Clear the syscall restart flag. */
1380 if (mips_linux_restart_reg_p (gdbarch))
1381 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1382 }
1383
1384 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1385
1386 int
1387 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1388 {
1389 /* If we do not have a target description with registers, then
1390 MIPS_RESTART_REGNUM will not be included in the register set. */
1391 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1392 return 0;
1393
1394 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1395 either be GPR-sized or missing. */
1396 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1397 }
1398
1399 /* When FRAME is at a syscall instruction, return the PC of the next
1400 instruction to be executed. */
1401
1402 static CORE_ADDR
1403 mips_linux_syscall_next_pc (struct frame_info *frame)
1404 {
1405 CORE_ADDR pc = get_frame_pc (frame);
1406 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1407
1408 /* If we are about to make a sigreturn syscall, use the unwinder to
1409 decode the signal frame. */
1410 if (v0 == MIPS_NR_sigreturn
1411 || v0 == MIPS_NR_rt_sigreturn
1412 || v0 == MIPS_NR_N64_rt_sigreturn
1413 || v0 == MIPS_NR_N32_rt_sigreturn)
1414 return frame_unwind_caller_pc (get_current_frame ());
1415
1416 return pc + 4;
1417 }
1418
1419 /* Return the current system call's number present in the
1420 v0 register. When the function fails, it returns -1. */
1421
1422 static LONGEST
1423 mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1424 ptid_t ptid)
1425 {
1426 struct regcache *regcache = get_thread_regcache (ptid);
1427 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1428 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1429 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1430 /* The content of a register */
1431 gdb_byte buf[8];
1432 /* The result */
1433 LONGEST ret;
1434
1435 /* Make sure we're in a known ABI */
1436 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1437 || tdep->mips_abi == MIPS_ABI_N32
1438 || tdep->mips_abi == MIPS_ABI_N64);
1439
1440 gdb_assert (regsize <= sizeof (buf));
1441
1442 /* Getting the system call number from the register.
1443 syscall number is in v0 or $2. */
1444 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf);
1445
1446 ret = extract_signed_integer (buf, regsize, byte_order);
1447
1448 return ret;
1449 }
1450
1451 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1452 gdbarch.h. */
1453
1454 static int
1455 mips_gdb_signal_to_target (struct gdbarch *gdbarch,
1456 enum gdb_signal signal)
1457 {
1458 switch (signal)
1459 {
1460 case GDB_SIGNAL_EMT:
1461 return MIPS_LINUX_SIGEMT;
1462
1463 case GDB_SIGNAL_BUS:
1464 return MIPS_LINUX_SIGBUS;
1465
1466 case GDB_SIGNAL_SYS:
1467 return MIPS_LINUX_SIGSYS;
1468
1469 case GDB_SIGNAL_USR1:
1470 return MIPS_LINUX_SIGUSR1;
1471
1472 case GDB_SIGNAL_USR2:
1473 return MIPS_LINUX_SIGUSR2;
1474
1475 case GDB_SIGNAL_CHLD:
1476 return MIPS_LINUX_SIGCHLD;
1477
1478 case GDB_SIGNAL_PWR:
1479 return MIPS_LINUX_SIGPWR;
1480
1481 case GDB_SIGNAL_WINCH:
1482 return MIPS_LINUX_SIGWINCH;
1483
1484 case GDB_SIGNAL_URG:
1485 return MIPS_LINUX_SIGURG;
1486
1487 case GDB_SIGNAL_IO:
1488 return MIPS_LINUX_SIGIO;
1489
1490 case GDB_SIGNAL_POLL:
1491 return MIPS_LINUX_SIGPOLL;
1492
1493 case GDB_SIGNAL_STOP:
1494 return MIPS_LINUX_SIGSTOP;
1495
1496 case GDB_SIGNAL_TSTP:
1497 return MIPS_LINUX_SIGTSTP;
1498
1499 case GDB_SIGNAL_CONT:
1500 return MIPS_LINUX_SIGCONT;
1501
1502 case GDB_SIGNAL_TTIN:
1503 return MIPS_LINUX_SIGTTIN;
1504
1505 case GDB_SIGNAL_TTOU:
1506 return MIPS_LINUX_SIGTTOU;
1507
1508 case GDB_SIGNAL_VTALRM:
1509 return MIPS_LINUX_SIGVTALRM;
1510
1511 case GDB_SIGNAL_PROF:
1512 return MIPS_LINUX_SIGPROF;
1513
1514 case GDB_SIGNAL_XCPU:
1515 return MIPS_LINUX_SIGXCPU;
1516
1517 case GDB_SIGNAL_XFSZ:
1518 return MIPS_LINUX_SIGXFSZ;
1519
1520 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1521 therefore we have to handle it here. */
1522 case GDB_SIGNAL_REALTIME_32:
1523 return MIPS_LINUX_SIGRTMIN;
1524 }
1525
1526 if (signal >= GDB_SIGNAL_REALTIME_33
1527 && signal <= GDB_SIGNAL_REALTIME_63)
1528 {
1529 int offset = signal - GDB_SIGNAL_REALTIME_33;
1530
1531 return MIPS_LINUX_SIGRTMIN + 1 + offset;
1532 }
1533 else if (signal >= GDB_SIGNAL_REALTIME_64
1534 && signal <= GDB_SIGNAL_REALTIME_127)
1535 {
1536 int offset = signal - GDB_SIGNAL_REALTIME_64;
1537
1538 return MIPS_LINUX_SIGRT64 + offset;
1539 }
1540
1541 return linux_gdb_signal_to_target (gdbarch, signal);
1542 }
1543
1544 /* Translate signals based on MIPS signal values.
1545 Adapted from gdb/common/signals.c. */
1546
1547 static enum gdb_signal
1548 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal)
1549 {
1550 switch (signal)
1551 {
1552 case MIPS_LINUX_SIGEMT:
1553 return GDB_SIGNAL_EMT;
1554
1555 case MIPS_LINUX_SIGBUS:
1556 return GDB_SIGNAL_BUS;
1557
1558 case MIPS_LINUX_SIGSYS:
1559 return GDB_SIGNAL_SYS;
1560
1561 case MIPS_LINUX_SIGUSR1:
1562 return GDB_SIGNAL_USR1;
1563
1564 case MIPS_LINUX_SIGUSR2:
1565 return GDB_SIGNAL_USR2;
1566
1567 case MIPS_LINUX_SIGCHLD:
1568 return GDB_SIGNAL_CHLD;
1569
1570 case MIPS_LINUX_SIGPWR:
1571 return GDB_SIGNAL_PWR;
1572
1573 case MIPS_LINUX_SIGWINCH:
1574 return GDB_SIGNAL_WINCH;
1575
1576 case MIPS_LINUX_SIGURG:
1577 return GDB_SIGNAL_URG;
1578
1579 /* No way to differentiate between SIGIO and SIGPOLL.
1580 Therefore, we just handle the first one. */
1581 case MIPS_LINUX_SIGIO:
1582 return GDB_SIGNAL_IO;
1583
1584 case MIPS_LINUX_SIGSTOP:
1585 return GDB_SIGNAL_STOP;
1586
1587 case MIPS_LINUX_SIGTSTP:
1588 return GDB_SIGNAL_TSTP;
1589
1590 case MIPS_LINUX_SIGCONT:
1591 return GDB_SIGNAL_CONT;
1592
1593 case MIPS_LINUX_SIGTTIN:
1594 return GDB_SIGNAL_TTIN;
1595
1596 case MIPS_LINUX_SIGTTOU:
1597 return GDB_SIGNAL_TTOU;
1598
1599 case MIPS_LINUX_SIGVTALRM:
1600 return GDB_SIGNAL_VTALRM;
1601
1602 case MIPS_LINUX_SIGPROF:
1603 return GDB_SIGNAL_PROF;
1604
1605 case MIPS_LINUX_SIGXCPU:
1606 return GDB_SIGNAL_XCPU;
1607
1608 case MIPS_LINUX_SIGXFSZ:
1609 return GDB_SIGNAL_XFSZ;
1610 }
1611
1612 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX)
1613 {
1614 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1615 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
1616 int offset = signal - MIPS_LINUX_SIGRTMIN;
1617
1618 if (offset == 0)
1619 return GDB_SIGNAL_REALTIME_32;
1620 else if (offset < 32)
1621 return (enum gdb_signal) (offset - 1
1622 + (int) GDB_SIGNAL_REALTIME_33);
1623 else
1624 return (enum gdb_signal) (offset - 32
1625 + (int) GDB_SIGNAL_REALTIME_64);
1626 }
1627
1628 return linux_gdb_signal_from_target (gdbarch, signal);
1629 }
1630
1631 /* Initialize one of the GNU/Linux OS ABIs. */
1632
1633 static void
1634 mips_linux_init_abi (struct gdbarch_info info,
1635 struct gdbarch *gdbarch)
1636 {
1637 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1638 enum mips_abi abi = mips_abi (gdbarch);
1639 struct tdesc_arch_data *tdesc_data
1640 = (struct tdesc_arch_data *) info.tdep_info;
1641
1642 linux_init_abi (info, gdbarch);
1643
1644 /* Get the syscall number from the arch's register. */
1645 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1646
1647 switch (abi)
1648 {
1649 case MIPS_ABI_O32:
1650 set_gdbarch_get_longjmp_target (gdbarch,
1651 mips_linux_get_longjmp_target);
1652 set_solib_svr4_fetch_link_map_offsets
1653 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1654 tramp_frame_prepend_unwinder (gdbarch, &micromips_linux_o32_sigframe);
1655 tramp_frame_prepend_unwinder (gdbarch,
1656 &micromips_linux_o32_rt_sigframe);
1657 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1658 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1659 set_xml_syscall_file_name (gdbarch, "syscalls/mips-o32-linux.xml");
1660 break;
1661 case MIPS_ABI_N32:
1662 set_gdbarch_get_longjmp_target (gdbarch,
1663 mips_linux_get_longjmp_target);
1664 set_solib_svr4_fetch_link_map_offsets
1665 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1666 set_gdbarch_long_double_bit (gdbarch, 128);
1667 /* These floatformats should probably be renamed. MIPS uses
1668 the same 128-bit IEEE floating point format that IA-64 uses,
1669 except that the quiet/signalling NaN bit is reversed (GDB
1670 does not distinguish between quiet and signalling NaNs). */
1671 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1672 tramp_frame_prepend_unwinder (gdbarch,
1673 &micromips_linux_n32_rt_sigframe);
1674 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1675 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n32-linux.xml");
1676 break;
1677 case MIPS_ABI_N64:
1678 set_gdbarch_get_longjmp_target (gdbarch,
1679 mips64_linux_get_longjmp_target);
1680 set_solib_svr4_fetch_link_map_offsets
1681 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1682 set_gdbarch_long_double_bit (gdbarch, 128);
1683 /* These floatformats should probably be renamed. MIPS uses
1684 the same 128-bit IEEE floating point format that IA-64 uses,
1685 except that the quiet/signalling NaN bit is reversed (GDB
1686 does not distinguish between quiet and signalling NaNs). */
1687 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1688 tramp_frame_prepend_unwinder (gdbarch,
1689 &micromips_linux_n64_rt_sigframe);
1690 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1691 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n64-linux.xml");
1692 break;
1693 default:
1694 break;
1695 }
1696
1697 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1698
1699 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1700
1701 /* Enable TLS support. */
1702 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1703 svr4_fetch_objfile_link_map);
1704
1705 /* Initialize this lazily, to avoid an initialization order
1706 dependency on solib-svr4.c's _initialize routine. */
1707 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1708 {
1709 mips_svr4_so_ops = svr4_so_ops;
1710 mips_svr4_so_ops.in_dynsym_resolve_code
1711 = mips_linux_in_dynsym_resolve_code;
1712 }
1713 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1714
1715 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1716
1717 set_gdbarch_core_read_description (gdbarch,
1718 mips_linux_core_read_description);
1719
1720 set_gdbarch_iterate_over_regset_sections
1721 (gdbarch, mips_linux_iterate_over_regset_sections);
1722
1723 set_gdbarch_gdb_signal_from_target (gdbarch,
1724 mips_gdb_signal_from_target);
1725
1726 set_gdbarch_gdb_signal_to_target (gdbarch,
1727 mips_gdb_signal_to_target);
1728
1729 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1730
1731 if (tdesc_data)
1732 {
1733 const struct tdesc_feature *feature;
1734
1735 /* If we have target-described registers, then we can safely
1736 reserve a number for MIPS_RESTART_REGNUM (whether it is
1737 described or not). */
1738 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1739 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1740 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1741
1742 /* If it's present, then assign it to the reserved number. */
1743 feature = tdesc_find_feature (info.target_desc,
1744 "org.gnu.gdb.mips.linux");
1745 if (feature != NULL)
1746 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1747 "restart");
1748 }
1749 }
1750
1751 /* Provide a prototype to silence -Wmissing-prototypes. */
1752 extern initialize_file_ftype _initialize_mips_linux_tdep;
1753
1754 void
1755 _initialize_mips_linux_tdep (void)
1756 {
1757 const struct bfd_arch_info *arch_info;
1758
1759 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1760 arch_info != NULL;
1761 arch_info = arch_info->next)
1762 {
1763 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1764 GDB_OSABI_LINUX,
1765 mips_linux_init_abi);
1766 }
1767 }