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Partial fix for PR breakpoints/10737: Make syscall info be per-arch instead of global
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1 /* Target-dependent code for GNU/Linux on MIPS processors.
2
3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21 #include "gdbcore.h"
22 #include "target.h"
23 #include "solib-svr4.h"
24 #include "osabi.h"
25 #include "mips-tdep.h"
26 #include "frame.h"
27 #include "regcache.h"
28 #include "trad-frame.h"
29 #include "tramp-frame.h"
30 #include "gdbtypes.h"
31 #include "objfiles.h"
32 #include "solib.h"
33 #include "solist.h"
34 #include "symtab.h"
35 #include "target-descriptions.h"
36 #include "regset.h"
37 #include "mips-linux-tdep.h"
38 #include "glibc-tdep.h"
39 #include "linux-tdep.h"
40 #include "xml-syscall.h"
41 #include "gdb_signals.h"
42
43 static struct target_so_ops mips_svr4_so_ops;
44
45 /* This enum represents the signals' numbers on the MIPS
46 architecture. It just contains the signal definitions which are
47 different from the generic implementation.
48
49 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
50 from the Linux kernel tree. */
51
52 enum
53 {
54 MIPS_LINUX_SIGEMT = 7,
55 MIPS_LINUX_SIGBUS = 10,
56 MIPS_LINUX_SIGSYS = 12,
57 MIPS_LINUX_SIGUSR1 = 16,
58 MIPS_LINUX_SIGUSR2 = 17,
59 MIPS_LINUX_SIGCHLD = 18,
60 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD,
61 MIPS_LINUX_SIGPWR = 19,
62 MIPS_LINUX_SIGWINCH = 20,
63 MIPS_LINUX_SIGURG = 21,
64 MIPS_LINUX_SIGIO = 22,
65 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO,
66 MIPS_LINUX_SIGSTOP = 23,
67 MIPS_LINUX_SIGTSTP = 24,
68 MIPS_LINUX_SIGCONT = 25,
69 MIPS_LINUX_SIGTTIN = 26,
70 MIPS_LINUX_SIGTTOU = 27,
71 MIPS_LINUX_SIGVTALRM = 28,
72 MIPS_LINUX_SIGPROF = 29,
73 MIPS_LINUX_SIGXCPU = 30,
74 MIPS_LINUX_SIGXFSZ = 31,
75
76 MIPS_LINUX_SIGRTMIN = 32,
77 MIPS_LINUX_SIGRT64 = 64,
78 MIPS_LINUX_SIGRTMAX = 127,
79 };
80
81 /* Figure out where the longjmp will land.
82 We expect the first arg to be a pointer to the jmp_buf structure
83 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
84 at. The pc is copied into PC. This routine returns 1 on
85 success. */
86
87 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
88 #define MIPS_LINUX_JB_PC 0
89
90 static int
91 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
92 {
93 CORE_ADDR jb_addr;
94 struct gdbarch *gdbarch = get_frame_arch (frame);
95 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
96 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
97
98 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
99
100 if (target_read_memory ((jb_addr
101 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
102 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
103 return 0;
104
105 *pc = extract_unsigned_integer (buf,
106 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
107 byte_order);
108
109 return 1;
110 }
111
112 /* Transform the bits comprising a 32-bit register to the right size
113 for regcache_raw_supply(). This is needed when mips_isa_regsize()
114 is 8. */
115
116 static void
117 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
118 {
119 struct gdbarch *gdbarch = get_regcache_arch (regcache);
120 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
121 gdb_byte buf[MAX_REGISTER_SIZE];
122 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
123 extract_signed_integer (addr, 4, byte_order));
124 regcache_raw_supply (regcache, regnum, buf);
125 }
126
127 /* Unpack an elf_gregset_t into GDB's register cache. */
128
129 void
130 mips_supply_gregset (struct regcache *regcache,
131 const mips_elf_gregset_t *gregsetp)
132 {
133 int regi;
134 const mips_elf_greg_t *regp = *gregsetp;
135 char zerobuf[MAX_REGISTER_SIZE];
136 struct gdbarch *gdbarch = get_regcache_arch (regcache);
137
138 memset (zerobuf, 0, MAX_REGISTER_SIZE);
139
140 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
141 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
142
143 if (mips_linux_restart_reg_p (gdbarch))
144 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
145
146 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
147 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
148
149 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
150 regp + EF_CP0_EPC);
151 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
152 regp + EF_CP0_BADVADDR);
153 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
154 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
155 regp + EF_CP0_CAUSE);
156
157 /* Fill the inaccessible zero register with zero. */
158 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
159 }
160
161 static void
162 mips_supply_gregset_wrapper (const struct regset *regset,
163 struct regcache *regcache,
164 int regnum, const void *gregs, size_t len)
165 {
166 gdb_assert (len == sizeof (mips_elf_gregset_t));
167
168 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
169 }
170
171 /* Pack our registers (or one register) into an elf_gregset_t. */
172
173 void
174 mips_fill_gregset (const struct regcache *regcache,
175 mips_elf_gregset_t *gregsetp, int regno)
176 {
177 struct gdbarch *gdbarch = get_regcache_arch (regcache);
178 int regaddr, regi;
179 mips_elf_greg_t *regp = *gregsetp;
180 void *dst;
181
182 if (regno == -1)
183 {
184 memset (regp, 0, sizeof (mips_elf_gregset_t));
185 for (regi = 1; regi < 32; regi++)
186 mips_fill_gregset (regcache, gregsetp, regi);
187 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
188 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
189 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
191 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
192 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
193 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
194 return;
195 }
196
197 if (regno > 0 && regno < 32)
198 {
199 dst = regp + regno + EF_REG0;
200 regcache_raw_collect (regcache, regno, dst);
201 return;
202 }
203
204 if (regno == mips_regnum (gdbarch)->lo)
205 regaddr = EF_LO;
206 else if (regno == mips_regnum (gdbarch)->hi)
207 regaddr = EF_HI;
208 else if (regno == mips_regnum (gdbarch)->pc)
209 regaddr = EF_CP0_EPC;
210 else if (regno == mips_regnum (gdbarch)->badvaddr)
211 regaddr = EF_CP0_BADVADDR;
212 else if (regno == MIPS_PS_REGNUM)
213 regaddr = EF_CP0_STATUS;
214 else if (regno == mips_regnum (gdbarch)->cause)
215 regaddr = EF_CP0_CAUSE;
216 else if (mips_linux_restart_reg_p (gdbarch)
217 && regno == MIPS_RESTART_REGNUM)
218 regaddr = EF_REG0;
219 else
220 regaddr = -1;
221
222 if (regaddr != -1)
223 {
224 dst = regp + regaddr;
225 regcache_raw_collect (regcache, regno, dst);
226 }
227 }
228
229 static void
230 mips_fill_gregset_wrapper (const struct regset *regset,
231 const struct regcache *regcache,
232 int regnum, void *gregs, size_t len)
233 {
234 gdb_assert (len == sizeof (mips_elf_gregset_t));
235
236 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
237 }
238
239 /* Likewise, unpack an elf_fpregset_t. */
240
241 void
242 mips_supply_fpregset (struct regcache *regcache,
243 const mips_elf_fpregset_t *fpregsetp)
244 {
245 struct gdbarch *gdbarch = get_regcache_arch (regcache);
246 int regi;
247 char zerobuf[MAX_REGISTER_SIZE];
248
249 memset (zerobuf, 0, MAX_REGISTER_SIZE);
250
251 for (regi = 0; regi < 32; regi++)
252 regcache_raw_supply (regcache,
253 gdbarch_fp0_regnum (gdbarch) + regi,
254 *fpregsetp + regi);
255
256 regcache_raw_supply (regcache,
257 mips_regnum (gdbarch)->fp_control_status,
258 *fpregsetp + 32);
259
260 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
261 regcache_raw_supply (regcache,
262 mips_regnum (gdbarch)->fp_implementation_revision,
263 zerobuf);
264 }
265
266 static void
267 mips_supply_fpregset_wrapper (const struct regset *regset,
268 struct regcache *regcache,
269 int regnum, const void *gregs, size_t len)
270 {
271 gdb_assert (len == sizeof (mips_elf_fpregset_t));
272
273 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs);
274 }
275
276 /* Likewise, pack one or all floating point registers into an
277 elf_fpregset_t. */
278
279 void
280 mips_fill_fpregset (const struct regcache *regcache,
281 mips_elf_fpregset_t *fpregsetp, int regno)
282 {
283 struct gdbarch *gdbarch = get_regcache_arch (regcache);
284 char *to;
285
286 if ((regno >= gdbarch_fp0_regnum (gdbarch))
287 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
288 {
289 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch));
290 regcache_raw_collect (regcache, regno, to);
291 }
292 else if (regno == mips_regnum (gdbarch)->fp_control_status)
293 {
294 to = (char *) (*fpregsetp + 32);
295 regcache_raw_collect (regcache, regno, to);
296 }
297 else if (regno == -1)
298 {
299 int regi;
300
301 for (regi = 0; regi < 32; regi++)
302 mips_fill_fpregset (regcache, fpregsetp,
303 gdbarch_fp0_regnum (gdbarch) + regi);
304 mips_fill_fpregset (regcache, fpregsetp,
305 mips_regnum (gdbarch)->fp_control_status);
306 }
307 }
308
309 static void
310 mips_fill_fpregset_wrapper (const struct regset *regset,
311 const struct regcache *regcache,
312 int regnum, void *gregs, size_t len)
313 {
314 gdb_assert (len == sizeof (mips_elf_fpregset_t));
315
316 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum);
317 }
318
319 /* Support for 64-bit ABIs. */
320
321 /* Figure out where the longjmp will land.
322 We expect the first arg to be a pointer to the jmp_buf structure
323 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
324 at. The pc is copied into PC. This routine returns 1 on
325 success. */
326
327 /* Details about jmp_buf. */
328
329 #define MIPS64_LINUX_JB_PC 0
330
331 static int
332 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
333 {
334 CORE_ADDR jb_addr;
335 struct gdbarch *gdbarch = get_frame_arch (frame);
336 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
337 void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
338 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
339
340 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
341
342 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
343 buf,
344 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
345 return 0;
346
347 *pc = extract_unsigned_integer (buf,
348 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
349 byte_order);
350
351 return 1;
352 }
353
354 /* Register set support functions. These operate on standard 64-bit
355 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
356 target will still use the 64-bit format for PTRACE_GETREGS. */
357
358 /* Supply a 64-bit register. */
359
360 static void
361 supply_64bit_reg (struct regcache *regcache, int regnum,
362 const gdb_byte *buf)
363 {
364 struct gdbarch *gdbarch = get_regcache_arch (regcache);
365 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
366 && register_size (gdbarch, regnum) == 4)
367 regcache_raw_supply (regcache, regnum, buf + 4);
368 else
369 regcache_raw_supply (regcache, regnum, buf);
370 }
371
372 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
373
374 void
375 mips64_supply_gregset (struct regcache *regcache,
376 const mips64_elf_gregset_t *gregsetp)
377 {
378 int regi;
379 const mips64_elf_greg_t *regp = *gregsetp;
380 gdb_byte zerobuf[MAX_REGISTER_SIZE];
381 struct gdbarch *gdbarch = get_regcache_arch (regcache);
382
383 memset (zerobuf, 0, MAX_REGISTER_SIZE);
384
385 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
386 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
387 (const gdb_byte *) (regp + regi));
388
389 if (mips_linux_restart_reg_p (gdbarch))
390 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
391 (const gdb_byte *) (regp + MIPS64_EF_REG0));
392
393 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
394 (const gdb_byte *) (regp + MIPS64_EF_LO));
395 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
396 (const gdb_byte *) (regp + MIPS64_EF_HI));
397
398 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
399 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
400 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
401 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
402 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
403 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
404 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
405 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
406
407 /* Fill the inaccessible zero register with zero. */
408 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);
409 }
410
411 static void
412 mips64_supply_gregset_wrapper (const struct regset *regset,
413 struct regcache *regcache,
414 int regnum, const void *gregs, size_t len)
415 {
416 gdb_assert (len == sizeof (mips64_elf_gregset_t));
417
418 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
419 }
420
421 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
422
423 void
424 mips64_fill_gregset (const struct regcache *regcache,
425 mips64_elf_gregset_t *gregsetp, int regno)
426 {
427 struct gdbarch *gdbarch = get_regcache_arch (regcache);
428 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
429 int regaddr, regi;
430 mips64_elf_greg_t *regp = *gregsetp;
431 void *dst;
432
433 if (regno == -1)
434 {
435 memset (regp, 0, sizeof (mips64_elf_gregset_t));
436 for (regi = 1; regi < 32; regi++)
437 mips64_fill_gregset (regcache, gregsetp, regi);
438 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
439 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
440 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
441 mips64_fill_gregset (regcache, gregsetp,
442 mips_regnum (gdbarch)->badvaddr);
443 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
444 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
445 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
446 return;
447 }
448
449 if (regno > 0 && regno < 32)
450 regaddr = regno + MIPS64_EF_REG0;
451 else if (regno == mips_regnum (gdbarch)->lo)
452 regaddr = MIPS64_EF_LO;
453 else if (regno == mips_regnum (gdbarch)->hi)
454 regaddr = MIPS64_EF_HI;
455 else if (regno == mips_regnum (gdbarch)->pc)
456 regaddr = MIPS64_EF_CP0_EPC;
457 else if (regno == mips_regnum (gdbarch)->badvaddr)
458 regaddr = MIPS64_EF_CP0_BADVADDR;
459 else if (regno == MIPS_PS_REGNUM)
460 regaddr = MIPS64_EF_CP0_STATUS;
461 else if (regno == mips_regnum (gdbarch)->cause)
462 regaddr = MIPS64_EF_CP0_CAUSE;
463 else if (mips_linux_restart_reg_p (gdbarch)
464 && regno == MIPS_RESTART_REGNUM)
465 regaddr = MIPS64_EF_REG0;
466 else
467 regaddr = -1;
468
469 if (regaddr != -1)
470 {
471 gdb_byte buf[MAX_REGISTER_SIZE];
472 LONGEST val;
473
474 regcache_raw_collect (regcache, regno, buf);
475 val = extract_signed_integer (buf, register_size (gdbarch, regno),
476 byte_order);
477 dst = regp + regaddr;
478 store_signed_integer (dst, 8, byte_order, val);
479 }
480 }
481
482 static void
483 mips64_fill_gregset_wrapper (const struct regset *regset,
484 const struct regcache *regcache,
485 int regnum, void *gregs, size_t len)
486 {
487 gdb_assert (len == sizeof (mips64_elf_gregset_t));
488
489 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
490 }
491
492 /* Likewise, unpack an elf_fpregset_t. */
493
494 void
495 mips64_supply_fpregset (struct regcache *regcache,
496 const mips64_elf_fpregset_t *fpregsetp)
497 {
498 struct gdbarch *gdbarch = get_regcache_arch (regcache);
499 int regi;
500
501 /* See mips_linux_o32_sigframe_init for a description of the
502 peculiar FP register layout. */
503 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
504 for (regi = 0; regi < 32; regi++)
505 {
506 const gdb_byte *reg_ptr
507 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
508 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
509 reg_ptr += 4;
510 regcache_raw_supply (regcache,
511 gdbarch_fp0_regnum (gdbarch) + regi,
512 reg_ptr);
513 }
514 else
515 for (regi = 0; regi < 32; regi++)
516 regcache_raw_supply (regcache,
517 gdbarch_fp0_regnum (gdbarch) + regi,
518 (const char *) (*fpregsetp + regi));
519
520 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
521 (const gdb_byte *) (*fpregsetp + 32));
522
523 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
524 include it - but the result of PTRACE_GETFPREGS does. The best we
525 can do is to assume that its value is present. */
526 supply_32bit_reg (regcache,
527 mips_regnum (gdbarch)->fp_implementation_revision,
528 (const gdb_byte *) (*fpregsetp + 32) + 4);
529 }
530
531 static void
532 mips64_supply_fpregset_wrapper (const struct regset *regset,
533 struct regcache *regcache,
534 int regnum, const void *gregs, size_t len)
535 {
536 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
537
538 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
539 }
540
541 /* Likewise, pack one or all floating point registers into an
542 elf_fpregset_t. */
543
544 void
545 mips64_fill_fpregset (const struct regcache *regcache,
546 mips64_elf_fpregset_t *fpregsetp, int regno)
547 {
548 struct gdbarch *gdbarch = get_regcache_arch (regcache);
549 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
550 gdb_byte *to;
551
552 if ((regno >= gdbarch_fp0_regnum (gdbarch))
553 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
554 {
555 /* See mips_linux_o32_sigframe_init for a description of the
556 peculiar FP register layout. */
557 if (register_size (gdbarch, regno) == 4)
558 {
559 int regi = regno - gdbarch_fp0_regnum (gdbarch);
560
561 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
562 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
563 to += 4;
564 regcache_raw_collect (regcache, regno, to);
565 }
566 else
567 {
568 to = (gdb_byte *) (*fpregsetp + regno
569 - gdbarch_fp0_regnum (gdbarch));
570 regcache_raw_collect (regcache, regno, to);
571 }
572 }
573 else if (regno == mips_regnum (gdbarch)->fp_control_status)
574 {
575 gdb_byte buf[MAX_REGISTER_SIZE];
576 LONGEST val;
577
578 regcache_raw_collect (regcache, regno, buf);
579 val = extract_signed_integer (buf, register_size (gdbarch, regno),
580 byte_order);
581 to = (gdb_byte *) (*fpregsetp + 32);
582 store_signed_integer (to, 4, byte_order, val);
583 }
584 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
585 {
586 gdb_byte buf[MAX_REGISTER_SIZE];
587 LONGEST val;
588
589 regcache_raw_collect (regcache, regno, buf);
590 val = extract_signed_integer (buf, register_size (gdbarch, regno),
591 byte_order);
592 to = (gdb_byte *) (*fpregsetp + 32) + 4;
593 store_signed_integer (to, 4, byte_order, val);
594 }
595 else if (regno == -1)
596 {
597 int regi;
598
599 for (regi = 0; regi < 32; regi++)
600 mips64_fill_fpregset (regcache, fpregsetp,
601 gdbarch_fp0_regnum (gdbarch) + regi);
602 mips64_fill_fpregset (regcache, fpregsetp,
603 mips_regnum (gdbarch)->fp_control_status);
604 mips64_fill_fpregset (regcache, fpregsetp,
605 mips_regnum (gdbarch)->fp_implementation_revision);
606 }
607 }
608
609 static void
610 mips64_fill_fpregset_wrapper (const struct regset *regset,
611 const struct regcache *regcache,
612 int regnum, void *gregs, size_t len)
613 {
614 gdb_assert (len == sizeof (mips64_elf_fpregset_t));
615
616 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
617 }
618
619 static const struct regset mips_linux_gregset =
620 {
621 NULL, mips_supply_gregset_wrapper, mips_fill_gregset_wrapper
622 };
623
624 static const struct regset mips64_linux_gregset =
625 {
626 NULL, mips64_supply_gregset_wrapper, mips64_fill_gregset_wrapper
627 };
628
629 static const struct regset mips_linux_fpregset =
630 {
631 NULL, mips_supply_fpregset_wrapper, mips_fill_fpregset_wrapper
632 };
633
634 static const struct regset mips64_linux_fpregset =
635 {
636 NULL, mips64_supply_fpregset_wrapper, mips64_fill_fpregset_wrapper
637 };
638
639 static void
640 mips_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
641 iterate_over_regset_sections_cb *cb,
642 void *cb_data,
643 const struct regcache *regcache)
644 {
645 if (register_size (gdbarch, MIPS_ZERO_REGNUM) == 4)
646 {
647 cb (".reg", sizeof (mips_elf_gregset_t), &mips_linux_gregset,
648 NULL, cb_data);
649 cb (".reg2", sizeof (mips_elf_fpregset_t), &mips_linux_fpregset,
650 NULL, cb_data);
651 }
652 else
653 {
654 cb (".reg", sizeof (mips64_elf_gregset_t), &mips64_linux_gregset,
655 NULL, cb_data);
656 cb (".reg2", sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset,
657 NULL, cb_data);
658 }
659 }
660
661 static const struct target_desc *
662 mips_linux_core_read_description (struct gdbarch *gdbarch,
663 struct target_ops *target,
664 bfd *abfd)
665 {
666 asection *section = bfd_get_section_by_name (abfd, ".reg");
667 if (! section)
668 return NULL;
669
670 switch (bfd_section_size (abfd, section))
671 {
672 case sizeof (mips_elf_gregset_t):
673 return mips_tdesc_gp32;
674
675 case sizeof (mips64_elf_gregset_t):
676 return mips_tdesc_gp64;
677
678 default:
679 return NULL;
680 }
681 }
682
683
684 /* Check the code at PC for a dynamic linker lazy resolution stub.
685 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
686 section uniformly since version 2.15. If the pc is in that section,
687 then we are in such a stub. Before that ".stub" was used in 32-bit
688 ELF binaries, however we do not bother checking for that since we
689 have never had and that case should be extremely rare these days.
690 Instead we pattern-match on the code generated by GNU ld. They look
691 like this:
692
693 lw t9,0x8010(gp)
694 addu t7,ra
695 jalr t9,ra
696 addiu t8,zero,INDEX
697
698 (with the appropriate doubleword instructions for N64). As any lazy
699 resolution stubs in microMIPS binaries will always be in a
700 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
701
702 static int
703 mips_linux_in_dynsym_stub (CORE_ADDR pc)
704 {
705 gdb_byte buf[28], *p;
706 ULONGEST insn, insn1;
707 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64);
708 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
709
710 if (in_mips_stubs_section (pc))
711 return 1;
712
713 read_memory (pc - 12, buf, 28);
714
715 if (n64)
716 {
717 /* ld t9,0x8010(gp) */
718 insn1 = 0xdf998010;
719 }
720 else
721 {
722 /* lw t9,0x8010(gp) */
723 insn1 = 0x8f998010;
724 }
725
726 p = buf + 12;
727 while (p >= buf)
728 {
729 insn = extract_unsigned_integer (p, 4, byte_order);
730 if (insn == insn1)
731 break;
732 p -= 4;
733 }
734 if (p < buf)
735 return 0;
736
737 insn = extract_unsigned_integer (p + 4, 4, byte_order);
738 if (n64)
739 {
740 /* daddu t7,ra */
741 if (insn != 0x03e0782d)
742 return 0;
743 }
744 else
745 {
746 /* addu t7,ra */
747 if (insn != 0x03e07821)
748 return 0;
749 }
750
751 insn = extract_unsigned_integer (p + 8, 4, byte_order);
752 /* jalr t9,ra */
753 if (insn != 0x0320f809)
754 return 0;
755
756 insn = extract_unsigned_integer (p + 12, 4, byte_order);
757 if (n64)
758 {
759 /* daddiu t8,zero,0 */
760 if ((insn & 0xffff0000) != 0x64180000)
761 return 0;
762 }
763 else
764 {
765 /* addiu t8,zero,0 */
766 if ((insn & 0xffff0000) != 0x24180000)
767 return 0;
768 }
769
770 return 1;
771 }
772
773 /* Return non-zero iff PC belongs to the dynamic linker resolution
774 code, a PLT entry, or a lazy binding stub. */
775
776 static int
777 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
778 {
779 /* Check whether PC is in the dynamic linker. This also checks
780 whether it is in the .plt section, used by non-PIC executables. */
781 if (svr4_in_dynsym_resolve_code (pc))
782 return 1;
783
784 /* Likewise for the stubs. They live in the .MIPS.stubs section these
785 days, so we check if the PC is within, than fall back to a pattern
786 match. */
787 if (mips_linux_in_dynsym_stub (pc))
788 return 1;
789
790 return 0;
791 }
792
793 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
794 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
795 implementation of this triggers at "fixup" from the same objfile as
796 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
797 "__dl_runtime_resolve" directly. An unresolved lazy binding
798 stub will point to _dl_runtime_resolve, which will first call
799 __dl_runtime_resolve, and then pass control to the resolved
800 function. */
801
802 static CORE_ADDR
803 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
804 {
805 struct bound_minimal_symbol resolver;
806
807 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
808
809 if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
810 return frame_unwind_caller_pc (get_current_frame ());
811
812 return glibc_skip_solib_resolver (gdbarch, pc);
813 }
814
815 /* Signal trampoline support. There are four supported layouts for a
816 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
817 n64 rt_sigframe. We handle them all independently; not the most
818 efficient way, but simplest. First, declare all the unwinders. */
819
820 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
821 struct frame_info *this_frame,
822 struct trad_frame_cache *this_cache,
823 CORE_ADDR func);
824
825 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
826 struct frame_info *this_frame,
827 struct trad_frame_cache *this_cache,
828 CORE_ADDR func);
829
830 #define MIPS_NR_LINUX 4000
831 #define MIPS_NR_N64_LINUX 5000
832 #define MIPS_NR_N32_LINUX 6000
833
834 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
835 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
836 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
837 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
838
839 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
840 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
841 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
842 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
843 #define MIPS_INST_SYSCALL 0x0000000c
844
845 static const struct tramp_frame mips_linux_o32_sigframe = {
846 SIGTRAMP_FRAME,
847 4,
848 {
849 { MIPS_INST_LI_V0_SIGRETURN, -1 },
850 { MIPS_INST_SYSCALL, -1 },
851 { TRAMP_SENTINEL_INSN, -1 }
852 },
853 mips_linux_o32_sigframe_init
854 };
855
856 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
857 SIGTRAMP_FRAME,
858 4,
859 {
860 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 },
861 { MIPS_INST_SYSCALL, -1 },
862 { TRAMP_SENTINEL_INSN, -1 } },
863 mips_linux_o32_sigframe_init
864 };
865
866 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
867 SIGTRAMP_FRAME,
868 4,
869 {
870 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 },
871 { MIPS_INST_SYSCALL, -1 },
872 { TRAMP_SENTINEL_INSN, -1 }
873 },
874 mips_linux_n32n64_sigframe_init
875 };
876
877 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
878 SIGTRAMP_FRAME,
879 4,
880 {
881 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 },
882 { MIPS_INST_SYSCALL, -1 },
883 { TRAMP_SENTINEL_INSN, -1 }
884 },
885 mips_linux_n32n64_sigframe_init
886 };
887
888 /* *INDENT-OFF* */
889 /* The unwinder for o32 signal frames. The legacy structures look
890 like this:
891
892 struct sigframe {
893 u32 sf_ass[4]; [argument save space for o32]
894 u32 sf_code[2]; [signal trampoline or fill]
895 struct sigcontext sf_sc;
896 sigset_t sf_mask;
897 };
898
899 Pre-2.6.12 sigcontext:
900
901 struct sigcontext {
902 unsigned int sc_regmask; [Unused]
903 unsigned int sc_status;
904 unsigned long long sc_pc;
905 unsigned long long sc_regs[32];
906 unsigned long long sc_fpregs[32];
907 unsigned int sc_ownedfp;
908 unsigned int sc_fpc_csr;
909 unsigned int sc_fpc_eir; [Unused]
910 unsigned int sc_used_math;
911 unsigned int sc_ssflags; [Unused]
912 [Alignment hole of four bytes]
913 unsigned long long sc_mdhi;
914 unsigned long long sc_mdlo;
915
916 unsigned int sc_cause; [Unused]
917 unsigned int sc_badvaddr; [Unused]
918
919 unsigned long sc_sigset[4]; [kernel's sigset_t]
920 };
921
922 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
923
924 struct sigcontext {
925 unsigned int sc_regmask; [Unused]
926 unsigned int sc_status; [Unused]
927 unsigned long long sc_pc;
928 unsigned long long sc_regs[32];
929 unsigned long long sc_fpregs[32];
930 unsigned int sc_acx;
931 unsigned int sc_fpc_csr;
932 unsigned int sc_fpc_eir; [Unused]
933 unsigned int sc_used_math;
934 unsigned int sc_dsp;
935 [Alignment hole of four bytes]
936 unsigned long long sc_mdhi;
937 unsigned long long sc_mdlo;
938 unsigned long sc_hi1;
939 unsigned long sc_lo1;
940 unsigned long sc_hi2;
941 unsigned long sc_lo2;
942 unsigned long sc_hi3;
943 unsigned long sc_lo3;
944 };
945
946 The RT signal frames look like this:
947
948 struct rt_sigframe {
949 u32 rs_ass[4]; [argument save space for o32]
950 u32 rs_code[2] [signal trampoline or fill]
951 struct siginfo rs_info;
952 struct ucontext rs_uc;
953 };
954
955 struct ucontext {
956 unsigned long uc_flags;
957 struct ucontext *uc_link;
958 stack_t uc_stack;
959 [Alignment hole of four bytes]
960 struct sigcontext uc_mcontext;
961 sigset_t uc_sigmask;
962 }; */
963 /* *INDENT-ON* */
964
965 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
966
967 #define RTSIGFRAME_SIGINFO_SIZE 128
968 #define STACK_T_SIZE (3 * 4)
969 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
970 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
971 + RTSIGFRAME_SIGINFO_SIZE \
972 + UCONTEXT_SIGCONTEXT_OFFSET)
973
974 #define SIGCONTEXT_PC (1 * 8)
975 #define SIGCONTEXT_REGS (2 * 8)
976 #define SIGCONTEXT_FPREGS (34 * 8)
977 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
978 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
979 #define SIGCONTEXT_HI (69 * 8)
980 #define SIGCONTEXT_LO (70 * 8)
981 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
982 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
983 #define SIGCONTEXT_HI1 (71 * 8 + 0)
984 #define SIGCONTEXT_LO1 (71 * 8 + 4)
985 #define SIGCONTEXT_HI2 (72 * 8 + 0)
986 #define SIGCONTEXT_LO2 (72 * 8 + 4)
987 #define SIGCONTEXT_HI3 (73 * 8 + 0)
988 #define SIGCONTEXT_LO3 (73 * 8 + 4)
989
990 #define SIGCONTEXT_REG_SIZE 8
991
992 static void
993 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
994 struct frame_info *this_frame,
995 struct trad_frame_cache *this_cache,
996 CORE_ADDR func)
997 {
998 struct gdbarch *gdbarch = get_frame_arch (this_frame);
999 int ireg;
1000 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1001 CORE_ADDR sigcontext_base;
1002 const struct mips_regnum *regs = mips_regnum (gdbarch);
1003 CORE_ADDR regs_base;
1004
1005 if (self == &mips_linux_o32_sigframe)
1006 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
1007 else
1008 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
1009
1010 /* I'm not proud of this hack. Eventually we will have the
1011 infrastructure to indicate the size of saved registers on a
1012 per-frame basis, but right now we don't; the kernel saves eight
1013 bytes but we only want four. Use regs_base to access any
1014 64-bit fields. */
1015 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1016 regs_base = sigcontext_base + 4;
1017 else
1018 regs_base = sigcontext_base;
1019
1020 if (mips_linux_restart_reg_p (gdbarch))
1021 trad_frame_set_reg_addr (this_cache,
1022 (MIPS_RESTART_REGNUM
1023 + gdbarch_num_regs (gdbarch)),
1024 regs_base + SIGCONTEXT_REGS);
1025
1026 for (ireg = 1; ireg < 32; ireg++)
1027 trad_frame_set_reg_addr (this_cache,
1028 (ireg + MIPS_ZERO_REGNUM
1029 + gdbarch_num_regs (gdbarch)),
1030 (regs_base + SIGCONTEXT_REGS
1031 + ireg * SIGCONTEXT_REG_SIZE));
1032
1033 /* The way that floating point registers are saved, unfortunately,
1034 depends on the architecture the kernel is built for. For the r3000 and
1035 tx39, four bytes of each register are at the beginning of each of the
1036 32 eight byte slots. For everything else, the registers are saved
1037 using double precision; only the even-numbered slots are initialized,
1038 and the high bits are the odd-numbered register. Assume the latter
1039 layout, since we can't tell, and it's much more common. Which bits are
1040 the "high" bits depends on endianness. */
1041 for (ireg = 0; ireg < 32; ireg++)
1042 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
1043 trad_frame_set_reg_addr (this_cache,
1044 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1045 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1046 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1047 else
1048 trad_frame_set_reg_addr (this_cache,
1049 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1050 (sigcontext_base + SIGCONTEXT_FPREGS
1051 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1052
1053 trad_frame_set_reg_addr (this_cache,
1054 regs->pc + gdbarch_num_regs (gdbarch),
1055 regs_base + SIGCONTEXT_PC);
1056
1057 trad_frame_set_reg_addr (this_cache,
1058 (regs->fp_control_status
1059 + gdbarch_num_regs (gdbarch)),
1060 sigcontext_base + SIGCONTEXT_FPCSR);
1061
1062 if (regs->dspctl != -1)
1063 trad_frame_set_reg_addr (this_cache,
1064 regs->dspctl + gdbarch_num_regs (gdbarch),
1065 sigcontext_base + SIGCONTEXT_DSPCTL);
1066
1067 trad_frame_set_reg_addr (this_cache,
1068 regs->hi + gdbarch_num_regs (gdbarch),
1069 regs_base + SIGCONTEXT_HI);
1070 trad_frame_set_reg_addr (this_cache,
1071 regs->lo + gdbarch_num_regs (gdbarch),
1072 regs_base + SIGCONTEXT_LO);
1073
1074 if (regs->dspacc != -1)
1075 {
1076 trad_frame_set_reg_addr (this_cache,
1077 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1078 sigcontext_base + SIGCONTEXT_HI1);
1079 trad_frame_set_reg_addr (this_cache,
1080 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1081 sigcontext_base + SIGCONTEXT_LO1);
1082 trad_frame_set_reg_addr (this_cache,
1083 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1084 sigcontext_base + SIGCONTEXT_HI2);
1085 trad_frame_set_reg_addr (this_cache,
1086 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1087 sigcontext_base + SIGCONTEXT_LO2);
1088 trad_frame_set_reg_addr (this_cache,
1089 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1090 sigcontext_base + SIGCONTEXT_HI3);
1091 trad_frame_set_reg_addr (this_cache,
1092 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1093 sigcontext_base + SIGCONTEXT_LO3);
1094 }
1095 else
1096 {
1097 trad_frame_set_reg_addr (this_cache,
1098 regs->cause + gdbarch_num_regs (gdbarch),
1099 sigcontext_base + SIGCONTEXT_CAUSE);
1100 trad_frame_set_reg_addr (this_cache,
1101 regs->badvaddr + gdbarch_num_regs (gdbarch),
1102 sigcontext_base + SIGCONTEXT_BADVADDR);
1103 }
1104
1105 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1106 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1107 }
1108
1109 /* *INDENT-OFF* */
1110 /* For N32/N64 things look different. There is no non-rt signal frame.
1111
1112 struct rt_sigframe_n32 {
1113 u32 rs_ass[4]; [ argument save space for o32 ]
1114 u32 rs_code[2]; [ signal trampoline or fill ]
1115 struct siginfo rs_info;
1116 struct ucontextn32 rs_uc;
1117 };
1118
1119 struct ucontextn32 {
1120 u32 uc_flags;
1121 s32 uc_link;
1122 stack32_t uc_stack;
1123 struct sigcontext uc_mcontext;
1124 sigset_t uc_sigmask; [ mask last for extensibility ]
1125 };
1126
1127 struct rt_sigframe {
1128 u32 rs_ass[4]; [ argument save space for o32 ]
1129 u32 rs_code[2]; [ signal trampoline ]
1130 struct siginfo rs_info;
1131 struct ucontext rs_uc;
1132 };
1133
1134 struct ucontext {
1135 unsigned long uc_flags;
1136 struct ucontext *uc_link;
1137 stack_t uc_stack;
1138 struct sigcontext uc_mcontext;
1139 sigset_t uc_sigmask; [ mask last for extensibility ]
1140 };
1141
1142 And the sigcontext is different (this is for both n32 and n64):
1143
1144 struct sigcontext {
1145 unsigned long long sc_regs[32];
1146 unsigned long long sc_fpregs[32];
1147 unsigned long long sc_mdhi;
1148 unsigned long long sc_hi1;
1149 unsigned long long sc_hi2;
1150 unsigned long long sc_hi3;
1151 unsigned long long sc_mdlo;
1152 unsigned long long sc_lo1;
1153 unsigned long long sc_lo2;
1154 unsigned long long sc_lo3;
1155 unsigned long long sc_pc;
1156 unsigned int sc_fpc_csr;
1157 unsigned int sc_used_math;
1158 unsigned int sc_dsp;
1159 unsigned int sc_reserved;
1160 };
1161
1162 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1163 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1164 included too. */
1165 /* *INDENT-ON* */
1166
1167 #define N32_STACK_T_SIZE STACK_T_SIZE
1168 #define N64_STACK_T_SIZE (2 * 8 + 4)
1169 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1170 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1171 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1172 + RTSIGFRAME_SIGINFO_SIZE \
1173 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1174 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1175 + RTSIGFRAME_SIGINFO_SIZE \
1176 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1177
1178 #define N64_SIGCONTEXT_REGS (0 * 8)
1179 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1180 #define N64_SIGCONTEXT_HI (64 * 8)
1181 #define N64_SIGCONTEXT_HI1 (65 * 8)
1182 #define N64_SIGCONTEXT_HI2 (66 * 8)
1183 #define N64_SIGCONTEXT_HI3 (67 * 8)
1184 #define N64_SIGCONTEXT_LO (68 * 8)
1185 #define N64_SIGCONTEXT_LO1 (69 * 8)
1186 #define N64_SIGCONTEXT_LO2 (70 * 8)
1187 #define N64_SIGCONTEXT_LO3 (71 * 8)
1188 #define N64_SIGCONTEXT_PC (72 * 8)
1189 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1190 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1191
1192 #define N64_SIGCONTEXT_REG_SIZE 8
1193
1194 static void
1195 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1196 struct frame_info *this_frame,
1197 struct trad_frame_cache *this_cache,
1198 CORE_ADDR func)
1199 {
1200 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1201 int ireg;
1202 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1203 CORE_ADDR sigcontext_base;
1204 const struct mips_regnum *regs = mips_regnum (gdbarch);
1205
1206 if (self == &mips_linux_n32_rt_sigframe)
1207 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
1208 else
1209 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
1210
1211 if (mips_linux_restart_reg_p (gdbarch))
1212 trad_frame_set_reg_addr (this_cache,
1213 (MIPS_RESTART_REGNUM
1214 + gdbarch_num_regs (gdbarch)),
1215 sigcontext_base + N64_SIGCONTEXT_REGS);
1216
1217 for (ireg = 1; ireg < 32; ireg++)
1218 trad_frame_set_reg_addr (this_cache,
1219 (ireg + MIPS_ZERO_REGNUM
1220 + gdbarch_num_regs (gdbarch)),
1221 (sigcontext_base + N64_SIGCONTEXT_REGS
1222 + ireg * N64_SIGCONTEXT_REG_SIZE));
1223
1224 for (ireg = 0; ireg < 32; ireg++)
1225 trad_frame_set_reg_addr (this_cache,
1226 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1227 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1228 + ireg * N64_SIGCONTEXT_REG_SIZE));
1229
1230 trad_frame_set_reg_addr (this_cache,
1231 regs->pc + gdbarch_num_regs (gdbarch),
1232 sigcontext_base + N64_SIGCONTEXT_PC);
1233
1234 trad_frame_set_reg_addr (this_cache,
1235 (regs->fp_control_status
1236 + gdbarch_num_regs (gdbarch)),
1237 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1238
1239 trad_frame_set_reg_addr (this_cache,
1240 regs->hi + gdbarch_num_regs (gdbarch),
1241 sigcontext_base + N64_SIGCONTEXT_HI);
1242 trad_frame_set_reg_addr (this_cache,
1243 regs->lo + gdbarch_num_regs (gdbarch),
1244 sigcontext_base + N64_SIGCONTEXT_LO);
1245
1246 if (regs->dspacc != -1)
1247 {
1248 trad_frame_set_reg_addr (this_cache,
1249 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1250 sigcontext_base + N64_SIGCONTEXT_HI1);
1251 trad_frame_set_reg_addr (this_cache,
1252 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1253 sigcontext_base + N64_SIGCONTEXT_LO1);
1254 trad_frame_set_reg_addr (this_cache,
1255 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1256 sigcontext_base + N64_SIGCONTEXT_HI2);
1257 trad_frame_set_reg_addr (this_cache,
1258 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1259 sigcontext_base + N64_SIGCONTEXT_LO2);
1260 trad_frame_set_reg_addr (this_cache,
1261 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1262 sigcontext_base + N64_SIGCONTEXT_HI3);
1263 trad_frame_set_reg_addr (this_cache,
1264 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1265 sigcontext_base + N64_SIGCONTEXT_LO3);
1266 }
1267 if (regs->dspctl != -1)
1268 trad_frame_set_reg_addr (this_cache,
1269 regs->dspctl + gdbarch_num_regs (gdbarch),
1270 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1271
1272 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1273 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1274 }
1275
1276 /* Implement the "write_pc" gdbarch method. */
1277
1278 static void
1279 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1280 {
1281 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1282
1283 mips_write_pc (regcache, pc);
1284
1285 /* Clear the syscall restart flag. */
1286 if (mips_linux_restart_reg_p (gdbarch))
1287 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1288 }
1289
1290 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1291
1292 int
1293 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1294 {
1295 /* If we do not have a target description with registers, then
1296 MIPS_RESTART_REGNUM will not be included in the register set. */
1297 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1298 return 0;
1299
1300 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1301 either be GPR-sized or missing. */
1302 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1303 }
1304
1305 /* When FRAME is at a syscall instruction, return the PC of the next
1306 instruction to be executed. */
1307
1308 static CORE_ADDR
1309 mips_linux_syscall_next_pc (struct frame_info *frame)
1310 {
1311 CORE_ADDR pc = get_frame_pc (frame);
1312 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1313
1314 /* If we are about to make a sigreturn syscall, use the unwinder to
1315 decode the signal frame. */
1316 if (v0 == MIPS_NR_sigreturn
1317 || v0 == MIPS_NR_rt_sigreturn
1318 || v0 == MIPS_NR_N64_rt_sigreturn
1319 || v0 == MIPS_NR_N32_rt_sigreturn)
1320 return frame_unwind_caller_pc (get_current_frame ());
1321
1322 return pc + 4;
1323 }
1324
1325 /* Return the current system call's number present in the
1326 v0 register. When the function fails, it returns -1. */
1327
1328 static LONGEST
1329 mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1330 ptid_t ptid)
1331 {
1332 struct regcache *regcache = get_thread_regcache (ptid);
1333 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1334 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1335 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1336 /* The content of a register */
1337 gdb_byte buf[8];
1338 /* The result */
1339 LONGEST ret;
1340
1341 /* Make sure we're in a known ABI */
1342 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1343 || tdep->mips_abi == MIPS_ABI_N32
1344 || tdep->mips_abi == MIPS_ABI_N64);
1345
1346 gdb_assert (regsize <= sizeof (buf));
1347
1348 /* Getting the system call number from the register.
1349 syscall number is in v0 or $2. */
1350 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf);
1351
1352 ret = extract_signed_integer (buf, regsize, byte_order);
1353
1354 return ret;
1355 }
1356
1357 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1358 gdbarch.h. */
1359
1360 static int
1361 mips_gdb_signal_to_target (struct gdbarch *gdbarch,
1362 enum gdb_signal signal)
1363 {
1364 switch (signal)
1365 {
1366 case GDB_SIGNAL_EMT:
1367 return MIPS_LINUX_SIGEMT;
1368
1369 case GDB_SIGNAL_BUS:
1370 return MIPS_LINUX_SIGBUS;
1371
1372 case GDB_SIGNAL_SYS:
1373 return MIPS_LINUX_SIGSYS;
1374
1375 case GDB_SIGNAL_USR1:
1376 return MIPS_LINUX_SIGUSR1;
1377
1378 case GDB_SIGNAL_USR2:
1379 return MIPS_LINUX_SIGUSR2;
1380
1381 case GDB_SIGNAL_CHLD:
1382 return MIPS_LINUX_SIGCHLD;
1383
1384 case GDB_SIGNAL_PWR:
1385 return MIPS_LINUX_SIGPWR;
1386
1387 case GDB_SIGNAL_WINCH:
1388 return MIPS_LINUX_SIGWINCH;
1389
1390 case GDB_SIGNAL_URG:
1391 return MIPS_LINUX_SIGURG;
1392
1393 case GDB_SIGNAL_IO:
1394 return MIPS_LINUX_SIGIO;
1395
1396 case GDB_SIGNAL_POLL:
1397 return MIPS_LINUX_SIGPOLL;
1398
1399 case GDB_SIGNAL_STOP:
1400 return MIPS_LINUX_SIGSTOP;
1401
1402 case GDB_SIGNAL_TSTP:
1403 return MIPS_LINUX_SIGTSTP;
1404
1405 case GDB_SIGNAL_CONT:
1406 return MIPS_LINUX_SIGCONT;
1407
1408 case GDB_SIGNAL_TTIN:
1409 return MIPS_LINUX_SIGTTIN;
1410
1411 case GDB_SIGNAL_TTOU:
1412 return MIPS_LINUX_SIGTTOU;
1413
1414 case GDB_SIGNAL_VTALRM:
1415 return MIPS_LINUX_SIGVTALRM;
1416
1417 case GDB_SIGNAL_PROF:
1418 return MIPS_LINUX_SIGPROF;
1419
1420 case GDB_SIGNAL_XCPU:
1421 return MIPS_LINUX_SIGXCPU;
1422
1423 case GDB_SIGNAL_XFSZ:
1424 return MIPS_LINUX_SIGXFSZ;
1425
1426 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1427 therefore we have to handle it here. */
1428 case GDB_SIGNAL_REALTIME_32:
1429 return MIPS_LINUX_SIGRTMIN;
1430 }
1431
1432 if (signal >= GDB_SIGNAL_REALTIME_33
1433 && signal <= GDB_SIGNAL_REALTIME_63)
1434 {
1435 int offset = signal - GDB_SIGNAL_REALTIME_33;
1436
1437 return MIPS_LINUX_SIGRTMIN + 1 + offset;
1438 }
1439 else if (signal >= GDB_SIGNAL_REALTIME_64
1440 && signal <= GDB_SIGNAL_REALTIME_127)
1441 {
1442 int offset = signal - GDB_SIGNAL_REALTIME_64;
1443
1444 return MIPS_LINUX_SIGRT64 + offset;
1445 }
1446
1447 return linux_gdb_signal_to_target (gdbarch, signal);
1448 }
1449
1450 /* Translate signals based on MIPS signal values.
1451 Adapted from gdb/common/signals.c. */
1452
1453 static enum gdb_signal
1454 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal)
1455 {
1456 switch (signal)
1457 {
1458 case MIPS_LINUX_SIGEMT:
1459 return GDB_SIGNAL_EMT;
1460
1461 case MIPS_LINUX_SIGBUS:
1462 return GDB_SIGNAL_BUS;
1463
1464 case MIPS_LINUX_SIGSYS:
1465 return GDB_SIGNAL_SYS;
1466
1467 case MIPS_LINUX_SIGUSR1:
1468 return GDB_SIGNAL_USR1;
1469
1470 case MIPS_LINUX_SIGUSR2:
1471 return GDB_SIGNAL_USR2;
1472
1473 case MIPS_LINUX_SIGCHLD:
1474 return GDB_SIGNAL_CHLD;
1475
1476 case MIPS_LINUX_SIGPWR:
1477 return GDB_SIGNAL_PWR;
1478
1479 case MIPS_LINUX_SIGWINCH:
1480 return GDB_SIGNAL_WINCH;
1481
1482 case MIPS_LINUX_SIGURG:
1483 return GDB_SIGNAL_URG;
1484
1485 /* No way to differentiate between SIGIO and SIGPOLL.
1486 Therefore, we just handle the first one. */
1487 case MIPS_LINUX_SIGIO:
1488 return GDB_SIGNAL_IO;
1489
1490 case MIPS_LINUX_SIGSTOP:
1491 return GDB_SIGNAL_STOP;
1492
1493 case MIPS_LINUX_SIGTSTP:
1494 return GDB_SIGNAL_TSTP;
1495
1496 case MIPS_LINUX_SIGCONT:
1497 return GDB_SIGNAL_CONT;
1498
1499 case MIPS_LINUX_SIGTTIN:
1500 return GDB_SIGNAL_TTIN;
1501
1502 case MIPS_LINUX_SIGTTOU:
1503 return GDB_SIGNAL_TTOU;
1504
1505 case MIPS_LINUX_SIGVTALRM:
1506 return GDB_SIGNAL_VTALRM;
1507
1508 case MIPS_LINUX_SIGPROF:
1509 return GDB_SIGNAL_PROF;
1510
1511 case MIPS_LINUX_SIGXCPU:
1512 return GDB_SIGNAL_XCPU;
1513
1514 case MIPS_LINUX_SIGXFSZ:
1515 return GDB_SIGNAL_XFSZ;
1516 }
1517
1518 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX)
1519 {
1520 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1521 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
1522 int offset = signal - MIPS_LINUX_SIGRTMIN;
1523
1524 if (offset == 0)
1525 return GDB_SIGNAL_REALTIME_32;
1526 else if (offset < 32)
1527 return (enum gdb_signal) (offset - 1
1528 + (int) GDB_SIGNAL_REALTIME_33);
1529 else
1530 return (enum gdb_signal) (offset - 32
1531 + (int) GDB_SIGNAL_REALTIME_64);
1532 }
1533
1534 return linux_gdb_signal_from_target (gdbarch, signal);
1535 }
1536
1537 /* Initialize one of the GNU/Linux OS ABIs. */
1538
1539 static void
1540 mips_linux_init_abi (struct gdbarch_info info,
1541 struct gdbarch *gdbarch)
1542 {
1543 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1544 enum mips_abi abi = mips_abi (gdbarch);
1545 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
1546
1547 linux_init_abi (info, gdbarch);
1548
1549 /* Get the syscall number from the arch's register. */
1550 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1551
1552 switch (abi)
1553 {
1554 case MIPS_ABI_O32:
1555 set_gdbarch_get_longjmp_target (gdbarch,
1556 mips_linux_get_longjmp_target);
1557 set_solib_svr4_fetch_link_map_offsets
1558 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1559 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1560 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1561 set_xml_syscall_file_name (gdbarch, "syscalls/mips-o32-linux.xml");
1562 break;
1563 case MIPS_ABI_N32:
1564 set_gdbarch_get_longjmp_target (gdbarch,
1565 mips_linux_get_longjmp_target);
1566 set_solib_svr4_fetch_link_map_offsets
1567 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1568 set_gdbarch_long_double_bit (gdbarch, 128);
1569 /* These floatformats should probably be renamed. MIPS uses
1570 the same 128-bit IEEE floating point format that IA-64 uses,
1571 except that the quiet/signalling NaN bit is reversed (GDB
1572 does not distinguish between quiet and signalling NaNs). */
1573 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1574 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1575 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n32-linux.xml");
1576 break;
1577 case MIPS_ABI_N64:
1578 set_gdbarch_get_longjmp_target (gdbarch,
1579 mips64_linux_get_longjmp_target);
1580 set_solib_svr4_fetch_link_map_offsets
1581 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1582 set_gdbarch_long_double_bit (gdbarch, 128);
1583 /* These floatformats should probably be renamed. MIPS uses
1584 the same 128-bit IEEE floating point format that IA-64 uses,
1585 except that the quiet/signalling NaN bit is reversed (GDB
1586 does not distinguish between quiet and signalling NaNs). */
1587 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
1588 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1589 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n64-linux.xml");
1590 break;
1591 default:
1592 break;
1593 }
1594
1595 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1596
1597 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1598
1599 /* Enable TLS support. */
1600 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1601 svr4_fetch_objfile_link_map);
1602
1603 /* Initialize this lazily, to avoid an initialization order
1604 dependency on solib-svr4.c's _initialize routine. */
1605 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1606 {
1607 mips_svr4_so_ops = svr4_so_ops;
1608 mips_svr4_so_ops.in_dynsym_resolve_code
1609 = mips_linux_in_dynsym_resolve_code;
1610 }
1611 set_solib_ops (gdbarch, &mips_svr4_so_ops);
1612
1613 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1614
1615 set_gdbarch_core_read_description (gdbarch,
1616 mips_linux_core_read_description);
1617
1618 set_gdbarch_iterate_over_regset_sections
1619 (gdbarch, mips_linux_iterate_over_regset_sections);
1620
1621 set_gdbarch_gdb_signal_from_target (gdbarch,
1622 mips_gdb_signal_from_target);
1623
1624 set_gdbarch_gdb_signal_to_target (gdbarch,
1625 mips_gdb_signal_to_target);
1626
1627 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1628
1629 if (tdesc_data)
1630 {
1631 const struct tdesc_feature *feature;
1632
1633 /* If we have target-described registers, then we can safely
1634 reserve a number for MIPS_RESTART_REGNUM (whether it is
1635 described or not). */
1636 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1637 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1638 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1639
1640 /* If it's present, then assign it to the reserved number. */
1641 feature = tdesc_find_feature (info.target_desc,
1642 "org.gnu.gdb.mips.linux");
1643 if (feature != NULL)
1644 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1645 "restart");
1646 }
1647 }
1648
1649 /* Provide a prototype to silence -Wmissing-prototypes. */
1650 extern initialize_file_ftype _initialize_mips_linux_tdep;
1651
1652 void
1653 _initialize_mips_linux_tdep (void)
1654 {
1655 const struct bfd_arch_info *arch_info;
1656
1657 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1658 arch_info != NULL;
1659 arch_info = arch_info->next)
1660 {
1661 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1662 GDB_OSABI_LINUX,
1663 mips_linux_init_abi);
1664 }
1665 }