1 /* Target-dependent code for the 32-bit OpenRISC 1000, for the GDB.
2 Copyright (C) 2008-2020 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
32 #include "safe-ctype.h"
34 #include "reggroups.h"
35 #include "arch-utils.h"
36 #include "frame-unwind.h"
37 #include "frame-base.h"
38 #include "dwarf2/frame.h"
39 #include "trad-frame.h"
42 #include "target-descriptions.h"
46 /* OpenRISC specific includes. */
47 #include "or1k-tdep.h"
48 #include "features/or1k.c"
51 /* Global debug flag. */
53 static bool or1k_debug
= false;
56 show_or1k_debug (struct ui_file
*file
, int from_tty
,
57 struct cmd_list_element
*c
, const char *value
)
59 fprintf_filtered (file
, _("OpenRISC debugging is %s.\n"), value
);
63 /* The target-dependent structure for gdbarch. */
68 int bytes_per_address
;
69 CGEN_CPU_DESC gdb_cgen_cpu_desc
;
72 /* Support functions for the architecture definition. */
74 /* Get an instruction from memory. */
77 or1k_fetch_instruction (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
79 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
80 gdb_byte buf
[OR1K_INSTLEN
];
82 if (target_read_code (addr
, buf
, OR1K_INSTLEN
)) {
83 memory_error (TARGET_XFER_E_IO
, addr
);
86 return extract_unsigned_integer (buf
, OR1K_INSTLEN
, byte_order
);
89 /* Generic function to read bits from an instruction. */
92 or1k_analyse_inst (uint32_t inst
, const char *format
, ...)
94 /* Break out each field in turn, validating as we go. */
97 int iptr
= 0; /* Instruction pointer */
99 va_start (ap
, format
);
101 for (i
= 0; 0 != format
[i
];)
103 const char *start_ptr
;
106 uint32_t bits
; /* Bit substring of interest */
107 uint32_t width
; /* Substring width */
114 break; /* Formatting: ignored */
117 case '1': /* Constant bit field */
118 bits
= (inst
>> (OR1K_INSTBITLEN
- iptr
- 1)) & 0x1;
120 if ((format
[i
] - '0') != bits
)
127 case '%': /* Bit field */
129 start_ptr
= &(format
[i
]);
130 width
= strtoul (start_ptr
, &end_ptr
, 10);
132 /* Check we got something, and if so skip on. */
133 if (start_ptr
== end_ptr
)
134 error (_("bitstring \"%s\" at offset %d has no length field."),
137 i
+= end_ptr
- start_ptr
;
139 /* Look for and skip the terminating 'b'. If it's not there, we
140 still give a fatal error, because these are fixed strings that
141 just should not be wrong. */
142 if ('b' != format
[i
++])
143 error (_("bitstring \"%s\" at offset %d has no terminating 'b'."),
146 /* Break out the field. There is a special case with a bit width
152 (inst
>> (OR1K_INSTBITLEN
- iptr
- width
)) & ((1 << width
) - 1);
154 arg_ptr
= va_arg (ap
, uint32_t *);
160 error (_("invalid character in bitstring \"%s\" at offset %d."),
166 /* Is the length OK? */
167 gdb_assert (OR1K_INSTBITLEN
== iptr
);
169 return true; /* Success */
172 /* This is used to parse l.addi instructions during various prologue
173 analysis routines. The l.addi instruction has semantics:
175 assembly: l.addi rD,rA,I
176 implementation: rD = rA + sign_extend(Immediate)
178 The rd_ptr, ra_ptr and simm_ptr must be non NULL pointers and are used
179 to store the parse results. Upon successful parsing true is returned,
183 or1k_analyse_l_addi (uint32_t inst
, unsigned int *rd_ptr
,
184 unsigned int *ra_ptr
, int *simm_ptr
)
186 /* Instruction fields */
189 if (or1k_analyse_inst (inst
, "10 0111 %5b %5b %16b", &rd
, &ra
, &i
))
191 /* Found it. Construct the result fields. */
192 *rd_ptr
= (unsigned int) rd
;
193 *ra_ptr
= (unsigned int) ra
;
194 *simm_ptr
= (int) (((i
& 0x8000) == 0x8000) ? 0xffff0000 | i
: i
);
196 return true; /* Success */
199 return false; /* Failure */
202 /* This is used to to parse store instructions during various prologue
203 analysis routines. The l.sw instruction has semantics:
205 assembly: l.sw I(rA),rB
206 implementation: store rB contents to memory at effective address of
207 rA + sign_extend(Immediate)
209 The simm_ptr, ra_ptr and rb_ptr must be non NULL pointers and are used
210 to store the parse results. Upon successful parsing true is returned,
214 or1k_analyse_l_sw (uint32_t inst
, int *simm_ptr
, unsigned int *ra_ptr
,
215 unsigned int *rb_ptr
)
217 /* Instruction fields */
218 uint32_t ihi
, ilo
, ra
, rb
;
220 if (or1k_analyse_inst (inst
, "11 0101 %5b %5b %5b %11b", &ihi
, &ra
, &rb
,
224 /* Found it. Construct the result fields. */
225 *simm_ptr
= (int) ((ihi
<< 11) | ilo
);
226 *simm_ptr
|= ((ihi
& 0x10) == 0x10) ? 0xffff0000 : 0;
228 *ra_ptr
= (unsigned int) ra
;
229 *rb_ptr
= (unsigned int) rb
;
231 return true; /* Success */
234 return false; /* Failure */
238 /* Functions defining the architecture. */
240 /* Implement the return_value gdbarch method. */
242 static enum return_value_convention
243 or1k_return_value (struct gdbarch
*gdbarch
, struct value
*functype
,
244 struct type
*valtype
, struct regcache
*regcache
,
246 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
248 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
249 enum type_code rv_type
= valtype
->code ();
250 unsigned int rv_size
= TYPE_LENGTH (valtype
);
251 int bpw
= (gdbarch_tdep (gdbarch
))->bytes_per_word
;
253 /* Deal with struct/union as addresses. If an array won't fit in a
254 single register it is returned as address. Anything larger than 2
255 registers needs to also be passed as address (matches gcc
256 default_return_in_memory). */
257 if ((TYPE_CODE_STRUCT
== rv_type
) || (TYPE_CODE_UNION
== rv_type
)
258 || ((TYPE_CODE_ARRAY
== rv_type
) && (rv_size
> bpw
))
259 || (rv_size
> 2 * bpw
))
265 regcache_cooked_read_unsigned (regcache
, OR1K_RV_REGNUM
, &tmp
);
266 read_memory (tmp
, readbuf
, rv_size
);
268 if (writebuf
!= NULL
)
272 regcache_cooked_read_unsigned (regcache
, OR1K_RV_REGNUM
, &tmp
);
273 write_memory (tmp
, writebuf
, rv_size
);
276 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
281 /* Up to one word scalars are returned in R11. */
286 regcache_cooked_read_unsigned (regcache
, OR1K_RV_REGNUM
, &tmp
);
287 store_unsigned_integer (readbuf
, rv_size
, byte_order
, tmp
);
290 if (writebuf
!= NULL
)
292 gdb_byte
*buf
= XCNEWVEC(gdb_byte
, bpw
);
294 if (BFD_ENDIAN_BIG
== byte_order
)
295 memcpy (buf
+ (sizeof (gdb_byte
) * bpw
) - rv_size
, writebuf
,
298 memcpy (buf
, writebuf
, rv_size
);
300 regcache
->cooked_write (OR1K_RV_REGNUM
, buf
);
307 /* 2 word scalars are returned in r11/r12 (with the MS word in r11). */
314 regcache_cooked_read_unsigned (regcache
, OR1K_RV_REGNUM
,
316 regcache_cooked_read_unsigned (regcache
, OR1K_RV_REGNUM
+ 1,
318 tmp
= (tmp_hi
<< (bpw
* 8)) | tmp_lo
;
320 store_unsigned_integer (readbuf
, rv_size
, byte_order
, tmp
);
322 if (writebuf
!= NULL
)
324 gdb_byte
*buf_lo
= XCNEWVEC(gdb_byte
, bpw
);
325 gdb_byte
*buf_hi
= XCNEWVEC(gdb_byte
, bpw
);
327 /* This is cheating. We assume that we fit in 2 words exactly,
328 which wouldn't work if we had (say) a 6-byte scalar type on a
329 big endian architecture (with the OpenRISC 1000 usually is). */
330 memcpy (buf_hi
, writebuf
, rv_size
- bpw
);
331 memcpy (buf_lo
, writebuf
+ bpw
, bpw
);
333 regcache
->cooked_write (OR1K_RV_REGNUM
, buf_hi
);
334 regcache
->cooked_write (OR1K_RV_REGNUM
+ 1, buf_lo
);
341 return RETURN_VALUE_REGISTER_CONVENTION
;
344 /* OR1K always uses a l.trap instruction for breakpoints. */
346 constexpr gdb_byte or1k_break_insn
[] = {0x21, 0x00, 0x00, 0x01};
348 typedef BP_MANIPULATION (or1k_break_insn
) or1k_breakpoint
;
350 /* Implement the single_step_through_delay gdbarch method. */
353 or1k_single_step_through_delay (struct gdbarch
*gdbarch
,
354 struct frame_info
*this_frame
)
359 CGEN_FIELDS tmp_fields
;
360 const CGEN_INSN
*insn
;
361 struct regcache
*regcache
= get_current_regcache ();
362 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
364 /* Get the previous and current instruction addresses. If they are not
365 adjacent, we cannot be in a delay slot. */
366 regcache_cooked_read_unsigned (regcache
, OR1K_PPC_REGNUM
, &val
);
367 ppc
= (CORE_ADDR
) val
;
368 regcache_cooked_read_unsigned (regcache
, OR1K_NPC_REGNUM
, &val
);
369 npc
= (CORE_ADDR
) val
;
371 if (0x4 != (npc
- ppc
))
374 insn
= cgen_lookup_insn (tdep
->gdb_cgen_cpu_desc
,
376 or1k_fetch_instruction (gdbarch
, ppc
),
377 NULL
, 32, &tmp_fields
, 0);
379 /* NULL here would mean the last instruction was not understood by cgen.
380 This should not usually happen, but if does its not a delay slot. */
384 /* TODO: we should add a delay slot flag to the CGEN_INSN and remove
385 this hard coded test. */
386 return ((CGEN_INSN_NUM (insn
) == OR1K_INSN_L_J
)
387 || (CGEN_INSN_NUM (insn
) == OR1K_INSN_L_JAL
)
388 || (CGEN_INSN_NUM (insn
) == OR1K_INSN_L_JR
)
389 || (CGEN_INSN_NUM (insn
) == OR1K_INSN_L_JALR
)
390 || (CGEN_INSN_NUM (insn
) == OR1K_INSN_L_BNF
)
391 || (CGEN_INSN_NUM (insn
) == OR1K_INSN_L_BF
));
394 /* Name for or1k general registers. */
396 static const char *const or1k_reg_names
[OR1K_NUM_REGS
] = {
397 /* general purpose registers */
398 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
399 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
400 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
401 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
403 /* previous program counter, next program counter and status register */
408 or1k_is_arg_reg (unsigned int regnum
)
410 return (OR1K_FIRST_ARG_REGNUM
<= regnum
)
411 && (regnum
<= OR1K_LAST_ARG_REGNUM
);
415 or1k_is_callee_saved_reg (unsigned int regnum
)
417 return (OR1K_FIRST_SAVED_REGNUM
<= regnum
) && (0 == regnum
% 2);
420 /* Implement the skip_prologue gdbarch method. */
423 or1k_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
429 unsigned int ra
, rb
, rd
; /* for instruction analysis */
434 /* Try using SAL first if we have symbolic information available. This
435 only works for DWARF 2, not STABS. */
437 if (find_pc_partial_function (pc
, NULL
, &start_pc
, NULL
))
439 CORE_ADDR prologue_end
= skip_prologue_using_sal (gdbarch
, pc
);
441 if (0 != prologue_end
)
443 struct symtab_and_line prologue_sal
= find_pc_line (start_pc
, 0);
444 struct compunit_symtab
*compunit
445 = SYMTAB_COMPUNIT (prologue_sal
.symtab
);
446 const char *debug_format
= COMPUNIT_DEBUGFORMAT (compunit
);
448 if ((NULL
!= debug_format
)
449 && (strlen ("dwarf") <= strlen (debug_format
))
450 && (0 == strncasecmp ("dwarf", debug_format
, strlen ("dwarf"))))
451 return (prologue_end
> pc
) ? prologue_end
: pc
;
455 /* Look to see if we can find any of the standard prologue sequence. All
456 quite difficult, since any or all of it may be missing. So this is
457 just a best guess! */
459 addr
= pc
; /* Where we have got to */
460 inst
= or1k_fetch_instruction (gdbarch
, addr
);
462 /* Look for the new stack pointer being set up. */
463 if (or1k_analyse_l_addi (inst
, &rd
, &ra
, &simm
)
464 && (OR1K_SP_REGNUM
== rd
) && (OR1K_SP_REGNUM
== ra
)
465 && (simm
< 0) && (0 == (simm
% 4)))
468 addr
+= OR1K_INSTLEN
;
469 inst
= or1k_fetch_instruction (gdbarch
, addr
);
472 /* Look for the frame pointer being manipulated. */
473 if (or1k_analyse_l_sw (inst
, &simm
, &ra
, &rb
)
474 && (OR1K_SP_REGNUM
== ra
) && (OR1K_FP_REGNUM
== rb
)
475 && (simm
>= 0) && (0 == (simm
% 4)))
477 addr
+= OR1K_INSTLEN
;
478 inst
= or1k_fetch_instruction (gdbarch
, addr
);
480 gdb_assert (or1k_analyse_l_addi (inst
, &rd
, &ra
, &simm
)
481 && (OR1K_FP_REGNUM
== rd
) && (OR1K_SP_REGNUM
== ra
)
482 && (simm
== frame_size
));
484 addr
+= OR1K_INSTLEN
;
485 inst
= or1k_fetch_instruction (gdbarch
, addr
);
488 /* Look for the link register being saved. */
489 if (or1k_analyse_l_sw (inst
, &simm
, &ra
, &rb
)
490 && (OR1K_SP_REGNUM
== ra
) && (OR1K_LR_REGNUM
== rb
)
491 && (simm
>= 0) && (0 == (simm
% 4)))
493 addr
+= OR1K_INSTLEN
;
494 inst
= or1k_fetch_instruction (gdbarch
, addr
);
497 /* Look for arguments or callee-saved register being saved. The register
498 must be one of the arguments (r3-r8) or the 10 callee saved registers
499 (r10, r12, r14, r16, r18, r20, r22, r24, r26, r28, r30). The base
500 register must be the FP (for the args) or the SP (for the callee_saved
504 if (or1k_analyse_l_sw (inst
, &simm
, &ra
, &rb
)
505 && (((OR1K_FP_REGNUM
== ra
) && or1k_is_arg_reg (rb
))
506 || ((OR1K_SP_REGNUM
== ra
) && or1k_is_callee_saved_reg (rb
)))
507 && (0 == (simm
% 4)))
509 addr
+= OR1K_INSTLEN
;
510 inst
= or1k_fetch_instruction (gdbarch
, addr
);
514 /* Nothing else to look for. We have found the end of the
522 /* Implement the frame_align gdbarch method. */
525 or1k_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
527 return align_down (sp
, OR1K_STACK_ALIGN
);
530 /* Implement the unwind_pc gdbarch method. */
533 or1k_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
538 fprintf_unfiltered (gdb_stdlog
, "or1k_unwind_pc, next_frame=%d\n",
539 frame_relative_level (next_frame
));
541 pc
= frame_unwind_register_unsigned (next_frame
, OR1K_NPC_REGNUM
);
544 fprintf_unfiltered (gdb_stdlog
, "or1k_unwind_pc, pc=%s\n",
545 paddress (gdbarch
, pc
));
550 /* Implement the unwind_sp gdbarch method. */
553 or1k_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
558 fprintf_unfiltered (gdb_stdlog
, "or1k_unwind_sp, next_frame=%d\n",
559 frame_relative_level (next_frame
));
561 sp
= frame_unwind_register_unsigned (next_frame
, OR1K_SP_REGNUM
);
564 fprintf_unfiltered (gdb_stdlog
, "or1k_unwind_sp, sp=%s\n",
565 paddress (gdbarch
, sp
));
570 /* Implement the push_dummy_code gdbarch method. */
573 or1k_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
,
574 CORE_ADDR function
, struct value
**args
, int nargs
,
575 struct type
*value_type
, CORE_ADDR
* real_pc
,
576 CORE_ADDR
* bp_addr
, struct regcache
*regcache
)
580 /* Reserve enough room on the stack for our breakpoint instruction. */
582 /* Store the address of that breakpoint. */
584 /* keeping the stack aligned. */
585 sp
= or1k_frame_align (gdbarch
, bp_slot
);
586 /* The call starts at the callee's entry point. */
592 /* Implement the push_dummy_call gdbarch method. */
595 or1k_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
596 struct regcache
*regcache
, CORE_ADDR bp_addr
,
597 int nargs
, struct value
**args
, CORE_ADDR sp
,
598 function_call_return_method return_method
,
599 CORE_ADDR struct_addr
)
605 int stack_offset
= 0;
607 CORE_ADDR heap_sp
= sp
- 128;
608 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
609 int bpa
= (gdbarch_tdep (gdbarch
))->bytes_per_address
;
610 int bpw
= (gdbarch_tdep (gdbarch
))->bytes_per_word
;
611 struct type
*func_type
= value_type (function
);
614 regcache_cooked_write_unsigned (regcache
, OR1K_LR_REGNUM
, bp_addr
);
616 /* Register for the next argument. */
617 argreg
= OR1K_FIRST_ARG_REGNUM
;
619 /* Location for a returned structure. This is passed as a silent first
621 if (return_method
== return_method_struct
)
623 regcache_cooked_write_unsigned (regcache
, OR1K_FIRST_ARG_REGNUM
,
628 /* Put as many args as possible in registers. */
629 for (argnum
= 0; argnum
< nargs
; argnum
++)
632 gdb_byte valbuf
[sizeof (ULONGEST
)];
634 struct value
*arg
= args
[argnum
];
635 struct type
*arg_type
= check_typedef (value_type (arg
));
636 int len
= TYPE_LENGTH (arg_type
);
637 enum type_code typecode
= arg_type
->code ();
639 if (func_type
->has_varargs () && argnum
>= func_type
->num_fields ())
640 break; /* end or regular args, varargs go to stack. */
642 /* Extract the value, either a reference or the data. */
643 if ((TYPE_CODE_STRUCT
== typecode
) || (TYPE_CODE_UNION
== typecode
)
646 CORE_ADDR valaddr
= value_address (arg
);
648 /* If the arg is fabricated (i.e. 3*i, instead of i) valaddr is
652 /* The argument needs to be copied into the target space.
653 Since the bottom of the stack is reserved for function
654 arguments we store this at the these at the top growing
656 heap_offset
+= align_up (len
, bpw
);
657 valaddr
= heap_sp
+ heap_offset
;
659 write_memory (valaddr
, value_contents (arg
), len
);
662 /* The ABI passes all structures by reference, so get its
664 store_unsigned_integer (valbuf
, bpa
, byte_order
, valaddr
);
670 /* Everything else, we just get the value. */
671 val
= value_contents (arg
);
674 /* Stick the value in a register. */
677 /* Big scalars use two registers, but need NOT be pair aligned. */
679 if (argreg
<= (OR1K_LAST_ARG_REGNUM
- 1))
681 ULONGEST regval
= extract_unsigned_integer (val
, len
,
684 unsigned int bits_per_word
= bpw
* 8;
685 ULONGEST mask
= (((ULONGEST
) 1) << bits_per_word
) - 1;
686 ULONGEST lo
= regval
& mask
;
687 ULONGEST hi
= regval
>> bits_per_word
;
689 regcache_cooked_write_unsigned (regcache
, argreg
, hi
);
690 regcache_cooked_write_unsigned (regcache
, argreg
+ 1, lo
);
695 /* Run out of regs */
699 else if (argreg
<= OR1K_LAST_ARG_REGNUM
)
701 /* Smaller scalars fit in a single register. */
702 regcache_cooked_write_unsigned
703 (regcache
, argreg
, extract_unsigned_integer (val
, len
,
709 /* Ran out of regs. */
714 first_stack_arg
= argnum
;
716 /* If we get here with argnum < nargs, then arguments remain to be
717 placed on the stack. This is tricky, since they must be pushed in
718 reverse order and the stack in the end must be aligned. The only
719 solution is to do it in two stages, the first to compute the stack
720 size, the second to save the args. */
722 for (argnum
= first_stack_arg
; argnum
< nargs
; argnum
++)
724 struct value
*arg
= args
[argnum
];
725 struct type
*arg_type
= check_typedef (value_type (arg
));
726 int len
= TYPE_LENGTH (arg_type
);
727 enum type_code typecode
= arg_type
->code ();
729 if ((TYPE_CODE_STRUCT
== typecode
) || (TYPE_CODE_UNION
== typecode
)
732 /* Structures are passed as addresses. */
737 /* Big scalars use more than one word. Code here allows for
738 future quad-word entities (e.g. long double.) */
739 sp
-= align_up (len
, bpw
);
742 /* Ensure our dummy heap doesn't touch the stack, this could only
743 happen if we have many arguments including fabricated arguments. */
744 gdb_assert (heap_offset
== 0 || ((heap_sp
+ heap_offset
) < sp
));
747 sp
= gdbarch_frame_align (gdbarch
, sp
);
750 /* Push the remaining args on the stack. */
751 for (argnum
= first_stack_arg
; argnum
< nargs
; argnum
++)
754 gdb_byte valbuf
[sizeof (ULONGEST
)];
756 struct value
*arg
= args
[argnum
];
757 struct type
*arg_type
= check_typedef (value_type (arg
));
758 int len
= TYPE_LENGTH (arg_type
);
759 enum type_code typecode
= arg_type
->code ();
760 /* The EABI passes structures that do not fit in a register by
761 reference. In all other cases, pass the structure by value. */
762 if ((TYPE_CODE_STRUCT
== typecode
) || (TYPE_CODE_UNION
== typecode
)
765 store_unsigned_integer (valbuf
, bpa
, byte_order
,
766 value_address (arg
));
771 val
= value_contents (arg
);
775 int partial_len
= (len
< bpw
? len
: bpw
);
777 write_memory (sp
+ stack_offset
, val
, partial_len
);
778 stack_offset
+= align_up (partial_len
, bpw
);
784 /* Save the updated stack pointer. */
785 regcache_cooked_write_unsigned (regcache
, OR1K_SP_REGNUM
, sp
);
795 /* Support functions for frame handling. */
797 /* Initialize a prologue cache
799 We build a cache, saying where registers of the prev frame can be found
800 from the data so far set up in this this.
802 We also compute a unique ID for this frame, based on the function start
803 address and the stack pointer (as it will be, even if it has yet to be
809 The OR1K has a falling stack frame and a simple prolog. The Stack
810 pointer is R1 and the frame pointer R2. The frame base is therefore the
811 address held in R2 and the stack pointer (R1) is the frame base of the
814 l.addi r1,r1,-frame_size # SP now points to end of new stack frame
816 The stack pointer may not be set up in a frameless function (e.g. a
817 simple leaf function).
819 l.sw fp_loc(r1),r2 # old FP saved in new stack frame
820 l.addi r2,r1,frame_size # FP now points to base of new stack frame
822 The frame pointer is not necessarily saved right at the end of the stack
823 frame - OR1K saves enough space for any args to called functions right
824 at the end (this is a difference from the Architecture Manual).
826 l.sw lr_loc(r1),r9 # Link (return) address
828 The link register is usually saved at fp_loc - 4. It may not be saved at
829 all in a leaf function.
831 l.sw reg_loc(r1),ry # Save any callee saved regs
833 The offsets x for the callee saved registers generally (always?) rise in
834 increments of 4, starting at fp_loc + 4. If the frame pointer is
835 omitted (an option to GCC), then it may not be saved at all. There may
836 be no callee saved registers.
838 So in summary none of this may be present. However what is present
839 seems always to follow this fixed order, and occur before any
840 substantive code (it is possible for GCC to have more flexible
841 scheduling of the prologue, but this does not seem to occur for OR1K).
846 This prolog is used, even for -O3 with GCC.
848 All this analysis must allow for the possibility that the PC is in the
849 middle of the prologue. Data in the cache should only be set up insofar
850 as it has been computed.
852 HOWEVER. The frame_id must be created with the SP *as it will be* at
853 the end of the Prologue. Otherwise a recursive call, checking the frame
854 with the PC at the start address will end up with the same frame_id as
857 A suite of "helper" routines are used, allowing reuse for
858 or1k_skip_prologue().
860 Reportedly, this is only valid for frames less than 0x7fff in size. */
862 static struct trad_frame_cache
*
863 or1k_frame_cache (struct frame_info
*this_frame
, void **prologue_cache
)
865 struct gdbarch
*gdbarch
;
866 struct trad_frame_cache
*info
;
870 CORE_ADDR this_sp_for_id
;
873 CORE_ADDR start_addr
;
877 fprintf_unfiltered (gdb_stdlog
,
878 "or1k_frame_cache, prologue_cache = %s\n",
879 host_address_to_string (*prologue_cache
));
881 /* Nothing to do if we already have this info. */
882 if (NULL
!= *prologue_cache
)
883 return (struct trad_frame_cache
*) *prologue_cache
;
885 /* Get a new prologue cache and populate it with default values. */
886 info
= trad_frame_cache_zalloc (this_frame
);
887 *prologue_cache
= info
;
889 /* Find the start address of this function (which is a normal frame, even
890 if the next frame is the sentinel frame) and the end of its prologue. */
891 this_pc
= get_frame_pc (this_frame
);
892 find_pc_partial_function (this_pc
, NULL
, &start_addr
, NULL
);
894 /* Get the stack pointer if we have one (if there's no process executing
895 yet we won't have a frame. */
896 this_sp
= (NULL
== this_frame
) ? 0 :
897 get_frame_register_unsigned (this_frame
, OR1K_SP_REGNUM
);
899 /* Return early if GDB couldn't find the function. */
903 fprintf_unfiltered (gdb_stdlog
, " couldn't find function\n");
905 /* JPB: 28-Apr-11. This is a temporary patch, to get round GDB
906 crashing right at the beginning. Build the frame ID as best we
908 trad_frame_set_id (info
, frame_id_build (this_sp
, this_pc
));
913 /* The default frame base of this frame (for ID purposes only - frame
914 base is an overloaded term) is its stack pointer. For now we use the
915 value of the SP register in this frame. However if the PC is in the
916 prologue of this frame, before the SP has been set up, then the value
917 will actually be that of the prev frame, and we'll need to adjust it
919 trad_frame_set_this_base (info
, this_sp
);
920 this_sp_for_id
= this_sp
;
922 /* The default is to find the PC of the previous frame in the link
923 register of this frame. This may be changed if we find the link
924 register was saved on the stack. */
925 trad_frame_set_reg_realreg (info
, OR1K_NPC_REGNUM
, OR1K_LR_REGNUM
);
927 /* We should only examine code that is in the prologue. This is all code
928 up to (but not including) end_addr. We should only populate the cache
929 while the address is up to (but not including) the PC or end_addr,
930 whichever is first. */
931 gdbarch
= get_frame_arch (this_frame
);
932 end_addr
= or1k_skip_prologue (gdbarch
, start_addr
);
934 /* All the following analysis only occurs if we are in the prologue and
935 have executed the code. Check we have a sane prologue size, and if
936 zero we are frameless and can give up here. */
937 if (end_addr
< start_addr
)
938 error (_("end addr %s is less than start addr %s"),
939 paddress (gdbarch
, end_addr
), paddress (gdbarch
, start_addr
));
941 if (end_addr
== start_addr
)
945 /* We have a frame. Look for the various components. */
946 CORE_ADDR addr
= start_addr
; /* Where we have got to */
947 uint32_t inst
= or1k_fetch_instruction (gdbarch
, addr
);
949 unsigned int ra
, rb
, rd
; /* for instruction analysis */
952 /* Look for the new stack pointer being set up. */
953 if (or1k_analyse_l_addi (inst
, &rd
, &ra
, &simm
)
954 && (OR1K_SP_REGNUM
== rd
) && (OR1K_SP_REGNUM
== ra
)
955 && (simm
< 0) && (0 == (simm
% 4)))
958 addr
+= OR1K_INSTLEN
;
959 inst
= or1k_fetch_instruction (gdbarch
, addr
);
961 /* If the PC has not actually got to this point, then the frame
962 base will be wrong, and we adjust it.
964 If we are past this point, then we need to populate the stack
968 /* Only do if executing. */
971 this_sp_for_id
= this_sp
+ frame_size
;
972 trad_frame_set_this_base (info
, this_sp_for_id
);
977 /* We are past this point, so the stack pointer of the prev
978 frame is frame_size greater than the stack pointer of this
980 trad_frame_set_reg_value (info
, OR1K_SP_REGNUM
,
981 this_sp
+ frame_size
);
985 /* From now on we are only populating the cache, so we stop once we
986 get to either the end OR the current PC. */
987 end_addr
= (this_pc
< end_addr
) ? this_pc
: end_addr
;
989 /* Look for the frame pointer being manipulated. */
990 if ((addr
< end_addr
)
991 && or1k_analyse_l_sw (inst
, &simm
, &ra
, &rb
)
992 && (OR1K_SP_REGNUM
== ra
) && (OR1K_FP_REGNUM
== rb
)
993 && (simm
>= 0) && (0 == (simm
% 4)))
995 addr
+= OR1K_INSTLEN
;
996 inst
= or1k_fetch_instruction (gdbarch
, addr
);
998 /* At this stage, we can find the frame pointer of the previous
999 frame on the stack of the current frame. */
1000 trad_frame_set_reg_addr (info
, OR1K_FP_REGNUM
, this_sp
+ simm
);
1002 /* Look for the new frame pointer being set up. */
1003 if ((addr
< end_addr
)
1004 && or1k_analyse_l_addi (inst
, &rd
, &ra
, &simm
)
1005 && (OR1K_FP_REGNUM
== rd
) && (OR1K_SP_REGNUM
== ra
)
1006 && (simm
== frame_size
))
1008 addr
+= OR1K_INSTLEN
;
1009 inst
= or1k_fetch_instruction (gdbarch
, addr
);
1011 /* If we have got this far, the stack pointer of the previous
1012 frame is the frame pointer of this frame. */
1013 trad_frame_set_reg_realreg (info
, OR1K_SP_REGNUM
,
1018 /* Look for the link register being saved. */
1019 if ((addr
< end_addr
)
1020 && or1k_analyse_l_sw (inst
, &simm
, &ra
, &rb
)
1021 && (OR1K_SP_REGNUM
== ra
) && (OR1K_LR_REGNUM
== rb
)
1022 && (simm
>= 0) && (0 == (simm
% 4)))
1024 addr
+= OR1K_INSTLEN
;
1025 inst
= or1k_fetch_instruction (gdbarch
, addr
);
1027 /* If the link register is saved in the this frame, it holds the
1028 value of the PC in the previous frame. This overwrites the
1029 previous information about finding the PC in the link
1031 trad_frame_set_reg_addr (info
, OR1K_NPC_REGNUM
, this_sp
+ simm
);
1034 /* Look for arguments or callee-saved register being saved. The
1035 register must be one of the arguments (r3-r8) or the 10 callee
1036 saved registers (r10, r12, r14, r16, r18, r20, r22, r24, r26, r28,
1037 r30). The base register must be the FP (for the args) or the SP
1038 (for the callee_saved registers). */
1039 while (addr
< end_addr
)
1041 if (or1k_analyse_l_sw (inst
, &simm
, &ra
, &rb
)
1042 && (((OR1K_FP_REGNUM
== ra
) && or1k_is_arg_reg (rb
))
1043 || ((OR1K_SP_REGNUM
== ra
)
1044 && or1k_is_callee_saved_reg (rb
)))
1045 && (0 == (simm
% 4)))
1047 addr
+= OR1K_INSTLEN
;
1048 inst
= or1k_fetch_instruction (gdbarch
, addr
);
1050 /* The register in the previous frame can be found at this
1051 location in this frame. */
1052 trad_frame_set_reg_addr (info
, rb
, this_sp
+ simm
);
1055 break; /* Not a register save instruction. */
1059 /* Build the frame ID */
1060 trad_frame_set_id (info
, frame_id_build (this_sp_for_id
, start_addr
));
1064 fprintf_unfiltered (gdb_stdlog
, " this_sp_for_id = %s\n",
1065 paddress (gdbarch
, this_sp_for_id
));
1066 fprintf_unfiltered (gdb_stdlog
, " start_addr = %s\n",
1067 paddress (gdbarch
, start_addr
));
1073 /* Implement the this_id function for the stub unwinder. */
1076 or1k_frame_this_id (struct frame_info
*this_frame
,
1077 void **prologue_cache
, struct frame_id
*this_id
)
1079 struct trad_frame_cache
*info
= or1k_frame_cache (this_frame
,
1082 trad_frame_get_id (info
, this_id
);
1085 /* Implement the prev_register function for the stub unwinder. */
1087 static struct value
*
1088 or1k_frame_prev_register (struct frame_info
*this_frame
,
1089 void **prologue_cache
, int regnum
)
1091 struct trad_frame_cache
*info
= or1k_frame_cache (this_frame
,
1094 return trad_frame_get_register (info
, this_frame
, regnum
);
1097 /* Data structures for the normal prologue-analysis-based unwinder. */
1099 static const struct frame_unwind or1k_frame_unwind
= {
1101 default_frame_unwind_stop_reason
,
1103 or1k_frame_prev_register
,
1105 default_frame_sniffer
,
1109 /* Architecture initialization for OpenRISC 1000. */
1111 static struct gdbarch
*
1112 or1k_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1114 struct gdbarch
*gdbarch
;
1115 struct gdbarch_tdep
*tdep
;
1116 const struct bfd_arch_info
*binfo
;
1117 tdesc_arch_data_up tdesc_data
;
1118 const struct target_desc
*tdesc
= info
.target_desc
;
1120 /* Find a candidate among the list of pre-declared architectures. */
1121 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1123 return arches
->gdbarch
;
1125 /* None found, create a new architecture from the information
1126 provided. Can't initialize all the target dependencies until we
1127 actually know which target we are talking to, but put in some defaults
1129 binfo
= info
.bfd_arch_info
;
1130 tdep
= XCNEW (struct gdbarch_tdep
);
1131 tdep
->bytes_per_word
= binfo
->bits_per_word
/ binfo
->bits_per_byte
;
1132 tdep
->bytes_per_address
= binfo
->bits_per_address
/ binfo
->bits_per_byte
;
1133 gdbarch
= gdbarch_alloc (&info
, tdep
);
1135 /* Target data types */
1136 set_gdbarch_short_bit (gdbarch
, 16);
1137 set_gdbarch_int_bit (gdbarch
, 32);
1138 set_gdbarch_long_bit (gdbarch
, 32);
1139 set_gdbarch_long_long_bit (gdbarch
, 64);
1140 set_gdbarch_float_bit (gdbarch
, 32);
1141 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
1142 set_gdbarch_double_bit (gdbarch
, 64);
1143 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
1144 set_gdbarch_long_double_bit (gdbarch
, 64);
1145 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
1146 set_gdbarch_ptr_bit (gdbarch
, binfo
->bits_per_address
);
1147 set_gdbarch_addr_bit (gdbarch
, binfo
->bits_per_address
);
1148 set_gdbarch_char_signed (gdbarch
, 1);
1150 /* Information about the target architecture */
1151 set_gdbarch_return_value (gdbarch
, or1k_return_value
);
1152 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
1153 or1k_breakpoint::kind_from_pc
);
1154 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
1155 or1k_breakpoint::bp_from_kind
);
1156 set_gdbarch_have_nonsteppable_watchpoint (gdbarch
, 1);
1158 /* Register architecture */
1159 set_gdbarch_num_regs (gdbarch
, OR1K_NUM_REGS
);
1160 set_gdbarch_num_pseudo_regs (gdbarch
, OR1K_NUM_PSEUDO_REGS
);
1161 set_gdbarch_sp_regnum (gdbarch
, OR1K_SP_REGNUM
);
1162 set_gdbarch_pc_regnum (gdbarch
, OR1K_NPC_REGNUM
);
1163 set_gdbarch_ps_regnum (gdbarch
, OR1K_SR_REGNUM
);
1164 set_gdbarch_deprecated_fp_regnum (gdbarch
, OR1K_FP_REGNUM
);
1166 /* Functions to analyse frames */
1167 set_gdbarch_skip_prologue (gdbarch
, or1k_skip_prologue
);
1168 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1169 set_gdbarch_frame_align (gdbarch
, or1k_frame_align
);
1170 set_gdbarch_frame_red_zone_size (gdbarch
, OR1K_FRAME_RED_ZONE_SIZE
);
1172 /* Functions to access frame data */
1173 set_gdbarch_unwind_pc (gdbarch
, or1k_unwind_pc
);
1174 set_gdbarch_unwind_sp (gdbarch
, or1k_unwind_sp
);
1176 /* Functions handling dummy frames */
1177 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
1178 set_gdbarch_push_dummy_code (gdbarch
, or1k_push_dummy_code
);
1179 set_gdbarch_push_dummy_call (gdbarch
, or1k_push_dummy_call
);
1181 /* Frame unwinders. Use DWARF debug info if available, otherwise use our
1183 dwarf2_append_unwinders (gdbarch
);
1184 frame_unwind_append_unwinder (gdbarch
, &or1k_frame_unwind
);
1186 /* Get a CGEN CPU descriptor for this architecture. */
1189 const char *mach_name
= binfo
->printable_name
;
1190 enum cgen_endian endian
= (info
.byte_order
== BFD_ENDIAN_BIG
1191 ? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE
);
1193 tdep
->gdb_cgen_cpu_desc
=
1194 or1k_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH
, mach_name
,
1195 CGEN_CPU_OPEN_ENDIAN
, endian
, CGEN_CPU_OPEN_END
);
1197 or1k_cgen_init_asm (tdep
->gdb_cgen_cpu_desc
);
1200 /* If this mach has a delay slot. */
1201 if (binfo
->mach
== bfd_mach_or1k
)
1202 set_gdbarch_single_step_through_delay (gdbarch
,
1203 or1k_single_step_through_delay
);
1205 if (!tdesc_has_registers (info
.target_desc
))
1206 /* Pick a default target description. */
1209 /* Check any target description for validity. */
1210 if (tdesc_has_registers (tdesc
))
1212 const struct tdesc_feature
*feature
;
1216 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.or1k.group0");
1217 if (feature
== NULL
)
1220 tdesc_data
= tdesc_data_alloc ();
1224 for (i
= 0; i
< OR1K_NUM_REGS
; i
++)
1225 valid_p
&= tdesc_numbered_register (feature
, tdesc_data
.get (), i
,
1232 if (tdesc_data
!= NULL
)
1234 /* If we are using tdesc, register our own reggroups, otherwise we
1235 will used the defaults. */
1236 reggroup_add (gdbarch
, general_reggroup
);
1237 reggroup_add (gdbarch
, system_reggroup
);
1238 reggroup_add (gdbarch
, float_reggroup
);
1239 reggroup_add (gdbarch
, vector_reggroup
);
1240 reggroup_add (gdbarch
, all_reggroup
);
1241 reggroup_add (gdbarch
, save_reggroup
);
1242 reggroup_add (gdbarch
, restore_reggroup
);
1244 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
1247 /* Hook in ABI-specific overrides, if they have been registered. */
1248 gdbarch_init_osabi (info
, gdbarch
);
1253 /* Dump the target specific data for this architecture. */
1256 or1k_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
1258 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1261 return; /* Nothing to report */
1263 fprintf_unfiltered (file
, "or1k_dump_tdep: %d bytes per word\n",
1264 tdep
->bytes_per_word
);
1265 fprintf_unfiltered (file
, "or1k_dump_tdep: %d bytes per address\n",
1266 tdep
->bytes_per_address
);
1270 void _initialize_or1k_tdep ();
1272 _initialize_or1k_tdep ()
1274 /* Register this architecture. */
1275 gdbarch_register (bfd_arch_or1k
, or1k_gdbarch_init
, or1k_dump_tdep
);
1277 initialize_tdesc_or1k ();
1279 /* Debugging flag. */
1280 add_setshow_boolean_cmd ("or1k", class_maintenance
, &or1k_debug
,
1281 _("Set OpenRISC debugging."),
1282 _("Show OpenRISC debugging."),
1283 _("When on, OpenRISC specific debugging is enabled."),
1286 &setdebuglist
, &showdebuglist
);