1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2020 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "observable.h"
24 #include "gdbthread.h"
29 #include "linux-nat.h"
30 #include <sys/types.h>
33 #include <sys/ioctl.h>
35 #include "gdbsupport/gdb_wait.h"
37 #include <sys/procfs.h>
38 #include "nat/gdb_ptrace.h"
39 #include "nat/linux-ptrace.h"
40 #include "inf-ptrace.h"
42 /* Prototypes for supply_gregset etc. */
45 #include "ppc-linux-tdep.h"
47 /* Required when using the AUXV. */
48 #include "elf/common.h"
51 #include "arch/ppc-linux-common.h"
52 #include "arch/ppc-linux-tdesc.h"
53 #include "nat/ppc-linux.h"
54 #include "linux-tdep.h"
56 /* Similarly for the hardware watchpoint support. These requests are used
57 when the PowerPC HWDEBUG ptrace interface is not available. */
58 #ifndef PTRACE_GET_DEBUGREG
59 #define PTRACE_GET_DEBUGREG 25
61 #ifndef PTRACE_SET_DEBUGREG
62 #define PTRACE_SET_DEBUGREG 26
64 #ifndef PTRACE_GETSIGINFO
65 #define PTRACE_GETSIGINFO 0x4202
68 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
69 available. It exposes the debug facilities of PowerPC processors, as well
70 as additional features of BookE processors, such as ranged breakpoints and
71 watchpoints and hardware-accelerated condition evaluation. */
72 #ifndef PPC_PTRACE_GETHWDBGINFO
74 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
75 ptrace interface is not present in ptrace.h, so we'll have to pretty much
76 include it all here so that the code at least compiles on older systems. */
77 #define PPC_PTRACE_GETHWDBGINFO 0x89
78 #define PPC_PTRACE_SETHWDEBUG 0x88
79 #define PPC_PTRACE_DELHWDEBUG 0x87
83 uint32_t version
; /* Only version 1 exists to date. */
84 uint32_t num_instruction_bps
;
85 uint32_t num_data_bps
;
86 uint32_t num_condition_regs
;
87 uint32_t data_bp_alignment
;
88 uint32_t sizeof_condition
; /* size of the DVC register. */
92 /* Features will have bits indicating whether there is support for: */
93 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
94 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
95 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
96 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
98 struct ppc_hw_breakpoint
100 uint32_t version
; /* currently, version must be 1 */
101 uint32_t trigger_type
; /* only some combinations allowed */
102 uint32_t addr_mode
; /* address match mode */
103 uint32_t condition_mode
; /* break/watchpoint condition flags */
104 uint64_t addr
; /* break/watchpoint address */
105 uint64_t addr2
; /* range end or mask */
106 uint64_t condition_value
; /* contents of the DVC register */
110 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
111 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
112 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
113 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
116 #define PPC_BREAKPOINT_MODE_EXACT 0x0
117 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
118 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
119 #define PPC_BREAKPOINT_MODE_MASK 0x3
121 /* Condition mode. */
122 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
123 #define PPC_BREAKPOINT_CONDITION_AND 0x1
124 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
125 #define PPC_BREAKPOINT_CONDITION_OR 0x2
126 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
127 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
128 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
129 #define PPC_BREAKPOINT_CONDITION_BE(n) \
130 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
131 #endif /* PPC_PTRACE_GETHWDBGINFO */
133 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
134 watchpoint (up to 512 bytes). */
135 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
136 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
137 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
139 /* Similarly for the general-purpose (gp0 -- gp31)
140 and floating-point registers (fp0 -- fp31). */
141 #ifndef PTRACE_GETREGS
142 #define PTRACE_GETREGS 12
144 #ifndef PTRACE_SETREGS
145 #define PTRACE_SETREGS 13
147 #ifndef PTRACE_GETFPREGS
148 #define PTRACE_GETFPREGS 14
150 #ifndef PTRACE_SETFPREGS
151 #define PTRACE_SETFPREGS 15
154 /* This oddity is because the Linux kernel defines elf_vrregset_t as
155 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
156 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
157 the vrsave as an extra 4 bytes at the end. I opted for creating a
158 flat array of chars, so that it is easier to manipulate for gdb.
160 There are 32 vector registers 16 bytes longs, plus a VSCR register
161 which is only 4 bytes long, but is fetched as a 16 bytes
162 quantity. Up to here we have the elf_vrregset_t structure.
163 Appended to this there is space for the VRSAVE register: 4 bytes.
164 Even though this vrsave register is not included in the regset
165 typedef, it is handled by the ptrace requests.
167 The layout is like this (where x is the actual value of the vscr reg): */
172 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
173 <-------> <-------><-------><->
176 |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
177 <-------> <-------><-------><->
182 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
184 /* This is the layout of the POWER7 VSX registers and the way they overlap
185 with the existing FPR and VMX registers.
187 VSR doubleword 0 VSR doubleword 1
188 ----------------------------------------------------------------
190 ----------------------------------------------------------------
192 ----------------------------------------------------------------
195 ----------------------------------------------------------------
196 VSR[30] | FPR[30] | |
197 ----------------------------------------------------------------
198 VSR[31] | FPR[31] | |
199 ----------------------------------------------------------------
201 ----------------------------------------------------------------
203 ----------------------------------------------------------------
206 ----------------------------------------------------------------
208 ----------------------------------------------------------------
210 ----------------------------------------------------------------
212 VSX has 64 128bit registers. The first 32 registers overlap with
213 the FP registers (doubleword 0) and hence extend them with additional
214 64 bits (doubleword 1). The other 32 regs overlap with the VMX
216 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
218 /* On PPC processors that support the Signal Processing Extension
219 (SPE) APU, the general-purpose registers are 64 bits long.
220 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
221 ptrace calls only access the lower half of each register, to allow
222 them to behave the same way they do on non-SPE systems. There's a
223 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
224 read and write the top halves of all the general-purpose registers
225 at once, along with some SPE-specific registers.
227 GDB itself continues to claim the general-purpose registers are 32
228 bits long. It has unnamed raw registers that hold the upper halves
229 of the gprs, and the full 64-bit SIMD views of the registers,
230 'ev0' -- 'ev31', are pseudo-registers that splice the top and
231 bottom halves together.
233 This is the structure filled in by PTRACE_GETEVRREGS and written to
234 the inferior's registers by PTRACE_SETEVRREGS. */
235 struct gdb_evrregset_t
237 unsigned long evr
[32];
238 unsigned long long acc
;
239 unsigned long spefscr
;
242 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
243 PTRACE_SETVSXREGS requests, for reading and writing the VSX
244 POWER7 registers 0 through 31. Zero if we've tried one of them and
245 gotten an error. Note that VSX registers 32 through 63 overlap
246 with VR registers 0 through 31. */
247 int have_ptrace_getsetvsxregs
= 1;
249 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
250 PTRACE_SETVRREGS requests, for reading and writing the Altivec
251 registers. Zero if we've tried one of them and gotten an
253 int have_ptrace_getvrregs
= 1;
255 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
256 PTRACE_SETEVRREGS requests, for reading and writing the SPE
257 registers. Zero if we've tried one of them and gotten an
259 int have_ptrace_getsetevrregs
= 1;
261 /* Non-zero if our kernel may support the PTRACE_GETREGS and
262 PTRACE_SETREGS requests, for reading and writing the
263 general-purpose registers. Zero if we've tried one of
264 them and gotten an error. */
265 int have_ptrace_getsetregs
= 1;
267 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
268 PTRACE_SETFPREGS requests, for reading and writing the
269 floating-pointers registers. Zero if we've tried one of
270 them and gotten an error. */
271 int have_ptrace_getsetfpregs
= 1;
273 struct ppc_linux_nat_target final
: public linux_nat_target
275 /* Add our register access methods. */
276 void fetch_registers (struct regcache
*, int) override
;
277 void store_registers (struct regcache
*, int) override
;
279 /* Add our breakpoint/watchpoint methods. */
280 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
282 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
285 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
288 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
290 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
291 struct expression
*) override
;
293 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
294 struct expression
*) override
;
296 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
299 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
302 bool stopped_by_watchpoint () override
;
304 bool stopped_data_address (CORE_ADDR
*) override
;
306 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
308 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
311 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
313 int ranged_break_num_registers () override
;
315 const struct target_desc
*read_description () override
;
317 int auxv_parse (gdb_byte
**readptr
,
318 gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
321 /* Override linux_nat_target low methods. */
322 void low_new_thread (struct lwp_info
*lp
) override
;
325 static ppc_linux_nat_target the_ppc_linux_nat_target
;
328 /* registers layout, as presented by the ptrace interface:
329 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
330 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
331 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
332 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
333 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
334 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
335 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
336 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
337 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
338 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
339 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
340 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
341 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
345 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
348 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
349 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
350 interface, and not the wordsize of the program's ABI. */
351 int wordsize
= sizeof (long);
353 /* General purpose registers occupy 1 slot each in the buffer. */
354 if (regno
>= tdep
->ppc_gp0_regnum
355 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
356 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
358 /* Floating point regs: eight bytes each in both 32- and 64-bit
359 ptrace interfaces. Thus, two slots each in 32-bit interface, one
360 slot each in 64-bit interface. */
361 if (tdep
->ppc_fp0_regnum
>= 0
362 && regno
>= tdep
->ppc_fp0_regnum
363 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
364 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
366 /* UISA special purpose registers: 1 slot each. */
367 if (regno
== gdbarch_pc_regnum (gdbarch
))
368 u_addr
= PT_NIP
* wordsize
;
369 if (regno
== tdep
->ppc_lr_regnum
)
370 u_addr
= PT_LNK
* wordsize
;
371 if (regno
== tdep
->ppc_cr_regnum
)
372 u_addr
= PT_CCR
* wordsize
;
373 if (regno
== tdep
->ppc_xer_regnum
)
374 u_addr
= PT_XER
* wordsize
;
375 if (regno
== tdep
->ppc_ctr_regnum
)
376 u_addr
= PT_CTR
* wordsize
;
378 if (regno
== tdep
->ppc_mq_regnum
)
379 u_addr
= PT_MQ
* wordsize
;
381 if (regno
== tdep
->ppc_ps_regnum
)
382 u_addr
= PT_MSR
* wordsize
;
383 if (regno
== PPC_ORIG_R3_REGNUM
)
384 u_addr
= PT_ORIG_R3
* wordsize
;
385 if (regno
== PPC_TRAP_REGNUM
)
386 u_addr
= PT_TRAP
* wordsize
;
387 if (tdep
->ppc_fpscr_regnum
>= 0
388 && regno
== tdep
->ppc_fpscr_regnum
)
390 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
391 kernel headers incorrectly contained the 32-bit definition of
392 PT_FPSCR. For the 32-bit definition, floating-point
393 registers occupy two 32-bit "slots", and the FPSCR lives in
394 the second half of such a slot-pair (hence +1). For 64-bit,
395 the FPSCR instead occupies the full 64-bit 2-word-slot and
396 hence no adjustment is necessary. Hack around this. */
397 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
398 u_addr
= (48 + 32) * wordsize
;
399 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
400 slot and not just its second word. The PT_FPSCR supplied when
401 GDB is compiled as a 32-bit app doesn't reflect this. */
402 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
403 && PT_FPSCR
== (48 + 2*32 + 1))
404 u_addr
= (48 + 2*32) * wordsize
;
406 u_addr
= PT_FPSCR
* wordsize
;
411 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
412 registers set mechanism, as opposed to the interface for all the
413 other registers, that stores/fetches each register individually. */
415 fetch_vsx_registers (struct regcache
*regcache
, int tid
, int regno
)
418 gdb_vsxregset_t regs
;
419 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
421 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
426 have_ptrace_getsetvsxregs
= 0;
429 perror_with_name (_("Unable to fetch VSX registers"));
432 vsxregset
->supply_regset (vsxregset
, regcache
, regno
, ®s
,
433 PPC_LINUX_SIZEOF_VSXREGSET
);
436 /* The Linux kernel ptrace interface for AltiVec registers uses the
437 registers set mechanism, as opposed to the interface for all the
438 other registers, that stores/fetches each register individually. */
440 fetch_altivec_registers (struct regcache
*regcache
, int tid
,
445 struct gdbarch
*gdbarch
= regcache
->arch ();
446 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
448 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
453 have_ptrace_getvrregs
= 0;
456 perror_with_name (_("Unable to fetch AltiVec registers"));
459 vrregset
->supply_regset (vrregset
, regcache
, regno
, ®s
,
460 PPC_LINUX_SIZEOF_VRREGSET
);
463 /* Fetch the top 32 bits of TID's general-purpose registers and the
464 SPE-specific registers, and place the results in EVRREGSET. If we
465 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
468 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
469 PTRACE_SETEVRREGS requests are supported is isolated here, and in
470 set_spe_registers. */
472 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
474 if (have_ptrace_getsetevrregs
)
476 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
480 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
481 we just return zeros. */
483 have_ptrace_getsetevrregs
= 0;
485 /* Anything else needs to be reported. */
486 perror_with_name (_("Unable to fetch SPE registers"));
490 memset (evrregset
, 0, sizeof (*evrregset
));
493 /* Supply values from TID for SPE-specific raw registers: the upper
494 halves of the GPRs, the accumulator, and the spefscr. REGNO must
495 be the number of an upper half register, acc, spefscr, or -1 to
496 supply the values of all registers. */
498 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
500 struct gdbarch
*gdbarch
= regcache
->arch ();
501 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
502 struct gdb_evrregset_t evrregs
;
504 gdb_assert (sizeof (evrregs
.evr
[0])
505 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
506 gdb_assert (sizeof (evrregs
.acc
)
507 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
508 gdb_assert (sizeof (evrregs
.spefscr
)
509 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
511 get_spe_registers (tid
, &evrregs
);
517 for (i
= 0; i
< ppc_num_gprs
; i
++)
518 regcache
->raw_supply (tdep
->ppc_ev0_upper_regnum
+ i
, &evrregs
.evr
[i
]);
520 else if (tdep
->ppc_ev0_upper_regnum
<= regno
521 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
522 regcache
->raw_supply (regno
,
523 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
526 || regno
== tdep
->ppc_acc_regnum
)
527 regcache
->raw_supply (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
530 || regno
== tdep
->ppc_spefscr_regnum
)
531 regcache
->raw_supply (tdep
->ppc_spefscr_regnum
, &evrregs
.spefscr
);
534 /* Use ptrace to fetch all registers from the register set with note
535 type REGSET_ID, size REGSIZE, and layout described by REGSET, from
536 process/thread TID and supply their values to REGCACHE. If ptrace
537 returns ENODATA to indicate the regset is unavailable, mark the
538 registers as unavailable in REGCACHE. */
541 fetch_regset (struct regcache
*regcache
, int tid
,
542 int regset_id
, int regsetsize
, const struct regset
*regset
)
544 void *buf
= alloca (regsetsize
);
548 iov
.iov_len
= regsetsize
;
550 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
552 if (errno
== ENODATA
)
553 regset
->supply_regset (regset
, regcache
, -1, NULL
, regsetsize
);
555 perror_with_name (_("Couldn't get register set"));
558 regset
->supply_regset (regset
, regcache
, -1, buf
, regsetsize
);
561 /* Use ptrace to store register REGNUM of the regset with note type
562 REGSET_ID, size REGSETSIZE, and layout described by REGSET, from
563 REGCACHE back to process/thread TID. If REGNUM is -1 all registers
564 in the set are collected and stored. */
567 store_regset (const struct regcache
*regcache
, int tid
, int regnum
,
568 int regset_id
, int regsetsize
, const struct regset
*regset
)
570 void *buf
= alloca (regsetsize
);
574 iov
.iov_len
= regsetsize
;
576 /* Make sure that the buffer that will be stored has up to date values
577 for the registers that won't be collected. */
578 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
579 perror_with_name (_("Couldn't get register set"));
581 regset
->collect_regset (regset
, regcache
, regnum
, buf
, regsetsize
);
583 if (ptrace (PTRACE_SETREGSET
, tid
, regset_id
, &iov
) < 0)
584 perror_with_name (_("Couldn't set register set"));
587 /* Check whether the kernel provides a register set with number
588 REGSET_ID of size REGSETSIZE for process/thread TID. */
591 check_regset (int tid
, int regset_id
, int regsetsize
)
593 void *buf
= alloca (regsetsize
);
597 iov
.iov_len
= regsetsize
;
599 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) >= 0
607 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
609 struct gdbarch
*gdbarch
= regcache
->arch ();
610 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
611 /* This isn't really an address. But ptrace thinks of it as one. */
612 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
613 int bytes_transferred
;
614 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
616 if (altivec_register_p (gdbarch
, regno
))
618 /* If this is the first time through, or if it is not the first
619 time through, and we have confirmed that there is kernel
620 support for such a ptrace request, then go and fetch the
622 if (have_ptrace_getvrregs
)
624 fetch_altivec_registers (regcache
, tid
, regno
);
627 /* If we have discovered that there is no ptrace support for
628 AltiVec registers, fall through and return zeroes, because
629 regaddr will be -1 in this case. */
631 else if (vsx_register_p (gdbarch
, regno
))
633 if (have_ptrace_getsetvsxregs
)
635 fetch_vsx_registers (regcache
, tid
, regno
);
639 else if (spe_register_p (gdbarch
, regno
))
641 fetch_spe_register (regcache
, tid
, regno
);
644 else if (regno
== PPC_DSCR_REGNUM
)
646 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
648 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
649 PPC_LINUX_SIZEOF_DSCRREGSET
,
650 &ppc32_linux_dscrregset
);
653 else if (regno
== PPC_PPR_REGNUM
)
655 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
657 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
658 PPC_LINUX_SIZEOF_PPRREGSET
,
659 &ppc32_linux_pprregset
);
662 else if (regno
== PPC_TAR_REGNUM
)
664 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
666 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
667 PPC_LINUX_SIZEOF_TARREGSET
,
668 &ppc32_linux_tarregset
);
671 else if (PPC_IS_EBB_REGNUM (regno
))
673 gdb_assert (tdep
->have_ebb
);
675 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
676 PPC_LINUX_SIZEOF_EBBREGSET
,
677 &ppc32_linux_ebbregset
);
680 else if (PPC_IS_PMU_REGNUM (regno
))
682 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
684 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
685 PPC_LINUX_SIZEOF_PMUREGSET
,
686 &ppc32_linux_pmuregset
);
689 else if (PPC_IS_TMSPR_REGNUM (regno
))
691 gdb_assert (tdep
->have_htm_spr
);
693 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
694 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
695 &ppc32_linux_tm_sprregset
);
698 else if (PPC_IS_CKPTGP_REGNUM (regno
))
700 gdb_assert (tdep
->have_htm_core
);
702 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
703 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
704 (tdep
->wordsize
== 4?
705 PPC32_LINUX_SIZEOF_CGPRREGSET
706 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
710 else if (PPC_IS_CKPTFP_REGNUM (regno
))
712 gdb_assert (tdep
->have_htm_fpu
);
714 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
715 PPC_LINUX_SIZEOF_CFPRREGSET
,
716 &ppc32_linux_cfprregset
);
719 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
721 gdb_assert (tdep
->have_htm_altivec
);
723 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
724 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
725 PPC_LINUX_SIZEOF_CVMXREGSET
,
729 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
731 gdb_assert (tdep
->have_htm_vsx
);
733 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
734 PPC_LINUX_SIZEOF_CVSXREGSET
,
735 &ppc32_linux_cvsxregset
);
738 else if (regno
== PPC_CPPR_REGNUM
)
740 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
742 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
743 PPC_LINUX_SIZEOF_CPPRREGSET
,
744 &ppc32_linux_cpprregset
);
747 else if (regno
== PPC_CDSCR_REGNUM
)
749 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
751 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
752 PPC_LINUX_SIZEOF_CDSCRREGSET
,
753 &ppc32_linux_cdscrregset
);
756 else if (regno
== PPC_CTAR_REGNUM
)
758 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
760 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
761 PPC_LINUX_SIZEOF_CTARREGSET
,
762 &ppc32_linux_ctarregset
);
768 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
769 regcache
->raw_supply (regno
, buf
);
773 /* Read the raw register using sizeof(long) sized chunks. On a
774 32-bit platform, 64-bit floating-point registers will require two
776 for (bytes_transferred
= 0;
777 bytes_transferred
< register_size (gdbarch
, regno
);
778 bytes_transferred
+= sizeof (long))
783 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
784 regaddr
+= sizeof (long);
788 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
789 gdbarch_register_name (gdbarch
, regno
), regno
);
790 perror_with_name (message
);
792 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
795 /* Now supply the register. Keep in mind that the regcache's idea
796 of the register's size may not be a multiple of sizeof
798 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
800 /* Little-endian values are always found at the left end of the
801 bytes transferred. */
802 regcache
->raw_supply (regno
, buf
);
804 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
806 /* Big-endian values are found at the right end of the bytes
808 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
809 regcache
->raw_supply (regno
, buf
+ padding
);
812 internal_error (__FILE__
, __LINE__
,
813 _("fetch_register: unexpected byte order: %d"),
814 gdbarch_byte_order (gdbarch
));
817 /* This function actually issues the request to ptrace, telling
818 it to get all general-purpose registers and put them into the
821 If the ptrace request does not exist, this function returns 0
822 and properly sets the have_ptrace_* flag. If the request fails,
823 this function calls perror_with_name. Otherwise, if the request
824 succeeds, then the regcache gets filled and 1 is returned. */
826 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
828 gdb_gregset_t gregset
;
830 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
834 have_ptrace_getsetregs
= 0;
837 perror_with_name (_("Couldn't get general-purpose registers."));
840 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
845 /* This is a wrapper for the fetch_all_gp_regs function. It is
846 responsible for verifying if this target has the ptrace request
847 that can be used to fetch all general-purpose registers at one
848 shot. If it doesn't, then we should fetch them using the
849 old-fashioned way, which is to iterate over the registers and
850 request them one by one. */
852 fetch_gp_regs (struct regcache
*regcache
, int tid
)
854 struct gdbarch
*gdbarch
= regcache
->arch ();
855 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
858 if (have_ptrace_getsetregs
)
859 if (fetch_all_gp_regs (regcache
, tid
))
862 /* If we've hit this point, it doesn't really matter which
863 architecture we are using. We just need to read the
864 registers in the "old-fashioned way". */
865 for (i
= 0; i
< ppc_num_gprs
; i
++)
866 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
869 /* This function actually issues the request to ptrace, telling
870 it to get all floating-point registers and put them into the
873 If the ptrace request does not exist, this function returns 0
874 and properly sets the have_ptrace_* flag. If the request fails,
875 this function calls perror_with_name. Otherwise, if the request
876 succeeds, then the regcache gets filled and 1 is returned. */
878 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
880 gdb_fpregset_t fpregs
;
882 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
886 have_ptrace_getsetfpregs
= 0;
889 perror_with_name (_("Couldn't get floating-point registers."));
892 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
897 /* This is a wrapper for the fetch_all_fp_regs function. It is
898 responsible for verifying if this target has the ptrace request
899 that can be used to fetch all floating-point registers at one
900 shot. If it doesn't, then we should fetch them using the
901 old-fashioned way, which is to iterate over the registers and
902 request them one by one. */
904 fetch_fp_regs (struct regcache
*regcache
, int tid
)
906 struct gdbarch
*gdbarch
= regcache
->arch ();
907 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
910 if (have_ptrace_getsetfpregs
)
911 if (fetch_all_fp_regs (regcache
, tid
))
914 /* If we've hit this point, it doesn't really matter which
915 architecture we are using. We just need to read the
916 registers in the "old-fashioned way". */
917 for (i
= 0; i
< ppc_num_fprs
; i
++)
918 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
922 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
924 struct gdbarch
*gdbarch
= regcache
->arch ();
925 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
927 fetch_gp_regs (regcache
, tid
);
928 if (tdep
->ppc_fp0_regnum
>= 0)
929 fetch_fp_regs (regcache
, tid
);
930 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
931 if (tdep
->ppc_ps_regnum
!= -1)
932 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
933 if (tdep
->ppc_cr_regnum
!= -1)
934 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
935 if (tdep
->ppc_lr_regnum
!= -1)
936 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
937 if (tdep
->ppc_ctr_regnum
!= -1)
938 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
939 if (tdep
->ppc_xer_regnum
!= -1)
940 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
941 if (tdep
->ppc_mq_regnum
!= -1)
942 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
943 if (ppc_linux_trap_reg_p (gdbarch
))
945 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
946 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
948 if (tdep
->ppc_fpscr_regnum
!= -1)
949 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
950 if (have_ptrace_getvrregs
)
951 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
952 fetch_altivec_registers (regcache
, tid
, -1);
953 if (have_ptrace_getsetvsxregs
)
954 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
955 fetch_vsx_registers (regcache
, tid
, -1);
956 if (tdep
->ppc_ev0_upper_regnum
>= 0)
957 fetch_spe_register (regcache
, tid
, -1);
958 if (tdep
->ppc_ppr_regnum
!= -1)
959 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
960 PPC_LINUX_SIZEOF_PPRREGSET
,
961 &ppc32_linux_pprregset
);
962 if (tdep
->ppc_dscr_regnum
!= -1)
963 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
964 PPC_LINUX_SIZEOF_DSCRREGSET
,
965 &ppc32_linux_dscrregset
);
966 if (tdep
->ppc_tar_regnum
!= -1)
967 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
968 PPC_LINUX_SIZEOF_TARREGSET
,
969 &ppc32_linux_tarregset
);
971 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
972 PPC_LINUX_SIZEOF_EBBREGSET
,
973 &ppc32_linux_ebbregset
);
974 if (tdep
->ppc_mmcr0_regnum
!= -1)
975 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
976 PPC_LINUX_SIZEOF_PMUREGSET
,
977 &ppc32_linux_pmuregset
);
978 if (tdep
->have_htm_spr
)
979 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
980 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
981 &ppc32_linux_tm_sprregset
);
982 if (tdep
->have_htm_core
)
984 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
985 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
986 (tdep
->wordsize
== 4?
987 PPC32_LINUX_SIZEOF_CGPRREGSET
988 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
991 if (tdep
->have_htm_fpu
)
992 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
993 PPC_LINUX_SIZEOF_CFPRREGSET
,
994 &ppc32_linux_cfprregset
);
995 if (tdep
->have_htm_altivec
)
997 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
998 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
999 PPC_LINUX_SIZEOF_CVMXREGSET
,
1002 if (tdep
->have_htm_vsx
)
1003 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
1004 PPC_LINUX_SIZEOF_CVSXREGSET
,
1005 &ppc32_linux_cvsxregset
);
1006 if (tdep
->ppc_cppr_regnum
!= -1)
1007 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
1008 PPC_LINUX_SIZEOF_CPPRREGSET
,
1009 &ppc32_linux_cpprregset
);
1010 if (tdep
->ppc_cdscr_regnum
!= -1)
1011 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
1012 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1013 &ppc32_linux_cdscrregset
);
1014 if (tdep
->ppc_ctar_regnum
!= -1)
1015 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
1016 PPC_LINUX_SIZEOF_CTARREGSET
,
1017 &ppc32_linux_ctarregset
);
1020 /* Fetch registers from the child process. Fetch all registers if
1021 regno == -1, otherwise fetch all general registers or all floating
1022 point registers depending upon the value of regno. */
1024 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
1026 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
1029 fetch_ppc_registers (regcache
, tid
);
1031 fetch_register (regcache
, tid
, regno
);
1035 store_vsx_registers (const struct regcache
*regcache
, int tid
, int regno
)
1038 gdb_vsxregset_t regs
;
1039 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
1041 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
1046 have_ptrace_getsetvsxregs
= 0;
1049 perror_with_name (_("Unable to fetch VSX registers"));
1052 vsxregset
->collect_regset (vsxregset
, regcache
, regno
, ®s
,
1053 PPC_LINUX_SIZEOF_VSXREGSET
);
1055 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
1057 perror_with_name (_("Unable to store VSX registers"));
1061 store_altivec_registers (const struct regcache
*regcache
, int tid
,
1065 gdb_vrregset_t regs
;
1066 struct gdbarch
*gdbarch
= regcache
->arch ();
1067 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
1069 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
1074 have_ptrace_getvrregs
= 0;
1077 perror_with_name (_("Unable to fetch AltiVec registers"));
1080 vrregset
->collect_regset (vrregset
, regcache
, regno
, ®s
,
1081 PPC_LINUX_SIZEOF_VRREGSET
);
1083 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
1085 perror_with_name (_("Unable to store AltiVec registers"));
1088 /* Assuming TID refers to an SPE process, set the top halves of TID's
1089 general-purpose registers and its SPE-specific registers to the
1090 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
1093 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
1094 PTRACE_SETEVRREGS requests are supported is isolated here, and in
1095 get_spe_registers. */
1097 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
1099 if (have_ptrace_getsetevrregs
)
1101 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
1105 /* EIO means that the PTRACE_SETEVRREGS request isn't
1106 supported; we fail silently, and don't try the call
1109 have_ptrace_getsetevrregs
= 0;
1111 /* Anything else needs to be reported. */
1112 perror_with_name (_("Unable to set SPE registers"));
1117 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
1118 If REGNO is -1, write the values of all the SPE-specific
1121 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
1123 struct gdbarch
*gdbarch
= regcache
->arch ();
1124 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1125 struct gdb_evrregset_t evrregs
;
1127 gdb_assert (sizeof (evrregs
.evr
[0])
1128 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
1129 gdb_assert (sizeof (evrregs
.acc
)
1130 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
1131 gdb_assert (sizeof (evrregs
.spefscr
)
1132 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
1135 /* Since we're going to write out every register, the code below
1136 should store to every field of evrregs; if that doesn't happen,
1137 make it obvious by initializing it with suspicious values. */
1138 memset (&evrregs
, 42, sizeof (evrregs
));
1140 /* We can only read and write the entire EVR register set at a
1141 time, so to write just a single register, we do a
1142 read-modify-write maneuver. */
1143 get_spe_registers (tid
, &evrregs
);
1149 for (i
= 0; i
< ppc_num_gprs
; i
++)
1150 regcache
->raw_collect (tdep
->ppc_ev0_upper_regnum
+ i
,
1153 else if (tdep
->ppc_ev0_upper_regnum
<= regno
1154 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
1155 regcache
->raw_collect (regno
,
1156 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
1159 || regno
== tdep
->ppc_acc_regnum
)
1160 regcache
->raw_collect (tdep
->ppc_acc_regnum
,
1164 || regno
== tdep
->ppc_spefscr_regnum
)
1165 regcache
->raw_collect (tdep
->ppc_spefscr_regnum
,
1168 /* Write back the modified register set. */
1169 set_spe_registers (tid
, &evrregs
);
1173 store_register (const struct regcache
*regcache
, int tid
, int regno
)
1175 struct gdbarch
*gdbarch
= regcache
->arch ();
1176 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1177 /* This isn't really an address. But ptrace thinks of it as one. */
1178 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
1180 size_t bytes_to_transfer
;
1181 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
1183 if (altivec_register_p (gdbarch
, regno
))
1185 store_altivec_registers (regcache
, tid
, regno
);
1188 else if (vsx_register_p (gdbarch
, regno
))
1190 store_vsx_registers (regcache
, tid
, regno
);
1193 else if (spe_register_p (gdbarch
, regno
))
1195 store_spe_register (regcache
, tid
, regno
);
1198 else if (regno
== PPC_DSCR_REGNUM
)
1200 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
1202 store_regset (regcache
, tid
, regno
, NT_PPC_DSCR
,
1203 PPC_LINUX_SIZEOF_DSCRREGSET
,
1204 &ppc32_linux_dscrregset
);
1207 else if (regno
== PPC_PPR_REGNUM
)
1209 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
1211 store_regset (regcache
, tid
, regno
, NT_PPC_PPR
,
1212 PPC_LINUX_SIZEOF_PPRREGSET
,
1213 &ppc32_linux_pprregset
);
1216 else if (regno
== PPC_TAR_REGNUM
)
1218 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
1220 store_regset (regcache
, tid
, regno
, NT_PPC_TAR
,
1221 PPC_LINUX_SIZEOF_TARREGSET
,
1222 &ppc32_linux_tarregset
);
1225 else if (PPC_IS_EBB_REGNUM (regno
))
1227 gdb_assert (tdep
->have_ebb
);
1229 store_regset (regcache
, tid
, regno
, NT_PPC_EBB
,
1230 PPC_LINUX_SIZEOF_EBBREGSET
,
1231 &ppc32_linux_ebbregset
);
1234 else if (PPC_IS_PMU_REGNUM (regno
))
1236 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
1238 store_regset (regcache
, tid
, regno
, NT_PPC_PMU
,
1239 PPC_LINUX_SIZEOF_PMUREGSET
,
1240 &ppc32_linux_pmuregset
);
1243 else if (PPC_IS_TMSPR_REGNUM (regno
))
1245 gdb_assert (tdep
->have_htm_spr
);
1247 store_regset (regcache
, tid
, regno
, NT_PPC_TM_SPR
,
1248 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1249 &ppc32_linux_tm_sprregset
);
1252 else if (PPC_IS_CKPTGP_REGNUM (regno
))
1254 gdb_assert (tdep
->have_htm_core
);
1256 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
1257 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CGPR
,
1258 (tdep
->wordsize
== 4?
1259 PPC32_LINUX_SIZEOF_CGPRREGSET
1260 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
1264 else if (PPC_IS_CKPTFP_REGNUM (regno
))
1266 gdb_assert (tdep
->have_htm_fpu
);
1268 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CFPR
,
1269 PPC_LINUX_SIZEOF_CFPRREGSET
,
1270 &ppc32_linux_cfprregset
);
1273 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
1275 gdb_assert (tdep
->have_htm_altivec
);
1277 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
1278 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVMX
,
1279 PPC_LINUX_SIZEOF_CVMXREGSET
,
1283 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
1285 gdb_assert (tdep
->have_htm_vsx
);
1287 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVSX
,
1288 PPC_LINUX_SIZEOF_CVSXREGSET
,
1289 &ppc32_linux_cvsxregset
);
1292 else if (regno
== PPC_CPPR_REGNUM
)
1294 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
1296 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CPPR
,
1297 PPC_LINUX_SIZEOF_CPPRREGSET
,
1298 &ppc32_linux_cpprregset
);
1301 else if (regno
== PPC_CDSCR_REGNUM
)
1303 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
1305 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CDSCR
,
1306 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1307 &ppc32_linux_cdscrregset
);
1310 else if (regno
== PPC_CTAR_REGNUM
)
1312 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
1314 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CTAR
,
1315 PPC_LINUX_SIZEOF_CTARREGSET
,
1316 &ppc32_linux_ctarregset
);
1323 /* First collect the register. Keep in mind that the regcache's
1324 idea of the register's size may not be a multiple of sizeof
1326 memset (buf
, 0, sizeof buf
);
1327 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
1328 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1330 /* Little-endian values always sit at the left end of the buffer. */
1331 regcache
->raw_collect (regno
, buf
);
1333 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1335 /* Big-endian values sit at the right end of the buffer. */
1336 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
1337 regcache
->raw_collect (regno
, buf
+ padding
);
1340 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
1344 memcpy (&l
, &buf
[i
], sizeof (l
));
1346 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
1347 regaddr
+= sizeof (long);
1350 && (regno
== tdep
->ppc_fpscr_regnum
1351 || regno
== PPC_ORIG_R3_REGNUM
1352 || regno
== PPC_TRAP_REGNUM
))
1354 /* Some older kernel versions don't allow fpscr, orig_r3
1355 or trap to be written. */
1362 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
1363 gdbarch_register_name (gdbarch
, regno
), regno
);
1364 perror_with_name (message
);
1369 /* This function actually issues the request to ptrace, telling
1370 it to store all general-purpose registers present in the specified
1373 If the ptrace request does not exist, this function returns 0
1374 and properly sets the have_ptrace_* flag. If the request fails,
1375 this function calls perror_with_name. Otherwise, if the request
1376 succeeds, then the regcache is stored and 1 is returned. */
1378 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1380 gdb_gregset_t gregset
;
1382 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1386 have_ptrace_getsetregs
= 0;
1389 perror_with_name (_("Couldn't get general-purpose registers."));
1392 fill_gregset (regcache
, &gregset
, regno
);
1394 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1398 have_ptrace_getsetregs
= 0;
1401 perror_with_name (_("Couldn't set general-purpose registers."));
1407 /* This is a wrapper for the store_all_gp_regs function. It is
1408 responsible for verifying if this target has the ptrace request
1409 that can be used to store all general-purpose registers at one
1410 shot. If it doesn't, then we should store them using the
1411 old-fashioned way, which is to iterate over the registers and
1412 store them one by one. */
1414 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1416 struct gdbarch
*gdbarch
= regcache
->arch ();
1417 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1420 if (have_ptrace_getsetregs
)
1421 if (store_all_gp_regs (regcache
, tid
, regno
))
1424 /* If we hit this point, it doesn't really matter which
1425 architecture we are using. We just need to store the
1426 registers in the "old-fashioned way". */
1427 for (i
= 0; i
< ppc_num_gprs
; i
++)
1428 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1431 /* This function actually issues the request to ptrace, telling
1432 it to store all floating-point registers present in the specified
1435 If the ptrace request does not exist, this function returns 0
1436 and properly sets the have_ptrace_* flag. If the request fails,
1437 this function calls perror_with_name. Otherwise, if the request
1438 succeeds, then the regcache is stored and 1 is returned. */
1440 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1442 gdb_fpregset_t fpregs
;
1444 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1448 have_ptrace_getsetfpregs
= 0;
1451 perror_with_name (_("Couldn't get floating-point registers."));
1454 fill_fpregset (regcache
, &fpregs
, regno
);
1456 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1460 have_ptrace_getsetfpregs
= 0;
1463 perror_with_name (_("Couldn't set floating-point registers."));
1469 /* This is a wrapper for the store_all_fp_regs function. It is
1470 responsible for verifying if this target has the ptrace request
1471 that can be used to store all floating-point registers at one
1472 shot. If it doesn't, then we should store them using the
1473 old-fashioned way, which is to iterate over the registers and
1474 store them one by one. */
1476 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1478 struct gdbarch
*gdbarch
= regcache
->arch ();
1479 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1482 if (have_ptrace_getsetfpregs
)
1483 if (store_all_fp_regs (regcache
, tid
, regno
))
1486 /* If we hit this point, it doesn't really matter which
1487 architecture we are using. We just need to store the
1488 registers in the "old-fashioned way". */
1489 for (i
= 0; i
< ppc_num_fprs
; i
++)
1490 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1494 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1496 struct gdbarch
*gdbarch
= regcache
->arch ();
1497 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1499 store_gp_regs (regcache
, tid
, -1);
1500 if (tdep
->ppc_fp0_regnum
>= 0)
1501 store_fp_regs (regcache
, tid
, -1);
1502 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1503 if (tdep
->ppc_ps_regnum
!= -1)
1504 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1505 if (tdep
->ppc_cr_regnum
!= -1)
1506 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1507 if (tdep
->ppc_lr_regnum
!= -1)
1508 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1509 if (tdep
->ppc_ctr_regnum
!= -1)
1510 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1511 if (tdep
->ppc_xer_regnum
!= -1)
1512 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1513 if (tdep
->ppc_mq_regnum
!= -1)
1514 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1515 if (tdep
->ppc_fpscr_regnum
!= -1)
1516 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1517 if (ppc_linux_trap_reg_p (gdbarch
))
1519 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1520 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1522 if (have_ptrace_getvrregs
)
1523 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1524 store_altivec_registers (regcache
, tid
, -1);
1525 if (have_ptrace_getsetvsxregs
)
1526 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1527 store_vsx_registers (regcache
, tid
, -1);
1528 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1529 store_spe_register (regcache
, tid
, -1);
1530 if (tdep
->ppc_ppr_regnum
!= -1)
1531 store_regset (regcache
, tid
, -1, NT_PPC_PPR
,
1532 PPC_LINUX_SIZEOF_PPRREGSET
,
1533 &ppc32_linux_pprregset
);
1534 if (tdep
->ppc_dscr_regnum
!= -1)
1535 store_regset (regcache
, tid
, -1, NT_PPC_DSCR
,
1536 PPC_LINUX_SIZEOF_DSCRREGSET
,
1537 &ppc32_linux_dscrregset
);
1538 if (tdep
->ppc_tar_regnum
!= -1)
1539 store_regset (regcache
, tid
, -1, NT_PPC_TAR
,
1540 PPC_LINUX_SIZEOF_TARREGSET
,
1541 &ppc32_linux_tarregset
);
1543 if (tdep
->ppc_mmcr0_regnum
!= -1)
1544 store_regset (regcache
, tid
, -1, NT_PPC_PMU
,
1545 PPC_LINUX_SIZEOF_PMUREGSET
,
1546 &ppc32_linux_pmuregset
);
1548 if (tdep
->have_htm_spr
)
1549 store_regset (regcache
, tid
, -1, NT_PPC_TM_SPR
,
1550 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1551 &ppc32_linux_tm_sprregset
);
1553 /* Because the EBB and checkpointed HTM registers can be
1554 unavailable, attempts to store them here would cause this
1555 function to fail most of the time, so we ignore them. */
1559 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
1561 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
1564 store_register (regcache
, tid
, regno
);
1566 store_ppc_registers (regcache
, tid
);
1569 /* Functions for transferring registers between a gregset_t or fpregset_t
1570 (see sys/ucontext.h) and gdb's regcache. The word size is that used
1571 by the ptrace interface, not the current program's ABI. Eg. if a
1572 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
1573 read or write 64-bit gregsets. This is to suit the host libthread_db. */
1576 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
1578 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
1580 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
1584 fill_gregset (const struct regcache
*regcache
,
1585 gdb_gregset_t
*gregsetp
, int regno
)
1587 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
1590 memset (gregsetp
, 0, sizeof (*gregsetp
));
1591 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
1595 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
1597 const struct regset
*regset
= ppc_linux_fpregset ();
1599 ppc_supply_fpregset (regset
, regcache
, -1,
1600 fpregsetp
, sizeof (*fpregsetp
));
1604 fill_fpregset (const struct regcache
*regcache
,
1605 gdb_fpregset_t
*fpregsetp
, int regno
)
1607 const struct regset
*regset
= ppc_linux_fpregset ();
1609 ppc_collect_fpregset (regset
, regcache
, regno
,
1610 fpregsetp
, sizeof (*fpregsetp
));
1614 ppc_linux_nat_target::auxv_parse (gdb_byte
**readptr
,
1615 gdb_byte
*endptr
, CORE_ADDR
*typep
,
1618 int tid
= inferior_ptid
.lwp ();
1620 tid
= inferior_ptid
.pid ();
1622 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
1624 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
1625 gdb_byte
*ptr
= *readptr
;
1630 if (endptr
- ptr
< sizeof_auxv_field
* 2)
1633 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
1634 ptr
+= sizeof_auxv_field
;
1635 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
1636 ptr
+= sizeof_auxv_field
;
1642 const struct target_desc
*
1643 ppc_linux_nat_target::read_description ()
1645 int tid
= inferior_ptid
.lwp ();
1647 tid
= inferior_ptid
.pid ();
1649 if (have_ptrace_getsetevrregs
)
1651 struct gdb_evrregset_t evrregset
;
1653 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
1654 return tdesc_powerpc_e500l
;
1656 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
1657 Anything else needs to be reported. */
1658 else if (errno
!= EIO
)
1659 perror_with_name (_("Unable to fetch SPE registers"));
1662 struct ppc_linux_features features
= ppc_linux_no_features
;
1664 features
.wordsize
= ppc_linux_target_wordsize (tid
);
1666 CORE_ADDR hwcap
= linux_get_hwcap (current_top_target ());
1667 CORE_ADDR hwcap2
= linux_get_hwcap2 (current_top_target ());
1669 if (have_ptrace_getsetvsxregs
1670 && (hwcap
& PPC_FEATURE_HAS_VSX
))
1672 gdb_vsxregset_t vsxregset
;
1674 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
1675 features
.vsx
= true;
1677 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
1678 Anything else needs to be reported. */
1679 else if (errno
!= EIO
)
1680 perror_with_name (_("Unable to fetch VSX registers"));
1683 if (have_ptrace_getvrregs
1684 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
1686 gdb_vrregset_t vrregset
;
1688 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
1689 features
.altivec
= true;
1691 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
1692 Anything else needs to be reported. */
1693 else if (errno
!= EIO
)
1694 perror_with_name (_("Unable to fetch AltiVec registers"));
1697 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
1699 if ((hwcap2
& PPC_FEATURE2_DSCR
)
1700 && check_regset (tid
, NT_PPC_PPR
, PPC_LINUX_SIZEOF_PPRREGSET
)
1701 && check_regset (tid
, NT_PPC_DSCR
, PPC_LINUX_SIZEOF_DSCRREGSET
))
1703 features
.ppr_dscr
= true;
1704 if ((hwcap2
& PPC_FEATURE2_ARCH_2_07
)
1705 && (hwcap2
& PPC_FEATURE2_TAR
)
1706 && (hwcap2
& PPC_FEATURE2_EBB
)
1707 && check_regset (tid
, NT_PPC_TAR
, PPC_LINUX_SIZEOF_TARREGSET
)
1708 && check_regset (tid
, NT_PPC_EBB
, PPC_LINUX_SIZEOF_EBBREGSET
)
1709 && check_regset (tid
, NT_PPC_PMU
, PPC_LINUX_SIZEOF_PMUREGSET
))
1711 features
.isa207
= true;
1712 if ((hwcap2
& PPC_FEATURE2_HTM
)
1713 && check_regset (tid
, NT_PPC_TM_SPR
,
1714 PPC_LINUX_SIZEOF_TM_SPRREGSET
))
1715 features
.htm
= true;
1719 return ppc_linux_match_description (features
);
1722 /* The cached DABR value, to install in new threads.
1723 This variable is used when the PowerPC HWDEBUG ptrace
1724 interface is not available. */
1725 static long saved_dabr_value
;
1727 /* Global structure that will store information about the available
1728 features provided by the PowerPC HWDEBUG ptrace interface. */
1729 static struct ppc_debug_info hwdebug_info
;
1731 /* Global variable that holds the maximum number of slots that the
1732 kernel will use. This is only used when PowerPC HWDEBUG ptrace interface
1734 static size_t max_slots_number
= 0;
1736 struct hw_break_tuple
1739 struct ppc_hw_breakpoint
*hw_break
;
1742 /* This is an internal vector created to store information about *points
1743 inserted for each thread. This is used when PowerPC HWDEBUG ptrace
1744 interface is available. */
1745 struct thread_points
1747 /* The TID to which this *point relates. */
1749 /* Information about the *point, such as its address, type, etc.
1751 Each element inside this vector corresponds to a hardware
1752 breakpoint or watchpoint in the thread represented by TID. The maximum
1753 size of these vector is MAX_SLOTS_NUMBER. If the hw_break element of
1754 the tuple is NULL, then the position in the vector is free. */
1755 struct hw_break_tuple
*hw_breaks
;
1758 static std::vector
<thread_points
*> ppc_threads
;
1760 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
1762 #define PPC_DEBUG_CURRENT_VERSION 1
1764 /* Returns non-zero if we support the PowerPC HWDEBUG ptrace interface. */
1766 have_ptrace_hwdebug_interface (void)
1768 static int have_ptrace_hwdebug_interface
= -1;
1770 if (have_ptrace_hwdebug_interface
== -1)
1774 tid
= inferior_ptid
.lwp ();
1776 tid
= inferior_ptid
.pid ();
1778 /* Check for kernel support for PowerPC HWDEBUG ptrace interface. */
1779 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, tid
, 0, &hwdebug_info
) >= 0)
1781 /* Check whether PowerPC HWDEBUG ptrace interface is functional and
1782 provides any supported feature. */
1783 if (hwdebug_info
.features
!= 0)
1785 have_ptrace_hwdebug_interface
= 1;
1786 max_slots_number
= hwdebug_info
.num_instruction_bps
1787 + hwdebug_info
.num_data_bps
1788 + hwdebug_info
.num_condition_regs
;
1789 return have_ptrace_hwdebug_interface
;
1792 /* Old school interface and no PowerPC HWDEBUG ptrace support. */
1793 have_ptrace_hwdebug_interface
= 0;
1794 memset (&hwdebug_info
, 0, sizeof (struct ppc_debug_info
));
1797 return have_ptrace_hwdebug_interface
;
1801 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
, int ot
)
1803 int total_hw_wp
, total_hw_bp
;
1805 if (have_ptrace_hwdebug_interface ())
1807 /* When PowerPC HWDEBUG ptrace interface is available, the number of
1808 available hardware watchpoints and breakpoints is stored at the
1809 hwdebug_info struct. */
1810 total_hw_bp
= hwdebug_info
.num_instruction_bps
;
1811 total_hw_wp
= hwdebug_info
.num_data_bps
;
1815 /* When we do not have PowerPC HWDEBUG ptrace interface, we should
1816 consider having 1 hardware watchpoint and no hardware breakpoints. */
1821 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
1822 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
1824 if (cnt
+ ot
> total_hw_wp
)
1827 else if (type
== bp_hardware_breakpoint
)
1829 if (total_hw_bp
== 0)
1831 /* No hardware breakpoint support. */
1834 if (cnt
> total_hw_bp
)
1838 if (!have_ptrace_hwdebug_interface ())
1841 ptid_t ptid
= inferior_ptid
;
1843 /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
1844 and whether the target has DABR. If either answer is no, the
1845 ptrace call will return -1. Fail in that case. */
1850 if (ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0) == -1)
1858 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1860 /* Handle sub-8-byte quantities. */
1864 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
1865 restrictions for watchpoints in the processors. In that case, we use that
1866 information to determine the hardcoded watchable region for
1868 if (have_ptrace_hwdebug_interface ())
1871 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
1872 watchpoints and can watch any access within an arbitrary memory
1873 region. This is useful to watch arrays and structs, for instance. It
1874 takes two hardware watchpoints though. */
1876 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
1877 && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
1879 /* Check if the processor provides DAWR interface. */
1880 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
1881 /* DAWR interface allows to watch up to 512 byte wide ranges which
1882 can't cross a 512 byte boundary. */
1885 region_size
= hwdebug_info
.data_bp_alignment
;
1886 /* Server processors provide one hardware watchpoint and addr+len should
1887 fall in the watchable region provided by the ptrace interface. */
1889 && (addr
+ len
> (addr
& ~(region_size
- 1)) + region_size
))
1892 /* addr+len must fall in the 8 byte watchable region for DABR-based
1893 processors (i.e., server processors). Without the new PowerPC HWDEBUG
1894 ptrace interface, DAC-based processors (i.e., embedded processors) will
1895 use addresses aligned to 4-bytes due to the way the read/write flags are
1896 passed in the old ptrace interface. */
1897 else if (((linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
1898 && (addr
+ len
) > (addr
& ~3) + 4)
1899 || (addr
+ len
) > (addr
& ~7) + 8)
1905 /* This function compares two ppc_hw_breakpoint structs field-by-field. */
1907 hwdebug_point_cmp (struct ppc_hw_breakpoint
*a
, struct ppc_hw_breakpoint
*b
)
1909 return (a
->trigger_type
== b
->trigger_type
1910 && a
->addr_mode
== b
->addr_mode
1911 && a
->condition_mode
== b
->condition_mode
1912 && a
->addr
== b
->addr
1913 && a
->addr2
== b
->addr2
1914 && a
->condition_value
== b
->condition_value
);
1917 /* This function can be used to retrieve a thread_points by the TID of the
1918 related process/thread. If nothing has been found, and ALLOC_NEW is 0,
1919 it returns NULL. If ALLOC_NEW is non-zero, a new thread_points for the
1920 provided TID will be created and returned. */
1921 static struct thread_points
*
1922 hwdebug_find_thread_points_by_tid (int tid
, int alloc_new
)
1924 for (thread_points
*t
: ppc_threads
)
1930 struct thread_points
*t
= NULL
;
1932 /* Do we need to allocate a new point_item
1933 if the wanted one does not exist? */
1936 t
= XNEW (struct thread_points
);
1937 t
->hw_breaks
= XCNEWVEC (struct hw_break_tuple
, max_slots_number
);
1939 ppc_threads
.push_back (t
);
1945 /* This function is a generic wrapper that is responsible for inserting a
1946 *point (i.e., calling `ptrace' in order to issue the request to the
1947 kernel) and registering it internally in GDB. */
1949 hwdebug_insert_point (struct ppc_hw_breakpoint
*b
, int tid
)
1953 gdb::unique_xmalloc_ptr
<ppc_hw_breakpoint
> p (XDUP (ppc_hw_breakpoint
, b
));
1954 struct hw_break_tuple
*hw_breaks
;
1955 struct thread_points
*t
;
1958 slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, tid
, 0, p
.get ());
1960 perror_with_name (_("Unexpected error setting breakpoint or watchpoint"));
1962 /* Everything went fine, so we have to register this *point. */
1963 t
= hwdebug_find_thread_points_by_tid (tid
, 1);
1964 gdb_assert (t
!= NULL
);
1965 hw_breaks
= t
->hw_breaks
;
1967 /* Find a free element in the hw_breaks vector. */
1968 for (i
= 0; i
< max_slots_number
; i
++)
1970 if (hw_breaks
[i
].hw_break
== NULL
)
1972 hw_breaks
[i
].slot
= slot
;
1973 hw_breaks
[i
].hw_break
= p
.release ();
1978 gdb_assert (i
!= max_slots_number
);
1981 /* This function is a generic wrapper that is responsible for removing a
1982 *point (i.e., calling `ptrace' in order to issue the request to the
1983 kernel), and unregistering it internally at GDB. */
1985 hwdebug_remove_point (struct ppc_hw_breakpoint
*b
, int tid
)
1988 struct hw_break_tuple
*hw_breaks
;
1989 struct thread_points
*t
;
1991 t
= hwdebug_find_thread_points_by_tid (tid
, 0);
1992 gdb_assert (t
!= NULL
);
1993 hw_breaks
= t
->hw_breaks
;
1995 for (i
= 0; i
< max_slots_number
; i
++)
1996 if (hw_breaks
[i
].hw_break
&& hwdebug_point_cmp (hw_breaks
[i
].hw_break
, b
))
1999 gdb_assert (i
!= max_slots_number
);
2001 /* We have to ignore ENOENT errors because the kernel implements hardware
2002 breakpoints/watchpoints as "one-shot", that is, they are automatically
2003 deleted when hit. */
2005 if (ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
) < 0)
2006 if (errno
!= ENOENT
)
2007 perror_with_name (_("Unexpected error deleting "
2008 "breakpoint or watchpoint"));
2010 xfree (hw_breaks
[i
].hw_break
);
2011 hw_breaks
[i
].hw_break
= NULL
;
2014 /* Return the number of registers needed for a ranged breakpoint. */
2017 ppc_linux_nat_target::ranged_break_num_registers ()
2019 return ((have_ptrace_hwdebug_interface ()
2020 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_INSN_BP_RANGE
)?
2024 /* Insert the hardware breakpoint described by BP_TGT. Returns 0 for
2025 success, 1 if hardware breakpoints are not supported or -1 for failure. */
2028 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
2029 struct bp_target_info
*bp_tgt
)
2031 struct lwp_info
*lp
;
2032 struct ppc_hw_breakpoint p
;
2034 if (!have_ptrace_hwdebug_interface ())
2037 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2038 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
2039 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2040 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
2041 p
.condition_value
= 0;
2045 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2047 /* The breakpoint will trigger if the address of the instruction is
2048 within the defined range, as follows: p.addr <= address < p.addr2. */
2049 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
2053 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2058 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
2064 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
2065 struct bp_target_info
*bp_tgt
)
2067 struct lwp_info
*lp
;
2068 struct ppc_hw_breakpoint p
;
2070 if (!have_ptrace_hwdebug_interface ())
2073 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2074 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
2075 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2076 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
2077 p
.condition_value
= 0;
2081 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2083 /* The breakpoint will trigger if the address of the instruction is within
2084 the defined range, as follows: p.addr <= address < p.addr2. */
2085 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
2089 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2094 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
2100 get_trigger_type (enum target_hw_bp_type type
)
2104 if (type
== hw_read
)
2105 t
= PPC_BREAKPOINT_TRIGGER_READ
;
2106 else if (type
== hw_write
)
2107 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
2109 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
2114 /* Insert a new masked watchpoint at ADDR using the mask MASK.
2115 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
2116 or hw_access for an access watchpoint. Returns 0 on success and throws
2117 an error on failure. */
2120 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
2121 target_hw_bp_type rw
)
2123 struct lwp_info
*lp
;
2124 struct ppc_hw_breakpoint p
;
2126 gdb_assert (have_ptrace_hwdebug_interface ());
2128 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2129 p
.trigger_type
= get_trigger_type (rw
);
2130 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
2131 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2134 p
.condition_value
= 0;
2137 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
2142 /* Remove a masked watchpoint at ADDR with the mask MASK.
2143 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
2144 or hw_access for an access watchpoint. Returns 0 on success and throws
2145 an error on failure. */
2148 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
2149 target_hw_bp_type rw
)
2151 struct lwp_info
*lp
;
2152 struct ppc_hw_breakpoint p
;
2154 gdb_assert (have_ptrace_hwdebug_interface ());
2156 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2157 p
.trigger_type
= get_trigger_type (rw
);
2158 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
2159 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2162 p
.condition_value
= 0;
2165 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
2170 /* Check whether we have at least one free DVC register. */
2172 can_use_watchpoint_cond_accel (void)
2174 struct thread_points
*p
;
2175 int tid
= inferior_ptid
.lwp ();
2176 int cnt
= hwdebug_info
.num_condition_regs
, i
;
2178 if (!have_ptrace_hwdebug_interface () || cnt
== 0)
2181 p
= hwdebug_find_thread_points_by_tid (tid
, 0);
2185 for (i
= 0; i
< max_slots_number
; i
++)
2186 if (p
->hw_breaks
[i
].hw_break
!= NULL
2187 && (p
->hw_breaks
[i
].hw_break
->condition_mode
2188 != PPC_BREAKPOINT_CONDITION_NONE
))
2191 /* There are no available slots now. */
2199 /* Calculate the enable bits and the contents of the Data Value Compare
2200 debug register present in BookE processors.
2202 ADDR is the address to be watched, LEN is the length of watched data
2203 and DATA_VALUE is the value which will trigger the watchpoint.
2204 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
2205 CONDITION_VALUE will hold the value which should be put in the
2208 calculate_dvc (CORE_ADDR addr
, int len
, CORE_ADDR data_value
,
2209 uint32_t *condition_mode
, uint64_t *condition_value
)
2211 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
2212 rightmost_enabled_byte
;
2213 CORE_ADDR addr_end_data
, addr_end_dvc
;
2215 /* The DVC register compares bytes within fixed-length windows which
2216 are word-aligned, with length equal to that of the DVC register.
2217 We need to calculate where our watch region is relative to that
2218 window and enable comparison of the bytes which fall within it. */
2220 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
2221 addr_end_data
= addr
+ len
;
2222 addr_end_dvc
= (addr
- align_offset
2223 + hwdebug_info
.sizeof_condition
);
2224 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
2225 addr_end_data
- addr_end_dvc
: 0;
2226 num_byte_enable
= len
- num_bytes_off_dvc
;
2227 /* Here, bytes are numbered from right to left. */
2228 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
2229 addr_end_dvc
- addr_end_data
: 0;
2231 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
2232 for (i
= 0; i
< num_byte_enable
; i
++)
2234 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
2236 /* Now we need to match the position within the DVC of the comparison
2237 value with where the watch region is relative to the window
2238 (i.e., the ALIGN_OFFSET). */
2240 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
2241 << rightmost_enabled_byte
* 8);
2244 /* Return the number of memory locations that need to be accessed to
2245 evaluate the expression which generated the given value chain.
2246 Returns -1 if there's any register access involved, or if there are
2247 other kinds of values which are not acceptable in a condition
2248 expression (e.g., lval_computed or lval_internalvar). */
2250 num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
)
2252 int found_memory_cnt
= 0;
2254 /* The idea here is that evaluating an expression generates a series
2255 of values, one holding the value of every subexpression. (The
2256 expression a*b+c has five subexpressions: a, b, a*b, c, and
2257 a*b+c.) GDB's values hold almost enough information to establish
2258 the criteria given above --- they identify memory lvalues,
2259 register lvalues, computed values, etcetera. So we can evaluate
2260 the expression, and then scan the chain of values that leaves
2261 behind to determine the memory locations involved in the evaluation
2264 However, I don't think that the values returned by inferior
2265 function calls are special in any way. So this function may not
2266 notice that an expression contains an inferior function call.
2269 for (const value_ref_ptr
&iter
: chain
)
2271 struct value
*v
= iter
.get ();
2273 /* Constants and values from the history are fine. */
2274 if (VALUE_LVAL (v
) == not_lval
|| deprecated_value_modifiable (v
) == 0)
2276 else if (VALUE_LVAL (v
) == lval_memory
)
2278 /* A lazy memory lvalue is one that GDB never needed to fetch;
2279 we either just used its address (e.g., `a' in `a.b') or
2280 we never needed it at all (e.g., `a' in `a,b'). */
2281 if (!value_lazy (v
))
2284 /* Other kinds of values are not fine. */
2289 return found_memory_cnt
;
2292 /* Verifies whether the expression COND can be implemented using the
2293 DVC (Data Value Compare) register in BookE processors. The expression
2294 must test the watch value for equality with a constant expression.
2295 If the function returns 1, DATA_VALUE will contain the constant against
2296 which the watch value should be compared and LEN will contain the size
2299 check_condition (CORE_ADDR watch_addr
, struct expression
*cond
,
2300 CORE_ADDR
*data_value
, int *len
)
2302 int pc
= 1, num_accesses_left
, num_accesses_right
;
2303 struct value
*left_val
, *right_val
;
2304 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
2306 if (cond
->elts
[0].opcode
!= BINOP_EQUAL
)
2309 fetch_subexp_value (cond
, &pc
, &left_val
, NULL
, &left_chain
, 0);
2310 num_accesses_left
= num_memory_accesses (left_chain
);
2312 if (left_val
== NULL
|| num_accesses_left
< 0)
2315 fetch_subexp_value (cond
, &pc
, &right_val
, NULL
, &right_chain
, 0);
2316 num_accesses_right
= num_memory_accesses (right_chain
);
2318 if (right_val
== NULL
|| num_accesses_right
< 0)
2321 if (num_accesses_left
== 1 && num_accesses_right
== 0
2322 && VALUE_LVAL (left_val
) == lval_memory
2323 && value_address (left_val
) == watch_addr
)
2325 *data_value
= value_as_long (right_val
);
2327 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
2328 the same type as the memory region referenced by LEFT_VAL. */
2329 *len
= TYPE_LENGTH (check_typedef (value_type (left_val
)));
2331 else if (num_accesses_left
== 0 && num_accesses_right
== 1
2332 && VALUE_LVAL (right_val
) == lval_memory
2333 && value_address (right_val
) == watch_addr
)
2335 *data_value
= value_as_long (left_val
);
2337 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
2338 the same type as the memory region referenced by RIGHT_VAL. */
2339 *len
= TYPE_LENGTH (check_typedef (value_type (right_val
)));
2347 /* Return non-zero if the target is capable of using hardware to evaluate
2348 the condition expression, thus only triggering the watchpoint when it is
2351 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
, int len
,
2353 struct expression
*cond
)
2355 CORE_ADDR data_value
;
2357 return (have_ptrace_hwdebug_interface ()
2358 && hwdebug_info
.num_condition_regs
> 0
2359 && check_condition (addr
, cond
, &data_value
, &len
));
2362 /* Set up P with the parameters necessary to request a watchpoint covering
2363 LEN bytes starting at ADDR and if possible with condition expression COND
2364 evaluated by hardware. INSERT tells if we are creating a request for
2365 inserting or removing the watchpoint. */
2368 create_watchpoint_request (struct ppc_hw_breakpoint
*p
, CORE_ADDR addr
,
2369 int len
, enum target_hw_bp_type type
,
2370 struct expression
*cond
, int insert
)
2373 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
2376 CORE_ADDR data_value
;
2378 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
2379 : hwdebug_info
.num_condition_regs
> 0);
2380 if (cond
&& use_condition
&& check_condition (addr
, cond
,
2382 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
2383 &p
->condition_value
);
2386 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2387 p
->condition_value
= 0;
2390 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2395 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2396 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2397 p
->condition_value
= 0;
2399 /* The watchpoint will trigger if the address of the memory access is
2400 within the defined range, as follows: p->addr <= address < p->addr2.
2402 Note that the above sentence just documents how ptrace interprets
2403 its arguments; the watchpoint is set to watch the range defined by
2404 the user _inclusively_, as specified by the user interface. */
2405 p
->addr2
= (uint64_t) addr
+ len
;
2408 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
2409 p
->trigger_type
= get_trigger_type (type
);
2410 p
->addr
= (uint64_t) addr
;
2414 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
2415 enum target_hw_bp_type type
,
2416 struct expression
*cond
)
2418 struct lwp_info
*lp
;
2421 if (have_ptrace_hwdebug_interface ())
2423 struct ppc_hw_breakpoint p
;
2425 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
2428 hwdebug_insert_point (&p
, lp
->ptid
.lwp ());
2435 long read_mode
, write_mode
;
2437 if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
2439 /* PowerPC 440 requires only the read/write flags to be passed
2446 /* PowerPC 970 and other DABR-based processors are required to pass
2447 the Breakpoint Translation bit together with the flags. */
2452 dabr_value
= addr
& ~(read_mode
| write_mode
);
2456 /* Set read and translate bits. */
2457 dabr_value
|= read_mode
;
2460 /* Set write and translate bits. */
2461 dabr_value
|= write_mode
;
2464 /* Set read, write and translate bits. */
2465 dabr_value
|= read_mode
| write_mode
;
2469 saved_dabr_value
= dabr_value
;
2472 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2473 saved_dabr_value
) < 0)
2483 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
2484 enum target_hw_bp_type type
,
2485 struct expression
*cond
)
2487 struct lwp_info
*lp
;
2490 if (have_ptrace_hwdebug_interface ())
2492 struct ppc_hw_breakpoint p
;
2494 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
2497 hwdebug_remove_point (&p
, lp
->ptid
.lwp ());
2503 saved_dabr_value
= 0;
2505 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0,
2506 saved_dabr_value
) < 0)
2516 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
2518 int tid
= lp
->ptid
.lwp ();
2520 if (have_ptrace_hwdebug_interface ())
2523 struct thread_points
*p
;
2524 struct hw_break_tuple
*hw_breaks
;
2526 if (ppc_threads
.empty ())
2529 /* Get a list of breakpoints from any thread. */
2530 p
= ppc_threads
.back ();
2531 hw_breaks
= p
->hw_breaks
;
2533 /* Copy that thread's breakpoints and watchpoints to the new thread. */
2534 for (i
= 0; i
< max_slots_number
; i
++)
2535 if (hw_breaks
[i
].hw_break
)
2537 /* Older kernels did not make new threads inherit their parent
2538 thread's debug state, so we always clear the slot and replicate
2539 the debug state ourselves, ensuring compatibility with all
2542 /* The ppc debug resource accounting is done through "slots".
2543 Ask the kernel the deallocate this specific *point's slot. */
2544 ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
);
2546 hwdebug_insert_point (hw_breaks
[i
].hw_break
, tid
);
2550 ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, saved_dabr_value
);
2554 ppc_linux_thread_exit (struct thread_info
*tp
, int silent
)
2557 int tid
= tp
->ptid
.lwp ();
2558 struct hw_break_tuple
*hw_breaks
;
2559 struct thread_points
*t
= NULL
;
2561 if (!have_ptrace_hwdebug_interface ())
2564 for (i
= 0; i
< ppc_threads
.size (); i
++)
2566 if (ppc_threads
[i
]->tid
== tid
)
2576 unordered_remove (ppc_threads
, i
);
2578 hw_breaks
= t
->hw_breaks
;
2580 for (i
= 0; i
< max_slots_number
; i
++)
2581 if (hw_breaks
[i
].hw_break
)
2582 xfree (hw_breaks
[i
].hw_break
);
2584 xfree (t
->hw_breaks
);
2589 ppc_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
2593 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2596 if (siginfo
.si_signo
!= SIGTRAP
2597 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2600 if (have_ptrace_hwdebug_interface ())
2603 struct thread_points
*t
;
2604 struct hw_break_tuple
*hw_breaks
;
2605 /* The index (or slot) of the *point is passed in the si_errno field. */
2606 int slot
= siginfo
.si_errno
;
2608 t
= hwdebug_find_thread_points_by_tid (inferior_ptid
.lwp (), 0);
2610 /* Find out if this *point is a hardware breakpoint.
2611 If so, we should return 0. */
2614 hw_breaks
= t
->hw_breaks
;
2615 for (i
= 0; i
< max_slots_number
; i
++)
2616 if (hw_breaks
[i
].hw_break
&& hw_breaks
[i
].slot
== slot
2617 && hw_breaks
[i
].hw_break
->trigger_type
2618 == PPC_BREAKPOINT_TRIGGER_EXECUTE
)
2623 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2628 ppc_linux_nat_target::stopped_by_watchpoint ()
2631 return stopped_data_address (&addr
);
2635 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
2641 if (have_ptrace_hwdebug_interface ()
2642 && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
2643 return start
<= addr
&& start
+ length
>= addr
;
2644 else if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE
)
2651 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
2652 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
2655 /* Return the number of registers needed for a masked hardware watchpoint. */
2658 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
, CORE_ADDR mask
)
2660 if (!have_ptrace_hwdebug_interface ()
2661 || (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
2663 else if ((mask
& 0xC0000000) != 0xC0000000)
2665 warning (_("The given mask covers kernel address space "
2666 "and cannot be used.\n"));
2674 void _initialize_ppc_linux_nat ();
2676 _initialize_ppc_linux_nat ()
2678 linux_target
= &the_ppc_linux_nat_target
;
2680 gdb::observers::thread_exit
.attach (ppc_linux_thread_exit
);
2682 /* Register the target. */
2683 add_inf_child_target (linux_target
);