1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2023 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "gdbthread.h"
28 #include "linux-nat.h"
29 #include <sys/types.h>
32 #include <sys/ioctl.h>
34 #include "gdbsupport/gdb_wait.h"
36 #include <sys/procfs.h>
37 #include "nat/gdb_ptrace.h"
38 #include "nat/linux-ptrace.h"
39 #include "inf-ptrace.h"
41 #include <unordered_map>
44 /* Prototypes for supply_gregset etc. */
47 #include "ppc-linux-tdep.h"
49 /* Required when using the AUXV. */
50 #include "elf/common.h"
53 #include "arch/ppc-linux-common.h"
54 #include "arch/ppc-linux-tdesc.h"
55 #include "nat/ppc-linux.h"
56 #include "linux-tdep.h"
59 /* Similarly for the hardware watchpoint support. These requests are used
60 when the PowerPC HWDEBUG ptrace interface is not available. */
61 #ifndef PTRACE_GET_DEBUGREG
62 #define PTRACE_GET_DEBUGREG 25
64 #ifndef PTRACE_SET_DEBUGREG
65 #define PTRACE_SET_DEBUGREG 26
67 #ifndef PTRACE_GETSIGINFO
68 #define PTRACE_GETSIGINFO 0x4202
71 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
72 available. It exposes the debug facilities of PowerPC processors, as well
73 as additional features of BookE processors, such as ranged breakpoints and
74 watchpoints and hardware-accelerated condition evaluation. */
75 #ifndef PPC_PTRACE_GETHWDBGINFO
77 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
78 ptrace interface is not present in ptrace.h, so we'll have to pretty much
79 include it all here so that the code at least compiles on older systems. */
80 #define PPC_PTRACE_GETHWDBGINFO 0x89
81 #define PPC_PTRACE_SETHWDEBUG 0x88
82 #define PPC_PTRACE_DELHWDEBUG 0x87
86 uint32_t version
; /* Only version 1 exists to date. */
87 uint32_t num_instruction_bps
;
88 uint32_t num_data_bps
;
89 uint32_t num_condition_regs
;
90 uint32_t data_bp_alignment
;
91 uint32_t sizeof_condition
; /* size of the DVC register. */
95 /* Features will have bits indicating whether there is support for: */
96 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
97 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
98 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
99 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
101 struct ppc_hw_breakpoint
103 uint32_t version
; /* currently, version must be 1 */
104 uint32_t trigger_type
; /* only some combinations allowed */
105 uint32_t addr_mode
; /* address match mode */
106 uint32_t condition_mode
; /* break/watchpoint condition flags */
107 uint64_t addr
; /* break/watchpoint address */
108 uint64_t addr2
; /* range end or mask */
109 uint64_t condition_value
; /* contents of the DVC register */
113 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
114 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
115 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
116 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
119 #define PPC_BREAKPOINT_MODE_EXACT 0x0
120 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
121 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
122 #define PPC_BREAKPOINT_MODE_MASK 0x3
124 /* Condition mode. */
125 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
126 #define PPC_BREAKPOINT_CONDITION_AND 0x1
127 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
128 #define PPC_BREAKPOINT_CONDITION_OR 0x2
129 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
130 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
131 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
132 #define PPC_BREAKPOINT_CONDITION_BE(n) \
133 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
134 #endif /* PPC_PTRACE_GETHWDBGINFO */
136 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
137 watchpoint (up to 512 bytes). */
138 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
139 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
140 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
142 /* Feature defined on Linux kernel v5.1: Second watchpoint support. */
143 #ifndef PPC_DEBUG_FEATURE_DATA_BP_ARCH_31
144 #define PPC_DEBUG_FEATURE_DATA_BP_ARCH_31 0x20
145 #endif /* PPC_DEBUG_FEATURE_DATA_BP_ARCH_31 */
147 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
149 #define PPC_DEBUG_CURRENT_VERSION 1
151 /* Similarly for the general-purpose (gp0 -- gp31)
152 and floating-point registers (fp0 -- fp31). */
153 #ifndef PTRACE_GETREGS
154 #define PTRACE_GETREGS 12
156 #ifndef PTRACE_SETREGS
157 #define PTRACE_SETREGS 13
159 #ifndef PTRACE_GETFPREGS
160 #define PTRACE_GETFPREGS 14
162 #ifndef PTRACE_SETFPREGS
163 #define PTRACE_SETFPREGS 15
166 /* This oddity is because the Linux kernel defines elf_vrregset_t as
167 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
168 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
169 the vrsave as an extra 4 bytes at the end. I opted for creating a
170 flat array of chars, so that it is easier to manipulate for gdb.
172 There are 32 vector registers 16 bytes longs, plus a VSCR register
173 which is only 4 bytes long, but is fetched as a 16 bytes
174 quantity. Up to here we have the elf_vrregset_t structure.
175 Appended to this there is space for the VRSAVE register: 4 bytes.
176 Even though this vrsave register is not included in the regset
177 typedef, it is handled by the ptrace requests.
179 The layout is like this (where x is the actual value of the vscr reg): */
183 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
184 <-------> <-------><-------><->
187 |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
188 <-------> <-------><-------><->
192 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
194 /* This is the layout of the POWER7 VSX registers and the way they overlap
195 with the existing FPR and VMX registers.
197 VSR doubleword 0 VSR doubleword 1
198 ----------------------------------------------------------------
200 ----------------------------------------------------------------
202 ----------------------------------------------------------------
205 ----------------------------------------------------------------
206 VSR[30] | FPR[30] | |
207 ----------------------------------------------------------------
208 VSR[31] | FPR[31] | |
209 ----------------------------------------------------------------
211 ----------------------------------------------------------------
213 ----------------------------------------------------------------
216 ----------------------------------------------------------------
218 ----------------------------------------------------------------
220 ----------------------------------------------------------------
222 VSX has 64 128bit registers. The first 32 registers overlap with
223 the FP registers (doubleword 0) and hence extend them with additional
224 64 bits (doubleword 1). The other 32 regs overlap with the VMX
226 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
228 /* On PPC processors that support the Signal Processing Extension
229 (SPE) APU, the general-purpose registers are 64 bits long.
230 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
231 ptrace calls only access the lower half of each register, to allow
232 them to behave the same way they do on non-SPE systems. There's a
233 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
234 read and write the top halves of all the general-purpose registers
235 at once, along with some SPE-specific registers.
237 GDB itself continues to claim the general-purpose registers are 32
238 bits long. It has unnamed raw registers that hold the upper halves
239 of the gprs, and the full 64-bit SIMD views of the registers,
240 'ev0' -- 'ev31', are pseudo-registers that splice the top and
241 bottom halves together.
243 This is the structure filled in by PTRACE_GETEVRREGS and written to
244 the inferior's registers by PTRACE_SETEVRREGS. */
245 struct gdb_evrregset_t
247 unsigned long evr
[32];
248 unsigned long long acc
;
249 unsigned long spefscr
;
252 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
253 PTRACE_SETVSXREGS requests, for reading and writing the VSX
254 POWER7 registers 0 through 31. Zero if we've tried one of them and
255 gotten an error. Note that VSX registers 32 through 63 overlap
256 with VR registers 0 through 31. */
257 int have_ptrace_getsetvsxregs
= 1;
259 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
260 PTRACE_SETVRREGS requests, for reading and writing the Altivec
261 registers. Zero if we've tried one of them and gotten an
263 int have_ptrace_getvrregs
= 1;
265 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
266 PTRACE_SETEVRREGS requests, for reading and writing the SPE
267 registers. Zero if we've tried one of them and gotten an
269 int have_ptrace_getsetevrregs
= 1;
271 /* Non-zero if our kernel may support the PTRACE_GETREGS and
272 PTRACE_SETREGS requests, for reading and writing the
273 general-purpose registers. Zero if we've tried one of
274 them and gotten an error. */
275 int have_ptrace_getsetregs
= 1;
277 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
278 PTRACE_SETFPREGS requests, for reading and writing the
279 floating-pointers registers. Zero if we've tried one of
280 them and gotten an error. */
281 int have_ptrace_getsetfpregs
= 1;
283 /* Private arch info associated with each thread lwp_info object, used
284 for debug register handling. */
288 /* When true, indicates that the debug registers installed in the
289 thread no longer correspond to the watchpoints and breakpoints
291 bool debug_regs_stale
;
293 /* We need a back-reference to the PTID of the thread so that we can
294 cleanup the debug register state of the thread in
295 low_delete_thread. */
299 /* Class used to detect which set of ptrace requests that
300 ppc_linux_nat_target will use to install and remove hardware
301 breakpoints and watchpoints.
303 The interface is only detected once, testing the ptrace calls. The
304 result can indicate that no interface is available.
306 The Linux kernel provides two different sets of ptrace requests to
307 handle hardware watchpoints and breakpoints for Power:
309 - PPC_PTRACE_GETHWDBGINFO, PPC_PTRACE_SETHWDEBUG, and
310 PPC_PTRACE_DELHWDEBUG.
314 - PTRACE_SET_DEBUGREG and PTRACE_GET_DEBUGREG
316 The first set is the more flexible one and allows setting watchpoints
317 with a variable watched region length and, for BookE processors,
318 multiple types of debug registers (e.g. hardware breakpoints and
319 hardware-assisted conditions for watchpoints). The second one only
320 allows setting one debug register, a watchpoint, so we only use it if
321 the first one is not available. */
323 class ppc_linux_dreg_interface
327 ppc_linux_dreg_interface ()
328 : m_interface (), m_hwdebug_info ()
332 DISABLE_COPY_AND_ASSIGN (ppc_linux_dreg_interface
);
334 /* One and only one of these three functions returns true, indicating
335 whether the corresponding interface is the one we detected. The
336 interface must already have been detected as a precondition. */
340 gdb_assert (detected_p ());
341 return *m_interface
== HWDEBUG
;
346 gdb_assert (detected_p ());
347 return *m_interface
== DEBUGREG
;
350 bool unavailable_p ()
352 gdb_assert (detected_p ());
353 return *m_interface
== UNAVAILABLE
;
356 /* Returns the debug register capabilities of the target. Should only
357 be called if the interface is HWDEBUG. */
358 const struct ppc_debug_info
&hwdebug_info ()
360 gdb_assert (hwdebug_p ());
362 return m_hwdebug_info
;
365 /* Returns true if the interface has already been detected. This is
366 useful for cases when we know there is no work to be done if the
367 interface hasn't been detected yet. */
370 return m_interface
.has_value ();
373 /* Detect the available interface, if any, if it hasn't been detected
374 before, using PTID for the necessary ptrace calls. */
376 void detect (const ptid_t
&ptid
)
378 if (m_interface
.has_value ())
381 gdb_assert (ptid
.lwp_p ());
383 bool no_features
= false;
385 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, ptid
.lwp (), 0, &m_hwdebug_info
)
388 /* If there are no advertised features, we don't use the
389 HWDEBUG interface and try the DEBUGREG interface instead.
390 It shouldn't be necessary to do this, however, when the
391 kernel is configured without CONFIG_HW_BREAKPOINTS (selected
392 by CONFIG_PERF_EVENTS), there is a bug that causes
393 watchpoints installed with the HWDEBUG interface not to
394 trigger. When this is the case, features will be zero,
395 which we use as an indicator to fall back to the DEBUGREG
397 if (m_hwdebug_info
.features
!= 0)
399 m_interface
.emplace (HWDEBUG
);
406 /* EIO indicates that the request is invalid, so we try DEBUGREG
407 next. Technically, it can also indicate other failures, but we
408 can't differentiate those.
410 Other errors could happen for various reasons. We could get an
411 ESRCH if the traced thread was killed by a signal. Trying to
412 detect the interface with another thread in the future would be
413 complicated, as callers would have to handle an "unknown
414 interface" case. It's also unclear if raising an exception
417 Other errors, such as ENODEV, could be more permanent and cause
418 a failure for any thread.
420 For simplicity, with all errors other than EIO, we set the
421 interface to UNAVAILABLE and don't try DEBUGREG. If DEBUGREG
422 fails too, we'll also set the interface to UNAVAILABLE. It's
423 unlikely that trying the DEBUGREG interface with this same thread
424 would work, for errors other than EIO. This means that these
425 errors will cause hardware watchpoints and breakpoints to become
426 unavailable throughout a GDB session. */
428 if (no_features
|| errno
== EIO
)
432 if (ptrace (PTRACE_GET_DEBUGREG
, ptid
.lwp (), 0, &wp
) >= 0)
434 m_interface
.emplace (DEBUGREG
);
440 warning (_("Error when detecting the debug register interface. "
441 "Debug registers will be unavailable."));
443 m_interface
.emplace (UNAVAILABLE
);
449 /* HWDEBUG represents the set of calls PPC_PTRACE_GETHWDBGINFO,
450 PPC_PTRACE_SETHWDEBUG and PPC_PTRACE_DELHWDEBUG.
452 DEBUGREG represents the set of calls PTRACE_SET_DEBUGREG and
455 UNAVAILABLE can indicate that the kernel doesn't support any of the
456 two sets of requests or that there was an error when we tried to
457 detect which interface is available. */
459 enum debug_reg_interface
466 /* The interface option. Initialized if has_value () returns true. */
467 gdb::optional
<enum debug_reg_interface
> m_interface
;
469 /* The info returned by the kernel with PPC_PTRACE_GETHWDBGINFO. Only
470 valid if we determined that the interface is HWDEBUG. */
471 struct ppc_debug_info m_hwdebug_info
;
474 /* Per-process information. This includes the hardware watchpoints and
475 breakpoints that GDB requested to this target. */
477 struct ppc_linux_process_info
479 /* The list of hardware watchpoints and breakpoints that GDB requested
482 Only used when the interface is HWDEBUG. */
483 std::list
<struct ppc_hw_breakpoint
> requested_hw_bps
;
485 /* The watchpoint value that GDB requested for this process.
487 Only used when the interface is DEBUGREG. */
488 gdb::optional
<long> requested_wp_val
;
491 struct ppc_linux_nat_target final
: public linux_nat_target
493 /* Add our register access methods. */
494 void fetch_registers (struct regcache
*, int) override
;
495 void store_registers (struct regcache
*, int) override
;
497 /* Add our breakpoint/watchpoint methods. */
498 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
500 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
503 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
506 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
508 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
509 struct expression
*) override
;
511 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
512 struct expression
*) override
;
514 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
517 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
520 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
522 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
525 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
527 int ranged_break_num_registers () override
;
529 const struct target_desc
*read_description () override
;
531 int auxv_parse (const gdb_byte
**readptr
,
532 const gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
535 /* Override linux_nat_target low methods. */
536 bool low_stopped_by_watchpoint () override
;
538 bool low_stopped_data_address (CORE_ADDR
*) override
;
540 void low_new_thread (struct lwp_info
*lp
) override
;
542 void low_delete_thread (arch_lwp_info
*) override
;
544 void low_new_fork (struct lwp_info
*, pid_t
) override
;
546 void low_new_clone (struct lwp_info
*, pid_t
) override
;
548 void low_forget_process (pid_t pid
) override
;
550 void low_prepare_to_resume (struct lwp_info
*) override
;
554 void copy_thread_dreg_state (const ptid_t
&parent_ptid
,
555 const ptid_t
&child_ptid
);
557 void mark_thread_stale (struct lwp_info
*lp
);
559 void mark_debug_registers_changed (pid_t pid
);
561 void register_hw_breakpoint (pid_t pid
,
562 const struct ppc_hw_breakpoint
&bp
);
564 void clear_hw_breakpoint (pid_t pid
,
565 const struct ppc_hw_breakpoint
&a
);
567 void register_wp (pid_t pid
, long wp_value
);
569 void clear_wp (pid_t pid
);
571 bool can_use_watchpoint_cond_accel (void);
573 void calculate_dvc (CORE_ADDR addr
, int len
,
574 CORE_ADDR data_value
,
575 uint32_t *condition_mode
,
576 uint64_t *condition_value
);
578 int check_condition (CORE_ADDR watch_addr
,
579 struct expression
*cond
,
580 CORE_ADDR
*data_value
, int *len
);
582 int num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
);
584 int get_trigger_type (enum target_hw_bp_type type
);
586 void create_watchpoint_request (struct ppc_hw_breakpoint
*p
,
589 enum target_hw_bp_type type
,
590 struct expression
*cond
,
593 bool hwdebug_point_cmp (const struct ppc_hw_breakpoint
&a
,
594 const struct ppc_hw_breakpoint
&b
);
596 void init_arch_lwp_info (struct lwp_info
*lp
);
598 arch_lwp_info
*get_arch_lwp_info (struct lwp_info
*lp
);
600 /* The ptrace interface we'll use to install hardware watchpoints and
601 breakpoints (debug registers). */
602 ppc_linux_dreg_interface m_dreg_interface
;
604 /* A map from pids to structs containing info specific to each
606 std::unordered_map
<pid_t
, ppc_linux_process_info
> m_process_info
;
608 /* Callable object to hash ptids by their lwp number. */
611 std::size_t operator() (const ptid_t
&ptid
) const
613 return std::hash
<long>{} (ptid
.lwp ());
617 /* A map from ptid_t objects to a list of pairs of slots and hardware
618 breakpoint objects. This keeps track of which hardware breakpoints
619 and watchpoints were last installed in each slot of each thread.
621 Only used when the interface is HWDEBUG. */
622 std::unordered_map
<ptid_t
,
623 std::list
<std::pair
<long, ppc_hw_breakpoint
>>,
624 ptid_hash
> m_installed_hw_bps
;
627 static ppc_linux_nat_target the_ppc_linux_nat_target
;
629 /* registers layout, as presented by the ptrace interface:
630 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
631 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
632 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
633 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
634 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
635 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
636 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
637 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
638 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
639 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
640 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
641 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
642 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
645 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
648 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
649 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
650 interface, and not the wordsize of the program's ABI. */
651 int wordsize
= sizeof (long);
653 /* General purpose registers occupy 1 slot each in the buffer. */
654 if (regno
>= tdep
->ppc_gp0_regnum
655 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
656 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
658 /* Floating point regs: eight bytes each in both 32- and 64-bit
659 ptrace interfaces. Thus, two slots each in 32-bit interface, one
660 slot each in 64-bit interface. */
661 if (tdep
->ppc_fp0_regnum
>= 0
662 && regno
>= tdep
->ppc_fp0_regnum
663 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
664 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
666 /* UISA special purpose registers: 1 slot each. */
667 if (regno
== gdbarch_pc_regnum (gdbarch
))
668 u_addr
= PT_NIP
* wordsize
;
669 if (regno
== tdep
->ppc_lr_regnum
)
670 u_addr
= PT_LNK
* wordsize
;
671 if (regno
== tdep
->ppc_cr_regnum
)
672 u_addr
= PT_CCR
* wordsize
;
673 if (regno
== tdep
->ppc_xer_regnum
)
674 u_addr
= PT_XER
* wordsize
;
675 if (regno
== tdep
->ppc_ctr_regnum
)
676 u_addr
= PT_CTR
* wordsize
;
678 if (regno
== tdep
->ppc_mq_regnum
)
679 u_addr
= PT_MQ
* wordsize
;
681 if (regno
== tdep
->ppc_ps_regnum
)
682 u_addr
= PT_MSR
* wordsize
;
683 if (regno
== PPC_ORIG_R3_REGNUM
)
684 u_addr
= PT_ORIG_R3
* wordsize
;
685 if (regno
== PPC_TRAP_REGNUM
)
686 u_addr
= PT_TRAP
* wordsize
;
687 if (tdep
->ppc_fpscr_regnum
>= 0
688 && regno
== tdep
->ppc_fpscr_regnum
)
690 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
691 kernel headers incorrectly contained the 32-bit definition of
692 PT_FPSCR. For the 32-bit definition, floating-point
693 registers occupy two 32-bit "slots", and the FPSCR lives in
694 the second half of such a slot-pair (hence +1). For 64-bit,
695 the FPSCR instead occupies the full 64-bit 2-word-slot and
696 hence no adjustment is necessary. Hack around this. */
697 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
698 u_addr
= (48 + 32) * wordsize
;
699 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
700 slot and not just its second word. The PT_FPSCR supplied when
701 GDB is compiled as a 32-bit app doesn't reflect this. */
702 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
703 && PT_FPSCR
== (48 + 2*32 + 1))
704 u_addr
= (48 + 2*32) * wordsize
;
706 u_addr
= PT_FPSCR
* wordsize
;
711 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
712 registers set mechanism, as opposed to the interface for all the
713 other registers, that stores/fetches each register individually. */
715 fetch_vsx_registers (struct regcache
*regcache
, int tid
, int regno
)
718 gdb_vsxregset_t regs
;
719 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
721 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
726 have_ptrace_getsetvsxregs
= 0;
729 perror_with_name (_("Unable to fetch VSX registers"));
732 vsxregset
->supply_regset (vsxregset
, regcache
, regno
, ®s
,
733 PPC_LINUX_SIZEOF_VSXREGSET
);
736 /* The Linux kernel ptrace interface for AltiVec registers uses the
737 registers set mechanism, as opposed to the interface for all the
738 other registers, that stores/fetches each register individually. */
740 fetch_altivec_registers (struct regcache
*regcache
, int tid
,
745 struct gdbarch
*gdbarch
= regcache
->arch ();
746 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
748 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
753 have_ptrace_getvrregs
= 0;
756 perror_with_name (_("Unable to fetch AltiVec registers"));
759 vrregset
->supply_regset (vrregset
, regcache
, regno
, ®s
,
760 PPC_LINUX_SIZEOF_VRREGSET
);
763 /* Fetch the top 32 bits of TID's general-purpose registers and the
764 SPE-specific registers, and place the results in EVRREGSET. If we
765 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
768 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
769 PTRACE_SETEVRREGS requests are supported is isolated here, and in
770 set_spe_registers. */
772 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
774 if (have_ptrace_getsetevrregs
)
776 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
780 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
781 we just return zeros. */
783 have_ptrace_getsetevrregs
= 0;
785 /* Anything else needs to be reported. */
786 perror_with_name (_("Unable to fetch SPE registers"));
790 memset (evrregset
, 0, sizeof (*evrregset
));
793 /* Supply values from TID for SPE-specific raw registers: the upper
794 halves of the GPRs, the accumulator, and the spefscr. REGNO must
795 be the number of an upper half register, acc, spefscr, or -1 to
796 supply the values of all registers. */
798 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
800 struct gdbarch
*gdbarch
= regcache
->arch ();
801 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
802 struct gdb_evrregset_t evrregs
;
804 gdb_assert (sizeof (evrregs
.evr
[0])
805 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
806 gdb_assert (sizeof (evrregs
.acc
)
807 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
808 gdb_assert (sizeof (evrregs
.spefscr
)
809 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
811 get_spe_registers (tid
, &evrregs
);
817 for (i
= 0; i
< ppc_num_gprs
; i
++)
818 regcache
->raw_supply (tdep
->ppc_ev0_upper_regnum
+ i
, &evrregs
.evr
[i
]);
820 else if (tdep
->ppc_ev0_upper_regnum
<= regno
821 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
822 regcache
->raw_supply (regno
,
823 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
826 || regno
== tdep
->ppc_acc_regnum
)
827 regcache
->raw_supply (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
830 || regno
== tdep
->ppc_spefscr_regnum
)
831 regcache
->raw_supply (tdep
->ppc_spefscr_regnum
, &evrregs
.spefscr
);
834 /* Use ptrace to fetch all registers from the register set with note
835 type REGSET_ID, size REGSIZE, and layout described by REGSET, from
836 process/thread TID and supply their values to REGCACHE. If ptrace
837 returns ENODATA to indicate the regset is unavailable, mark the
838 registers as unavailable in REGCACHE. */
841 fetch_regset (struct regcache
*regcache
, int tid
,
842 int regset_id
, int regsetsize
, const struct regset
*regset
)
844 void *buf
= alloca (regsetsize
);
848 iov
.iov_len
= regsetsize
;
850 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
852 if (errno
== ENODATA
)
853 regset
->supply_regset (regset
, regcache
, -1, NULL
, regsetsize
);
855 perror_with_name (_("Couldn't get register set"));
858 regset
->supply_regset (regset
, regcache
, -1, buf
, regsetsize
);
861 /* Use ptrace to store register REGNUM of the regset with note type
862 REGSET_ID, size REGSETSIZE, and layout described by REGSET, from
863 REGCACHE back to process/thread TID. If REGNUM is -1 all registers
864 in the set are collected and stored. */
867 store_regset (const struct regcache
*regcache
, int tid
, int regnum
,
868 int regset_id
, int regsetsize
, const struct regset
*regset
)
870 void *buf
= alloca (regsetsize
);
874 iov
.iov_len
= regsetsize
;
876 /* Make sure that the buffer that will be stored has up to date values
877 for the registers that won't be collected. */
878 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) < 0)
879 perror_with_name (_("Couldn't get register set"));
881 regset
->collect_regset (regset
, regcache
, regnum
, buf
, regsetsize
);
883 if (ptrace (PTRACE_SETREGSET
, tid
, regset_id
, &iov
) < 0)
884 perror_with_name (_("Couldn't set register set"));
887 /* Check whether the kernel provides a register set with number
888 REGSET_ID of size REGSETSIZE for process/thread TID. */
891 check_regset (int tid
, int regset_id
, int regsetsize
)
893 void *buf
= alloca (regsetsize
);
897 iov
.iov_len
= regsetsize
;
899 if (ptrace (PTRACE_GETREGSET
, tid
, regset_id
, &iov
) >= 0
907 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
909 struct gdbarch
*gdbarch
= regcache
->arch ();
910 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
911 /* This isn't really an address. But ptrace thinks of it as one. */
912 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
913 int bytes_transferred
;
914 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
916 if (altivec_register_p (gdbarch
, regno
))
918 /* If this is the first time through, or if it is not the first
919 time through, and we have confirmed that there is kernel
920 support for such a ptrace request, then go and fetch the
922 if (have_ptrace_getvrregs
)
924 fetch_altivec_registers (regcache
, tid
, regno
);
927 /* If we have discovered that there is no ptrace support for
928 AltiVec registers, fall through and return zeroes, because
929 regaddr will be -1 in this case. */
931 else if (vsx_register_p (gdbarch
, regno
))
933 if (have_ptrace_getsetvsxregs
)
935 fetch_vsx_registers (regcache
, tid
, regno
);
939 else if (spe_register_p (gdbarch
, regno
))
941 fetch_spe_register (regcache
, tid
, regno
);
944 else if (regno
== PPC_DSCR_REGNUM
)
946 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
948 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
949 PPC_LINUX_SIZEOF_DSCRREGSET
,
950 &ppc32_linux_dscrregset
);
953 else if (regno
== PPC_PPR_REGNUM
)
955 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
957 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
958 PPC_LINUX_SIZEOF_PPRREGSET
,
959 &ppc32_linux_pprregset
);
962 else if (regno
== PPC_TAR_REGNUM
)
964 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
966 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
967 PPC_LINUX_SIZEOF_TARREGSET
,
968 &ppc32_linux_tarregset
);
971 else if (PPC_IS_EBB_REGNUM (regno
))
973 gdb_assert (tdep
->have_ebb
);
975 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
976 PPC_LINUX_SIZEOF_EBBREGSET
,
977 &ppc32_linux_ebbregset
);
980 else if (PPC_IS_PMU_REGNUM (regno
))
982 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
984 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
985 PPC_LINUX_SIZEOF_PMUREGSET
,
986 &ppc32_linux_pmuregset
);
989 else if (PPC_IS_TMSPR_REGNUM (regno
))
991 gdb_assert (tdep
->have_htm_spr
);
993 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
994 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
995 &ppc32_linux_tm_sprregset
);
998 else if (PPC_IS_CKPTGP_REGNUM (regno
))
1000 gdb_assert (tdep
->have_htm_core
);
1002 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
1003 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
1004 (tdep
->wordsize
== 4?
1005 PPC32_LINUX_SIZEOF_CGPRREGSET
1006 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
1010 else if (PPC_IS_CKPTFP_REGNUM (regno
))
1012 gdb_assert (tdep
->have_htm_fpu
);
1014 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
1015 PPC_LINUX_SIZEOF_CFPRREGSET
,
1016 &ppc32_linux_cfprregset
);
1019 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
1021 gdb_assert (tdep
->have_htm_altivec
);
1023 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
1024 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
1025 PPC_LINUX_SIZEOF_CVMXREGSET
,
1029 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
1031 gdb_assert (tdep
->have_htm_vsx
);
1033 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
1034 PPC_LINUX_SIZEOF_CVSXREGSET
,
1035 &ppc32_linux_cvsxregset
);
1038 else if (regno
== PPC_CPPR_REGNUM
)
1040 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
1042 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
1043 PPC_LINUX_SIZEOF_CPPRREGSET
,
1044 &ppc32_linux_cpprregset
);
1047 else if (regno
== PPC_CDSCR_REGNUM
)
1049 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
1051 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
1052 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1053 &ppc32_linux_cdscrregset
);
1056 else if (regno
== PPC_CTAR_REGNUM
)
1058 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
1060 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
1061 PPC_LINUX_SIZEOF_CTARREGSET
,
1062 &ppc32_linux_ctarregset
);
1068 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
1069 regcache
->raw_supply (regno
, buf
);
1073 /* Read the raw register using sizeof(long) sized chunks. On a
1074 32-bit platform, 64-bit floating-point registers will require two
1076 for (bytes_transferred
= 0;
1077 bytes_transferred
< register_size (gdbarch
, regno
);
1078 bytes_transferred
+= sizeof (long))
1083 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
1084 regaddr
+= sizeof (long);
1088 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
1089 gdbarch_register_name (gdbarch
, regno
), regno
);
1090 perror_with_name (message
);
1092 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
1095 /* Now supply the register. Keep in mind that the regcache's idea
1096 of the register's size may not be a multiple of sizeof
1098 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1100 /* Little-endian values are always found at the left end of the
1101 bytes transferred. */
1102 regcache
->raw_supply (regno
, buf
);
1104 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1106 /* Big-endian values are found at the right end of the bytes
1108 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
1109 regcache
->raw_supply (regno
, buf
+ padding
);
1112 internal_error (_("fetch_register: unexpected byte order: %d"),
1113 gdbarch_byte_order (gdbarch
));
1116 /* This function actually issues the request to ptrace, telling
1117 it to get all general-purpose registers and put them into the
1120 If the ptrace request does not exist, this function returns 0
1121 and properly sets the have_ptrace_* flag. If the request fails,
1122 this function calls perror_with_name. Otherwise, if the request
1123 succeeds, then the regcache gets filled and 1 is returned. */
1125 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
1127 gdb_gregset_t gregset
;
1129 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1133 have_ptrace_getsetregs
= 0;
1136 perror_with_name (_("Couldn't get general-purpose registers"));
1139 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
1144 /* This is a wrapper for the fetch_all_gp_regs function. It is
1145 responsible for verifying if this target has the ptrace request
1146 that can be used to fetch all general-purpose registers at one
1147 shot. If it doesn't, then we should fetch them using the
1148 old-fashioned way, which is to iterate over the registers and
1149 request them one by one. */
1151 fetch_gp_regs (struct regcache
*regcache
, int tid
)
1153 struct gdbarch
*gdbarch
= regcache
->arch ();
1154 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
1157 if (have_ptrace_getsetregs
)
1158 if (fetch_all_gp_regs (regcache
, tid
))
1161 /* If we've hit this point, it doesn't really matter which
1162 architecture we are using. We just need to read the
1163 registers in the "old-fashioned way". */
1164 for (i
= 0; i
< ppc_num_gprs
; i
++)
1165 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1168 /* This function actually issues the request to ptrace, telling
1169 it to get all floating-point registers and put them into the
1172 If the ptrace request does not exist, this function returns 0
1173 and properly sets the have_ptrace_* flag. If the request fails,
1174 this function calls perror_with_name. Otherwise, if the request
1175 succeeds, then the regcache gets filled and 1 is returned. */
1177 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
1179 gdb_fpregset_t fpregs
;
1181 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1185 have_ptrace_getsetfpregs
= 0;
1188 perror_with_name (_("Couldn't get floating-point registers"));
1191 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
1196 /* This is a wrapper for the fetch_all_fp_regs function. It is
1197 responsible for verifying if this target has the ptrace request
1198 that can be used to fetch all floating-point registers at one
1199 shot. If it doesn't, then we should fetch them using the
1200 old-fashioned way, which is to iterate over the registers and
1201 request them one by one. */
1203 fetch_fp_regs (struct regcache
*regcache
, int tid
)
1205 struct gdbarch
*gdbarch
= regcache
->arch ();
1206 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
1209 if (have_ptrace_getsetfpregs
)
1210 if (fetch_all_fp_regs (regcache
, tid
))
1213 /* If we've hit this point, it doesn't really matter which
1214 architecture we are using. We just need to read the
1215 registers in the "old-fashioned way". */
1216 for (i
= 0; i
< ppc_num_fprs
; i
++)
1217 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1221 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
1223 struct gdbarch
*gdbarch
= regcache
->arch ();
1224 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
1226 fetch_gp_regs (regcache
, tid
);
1227 if (tdep
->ppc_fp0_regnum
>= 0)
1228 fetch_fp_regs (regcache
, tid
);
1229 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1230 if (tdep
->ppc_ps_regnum
!= -1)
1231 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1232 if (tdep
->ppc_cr_regnum
!= -1)
1233 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1234 if (tdep
->ppc_lr_regnum
!= -1)
1235 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1236 if (tdep
->ppc_ctr_regnum
!= -1)
1237 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1238 if (tdep
->ppc_xer_regnum
!= -1)
1239 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1240 if (tdep
->ppc_mq_regnum
!= -1)
1241 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1242 if (ppc_linux_trap_reg_p (gdbarch
))
1244 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1245 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1247 if (tdep
->ppc_fpscr_regnum
!= -1)
1248 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1249 if (have_ptrace_getvrregs
)
1250 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1251 fetch_altivec_registers (regcache
, tid
, -1);
1252 if (have_ptrace_getsetvsxregs
)
1253 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1254 fetch_vsx_registers (regcache
, tid
, -1);
1255 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1256 fetch_spe_register (regcache
, tid
, -1);
1257 if (tdep
->ppc_ppr_regnum
!= -1)
1258 fetch_regset (regcache
, tid
, NT_PPC_PPR
,
1259 PPC_LINUX_SIZEOF_PPRREGSET
,
1260 &ppc32_linux_pprregset
);
1261 if (tdep
->ppc_dscr_regnum
!= -1)
1262 fetch_regset (regcache
, tid
, NT_PPC_DSCR
,
1263 PPC_LINUX_SIZEOF_DSCRREGSET
,
1264 &ppc32_linux_dscrregset
);
1265 if (tdep
->ppc_tar_regnum
!= -1)
1266 fetch_regset (regcache
, tid
, NT_PPC_TAR
,
1267 PPC_LINUX_SIZEOF_TARREGSET
,
1268 &ppc32_linux_tarregset
);
1270 fetch_regset (regcache
, tid
, NT_PPC_EBB
,
1271 PPC_LINUX_SIZEOF_EBBREGSET
,
1272 &ppc32_linux_ebbregset
);
1273 if (tdep
->ppc_mmcr0_regnum
!= -1)
1274 fetch_regset (regcache
, tid
, NT_PPC_PMU
,
1275 PPC_LINUX_SIZEOF_PMUREGSET
,
1276 &ppc32_linux_pmuregset
);
1277 if (tdep
->have_htm_spr
)
1278 fetch_regset (regcache
, tid
, NT_PPC_TM_SPR
,
1279 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1280 &ppc32_linux_tm_sprregset
);
1281 if (tdep
->have_htm_core
)
1283 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
1284 fetch_regset (regcache
, tid
, NT_PPC_TM_CGPR
,
1285 (tdep
->wordsize
== 4?
1286 PPC32_LINUX_SIZEOF_CGPRREGSET
1287 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
1290 if (tdep
->have_htm_fpu
)
1291 fetch_regset (regcache
, tid
, NT_PPC_TM_CFPR
,
1292 PPC_LINUX_SIZEOF_CFPRREGSET
,
1293 &ppc32_linux_cfprregset
);
1294 if (tdep
->have_htm_altivec
)
1296 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
1297 fetch_regset (regcache
, tid
, NT_PPC_TM_CVMX
,
1298 PPC_LINUX_SIZEOF_CVMXREGSET
,
1301 if (tdep
->have_htm_vsx
)
1302 fetch_regset (regcache
, tid
, NT_PPC_TM_CVSX
,
1303 PPC_LINUX_SIZEOF_CVSXREGSET
,
1304 &ppc32_linux_cvsxregset
);
1305 if (tdep
->ppc_cppr_regnum
!= -1)
1306 fetch_regset (regcache
, tid
, NT_PPC_TM_CPPR
,
1307 PPC_LINUX_SIZEOF_CPPRREGSET
,
1308 &ppc32_linux_cpprregset
);
1309 if (tdep
->ppc_cdscr_regnum
!= -1)
1310 fetch_regset (regcache
, tid
, NT_PPC_TM_CDSCR
,
1311 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1312 &ppc32_linux_cdscrregset
);
1313 if (tdep
->ppc_ctar_regnum
!= -1)
1314 fetch_regset (regcache
, tid
, NT_PPC_TM_CTAR
,
1315 PPC_LINUX_SIZEOF_CTARREGSET
,
1316 &ppc32_linux_ctarregset
);
1319 /* Fetch registers from the child process. Fetch all registers if
1320 regno == -1, otherwise fetch all general registers or all floating
1321 point registers depending upon the value of regno. */
1323 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
1325 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
1328 fetch_ppc_registers (regcache
, tid
);
1330 fetch_register (regcache
, tid
, regno
);
1334 store_vsx_registers (const struct regcache
*regcache
, int tid
, int regno
)
1337 gdb_vsxregset_t regs
;
1338 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
1340 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
1345 have_ptrace_getsetvsxregs
= 0;
1348 perror_with_name (_("Unable to fetch VSX registers"));
1351 vsxregset
->collect_regset (vsxregset
, regcache
, regno
, ®s
,
1352 PPC_LINUX_SIZEOF_VSXREGSET
);
1354 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
1356 perror_with_name (_("Unable to store VSX registers"));
1360 store_altivec_registers (const struct regcache
*regcache
, int tid
,
1364 gdb_vrregset_t regs
;
1365 struct gdbarch
*gdbarch
= regcache
->arch ();
1366 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
1368 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
1373 have_ptrace_getvrregs
= 0;
1376 perror_with_name (_("Unable to fetch AltiVec registers"));
1379 vrregset
->collect_regset (vrregset
, regcache
, regno
, ®s
,
1380 PPC_LINUX_SIZEOF_VRREGSET
);
1382 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
1384 perror_with_name (_("Unable to store AltiVec registers"));
1387 /* Assuming TID refers to an SPE process, set the top halves of TID's
1388 general-purpose registers and its SPE-specific registers to the
1389 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
1392 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
1393 PTRACE_SETEVRREGS requests are supported is isolated here, and in
1394 get_spe_registers. */
1396 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
1398 if (have_ptrace_getsetevrregs
)
1400 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
1404 /* EIO means that the PTRACE_SETEVRREGS request isn't
1405 supported; we fail silently, and don't try the call
1408 have_ptrace_getsetevrregs
= 0;
1410 /* Anything else needs to be reported. */
1411 perror_with_name (_("Unable to set SPE registers"));
1416 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
1417 If REGNO is -1, write the values of all the SPE-specific
1420 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
1422 struct gdbarch
*gdbarch
= regcache
->arch ();
1423 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
1424 struct gdb_evrregset_t evrregs
;
1426 gdb_assert (sizeof (evrregs
.evr
[0])
1427 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
1428 gdb_assert (sizeof (evrregs
.acc
)
1429 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
1430 gdb_assert (sizeof (evrregs
.spefscr
)
1431 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
1434 /* Since we're going to write out every register, the code below
1435 should store to every field of evrregs; if that doesn't happen,
1436 make it obvious by initializing it with suspicious values. */
1437 memset (&evrregs
, 42, sizeof (evrregs
));
1439 /* We can only read and write the entire EVR register set at a
1440 time, so to write just a single register, we do a
1441 read-modify-write maneuver. */
1442 get_spe_registers (tid
, &evrregs
);
1448 for (i
= 0; i
< ppc_num_gprs
; i
++)
1449 regcache
->raw_collect (tdep
->ppc_ev0_upper_regnum
+ i
,
1452 else if (tdep
->ppc_ev0_upper_regnum
<= regno
1453 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
1454 regcache
->raw_collect (regno
,
1455 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
1458 || regno
== tdep
->ppc_acc_regnum
)
1459 regcache
->raw_collect (tdep
->ppc_acc_regnum
,
1463 || regno
== tdep
->ppc_spefscr_regnum
)
1464 regcache
->raw_collect (tdep
->ppc_spefscr_regnum
,
1467 /* Write back the modified register set. */
1468 set_spe_registers (tid
, &evrregs
);
1472 store_register (const struct regcache
*regcache
, int tid
, int regno
)
1474 struct gdbarch
*gdbarch
= regcache
->arch ();
1475 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
1476 /* This isn't really an address. But ptrace thinks of it as one. */
1477 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
1479 size_t bytes_to_transfer
;
1480 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
1482 if (altivec_register_p (gdbarch
, regno
))
1484 store_altivec_registers (regcache
, tid
, regno
);
1487 else if (vsx_register_p (gdbarch
, regno
))
1489 store_vsx_registers (regcache
, tid
, regno
);
1492 else if (spe_register_p (gdbarch
, regno
))
1494 store_spe_register (regcache
, tid
, regno
);
1497 else if (regno
== PPC_DSCR_REGNUM
)
1499 gdb_assert (tdep
->ppc_dscr_regnum
!= -1);
1501 store_regset (regcache
, tid
, regno
, NT_PPC_DSCR
,
1502 PPC_LINUX_SIZEOF_DSCRREGSET
,
1503 &ppc32_linux_dscrregset
);
1506 else if (regno
== PPC_PPR_REGNUM
)
1508 gdb_assert (tdep
->ppc_ppr_regnum
!= -1);
1510 store_regset (regcache
, tid
, regno
, NT_PPC_PPR
,
1511 PPC_LINUX_SIZEOF_PPRREGSET
,
1512 &ppc32_linux_pprregset
);
1515 else if (regno
== PPC_TAR_REGNUM
)
1517 gdb_assert (tdep
->ppc_tar_regnum
!= -1);
1519 store_regset (regcache
, tid
, regno
, NT_PPC_TAR
,
1520 PPC_LINUX_SIZEOF_TARREGSET
,
1521 &ppc32_linux_tarregset
);
1524 else if (PPC_IS_EBB_REGNUM (regno
))
1526 gdb_assert (tdep
->have_ebb
);
1528 store_regset (regcache
, tid
, regno
, NT_PPC_EBB
,
1529 PPC_LINUX_SIZEOF_EBBREGSET
,
1530 &ppc32_linux_ebbregset
);
1533 else if (PPC_IS_PMU_REGNUM (regno
))
1535 gdb_assert (tdep
->ppc_mmcr0_regnum
!= -1);
1537 store_regset (regcache
, tid
, regno
, NT_PPC_PMU
,
1538 PPC_LINUX_SIZEOF_PMUREGSET
,
1539 &ppc32_linux_pmuregset
);
1542 else if (PPC_IS_TMSPR_REGNUM (regno
))
1544 gdb_assert (tdep
->have_htm_spr
);
1546 store_regset (regcache
, tid
, regno
, NT_PPC_TM_SPR
,
1547 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1548 &ppc32_linux_tm_sprregset
);
1551 else if (PPC_IS_CKPTGP_REGNUM (regno
))
1553 gdb_assert (tdep
->have_htm_core
);
1555 const struct regset
*cgprregset
= ppc_linux_cgprregset (gdbarch
);
1556 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CGPR
,
1557 (tdep
->wordsize
== 4?
1558 PPC32_LINUX_SIZEOF_CGPRREGSET
1559 : PPC64_LINUX_SIZEOF_CGPRREGSET
),
1563 else if (PPC_IS_CKPTFP_REGNUM (regno
))
1565 gdb_assert (tdep
->have_htm_fpu
);
1567 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CFPR
,
1568 PPC_LINUX_SIZEOF_CFPRREGSET
,
1569 &ppc32_linux_cfprregset
);
1572 else if (PPC_IS_CKPTVMX_REGNUM (regno
))
1574 gdb_assert (tdep
->have_htm_altivec
);
1576 const struct regset
*cvmxregset
= ppc_linux_cvmxregset (gdbarch
);
1577 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVMX
,
1578 PPC_LINUX_SIZEOF_CVMXREGSET
,
1582 else if (PPC_IS_CKPTVSX_REGNUM (regno
))
1584 gdb_assert (tdep
->have_htm_vsx
);
1586 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CVSX
,
1587 PPC_LINUX_SIZEOF_CVSXREGSET
,
1588 &ppc32_linux_cvsxregset
);
1591 else if (regno
== PPC_CPPR_REGNUM
)
1593 gdb_assert (tdep
->ppc_cppr_regnum
!= -1);
1595 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CPPR
,
1596 PPC_LINUX_SIZEOF_CPPRREGSET
,
1597 &ppc32_linux_cpprregset
);
1600 else if (regno
== PPC_CDSCR_REGNUM
)
1602 gdb_assert (tdep
->ppc_cdscr_regnum
!= -1);
1604 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CDSCR
,
1605 PPC_LINUX_SIZEOF_CDSCRREGSET
,
1606 &ppc32_linux_cdscrregset
);
1609 else if (regno
== PPC_CTAR_REGNUM
)
1611 gdb_assert (tdep
->ppc_ctar_regnum
!= -1);
1613 store_regset (regcache
, tid
, regno
, NT_PPC_TM_CTAR
,
1614 PPC_LINUX_SIZEOF_CTARREGSET
,
1615 &ppc32_linux_ctarregset
);
1622 /* First collect the register. Keep in mind that the regcache's
1623 idea of the register's size may not be a multiple of sizeof
1625 memset (buf
, 0, sizeof buf
);
1626 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
1627 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
1629 /* Little-endian values always sit at the left end of the buffer. */
1630 regcache
->raw_collect (regno
, buf
);
1632 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
1634 /* Big-endian values sit at the right end of the buffer. */
1635 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
1636 regcache
->raw_collect (regno
, buf
+ padding
);
1639 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
1643 memcpy (&l
, &buf
[i
], sizeof (l
));
1645 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
1646 regaddr
+= sizeof (long);
1649 && (regno
== tdep
->ppc_fpscr_regnum
1650 || regno
== PPC_ORIG_R3_REGNUM
1651 || regno
== PPC_TRAP_REGNUM
))
1653 /* Some older kernel versions don't allow fpscr, orig_r3
1654 or trap to be written. */
1661 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
1662 gdbarch_register_name (gdbarch
, regno
), regno
);
1663 perror_with_name (message
);
1668 /* This function actually issues the request to ptrace, telling
1669 it to store all general-purpose registers present in the specified
1672 If the ptrace request does not exist, this function returns 0
1673 and properly sets the have_ptrace_* flag. If the request fails,
1674 this function calls perror_with_name. Otherwise, if the request
1675 succeeds, then the regcache is stored and 1 is returned. */
1677 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1679 gdb_gregset_t gregset
;
1681 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1685 have_ptrace_getsetregs
= 0;
1688 perror_with_name (_("Couldn't get general-purpose registers"));
1691 fill_gregset (regcache
, &gregset
, regno
);
1693 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1697 have_ptrace_getsetregs
= 0;
1700 perror_with_name (_("Couldn't set general-purpose registers"));
1706 /* This is a wrapper for the store_all_gp_regs function. It is
1707 responsible for verifying if this target has the ptrace request
1708 that can be used to store all general-purpose registers at one
1709 shot. If it doesn't, then we should store them using the
1710 old-fashioned way, which is to iterate over the registers and
1711 store them one by one. */
1713 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1715 struct gdbarch
*gdbarch
= regcache
->arch ();
1716 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
1719 if (have_ptrace_getsetregs
)
1720 if (store_all_gp_regs (regcache
, tid
, regno
))
1723 /* If we hit this point, it doesn't really matter which
1724 architecture we are using. We just need to store the
1725 registers in the "old-fashioned way". */
1726 for (i
= 0; i
< ppc_num_gprs
; i
++)
1727 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1730 /* This function actually issues the request to ptrace, telling
1731 it to store all floating-point registers present in the specified
1734 If the ptrace request does not exist, this function returns 0
1735 and properly sets the have_ptrace_* flag. If the request fails,
1736 this function calls perror_with_name. Otherwise, if the request
1737 succeeds, then the regcache is stored and 1 is returned. */
1739 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1741 gdb_fpregset_t fpregs
;
1743 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1747 have_ptrace_getsetfpregs
= 0;
1750 perror_with_name (_("Couldn't get floating-point registers"));
1753 fill_fpregset (regcache
, &fpregs
, regno
);
1755 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1759 have_ptrace_getsetfpregs
= 0;
1762 perror_with_name (_("Couldn't set floating-point registers"));
1768 /* This is a wrapper for the store_all_fp_regs function. It is
1769 responsible for verifying if this target has the ptrace request
1770 that can be used to store all floating-point registers at one
1771 shot. If it doesn't, then we should store them using the
1772 old-fashioned way, which is to iterate over the registers and
1773 store them one by one. */
1775 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1777 struct gdbarch
*gdbarch
= regcache
->arch ();
1778 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
1781 if (have_ptrace_getsetfpregs
)
1782 if (store_all_fp_regs (regcache
, tid
, regno
))
1785 /* If we hit this point, it doesn't really matter which
1786 architecture we are using. We just need to store the
1787 registers in the "old-fashioned way". */
1788 for (i
= 0; i
< ppc_num_fprs
; i
++)
1789 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1793 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1795 struct gdbarch
*gdbarch
= regcache
->arch ();
1796 ppc_gdbarch_tdep
*tdep
= gdbarch_tdep
<ppc_gdbarch_tdep
> (gdbarch
);
1798 store_gp_regs (regcache
, tid
, -1);
1799 if (tdep
->ppc_fp0_regnum
>= 0)
1800 store_fp_regs (regcache
, tid
, -1);
1801 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1802 if (tdep
->ppc_ps_regnum
!= -1)
1803 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1804 if (tdep
->ppc_cr_regnum
!= -1)
1805 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1806 if (tdep
->ppc_lr_regnum
!= -1)
1807 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1808 if (tdep
->ppc_ctr_regnum
!= -1)
1809 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1810 if (tdep
->ppc_xer_regnum
!= -1)
1811 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1812 if (tdep
->ppc_mq_regnum
!= -1)
1813 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1814 if (tdep
->ppc_fpscr_regnum
!= -1)
1815 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1816 if (ppc_linux_trap_reg_p (gdbarch
))
1818 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1819 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1821 if (have_ptrace_getvrregs
)
1822 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1823 store_altivec_registers (regcache
, tid
, -1);
1824 if (have_ptrace_getsetvsxregs
)
1825 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1826 store_vsx_registers (regcache
, tid
, -1);
1827 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1828 store_spe_register (regcache
, tid
, -1);
1829 if (tdep
->ppc_ppr_regnum
!= -1)
1830 store_regset (regcache
, tid
, -1, NT_PPC_PPR
,
1831 PPC_LINUX_SIZEOF_PPRREGSET
,
1832 &ppc32_linux_pprregset
);
1833 if (tdep
->ppc_dscr_regnum
!= -1)
1834 store_regset (regcache
, tid
, -1, NT_PPC_DSCR
,
1835 PPC_LINUX_SIZEOF_DSCRREGSET
,
1836 &ppc32_linux_dscrregset
);
1837 if (tdep
->ppc_tar_regnum
!= -1)
1838 store_regset (regcache
, tid
, -1, NT_PPC_TAR
,
1839 PPC_LINUX_SIZEOF_TARREGSET
,
1840 &ppc32_linux_tarregset
);
1842 if (tdep
->ppc_mmcr0_regnum
!= -1)
1843 store_regset (regcache
, tid
, -1, NT_PPC_PMU
,
1844 PPC_LINUX_SIZEOF_PMUREGSET
,
1845 &ppc32_linux_pmuregset
);
1847 if (tdep
->have_htm_spr
)
1848 store_regset (regcache
, tid
, -1, NT_PPC_TM_SPR
,
1849 PPC_LINUX_SIZEOF_TM_SPRREGSET
,
1850 &ppc32_linux_tm_sprregset
);
1852 /* Because the EBB and checkpointed HTM registers can be
1853 unavailable, attempts to store them here would cause this
1854 function to fail most of the time, so we ignore them. */
1858 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
1860 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
1863 store_register (regcache
, tid
, regno
);
1865 store_ppc_registers (regcache
, tid
);
1868 /* Functions for transferring registers between a gregset_t or fpregset_t
1869 (see sys/ucontext.h) and gdb's regcache. The word size is that used
1870 by the ptrace interface, not the current program's ABI. Eg. if a
1871 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
1872 read or write 64-bit gregsets. This is to suit the host libthread_db. */
1875 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
1877 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
1879 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
1883 fill_gregset (const struct regcache
*regcache
,
1884 gdb_gregset_t
*gregsetp
, int regno
)
1886 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
1889 memset (gregsetp
, 0, sizeof (*gregsetp
));
1890 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
1894 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
1896 const struct regset
*regset
= ppc_linux_fpregset ();
1898 ppc_supply_fpregset (regset
, regcache
, -1,
1899 fpregsetp
, sizeof (*fpregsetp
));
1903 fill_fpregset (const struct regcache
*regcache
,
1904 gdb_fpregset_t
*fpregsetp
, int regno
)
1906 const struct regset
*regset
= ppc_linux_fpregset ();
1908 ppc_collect_fpregset (regset
, regcache
, regno
,
1909 fpregsetp
, sizeof (*fpregsetp
));
1913 ppc_linux_nat_target::auxv_parse (const gdb_byte
**readptr
,
1914 const gdb_byte
*endptr
, CORE_ADDR
*typep
,
1917 int tid
= inferior_ptid
.lwp ();
1919 tid
= inferior_ptid
.pid ();
1921 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
1923 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
1924 const gdb_byte
*ptr
= *readptr
;
1929 if (endptr
- ptr
< sizeof_auxv_field
* 2)
1932 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
1933 ptr
+= sizeof_auxv_field
;
1934 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
1935 ptr
+= sizeof_auxv_field
;
1941 const struct target_desc
*
1942 ppc_linux_nat_target::read_description ()
1944 int tid
= inferior_ptid
.pid ();
1946 if (have_ptrace_getsetevrregs
)
1948 struct gdb_evrregset_t evrregset
;
1950 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
1951 return tdesc_powerpc_e500l
;
1953 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
1954 Anything else needs to be reported. */
1955 else if (errno
!= EIO
)
1956 perror_with_name (_("Unable to fetch SPE registers"));
1959 struct ppc_linux_features features
= ppc_linux_no_features
;
1961 features
.wordsize
= ppc_linux_target_wordsize (tid
);
1963 CORE_ADDR hwcap
= linux_get_hwcap ();
1964 CORE_ADDR hwcap2
= linux_get_hwcap2 ();
1966 if (have_ptrace_getsetvsxregs
1967 && (hwcap
& PPC_FEATURE_HAS_VSX
))
1969 gdb_vsxregset_t vsxregset
;
1971 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
1972 features
.vsx
= true;
1974 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
1975 Anything else needs to be reported. */
1976 else if (errno
!= EIO
)
1977 perror_with_name (_("Unable to fetch VSX registers"));
1980 if (have_ptrace_getvrregs
1981 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
1983 gdb_vrregset_t vrregset
;
1985 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
1986 features
.altivec
= true;
1988 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
1989 Anything else needs to be reported. */
1990 else if (errno
!= EIO
)
1991 perror_with_name (_("Unable to fetch AltiVec registers"));
1994 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
1996 if ((hwcap2
& PPC_FEATURE2_DSCR
)
1997 && check_regset (tid
, NT_PPC_PPR
, PPC_LINUX_SIZEOF_PPRREGSET
)
1998 && check_regset (tid
, NT_PPC_DSCR
, PPC_LINUX_SIZEOF_DSCRREGSET
))
2000 features
.ppr_dscr
= true;
2001 if ((hwcap2
& PPC_FEATURE2_ARCH_2_07
)
2002 && (hwcap2
& PPC_FEATURE2_TAR
)
2003 && (hwcap2
& PPC_FEATURE2_EBB
)
2004 && check_regset (tid
, NT_PPC_TAR
, PPC_LINUX_SIZEOF_TARREGSET
)
2005 && check_regset (tid
, NT_PPC_EBB
, PPC_LINUX_SIZEOF_EBBREGSET
)
2006 && check_regset (tid
, NT_PPC_PMU
, PPC_LINUX_SIZEOF_PMUREGSET
))
2008 features
.isa207
= true;
2009 if ((hwcap2
& PPC_FEATURE2_HTM
)
2010 && check_regset (tid
, NT_PPC_TM_SPR
,
2011 PPC_LINUX_SIZEOF_TM_SPRREGSET
))
2012 features
.htm
= true;
2016 return ppc_linux_match_description (features
);
2019 /* Routines for installing hardware watchpoints and breakpoints. When
2020 GDB requests a hardware watchpoint or breakpoint to be installed, we
2021 register the request for the pid of inferior_ptid in a map with one
2022 entry per process. We then issue a stop request to all the threads of
2023 this process, and mark a per-thread flag indicating that their debug
2024 registers should be updated. Right before they are next resumed, we
2025 remove all previously installed debug registers and install all the
2026 ones GDB requested. We then update a map with one entry per thread
2027 that keeps track of what debug registers were last installed in each
2030 We use this second map to remove installed registers before installing
2031 the ones requested by GDB, and to copy the debug register state after
2032 a thread clones or forks, since depending on the kernel configuration,
2033 debug registers can be inherited. */
2035 /* Check if we support and have enough resources to install a hardware
2036 watchpoint or breakpoint. See the description in target.h. */
2039 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
,
2042 int total_hw_wp
, total_hw_bp
;
2044 m_dreg_interface
.detect (inferior_ptid
);
2046 if (m_dreg_interface
.unavailable_p ())
2049 if (m_dreg_interface
.hwdebug_p ())
2051 /* When PowerPC HWDEBUG ptrace interface is available, the number of
2052 available hardware watchpoints and breakpoints is stored at the
2053 hwdebug_info struct. */
2054 total_hw_bp
= m_dreg_interface
.hwdebug_info ().num_instruction_bps
;
2055 total_hw_wp
= m_dreg_interface
.hwdebug_info ().num_data_bps
;
2059 gdb_assert (m_dreg_interface
.debugreg_p ());
2061 /* With the DEBUGREG ptrace interface, we should consider having 1
2062 hardware watchpoint and no hardware breakpoints. */
2067 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
2068 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
2070 if (total_hw_wp
== 0)
2072 else if (cnt
+ ot
> total_hw_wp
)
2077 else if (type
== bp_hardware_breakpoint
)
2079 if (total_hw_bp
== 0)
2081 else if (cnt
> total_hw_bp
)
2090 /* Returns 1 if we can watch LEN bytes at address ADDR, 0 otherwise. */
2093 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
2095 /* Handle sub-8-byte quantities. */
2099 m_dreg_interface
.detect (inferior_ptid
);
2101 if (m_dreg_interface
.unavailable_p ())
2104 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
2105 restrictions for watchpoints in the processors. In that case, we use that
2106 information to determine the hardcoded watchable region for
2108 if (m_dreg_interface
.hwdebug_p ())
2110 const struct ppc_debug_info
&hwdebug_info
= (m_dreg_interface
2112 int region_size
= hwdebug_info
.data_bp_alignment
;
2113 int region_align
= region_size
;
2115 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
2116 watchpoints and can watch any access within an arbitrary memory
2117 region. This is useful to watch arrays and structs, for instance. It
2118 takes two hardware watchpoints though. */
2120 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
2121 && (linux_get_hwcap () & PPC_FEATURE_BOOKE
))
2123 /* Check if the processor provides DAWR interface. */
2124 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
2126 /* DAWR interface allows to watch up to 512 byte wide ranges. */
2128 /* DAWR interface allows to watch up to 512 byte wide ranges which
2129 can't cross a 512 byte boundary on machines that don't have a
2130 second DAWR (P9 or less). */
2131 if (!(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_ARCH_31
))
2134 /* Server processors provide one hardware watchpoint and addr+len should
2135 fall in the watchable region provided by the ptrace interface. */
2137 && (addr
+ len
> (addr
& ~(region_align
- 1)) + region_size
))
2140 /* addr+len must fall in the 8 byte watchable region for DABR-based
2141 processors (i.e., server processors). Without the new PowerPC HWDEBUG
2142 ptrace interface, DAC-based processors (i.e., embedded processors) will
2143 use addresses aligned to 4-bytes due to the way the read/write flags are
2144 passed in the old ptrace interface. */
2147 gdb_assert (m_dreg_interface
.debugreg_p ());
2149 if (((linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2150 && (addr
+ len
) > (addr
& ~3) + 4)
2151 || (addr
+ len
) > (addr
& ~7) + 8)
2158 /* This function compares two ppc_hw_breakpoint structs
2162 ppc_linux_nat_target::hwdebug_point_cmp (const struct ppc_hw_breakpoint
&a
,
2163 const struct ppc_hw_breakpoint
&b
)
2165 return (a
.trigger_type
== b
.trigger_type
2166 && a
.addr_mode
== b
.addr_mode
2167 && a
.condition_mode
== b
.condition_mode
2169 && a
.addr2
== b
.addr2
2170 && a
.condition_value
== b
.condition_value
);
2173 /* Return the number of registers needed for a ranged breakpoint. */
2176 ppc_linux_nat_target::ranged_break_num_registers ()
2178 m_dreg_interface
.detect (inferior_ptid
);
2180 return ((m_dreg_interface
.hwdebug_p ()
2181 && (m_dreg_interface
.hwdebug_info ().features
2182 & PPC_DEBUG_FEATURE_INSN_BP_RANGE
))?
2186 /* Register the hardware breakpoint described by BP_TGT, to be inserted
2187 when the threads of inferior_ptid are resumed. Returns 0 for success,
2188 or -1 if the HWDEBUG interface that we need for hardware breakpoints
2189 is not available. */
2192 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
2193 struct bp_target_info
*bp_tgt
)
2195 struct ppc_hw_breakpoint p
;
2197 m_dreg_interface
.detect (inferior_ptid
);
2199 if (!m_dreg_interface
.hwdebug_p ())
2202 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2203 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
2204 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2205 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
2206 p
.condition_value
= 0;
2210 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2212 /* The breakpoint will trigger if the address of the instruction is
2213 within the defined range, as follows: p.addr <= address < p.addr2. */
2214 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
2218 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2222 register_hw_breakpoint (inferior_ptid
.pid (), p
);
2227 /* Clear a registration for the hardware breakpoint given by type BP_TGT.
2228 It will be removed from the threads of inferior_ptid when they are
2229 next resumed. Returns 0 for success, or -1 if the HWDEBUG interface
2230 that we need for hardware breakpoints is not available. */
2233 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
2234 struct bp_target_info
*bp_tgt
)
2236 struct ppc_hw_breakpoint p
;
2238 m_dreg_interface
.detect (inferior_ptid
);
2240 if (!m_dreg_interface
.hwdebug_p ())
2243 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2244 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
2245 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2246 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
2247 p
.condition_value
= 0;
2251 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2253 /* The breakpoint will trigger if the address of the instruction is within
2254 the defined range, as follows: p.addr <= address < p.addr2. */
2255 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
2259 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2263 clear_hw_breakpoint (inferior_ptid
.pid (), p
);
2268 /* Return the trigger value to set in a ppc_hw_breakpoint object for a
2269 given hardware watchpoint TYPE. We assume type is not hw_execute. */
2272 ppc_linux_nat_target::get_trigger_type (enum target_hw_bp_type type
)
2276 if (type
== hw_read
)
2277 t
= PPC_BREAKPOINT_TRIGGER_READ
;
2278 else if (type
== hw_write
)
2279 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
2281 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
2286 /* Register a new masked watchpoint at ADDR using the mask MASK, to be
2287 inserted when the threads of inferior_ptid are resumed. RW may be
2288 hw_read for a read watchpoint, hw_write for a write watchpoint or
2289 hw_access for an access watchpoint. */
2292 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
2293 target_hw_bp_type rw
)
2295 struct ppc_hw_breakpoint p
;
2297 gdb_assert (m_dreg_interface
.hwdebug_p ());
2299 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2300 p
.trigger_type
= get_trigger_type (rw
);
2301 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
2302 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2305 p
.condition_value
= 0;
2307 register_hw_breakpoint (inferior_ptid
.pid (), p
);
2312 /* Clear a registration for a masked watchpoint at ADDR with the mask
2313 MASK. It will be removed from the threads of inferior_ptid when they
2314 are next resumed. RW may be hw_read for a read watchpoint, hw_write
2315 for a write watchpoint or hw_access for an access watchpoint. */
2318 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
2319 target_hw_bp_type rw
)
2321 struct ppc_hw_breakpoint p
;
2323 gdb_assert (m_dreg_interface
.hwdebug_p ());
2325 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
2326 p
.trigger_type
= get_trigger_type (rw
);
2327 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
2328 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2331 p
.condition_value
= 0;
2333 clear_hw_breakpoint (inferior_ptid
.pid (), p
);
2338 /* Check whether we have at least one free DVC register for the threads
2339 of the pid of inferior_ptid. */
2342 ppc_linux_nat_target::can_use_watchpoint_cond_accel (void)
2344 m_dreg_interface
.detect (inferior_ptid
);
2346 if (!m_dreg_interface
.hwdebug_p ())
2349 int cnt
= m_dreg_interface
.hwdebug_info ().num_condition_regs
;
2354 auto process_it
= m_process_info
.find (inferior_ptid
.pid ());
2356 /* No breakpoints or watchpoints have been requested for this process,
2357 we have at least one free DVC register. */
2358 if (process_it
== m_process_info
.end ())
2361 for (const ppc_hw_breakpoint
&bp
: process_it
->second
.requested_hw_bps
)
2362 if (bp
.condition_mode
!= PPC_BREAKPOINT_CONDITION_NONE
)
2371 /* Calculate the enable bits and the contents of the Data Value Compare
2372 debug register present in BookE processors.
2374 ADDR is the address to be watched, LEN is the length of watched data
2375 and DATA_VALUE is the value which will trigger the watchpoint.
2376 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
2377 CONDITION_VALUE will hold the value which should be put in the
2381 ppc_linux_nat_target::calculate_dvc (CORE_ADDR addr
, int len
,
2382 CORE_ADDR data_value
,
2383 uint32_t *condition_mode
,
2384 uint64_t *condition_value
)
2386 const struct ppc_debug_info
&hwdebug_info
= (m_dreg_interface
.
2389 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
2390 rightmost_enabled_byte
;
2391 CORE_ADDR addr_end_data
, addr_end_dvc
;
2393 /* The DVC register compares bytes within fixed-length windows which
2394 are word-aligned, with length equal to that of the DVC register.
2395 We need to calculate where our watch region is relative to that
2396 window and enable comparison of the bytes which fall within it. */
2398 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
2399 addr_end_data
= addr
+ len
;
2400 addr_end_dvc
= (addr
- align_offset
2401 + hwdebug_info
.sizeof_condition
);
2402 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
2403 addr_end_data
- addr_end_dvc
: 0;
2404 num_byte_enable
= len
- num_bytes_off_dvc
;
2405 /* Here, bytes are numbered from right to left. */
2406 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
2407 addr_end_dvc
- addr_end_data
: 0;
2409 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
2410 for (i
= 0; i
< num_byte_enable
; i
++)
2412 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
2414 /* Now we need to match the position within the DVC of the comparison
2415 value with where the watch region is relative to the window
2416 (i.e., the ALIGN_OFFSET). */
2418 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
2419 << rightmost_enabled_byte
* 8);
2422 /* Return the number of memory locations that need to be accessed to
2423 evaluate the expression which generated the given value chain.
2424 Returns -1 if there's any register access involved, or if there are
2425 other kinds of values which are not acceptable in a condition
2426 expression (e.g., lval_computed or lval_internalvar). */
2429 ppc_linux_nat_target::num_memory_accesses (const std::vector
<value_ref_ptr
>
2432 int found_memory_cnt
= 0;
2434 /* The idea here is that evaluating an expression generates a series
2435 of values, one holding the value of every subexpression. (The
2436 expression a*b+c has five subexpressions: a, b, a*b, c, and
2437 a*b+c.) GDB's values hold almost enough information to establish
2438 the criteria given above --- they identify memory lvalues,
2439 register lvalues, computed values, etcetera. So we can evaluate
2440 the expression, and then scan the chain of values that leaves
2441 behind to determine the memory locations involved in the evaluation
2444 However, I don't think that the values returned by inferior
2445 function calls are special in any way. So this function may not
2446 notice that an expression contains an inferior function call.
2449 for (const value_ref_ptr
&iter
: chain
)
2451 struct value
*v
= iter
.get ();
2453 /* Constants and values from the history are fine. */
2454 if (v
->lval () == not_lval
|| !v
->deprecated_modifiable ())
2456 else if (v
->lval () == lval_memory
)
2458 /* A lazy memory lvalue is one that GDB never needed to fetch;
2459 we either just used its address (e.g., `a' in `a.b') or
2460 we never needed it at all (e.g., `a' in `a,b'). */
2464 /* Other kinds of values are not fine. */
2469 return found_memory_cnt
;
2472 /* Verifies whether the expression COND can be implemented using the
2473 DVC (Data Value Compare) register in BookE processors. The expression
2474 must test the watch value for equality with a constant expression.
2475 If the function returns 1, DATA_VALUE will contain the constant against
2476 which the watch value should be compared and LEN will contain the size
2480 ppc_linux_nat_target::check_condition (CORE_ADDR watch_addr
,
2481 struct expression
*cond
,
2482 CORE_ADDR
*data_value
, int *len
)
2484 int num_accesses_left
, num_accesses_right
;
2485 struct value
*left_val
, *right_val
;
2486 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
2488 expr::equal_operation
*eqop
2489 = dynamic_cast<expr::equal_operation
*> (cond
->op
.get ());
2490 if (eqop
== nullptr)
2492 expr::operation
*lhs
= eqop
->get_lhs ();
2493 expr::operation
*rhs
= eqop
->get_rhs ();
2495 fetch_subexp_value (cond
, lhs
, &left_val
, NULL
, &left_chain
, false);
2496 num_accesses_left
= num_memory_accesses (left_chain
);
2498 if (left_val
== NULL
|| num_accesses_left
< 0)
2501 fetch_subexp_value (cond
, rhs
, &right_val
, NULL
, &right_chain
, false);
2502 num_accesses_right
= num_memory_accesses (right_chain
);
2504 if (right_val
== NULL
|| num_accesses_right
< 0)
2507 if (num_accesses_left
== 1 && num_accesses_right
== 0
2508 && left_val
->lval () == lval_memory
2509 && left_val
->address () == watch_addr
)
2511 *data_value
= value_as_long (right_val
);
2513 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
2514 the same type as the memory region referenced by LEFT_VAL. */
2515 *len
= check_typedef (left_val
->type ())->length ();
2517 else if (num_accesses_left
== 0 && num_accesses_right
== 1
2518 && right_val
->lval () == lval_memory
2519 && right_val
->address () == watch_addr
)
2521 *data_value
= value_as_long (left_val
);
2523 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
2524 the same type as the memory region referenced by RIGHT_VAL. */
2525 *len
= check_typedef (right_val
->type ())->length ();
2533 /* Return true if the target is capable of using hardware to evaluate the
2534 condition expression, thus only triggering the watchpoint when it is
2538 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
,
2540 struct expression
*cond
)
2542 CORE_ADDR data_value
;
2544 m_dreg_interface
.detect (inferior_ptid
);
2546 return (m_dreg_interface
.hwdebug_p ()
2547 && (m_dreg_interface
.hwdebug_info ().num_condition_regs
> 0)
2548 && check_condition (addr
, cond
, &data_value
, &len
));
2551 /* Set up P with the parameters necessary to request a watchpoint covering
2552 LEN bytes starting at ADDR and if possible with condition expression COND
2553 evaluated by hardware. INSERT tells if we are creating a request for
2554 inserting or removing the watchpoint. */
2557 ppc_linux_nat_target::create_watchpoint_request (struct ppc_hw_breakpoint
*p
,
2558 CORE_ADDR addr
, int len
,
2559 enum target_hw_bp_type type
,
2560 struct expression
*cond
,
2563 const struct ppc_debug_info
&hwdebug_info
= (m_dreg_interface
2567 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
2570 CORE_ADDR data_value
;
2572 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
2573 : hwdebug_info
.num_condition_regs
> 0);
2574 if (cond
&& use_condition
&& check_condition (addr
, cond
,
2576 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
2577 &p
->condition_value
);
2580 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2581 p
->condition_value
= 0;
2584 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
2589 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
2590 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
2591 p
->condition_value
= 0;
2593 /* The watchpoint will trigger if the address of the memory access is
2594 within the defined range, as follows: p->addr <= address < p->addr2.
2596 Note that the above sentence just documents how ptrace interprets
2597 its arguments; the watchpoint is set to watch the range defined by
2598 the user _inclusively_, as specified by the user interface. */
2599 p
->addr2
= (uint64_t) addr
+ len
;
2602 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
2603 p
->trigger_type
= get_trigger_type (type
);
2604 p
->addr
= (uint64_t) addr
;
2607 /* Register a watchpoint, to be inserted when the threads of the group of
2608 inferior_ptid are next resumed. Returns 0 on success, and -1 if there
2609 is no ptrace interface available to install the watchpoint. */
2612 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
2613 enum target_hw_bp_type type
,
2614 struct expression
*cond
)
2616 m_dreg_interface
.detect (inferior_ptid
);
2618 if (m_dreg_interface
.unavailable_p ())
2621 if (m_dreg_interface
.hwdebug_p ())
2623 struct ppc_hw_breakpoint p
;
2625 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
2627 register_hw_breakpoint (inferior_ptid
.pid (), p
);
2631 gdb_assert (m_dreg_interface
.debugreg_p ());
2634 long read_mode
, write_mode
;
2636 if (linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2638 /* PowerPC 440 requires only the read/write flags to be passed
2645 /* PowerPC 970 and other DABR-based processors are required to pass
2646 the Breakpoint Translation bit together with the flags. */
2651 wp_value
= addr
& ~(read_mode
| write_mode
);
2655 /* Set read and translate bits. */
2656 wp_value
|= read_mode
;
2659 /* Set write and translate bits. */
2660 wp_value
|= write_mode
;
2663 /* Set read, write and translate bits. */
2664 wp_value
|= read_mode
| write_mode
;
2668 register_wp (inferior_ptid
.pid (), wp_value
);
2674 /* Clear a registration for a hardware watchpoint. It will be removed
2675 from the threads of the group of inferior_ptid when they are next
2679 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
2680 enum target_hw_bp_type type
,
2681 struct expression
*cond
)
2683 gdb_assert (!m_dreg_interface
.unavailable_p ());
2685 if (m_dreg_interface
.hwdebug_p ())
2687 struct ppc_hw_breakpoint p
;
2689 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
2691 clear_hw_breakpoint (inferior_ptid
.pid (), p
);
2695 gdb_assert (m_dreg_interface
.debugreg_p ());
2697 clear_wp (inferior_ptid
.pid ());
2703 /* Clean up the per-process info associated with PID. When using the
2704 HWDEBUG interface, we also erase the per-thread state of installed
2705 debug registers for all the threads that belong to the group of PID.
2707 Usually the thread state is cleaned up by low_delete_thread. We also
2708 do it here because low_new_thread is not called for the initial LWP,
2709 so low_delete_thread won't be able to clean up this state. */
2712 ppc_linux_nat_target::low_forget_process (pid_t pid
)
2714 if ((!m_dreg_interface
.detected_p ())
2715 || (m_dreg_interface
.unavailable_p ()))
2718 ptid_t
pid_ptid (pid
, 0, 0);
2720 m_process_info
.erase (pid
);
2722 if (m_dreg_interface
.hwdebug_p ())
2724 for (auto it
= m_installed_hw_bps
.begin ();
2725 it
!= m_installed_hw_bps
.end ();)
2727 if (it
->first
.matches (pid_ptid
))
2728 it
= m_installed_hw_bps
.erase (it
);
2735 /* Copy the per-process state associated with the pid of PARENT to the
2736 state of CHILD_PID. GDB expects that a forked process will have the
2737 same hardware breakpoints and watchpoints as the parent.
2739 If we're using the HWDEBUG interface, also copy the thread debug
2740 register state for the ptid of PARENT to the state for CHILD_PID.
2742 Like for clone events, we assume the kernel will copy the debug
2743 registers from the parent thread to the child. The
2744 low_prepare_to_resume function is made to work even if it doesn't.
2746 We copy the thread state here and not in low_new_thread since we don't
2747 have the pid of the parent in low_new_thread. Even if we did,
2748 low_new_thread might not be called immediately after the fork event is
2749 detected. For instance, with the checkpointing system (see
2750 linux-fork.c), the thread won't be added until GDB decides to switch
2751 to a new checkpointed process. At that point, the debug register
2752 state of the parent thread is unlikely to correspond to the state it
2753 had at the point when it forked. */
2756 ppc_linux_nat_target::low_new_fork (struct lwp_info
*parent
,
2759 if ((!m_dreg_interface
.detected_p ())
2760 || (m_dreg_interface
.unavailable_p ()))
2763 auto process_it
= m_process_info
.find (parent
->ptid
.pid ());
2765 if (process_it
!= m_process_info
.end ())
2766 m_process_info
[child_pid
] = m_process_info
[parent
->ptid
.pid ()];
2768 if (m_dreg_interface
.hwdebug_p ())
2770 ptid_t
child_ptid (child_pid
, child_pid
, 0);
2772 copy_thread_dreg_state (parent
->ptid
, child_ptid
);
2776 /* Copy the thread debug register state from the PARENT thread to the the
2777 state for CHILD_LWP, if we're using the HWDEBUG interface. We assume
2778 the kernel copies the debug registers from one thread to another after
2779 a clone event. The low_prepare_to_resume function is made to work
2780 even if it doesn't. */
2783 ppc_linux_nat_target::low_new_clone (struct lwp_info
*parent
,
2786 if ((!m_dreg_interface
.detected_p ())
2787 || (m_dreg_interface
.unavailable_p ()))
2790 if (m_dreg_interface
.hwdebug_p ())
2792 ptid_t
child_ptid (parent
->ptid
.pid (), child_lwp
, 0);
2794 copy_thread_dreg_state (parent
->ptid
, child_ptid
);
2798 /* Initialize the arch-specific thread state for LP so that it contains
2799 the ptid for lp, so that we can use it in low_delete_thread. Mark the
2800 new thread LP as stale so that we update its debug registers before
2801 resuming it. This is not called for the initial thread. */
2804 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
2806 init_arch_lwp_info (lp
);
2808 mark_thread_stale (lp
);
2811 /* Delete the per-thread debug register stale flag. */
2814 ppc_linux_nat_target::low_delete_thread (struct arch_lwp_info
2817 if (lp_arch_info
!= NULL
)
2819 if (m_dreg_interface
.detected_p ()
2820 && m_dreg_interface
.hwdebug_p ())
2821 m_installed_hw_bps
.erase (lp_arch_info
->lwp_ptid
);
2823 xfree (lp_arch_info
);
2827 /* Install or delete debug registers in thread LP so that it matches what
2828 GDB requested before it is resumed. */
2831 ppc_linux_nat_target::low_prepare_to_resume (struct lwp_info
*lp
)
2833 if ((!m_dreg_interface
.detected_p ())
2834 || (m_dreg_interface
.unavailable_p ()))
2837 /* We have to re-install or clear the debug registers if we set the
2840 In addition, some kernels configurations can disable a hardware
2841 watchpoint after it is hit. Usually, GDB will remove and re-install
2842 a hardware watchpoint when the thread stops if "breakpoint
2843 always-inserted" is off, or to single-step a watchpoint. But so
2844 that we don't rely on this behavior, if we stop due to a hardware
2845 breakpoint or watchpoint, we also refresh our debug registers. */
2847 arch_lwp_info
*lp_arch_info
= get_arch_lwp_info (lp
);
2849 bool stale_dregs
= (lp
->stop_reason
== TARGET_STOPPED_BY_WATCHPOINT
2850 || lp
->stop_reason
== TARGET_STOPPED_BY_HW_BREAKPOINT
2851 || lp_arch_info
->debug_regs_stale
);
2856 gdb_assert (lp
->ptid
.lwp_p ());
2858 auto process_it
= m_process_info
.find (lp
->ptid
.pid ());
2860 if (m_dreg_interface
.hwdebug_p ())
2862 /* First, delete any hardware watchpoint or breakpoint installed in
2863 the inferior and update the thread state. */
2864 auto installed_it
= m_installed_hw_bps
.find (lp
->ptid
);
2866 if (installed_it
!= m_installed_hw_bps
.end ())
2868 auto &bp_list
= installed_it
->second
;
2870 for (auto bp_it
= bp_list
.begin (); bp_it
!= bp_list
.end ();)
2872 /* We ignore ENOENT to account for various possible kernel
2873 behaviors, e.g. the kernel might or might not copy debug
2874 registers across forks and clones, and we always copy
2875 the debug register state when fork and clone events are
2877 if (ptrace (PPC_PTRACE_DELHWDEBUG
, lp
->ptid
.lwp (), 0,
2879 if (errno
!= ENOENT
)
2880 perror_with_name (_("Error deleting hardware "
2881 "breakpoint or watchpoint"));
2883 /* We erase the entries one at a time after successfully
2884 removing the corresponding slot form the thread so that
2885 if we throw an exception above in a future iteration the
2886 map remains consistent. */
2887 bp_it
= bp_list
.erase (bp_it
);
2890 gdb_assert (bp_list
.empty ());
2893 /* Now we install all the requested hardware breakpoints and
2894 watchpoints and update the thread state. */
2896 if (process_it
!= m_process_info
.end ())
2898 auto &bp_list
= m_installed_hw_bps
[lp
->ptid
];
2900 for (ppc_hw_breakpoint bp
2901 : process_it
->second
.requested_hw_bps
)
2903 long slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, lp
->ptid
.lwp (),
2907 perror_with_name (_("Error setting hardware "
2908 "breakpoint or watchpoint"));
2910 /* Keep track of which slots we installed in this
2912 bp_list
.emplace (bp_list
.begin (), slot
, bp
);
2918 gdb_assert (m_dreg_interface
.debugreg_p ());
2920 /* Passing 0 to PTRACE_SET_DEBUGREG will clear the watchpoint. We
2921 always clear the watchpoint instead of just overwriting it, in
2922 case there is a request for a new watchpoint, because on some
2923 older kernel versions and configurations simply overwriting the
2924 watchpoint after it was hit would not re-enable it. */
2925 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0, 0) < 0)
2926 perror_with_name (_("Error clearing hardware watchpoint"));
2928 /* GDB requested a watchpoint to be installed. */
2929 if (process_it
!= m_process_info
.end ()
2930 && process_it
->second
.requested_wp_val
.has_value ())
2932 long wp
= *(process_it
->second
.requested_wp_val
);
2934 if (ptrace (PTRACE_SET_DEBUGREG
, lp
->ptid
.lwp (), 0, wp
) < 0)
2935 perror_with_name (_("Error setting hardware watchpoint"));
2939 lp_arch_info
->debug_regs_stale
= false;
2942 /* Return true if INFERIOR_PTID is known to have been stopped by a
2943 hardware watchpoint, false otherwise. If true is returned, write the
2944 address that the kernel reported as causing the SIGTRAP in ADDR_P. */
2947 ppc_linux_nat_target::low_stopped_data_address (CORE_ADDR
*addr_p
)
2951 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2954 if (siginfo
.si_signo
!= SIGTRAP
2955 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2958 gdb_assert (!m_dreg_interface
.unavailable_p ());
2960 /* Check if this signal corresponds to a hardware breakpoint. We only
2961 need to check this if we're using the HWDEBUG interface, since the
2962 DEBUGREG interface only allows setting one hardware watchpoint. */
2963 if (m_dreg_interface
.hwdebug_p ())
2965 /* The index (or slot) of the *point is passed in the si_errno
2966 field. Currently, this is only the case if the kernel was
2967 configured with CONFIG_PPC_ADV_DEBUG_REGS. If not, we assume
2968 the kernel will set si_errno to a value that doesn't correspond
2969 to any real slot. */
2970 int slot
= siginfo
.si_errno
;
2972 auto installed_it
= m_installed_hw_bps
.find (inferior_ptid
);
2974 /* We must have installed slots for the thread if it got a
2975 TRAP_HWBKPT signal. */
2976 gdb_assert (installed_it
!= m_installed_hw_bps
.end ());
2978 for (const auto & slot_bp_pair
: installed_it
->second
)
2979 if (slot_bp_pair
.first
== slot
2980 && (slot_bp_pair
.second
.trigger_type
2981 == PPC_BREAKPOINT_TRIGGER_EXECUTE
))
2985 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2989 /* Return true if INFERIOR_PTID is known to have been stopped by a
2990 hardware watchpoint, false otherwise. */
2993 ppc_linux_nat_target::low_stopped_by_watchpoint ()
2996 return low_stopped_data_address (&addr
);
3000 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
3004 gdb_assert (!m_dreg_interface
.unavailable_p ());
3008 if (m_dreg_interface
.hwdebug_p ()
3009 && (linux_get_hwcap () & PPC_FEATURE_BOOKE
))
3010 return start
<= addr
&& start
+ length
>= addr
;
3011 else if (linux_get_hwcap () & PPC_FEATURE_BOOKE
)
3018 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
3019 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
3022 /* Return the number of registers needed for a masked hardware watchpoint. */
3025 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
,
3028 m_dreg_interface
.detect (inferior_ptid
);
3030 if (!m_dreg_interface
.hwdebug_p ()
3031 || (m_dreg_interface
.hwdebug_info ().features
3032 & PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
3034 else if ((mask
& 0xC0000000) != 0xC0000000)
3036 warning (_("The given mask covers kernel address space "
3037 "and cannot be used.\n"));
3045 /* Copy the per-thread debug register state, if any, from thread
3046 PARENT_PTID to thread CHILD_PTID, if the debug register being used is
3050 ppc_linux_nat_target::copy_thread_dreg_state (const ptid_t
&parent_ptid
,
3051 const ptid_t
&child_ptid
)
3053 gdb_assert (m_dreg_interface
.hwdebug_p ());
3055 auto installed_it
= m_installed_hw_bps
.find (parent_ptid
);
3057 if (installed_it
!= m_installed_hw_bps
.end ())
3058 m_installed_hw_bps
[child_ptid
] = m_installed_hw_bps
[parent_ptid
];
3061 /* Mark the debug register stale flag for the new thread, if we have
3062 already detected which debug register interface we use. */
3065 ppc_linux_nat_target::mark_thread_stale (struct lwp_info
*lp
)
3067 if ((!m_dreg_interface
.detected_p ())
3068 || (m_dreg_interface
.unavailable_p ()))
3071 arch_lwp_info
*lp_arch_info
= get_arch_lwp_info (lp
);
3073 lp_arch_info
->debug_regs_stale
= true;
3076 /* Mark all the threads of the group of PID as stale with respect to
3077 debug registers and issue a stop request to each such thread that
3078 isn't already stopped. */
3081 ppc_linux_nat_target::mark_debug_registers_changed (pid_t pid
)
3083 /* We do this in two passes to make sure all threads are marked even if
3084 we get an exception when stopping one of them. */
3086 iterate_over_lwps (ptid_t (pid
),
3087 [this] (struct lwp_info
*lp
) -> int {
3088 this->mark_thread_stale (lp
);
3092 iterate_over_lwps (ptid_t (pid
),
3093 [] (struct lwp_info
*lp
) -> int {
3094 if (!lwp_is_stopped (lp
))
3095 linux_stop_lwp (lp
);
3100 /* Register a hardware breakpoint or watchpoint BP for the pid PID, then
3101 mark the stale flag for all threads of the group of PID, and issue a
3102 stop request for them. The breakpoint or watchpoint will be installed
3103 the next time each thread is resumed. Should only be used if the
3104 debug register interface is HWDEBUG. */
3107 ppc_linux_nat_target::register_hw_breakpoint (pid_t pid
,
3109 ppc_hw_breakpoint
&bp
)
3111 gdb_assert (m_dreg_interface
.hwdebug_p ());
3113 m_process_info
[pid
].requested_hw_bps
.push_back (bp
);
3115 mark_debug_registers_changed (pid
);
3118 /* Clear a registration for a hardware breakpoint or watchpoint BP for
3119 the pid PID, then mark the stale flag for all threads of the group of
3120 PID, and issue a stop request for them. The breakpoint or watchpoint
3121 will be removed the next time each thread is resumed. Should only be
3122 used if the debug register interface is HWDEBUG. */
3125 ppc_linux_nat_target::clear_hw_breakpoint (pid_t pid
,
3126 const struct ppc_hw_breakpoint
&bp
)
3128 gdb_assert (m_dreg_interface
.hwdebug_p ());
3130 auto process_it
= m_process_info
.find (pid
);
3132 gdb_assert (process_it
!= m_process_info
.end ());
3134 auto bp_it
= std::find_if (process_it
->second
.requested_hw_bps
.begin (),
3135 process_it
->second
.requested_hw_bps
.end (),
3137 (const struct ppc_hw_breakpoint
&curr
)
3138 { return hwdebug_point_cmp (bp
, curr
); }
3141 /* If GDB is removing a watchpoint, it must have been inserted. */
3142 gdb_assert (bp_it
!= process_it
->second
.requested_hw_bps
.end ());
3144 process_it
->second
.requested_hw_bps
.erase (bp_it
);
3146 mark_debug_registers_changed (pid
);
3149 /* Register the hardware watchpoint value WP_VALUE for the pid PID,
3150 then mark the stale flag for all threads of the group of PID, and
3151 issue a stop request for them. The breakpoint or watchpoint will be
3152 installed the next time each thread is resumed. Should only be used
3153 if the debug register interface is DEBUGREG. */
3156 ppc_linux_nat_target::register_wp (pid_t pid
, long wp_value
)
3158 gdb_assert (m_dreg_interface
.debugreg_p ());
3160 /* Our other functions should have told GDB that we only have one
3161 hardware watchpoint with this interface. */
3162 gdb_assert (!m_process_info
[pid
].requested_wp_val
.has_value ());
3164 m_process_info
[pid
].requested_wp_val
.emplace (wp_value
);
3166 mark_debug_registers_changed (pid
);
3169 /* Clear the hardware watchpoint registration for the pid PID, then mark
3170 the stale flag for all threads of the group of PID, and issue a stop
3171 request for them. The breakpoint or watchpoint will be installed the
3172 next time each thread is resumed. Should only be used if the debug
3173 register interface is DEBUGREG. */
3176 ppc_linux_nat_target::clear_wp (pid_t pid
)
3178 gdb_assert (m_dreg_interface
.debugreg_p ());
3180 auto process_it
= m_process_info
.find (pid
);
3182 gdb_assert (process_it
!= m_process_info
.end ());
3183 gdb_assert (process_it
->second
.requested_wp_val
.has_value ());
3185 process_it
->second
.requested_wp_val
.reset ();
3187 mark_debug_registers_changed (pid
);
3190 /* Initialize the arch-specific thread state for LWP, if it not already
3194 ppc_linux_nat_target::init_arch_lwp_info (struct lwp_info
*lp
)
3196 if (lwp_arch_private_info (lp
) == NULL
)
3198 lwp_set_arch_private_info (lp
, XCNEW (struct arch_lwp_info
));
3199 lwp_arch_private_info (lp
)->debug_regs_stale
= false;
3200 lwp_arch_private_info (lp
)->lwp_ptid
= lp
->ptid
;
3204 /* Get the arch-specific thread state for LWP, creating it if
3208 ppc_linux_nat_target::get_arch_lwp_info (struct lwp_info
*lp
)
3210 init_arch_lwp_info (lp
);
3212 return lwp_arch_private_info (lp
);
3215 void _initialize_ppc_linux_nat ();
3217 _initialize_ppc_linux_nat ()
3219 linux_target
= &the_ppc_linux_nat_target
;
3221 /* Register the target. */
3222 add_inf_child_target (linux_target
);