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Float parameter passing in funcall on ppc-aix & ppc-lynx178.
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1 /* Native support code for PPC AIX, for GDB the GNU debugger.
2
3 Copyright (C) 2006-2013 Free Software Foundation, Inc.
4
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdb_string.h"
24 #include "gdb_assert.h"
25 #include "osabi.h"
26 #include "regcache.h"
27 #include "regset.h"
28 #include "gdbtypes.h"
29 #include "gdbcore.h"
30 #include "target.h"
31 #include "value.h"
32 #include "infcall.h"
33 #include "objfiles.h"
34 #include "breakpoint.h"
35 #include "rs6000-tdep.h"
36 #include "ppc-tdep.h"
37 #include "exceptions.h"
38 #include "xcoffread.h"
39 #include "solib.h"
40 #include "solib-aix.h"
41
42 /* If the kernel has to deliver a signal, it pushes a sigcontext
43 structure on the stack and then calls the signal handler, passing
44 the address of the sigcontext in an argument register. Usually
45 the signal handler doesn't save this register, so we have to
46 access the sigcontext structure via an offset from the signal handler
47 frame.
48 The following constants were determined by experimentation on AIX 3.2. */
49 #define SIG_FRAME_PC_OFFSET 96
50 #define SIG_FRAME_LR_OFFSET 108
51 #define SIG_FRAME_FP_OFFSET 284
52
53
54 /* Core file support. */
55
56 static struct ppc_reg_offsets rs6000_aix32_reg_offsets =
57 {
58 /* General-purpose registers. */
59 208, /* r0_offset */
60 4, /* gpr_size */
61 4, /* xr_size */
62 24, /* pc_offset */
63 28, /* ps_offset */
64 32, /* cr_offset */
65 36, /* lr_offset */
66 40, /* ctr_offset */
67 44, /* xer_offset */
68 48, /* mq_offset */
69
70 /* Floating-point registers. */
71 336, /* f0_offset */
72 56, /* fpscr_offset */
73 4, /* fpscr_size */
74
75 /* AltiVec registers. */
76 -1, /* vr0_offset */
77 -1, /* vscr_offset */
78 -1 /* vrsave_offset */
79 };
80
81 static struct ppc_reg_offsets rs6000_aix64_reg_offsets =
82 {
83 /* General-purpose registers. */
84 0, /* r0_offset */
85 8, /* gpr_size */
86 4, /* xr_size */
87 264, /* pc_offset */
88 256, /* ps_offset */
89 288, /* cr_offset */
90 272, /* lr_offset */
91 280, /* ctr_offset */
92 292, /* xer_offset */
93 -1, /* mq_offset */
94
95 /* Floating-point registers. */
96 312, /* f0_offset */
97 296, /* fpscr_offset */
98 4, /* fpscr_size */
99
100 /* AltiVec registers. */
101 -1, /* vr0_offset */
102 -1, /* vscr_offset */
103 -1 /* vrsave_offset */
104 };
105
106
107 /* Supply register REGNUM in the general-purpose register set REGSET
108 from the buffer specified by GREGS and LEN to register cache
109 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
110
111 static void
112 rs6000_aix_supply_regset (const struct regset *regset,
113 struct regcache *regcache, int regnum,
114 const void *gregs, size_t len)
115 {
116 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
117 ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
118 }
119
120 /* Collect register REGNUM in the general-purpose register set
121 REGSET, from register cache REGCACHE into the buffer specified by
122 GREGS and LEN. If REGNUM is -1, do this for all registers in
123 REGSET. */
124
125 static void
126 rs6000_aix_collect_regset (const struct regset *regset,
127 const struct regcache *regcache, int regnum,
128 void *gregs, size_t len)
129 {
130 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
131 ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
132 }
133
134 /* AIX register set. */
135
136 static struct regset rs6000_aix32_regset =
137 {
138 &rs6000_aix32_reg_offsets,
139 rs6000_aix_supply_regset,
140 rs6000_aix_collect_regset,
141 };
142
143 static struct regset rs6000_aix64_regset =
144 {
145 &rs6000_aix64_reg_offsets,
146 rs6000_aix_supply_regset,
147 rs6000_aix_collect_regset,
148 };
149
150 /* Return the appropriate register set for the core section identified
151 by SECT_NAME and SECT_SIZE. */
152
153 static const struct regset *
154 rs6000_aix_regset_from_core_section (struct gdbarch *gdbarch,
155 const char *sect_name, size_t sect_size)
156 {
157 if (gdbarch_tdep (gdbarch)->wordsize == 4)
158 {
159 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 592)
160 return &rs6000_aix32_regset;
161 }
162 else
163 {
164 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 576)
165 return &rs6000_aix64_regset;
166 }
167
168 return NULL;
169 }
170
171
172 /* Pass the arguments in either registers, or in the stack. In RS/6000,
173 the first eight words of the argument list (that might be less than
174 eight parameters if some parameters occupy more than one word) are
175 passed in r3..r10 registers. Float and double parameters are
176 passed in fpr's, in addition to that. Rest of the parameters if any
177 are passed in user stack. There might be cases in which half of the
178 parameter is copied into registers, the other half is pushed into
179 stack.
180
181 Stack must be aligned on 64-bit boundaries when synthesizing
182 function calls.
183
184 If the function is returning a structure, then the return address is passed
185 in r3, then the first 7 words of the parameters can be passed in registers,
186 starting from r4. */
187
188 static CORE_ADDR
189 rs6000_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
190 struct regcache *regcache, CORE_ADDR bp_addr,
191 int nargs, struct value **args, CORE_ADDR sp,
192 int struct_return, CORE_ADDR struct_addr)
193 {
194 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
195 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
196 int ii;
197 int len = 0;
198 int argno; /* current argument number */
199 int argbytes; /* current argument byte */
200 gdb_byte tmp_buffer[50];
201 int f_argno = 0; /* current floating point argno */
202 int wordsize = gdbarch_tdep (gdbarch)->wordsize;
203 CORE_ADDR func_addr = find_function_addr (function, NULL);
204
205 struct value *arg = 0;
206 struct type *type;
207
208 ULONGEST saved_sp;
209
210 /* The calling convention this function implements assumes the
211 processor has floating-point registers. We shouldn't be using it
212 on PPC variants that lack them. */
213 gdb_assert (ppc_floating_point_unit_p (gdbarch));
214
215 /* The first eight words of ther arguments are passed in registers.
216 Copy them appropriately. */
217 ii = 0;
218
219 /* If the function is returning a `struct', then the first word
220 (which will be passed in r3) is used for struct return address.
221 In that case we should advance one word and start from r4
222 register to copy parameters. */
223 if (struct_return)
224 {
225 regcache_raw_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
226 struct_addr);
227 ii++;
228 }
229
230 /* effectively indirect call... gcc does...
231
232 return_val example( float, int);
233
234 eabi:
235 float in fp0, int in r3
236 offset of stack on overflow 8/16
237 for varargs, must go by type.
238 power open:
239 float in r3&r4, int in r5
240 offset of stack on overflow different
241 both:
242 return in r3 or f0. If no float, must study how gcc emulates floats;
243 pay attention to arg promotion.
244 User may have to cast\args to handle promotion correctly
245 since gdb won't know if prototype supplied or not. */
246
247 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
248 {
249 int reg_size = register_size (gdbarch, ii + 3);
250
251 arg = args[argno];
252 type = check_typedef (value_type (arg));
253 len = TYPE_LENGTH (type);
254
255 if (TYPE_CODE (type) == TYPE_CODE_FLT)
256 {
257 /* Floating point arguments are passed in fpr's, as well as gpr's.
258 There are 13 fpr's reserved for passing parameters. At this point
259 there is no way we would run out of them.
260
261 Always store the floating point value using the register's
262 floating-point format. */
263 const int fp_regnum = tdep->ppc_fp0_regnum + 1 + f_argno;
264 gdb_byte reg_val[MAX_REGISTER_SIZE];
265 struct type *reg_type = register_type (gdbarch, fp_regnum);
266
267 gdb_assert (len <= 8);
268
269 convert_typed_floating (value_contents (arg), type,
270 reg_val, reg_type);
271 regcache_cooked_write (regcache, fp_regnum, reg_val);
272 ++f_argno;
273 }
274
275 if (len > reg_size)
276 {
277
278 /* Argument takes more than one register. */
279 while (argbytes < len)
280 {
281 gdb_byte word[MAX_REGISTER_SIZE];
282 memset (word, 0, reg_size);
283 memcpy (word,
284 ((char *) value_contents (arg)) + argbytes,
285 (len - argbytes) > reg_size
286 ? reg_size : len - argbytes);
287 regcache_cooked_write (regcache,
288 tdep->ppc_gp0_regnum + 3 + ii,
289 word);
290 ++ii, argbytes += reg_size;
291
292 if (ii >= 8)
293 goto ran_out_of_registers_for_arguments;
294 }
295 argbytes = 0;
296 --ii;
297 }
298 else
299 {
300 /* Argument can fit in one register. No problem. */
301 int adj = gdbarch_byte_order (gdbarch)
302 == BFD_ENDIAN_BIG ? reg_size - len : 0;
303 gdb_byte word[MAX_REGISTER_SIZE];
304
305 memset (word, 0, reg_size);
306 memcpy (word, value_contents (arg), len);
307 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3 +ii, word);
308 }
309 ++argno;
310 }
311
312 ran_out_of_registers_for_arguments:
313
314 regcache_cooked_read_unsigned (regcache,
315 gdbarch_sp_regnum (gdbarch),
316 &saved_sp);
317
318 /* Location for 8 parameters are always reserved. */
319 sp -= wordsize * 8;
320
321 /* Another six words for back chain, TOC register, link register, etc. */
322 sp -= wordsize * 6;
323
324 /* Stack pointer must be quadword aligned. */
325 sp &= -16;
326
327 /* If there are more arguments, allocate space for them in
328 the stack, then push them starting from the ninth one. */
329
330 if ((argno < nargs) || argbytes)
331 {
332 int space = 0, jj;
333
334 if (argbytes)
335 {
336 space += ((len - argbytes + 3) & -4);
337 jj = argno + 1;
338 }
339 else
340 jj = argno;
341
342 for (; jj < nargs; ++jj)
343 {
344 struct value *val = args[jj];
345 space += ((TYPE_LENGTH (value_type (val))) + 3) & -4;
346 }
347
348 /* Add location required for the rest of the parameters. */
349 space = (space + 15) & -16;
350 sp -= space;
351
352 /* This is another instance we need to be concerned about
353 securing our stack space. If we write anything underneath %sp
354 (r1), we might conflict with the kernel who thinks he is free
355 to use this area. So, update %sp first before doing anything
356 else. */
357
358 regcache_raw_write_signed (regcache,
359 gdbarch_sp_regnum (gdbarch), sp);
360
361 /* If the last argument copied into the registers didn't fit there
362 completely, push the rest of it into stack. */
363
364 if (argbytes)
365 {
366 write_memory (sp + 24 + (ii * 4),
367 value_contents (arg) + argbytes,
368 len - argbytes);
369 ++argno;
370 ii += ((len - argbytes + 3) & -4) / 4;
371 }
372
373 /* Push the rest of the arguments into stack. */
374 for (; argno < nargs; ++argno)
375 {
376
377 arg = args[argno];
378 type = check_typedef (value_type (arg));
379 len = TYPE_LENGTH (type);
380
381
382 /* Float types should be passed in fpr's, as well as in the
383 stack. */
384 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
385 {
386
387 gdb_assert (len <= 8);
388
389 regcache_cooked_write (regcache,
390 tdep->ppc_fp0_regnum + 1 + f_argno,
391 value_contents (arg));
392 ++f_argno;
393 }
394
395 write_memory (sp + 24 + (ii * 4), value_contents (arg), len);
396 ii += ((len + 3) & -4) / 4;
397 }
398 }
399
400 /* Set the stack pointer. According to the ABI, the SP is meant to
401 be set _before_ the corresponding stack space is used. On AIX,
402 this even applies when the target has been completely stopped!
403 Not doing this can lead to conflicts with the kernel which thinks
404 that it still has control over this not-yet-allocated stack
405 region. */
406 regcache_raw_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
407
408 /* Set back chain properly. */
409 store_unsigned_integer (tmp_buffer, wordsize, byte_order, saved_sp);
410 write_memory (sp, tmp_buffer, wordsize);
411
412 /* Point the inferior function call's return address at the dummy's
413 breakpoint. */
414 regcache_raw_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
415
416 /* Set the TOC register value. */
417 regcache_raw_write_signed (regcache, tdep->ppc_toc_regnum,
418 solib_aix_get_toc_value (func_addr));
419
420 target_store_registers (regcache, -1);
421 return sp;
422 }
423
424 static enum return_value_convention
425 rs6000_return_value (struct gdbarch *gdbarch, struct value *function,
426 struct type *valtype, struct regcache *regcache,
427 gdb_byte *readbuf, const gdb_byte *writebuf)
428 {
429 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
430 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
431
432 /* The calling convention this function implements assumes the
433 processor has floating-point registers. We shouldn't be using it
434 on PowerPC variants that lack them. */
435 gdb_assert (ppc_floating_point_unit_p (gdbarch));
436
437 /* AltiVec extension: Functions that declare a vector data type as a
438 return value place that return value in VR2. */
439 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
440 && TYPE_LENGTH (valtype) == 16)
441 {
442 if (readbuf)
443 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
444 if (writebuf)
445 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
446
447 return RETURN_VALUE_REGISTER_CONVENTION;
448 }
449
450 /* If the called subprogram returns an aggregate, there exists an
451 implicit first argument, whose value is the address of a caller-
452 allocated buffer into which the callee is assumed to store its
453 return value. All explicit parameters are appropriately
454 relabeled. */
455 if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
456 || TYPE_CODE (valtype) == TYPE_CODE_UNION
457 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
458 return RETURN_VALUE_STRUCT_CONVENTION;
459
460 /* Scalar floating-point values are returned in FPR1 for float or
461 double, and in FPR1:FPR2 for quadword precision. Fortran
462 complex*8 and complex*16 are returned in FPR1:FPR2, and
463 complex*32 is returned in FPR1:FPR4. */
464 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
465 && (TYPE_LENGTH (valtype) == 4 || TYPE_LENGTH (valtype) == 8))
466 {
467 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
468 gdb_byte regval[8];
469
470 /* FIXME: kettenis/2007-01-01: Add support for quadword
471 precision and complex. */
472
473 if (readbuf)
474 {
475 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
476 convert_typed_floating (regval, regtype, readbuf, valtype);
477 }
478 if (writebuf)
479 {
480 convert_typed_floating (writebuf, valtype, regval, regtype);
481 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
482 }
483
484 return RETURN_VALUE_REGISTER_CONVENTION;
485 }
486
487 /* Values of the types int, long, short, pointer, and char (length
488 is less than or equal to four bytes), as well as bit values of
489 lengths less than or equal to 32 bits, must be returned right
490 justified in GPR3 with signed values sign extended and unsigned
491 values zero extended, as necessary. */
492 if (TYPE_LENGTH (valtype) <= tdep->wordsize)
493 {
494 if (readbuf)
495 {
496 ULONGEST regval;
497
498 /* For reading we don't have to worry about sign extension. */
499 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
500 &regval);
501 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), byte_order,
502 regval);
503 }
504 if (writebuf)
505 {
506 /* For writing, use unpack_long since that should handle any
507 required sign extension. */
508 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
509 unpack_long (valtype, writebuf));
510 }
511
512 return RETURN_VALUE_REGISTER_CONVENTION;
513 }
514
515 /* Eight-byte non-floating-point scalar values must be returned in
516 GPR3:GPR4. */
517
518 if (TYPE_LENGTH (valtype) == 8)
519 {
520 gdb_assert (TYPE_CODE (valtype) != TYPE_CODE_FLT);
521 gdb_assert (tdep->wordsize == 4);
522
523 if (readbuf)
524 {
525 gdb_byte regval[8];
526
527 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, regval);
528 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
529 regval + 4);
530 memcpy (readbuf, regval, 8);
531 }
532 if (writebuf)
533 {
534 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
535 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
536 writebuf + 4);
537 }
538
539 return RETURN_VALUE_REGISTER_CONVENTION;
540 }
541
542 return RETURN_VALUE_STRUCT_CONVENTION;
543 }
544
545 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
546
547 Usually a function pointer's representation is simply the address
548 of the function. On the RS/6000 however, a function pointer is
549 represented by a pointer to an OPD entry. This OPD entry contains
550 three words, the first word is the address of the function, the
551 second word is the TOC pointer (r2), and the third word is the
552 static chain value. Throughout GDB it is currently assumed that a
553 function pointer contains the address of the function, which is not
554 easy to fix. In addition, the conversion of a function address to
555 a function pointer would require allocation of an OPD entry in the
556 inferior's memory space, with all its drawbacks. To be able to
557 call C++ virtual methods in the inferior (which are called via
558 function pointers), find_function_addr uses this function to get the
559 function address from a function pointer. */
560
561 /* Return real function address if ADDR (a function pointer) is in the data
562 space and is therefore a special function pointer. */
563
564 static CORE_ADDR
565 rs6000_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
566 CORE_ADDR addr,
567 struct target_ops *targ)
568 {
569 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
570 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
571 struct obj_section *s;
572
573 s = find_pc_section (addr);
574
575 /* Normally, functions live inside a section that is executable.
576 So, if ADDR points to a non-executable section, then treat it
577 as a function descriptor and return the target address iff
578 the target address itself points to a section that is executable. */
579 if (s && (s->the_bfd_section->flags & SEC_CODE) == 0)
580 {
581 CORE_ADDR pc = 0;
582 struct obj_section *pc_section;
583 volatile struct gdb_exception e;
584
585 TRY_CATCH (e, RETURN_MASK_ERROR)
586 {
587 pc = read_memory_unsigned_integer (addr, tdep->wordsize, byte_order);
588 }
589 if (e.reason < 0)
590 {
591 /* An error occured during reading. Probably a memory error
592 due to the section not being loaded yet. This address
593 cannot be a function descriptor. */
594 return addr;
595 }
596 pc_section = find_pc_section (pc);
597
598 if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
599 return pc;
600 }
601
602 return addr;
603 }
604
605
606 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
607
608 static CORE_ADDR
609 branch_dest (struct frame_info *frame, int opcode, int instr,
610 CORE_ADDR pc, CORE_ADDR safety)
611 {
612 struct gdbarch *gdbarch = get_frame_arch (frame);
613 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
614 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
615 CORE_ADDR dest;
616 int immediate;
617 int absolute;
618 int ext_op;
619
620 absolute = (int) ((instr >> 1) & 1);
621
622 switch (opcode)
623 {
624 case 18:
625 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
626 if (absolute)
627 dest = immediate;
628 else
629 dest = pc + immediate;
630 break;
631
632 case 16:
633 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
634 if (absolute)
635 dest = immediate;
636 else
637 dest = pc + immediate;
638 break;
639
640 case 19:
641 ext_op = (instr >> 1) & 0x3ff;
642
643 if (ext_op == 16) /* br conditional register */
644 {
645 dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
646
647 /* If we are about to return from a signal handler, dest is
648 something like 0x3c90. The current frame is a signal handler
649 caller frame, upon completion of the sigreturn system call
650 execution will return to the saved PC in the frame. */
651 if (dest < AIX_TEXT_SEGMENT_BASE)
652 dest = read_memory_unsigned_integer
653 (get_frame_base (frame) + SIG_FRAME_PC_OFFSET,
654 tdep->wordsize, byte_order);
655 }
656
657 else if (ext_op == 528) /* br cond to count reg */
658 {
659 dest = get_frame_register_unsigned (frame,
660 tdep->ppc_ctr_regnum) & ~3;
661
662 /* If we are about to execute a system call, dest is something
663 like 0x22fc or 0x3b00. Upon completion the system call
664 will return to the address in the link register. */
665 if (dest < AIX_TEXT_SEGMENT_BASE)
666 dest = get_frame_register_unsigned (frame,
667 tdep->ppc_lr_regnum) & ~3;
668 }
669 else
670 return -1;
671 break;
672
673 default:
674 return -1;
675 }
676 return (dest < AIX_TEXT_SEGMENT_BASE) ? safety : dest;
677 }
678
679 /* AIX does not support PT_STEP. Simulate it. */
680
681 static int
682 rs6000_software_single_step (struct frame_info *frame)
683 {
684 struct gdbarch *gdbarch = get_frame_arch (frame);
685 struct address_space *aspace = get_frame_address_space (frame);
686 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
687 int ii, insn;
688 CORE_ADDR loc;
689 CORE_ADDR breaks[2];
690 int opcode;
691
692 loc = get_frame_pc (frame);
693
694 insn = read_memory_integer (loc, 4, byte_order);
695
696 if (ppc_deal_with_atomic_sequence (frame))
697 return 1;
698
699 breaks[0] = loc + PPC_INSN_SIZE;
700 opcode = insn >> 26;
701 breaks[1] = branch_dest (frame, opcode, insn, loc, breaks[0]);
702
703 /* Don't put two breakpoints on the same address. */
704 if (breaks[1] == breaks[0])
705 breaks[1] = -1;
706
707 for (ii = 0; ii < 2; ++ii)
708 {
709 /* ignore invalid breakpoint. */
710 if (breaks[ii] == -1)
711 continue;
712 insert_single_step_breakpoint (gdbarch, aspace, breaks[ii]);
713 }
714
715 errno = 0; /* FIXME, don't ignore errors! */
716 /* What errors? {read,write}_memory call error(). */
717 return 1;
718 }
719
720 /* Implement the "auto_wide_charset" gdbarch method for this platform. */
721
722 static const char *
723 rs6000_aix_auto_wide_charset (void)
724 {
725 return "UTF-16";
726 }
727
728 /* Implement an osabi sniffer for RS6000/AIX.
729
730 This function assumes that ABFD's flavour is XCOFF. In other words,
731 it should be registered as a sniffer for bfd_target_xcoff_flavour
732 objfiles only. A failed assertion will be raised if this condition
733 is not met. */
734
735 static enum gdb_osabi
736 rs6000_aix_osabi_sniffer (bfd *abfd)
737 {
738 gdb_assert (bfd_get_flavour (abfd) == bfd_target_xcoff_flavour);
739
740 /* The only noticeable difference between Lynx178 XCOFF files and
741 AIX XCOFF files comes from the fact that there are no shared
742 libraries on Lynx178. On AIX, we are betting that an executable
743 linked with no shared library will never exist. */
744 if (xcoff_get_n_import_files (abfd) <= 0)
745 return GDB_OSABI_UNKNOWN;
746
747 return GDB_OSABI_AIX;
748 }
749
750 static void
751 rs6000_aix_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
752 {
753 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
754
755 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
756 set_gdbarch_software_single_step (gdbarch, rs6000_software_single_step);
757
758 /* Displaced stepping is currently not supported in combination with
759 software single-stepping. */
760 set_gdbarch_displaced_step_copy_insn (gdbarch, NULL);
761 set_gdbarch_displaced_step_fixup (gdbarch, NULL);
762 set_gdbarch_displaced_step_free_closure (gdbarch, NULL);
763 set_gdbarch_displaced_step_location (gdbarch, NULL);
764
765 set_gdbarch_push_dummy_call (gdbarch, rs6000_push_dummy_call);
766 set_gdbarch_return_value (gdbarch, rs6000_return_value);
767 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
768
769 /* Handle RS/6000 function pointers (which are really function
770 descriptors). */
771 set_gdbarch_convert_from_func_ptr_addr
772 (gdbarch, rs6000_convert_from_func_ptr_addr);
773
774 /* Core file support. */
775 set_gdbarch_regset_from_core_section
776 (gdbarch, rs6000_aix_regset_from_core_section);
777
778 if (tdep->wordsize == 8)
779 tdep->lr_frame_offset = 16;
780 else
781 tdep->lr_frame_offset = 8;
782
783 if (tdep->wordsize == 4)
784 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
785 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
786 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
787 224. */
788 set_gdbarch_frame_red_zone_size (gdbarch, 224);
789 else
790 set_gdbarch_frame_red_zone_size (gdbarch, 0);
791
792 set_gdbarch_auto_wide_charset (gdbarch, rs6000_aix_auto_wide_charset);
793
794 set_solib_ops (gdbarch, &solib_aix_so_ops);
795 }
796
797 /* Provide a prototype to silence -Wmissing-prototypes. */
798 extern initialize_file_ftype _initialize_rs6000_aix_tdep;
799
800 void
801 _initialize_rs6000_aix_tdep (void)
802 {
803 gdbarch_register_osabi_sniffer (bfd_arch_rs6000,
804 bfd_target_xcoff_flavour,
805 rs6000_aix_osabi_sniffer);
806 gdbarch_register_osabi_sniffer (bfd_arch_powerpc,
807 bfd_target_xcoff_flavour,
808 rs6000_aix_osabi_sniffer);
809
810 gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_AIX,
811 rs6000_aix_init_osabi);
812 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_AIX,
813 rs6000_aix_init_osabi);
814 }
815