]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gdb/rs6000-aix-tdep.c
* defs.h (extract_signed_integer, extract_unsigned_integer,
[thirdparty/binutils-gdb.git] / gdb / rs6000-aix-tdep.c
1 /* Native support code for PPC AIX, for GDB the GNU debugger.
2
3 Copyright (C) 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
4
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdb_string.h"
24 #include "gdb_assert.h"
25 #include "osabi.h"
26 #include "regcache.h"
27 #include "regset.h"
28 #include "gdbtypes.h"
29 #include "gdbcore.h"
30 #include "target.h"
31 #include "value.h"
32 #include "infcall.h"
33 #include "objfiles.h"
34 #include "breakpoint.h"
35 #include "rs6000-tdep.h"
36 #include "ppc-tdep.h"
37
38 /* Hook for determining the TOC address when calling functions in the
39 inferior under AIX. The initialization code in rs6000-nat.c sets
40 this hook to point to find_toc_address. */
41
42 CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
43
44 /* If the kernel has to deliver a signal, it pushes a sigcontext
45 structure on the stack and then calls the signal handler, passing
46 the address of the sigcontext in an argument register. Usually
47 the signal handler doesn't save this register, so we have to
48 access the sigcontext structure via an offset from the signal handler
49 frame.
50 The following constants were determined by experimentation on AIX 3.2. */
51 #define SIG_FRAME_PC_OFFSET 96
52 #define SIG_FRAME_LR_OFFSET 108
53 #define SIG_FRAME_FP_OFFSET 284
54
55
56 /* Core file support. */
57
58 static struct ppc_reg_offsets rs6000_aix32_reg_offsets =
59 {
60 /* General-purpose registers. */
61 208, /* r0_offset */
62 4, /* gpr_size */
63 4, /* xr_size */
64 24, /* pc_offset */
65 28, /* ps_offset */
66 32, /* cr_offset */
67 36, /* lr_offset */
68 40, /* ctr_offset */
69 44, /* xer_offset */
70 48, /* mq_offset */
71
72 /* Floating-point registers. */
73 336, /* f0_offset */
74 56, /* fpscr_offset */
75 4, /* fpscr_size */
76
77 /* AltiVec registers. */
78 -1, /* vr0_offset */
79 -1, /* vscr_offset */
80 -1 /* vrsave_offset */
81 };
82
83 static struct ppc_reg_offsets rs6000_aix64_reg_offsets =
84 {
85 /* General-purpose registers. */
86 0, /* r0_offset */
87 8, /* gpr_size */
88 4, /* xr_size */
89 264, /* pc_offset */
90 256, /* ps_offset */
91 288, /* cr_offset */
92 272, /* lr_offset */
93 280, /* ctr_offset */
94 292, /* xer_offset */
95 -1, /* mq_offset */
96
97 /* Floating-point registers. */
98 312, /* f0_offset */
99 296, /* fpscr_offset */
100 4, /* fpscr_size */
101
102 /* AltiVec registers. */
103 -1, /* vr0_offset */
104 -1, /* vscr_offset */
105 -1 /* vrsave_offset */
106 };
107
108
109 /* Supply register REGNUM in the general-purpose register set REGSET
110 from the buffer specified by GREGS and LEN to register cache
111 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
112
113 static void
114 rs6000_aix_supply_regset (const struct regset *regset,
115 struct regcache *regcache, int regnum,
116 const void *gregs, size_t len)
117 {
118 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
119 ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
120 }
121
122 /* Collect register REGNUM in the general-purpose register set
123 REGSET. from register cache REGCACHE into the buffer specified by
124 GREGS and LEN. If REGNUM is -1, do this for all registers in
125 REGSET. */
126
127 static void
128 rs6000_aix_collect_regset (const struct regset *regset,
129 const struct regcache *regcache, int regnum,
130 void *gregs, size_t len)
131 {
132 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
133 ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
134 }
135
136 /* AIX register set. */
137
138 static struct regset rs6000_aix32_regset =
139 {
140 &rs6000_aix32_reg_offsets,
141 rs6000_aix_supply_regset,
142 rs6000_aix_collect_regset,
143 };
144
145 static struct regset rs6000_aix64_regset =
146 {
147 &rs6000_aix64_reg_offsets,
148 rs6000_aix_supply_regset,
149 rs6000_aix_collect_regset,
150 };
151
152 /* Return the appropriate register set for the core section identified
153 by SECT_NAME and SECT_SIZE. */
154
155 static const struct regset *
156 rs6000_aix_regset_from_core_section (struct gdbarch *gdbarch,
157 const char *sect_name, size_t sect_size)
158 {
159 if (gdbarch_tdep (gdbarch)->wordsize == 4)
160 {
161 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 592)
162 return &rs6000_aix32_regset;
163 }
164 else
165 {
166 if (strcmp (sect_name, ".reg") == 0 && sect_size >= 576)
167 return &rs6000_aix64_regset;
168 }
169
170 return NULL;
171 }
172
173
174 /* Pass the arguments in either registers, or in the stack. In RS/6000,
175 the first eight words of the argument list (that might be less than
176 eight parameters if some parameters occupy more than one word) are
177 passed in r3..r10 registers. float and double parameters are
178 passed in fpr's, in addition to that. Rest of the parameters if any
179 are passed in user stack. There might be cases in which half of the
180 parameter is copied into registers, the other half is pushed into
181 stack.
182
183 Stack must be aligned on 64-bit boundaries when synthesizing
184 function calls.
185
186 If the function is returning a structure, then the return address is passed
187 in r3, then the first 7 words of the parameters can be passed in registers,
188 starting from r4. */
189
190 static CORE_ADDR
191 rs6000_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
192 struct regcache *regcache, CORE_ADDR bp_addr,
193 int nargs, struct value **args, CORE_ADDR sp,
194 int struct_return, CORE_ADDR struct_addr)
195 {
196 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
197 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
198 int ii;
199 int len = 0;
200 int argno; /* current argument number */
201 int argbytes; /* current argument byte */
202 gdb_byte tmp_buffer[50];
203 int f_argno = 0; /* current floating point argno */
204 int wordsize = gdbarch_tdep (gdbarch)->wordsize;
205 CORE_ADDR func_addr = find_function_addr (function, NULL);
206
207 struct value *arg = 0;
208 struct type *type;
209
210 ULONGEST saved_sp;
211
212 /* The calling convention this function implements assumes the
213 processor has floating-point registers. We shouldn't be using it
214 on PPC variants that lack them. */
215 gdb_assert (ppc_floating_point_unit_p (gdbarch));
216
217 /* The first eight words of ther arguments are passed in registers.
218 Copy them appropriately. */
219 ii = 0;
220
221 /* If the function is returning a `struct', then the first word
222 (which will be passed in r3) is used for struct return address.
223 In that case we should advance one word and start from r4
224 register to copy parameters. */
225 if (struct_return)
226 {
227 regcache_raw_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
228 struct_addr);
229 ii++;
230 }
231
232 /*
233 effectively indirect call... gcc does...
234
235 return_val example( float, int);
236
237 eabi:
238 float in fp0, int in r3
239 offset of stack on overflow 8/16
240 for varargs, must go by type.
241 power open:
242 float in r3&r4, int in r5
243 offset of stack on overflow different
244 both:
245 return in r3 or f0. If no float, must study how gcc emulates floats;
246 pay attention to arg promotion.
247 User may have to cast\args to handle promotion correctly
248 since gdb won't know if prototype supplied or not.
249 */
250
251 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
252 {
253 int reg_size = register_size (gdbarch, ii + 3);
254
255 arg = args[argno];
256 type = check_typedef (value_type (arg));
257 len = TYPE_LENGTH (type);
258
259 if (TYPE_CODE (type) == TYPE_CODE_FLT)
260 {
261
262 /* Floating point arguments are passed in fpr's, as well as gpr's.
263 There are 13 fpr's reserved for passing parameters. At this point
264 there is no way we would run out of them. */
265
266 gdb_assert (len <= 8);
267
268 regcache_cooked_write (regcache,
269 tdep->ppc_fp0_regnum + 1 + f_argno,
270 value_contents (arg));
271 ++f_argno;
272 }
273
274 if (len > reg_size)
275 {
276
277 /* Argument takes more than one register. */
278 while (argbytes < len)
279 {
280 gdb_byte word[MAX_REGISTER_SIZE];
281 memset (word, 0, reg_size);
282 memcpy (word,
283 ((char *) value_contents (arg)) + argbytes,
284 (len - argbytes) > reg_size
285 ? reg_size : len - argbytes);
286 regcache_cooked_write (regcache,
287 tdep->ppc_gp0_regnum + 3 + ii,
288 word);
289 ++ii, argbytes += reg_size;
290
291 if (ii >= 8)
292 goto ran_out_of_registers_for_arguments;
293 }
294 argbytes = 0;
295 --ii;
296 }
297 else
298 {
299 /* Argument can fit in one register. No problem. */
300 int adj = gdbarch_byte_order (gdbarch)
301 == BFD_ENDIAN_BIG ? reg_size - len : 0;
302 gdb_byte word[MAX_REGISTER_SIZE];
303
304 memset (word, 0, reg_size);
305 memcpy (word, value_contents (arg), len);
306 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3 +ii, word);
307 }
308 ++argno;
309 }
310
311 ran_out_of_registers_for_arguments:
312
313 regcache_cooked_read_unsigned (regcache,
314 gdbarch_sp_regnum (gdbarch),
315 &saved_sp);
316
317 /* Location for 8 parameters are always reserved. */
318 sp -= wordsize * 8;
319
320 /* Another six words for back chain, TOC register, link register, etc. */
321 sp -= wordsize * 6;
322
323 /* Stack pointer must be quadword aligned. */
324 sp &= -16;
325
326 /* If there are more arguments, allocate space for them in
327 the stack, then push them starting from the ninth one. */
328
329 if ((argno < nargs) || argbytes)
330 {
331 int space = 0, jj;
332
333 if (argbytes)
334 {
335 space += ((len - argbytes + 3) & -4);
336 jj = argno + 1;
337 }
338 else
339 jj = argno;
340
341 for (; jj < nargs; ++jj)
342 {
343 struct value *val = args[jj];
344 space += ((TYPE_LENGTH (value_type (val))) + 3) & -4;
345 }
346
347 /* Add location required for the rest of the parameters. */
348 space = (space + 15) & -16;
349 sp -= space;
350
351 /* This is another instance we need to be concerned about
352 securing our stack space. If we write anything underneath %sp
353 (r1), we might conflict with the kernel who thinks he is free
354 to use this area. So, update %sp first before doing anything
355 else. */
356
357 regcache_raw_write_signed (regcache,
358 gdbarch_sp_regnum (gdbarch), sp);
359
360 /* If the last argument copied into the registers didn't fit there
361 completely, push the rest of it into stack. */
362
363 if (argbytes)
364 {
365 write_memory (sp + 24 + (ii * 4),
366 value_contents (arg) + argbytes,
367 len - argbytes);
368 ++argno;
369 ii += ((len - argbytes + 3) & -4) / 4;
370 }
371
372 /* Push the rest of the arguments into stack. */
373 for (; argno < nargs; ++argno)
374 {
375
376 arg = args[argno];
377 type = check_typedef (value_type (arg));
378 len = TYPE_LENGTH (type);
379
380
381 /* Float types should be passed in fpr's, as well as in the
382 stack. */
383 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
384 {
385
386 gdb_assert (len <= 8);
387
388 regcache_cooked_write (regcache,
389 tdep->ppc_fp0_regnum + 1 + f_argno,
390 value_contents (arg));
391 ++f_argno;
392 }
393
394 write_memory (sp + 24 + (ii * 4), value_contents (arg), len);
395 ii += ((len + 3) & -4) / 4;
396 }
397 }
398
399 /* Set the stack pointer. According to the ABI, the SP is meant to
400 be set _before_ the corresponding stack space is used. On AIX,
401 this even applies when the target has been completely stopped!
402 Not doing this can lead to conflicts with the kernel which thinks
403 that it still has control over this not-yet-allocated stack
404 region. */
405 regcache_raw_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
406
407 /* Set back chain properly. */
408 store_unsigned_integer (tmp_buffer, wordsize, byte_order, saved_sp);
409 write_memory (sp, tmp_buffer, wordsize);
410
411 /* Point the inferior function call's return address at the dummy's
412 breakpoint. */
413 regcache_raw_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
414
415 /* Set the TOC register, get the value from the objfile reader
416 which, in turn, gets it from the VMAP table. */
417 if (rs6000_find_toc_address_hook != NULL)
418 {
419 CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (func_addr);
420 regcache_raw_write_signed (regcache, tdep->ppc_toc_regnum, tocvalue);
421 }
422
423 target_store_registers (regcache, -1);
424 return sp;
425 }
426
427 static enum return_value_convention
428 rs6000_return_value (struct gdbarch *gdbarch, struct type *func_type,
429 struct type *valtype, struct regcache *regcache,
430 gdb_byte *readbuf, const gdb_byte *writebuf)
431 {
432 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
433 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
434 gdb_byte buf[8];
435
436 /* The calling convention this function implements assumes the
437 processor has floating-point registers. We shouldn't be using it
438 on PowerPC variants that lack them. */
439 gdb_assert (ppc_floating_point_unit_p (gdbarch));
440
441 /* AltiVec extension: Functions that declare a vector data type as a
442 return value place that return value in VR2. */
443 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
444 && TYPE_LENGTH (valtype) == 16)
445 {
446 if (readbuf)
447 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
448 if (writebuf)
449 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
450
451 return RETURN_VALUE_REGISTER_CONVENTION;
452 }
453
454 /* If the called subprogram returns an aggregate, there exists an
455 implicit first argument, whose value is the address of a caller-
456 allocated buffer into which the callee is assumed to store its
457 return value. All explicit parameters are appropriately
458 relabeled. */
459 if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
460 || TYPE_CODE (valtype) == TYPE_CODE_UNION
461 || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
462 return RETURN_VALUE_STRUCT_CONVENTION;
463
464 /* Scalar floating-point values are returned in FPR1 for float or
465 double, and in FPR1:FPR2 for quadword precision. Fortran
466 complex*8 and complex*16 are returned in FPR1:FPR2, and
467 complex*32 is returned in FPR1:FPR4. */
468 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
469 && (TYPE_LENGTH (valtype) == 4 || TYPE_LENGTH (valtype) == 8))
470 {
471 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
472 gdb_byte regval[8];
473
474 /* FIXME: kettenis/2007-01-01: Add support for quadword
475 precision and complex. */
476
477 if (readbuf)
478 {
479 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
480 convert_typed_floating (regval, regtype, readbuf, valtype);
481 }
482 if (writebuf)
483 {
484 convert_typed_floating (writebuf, valtype, regval, regtype);
485 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
486 }
487
488 return RETURN_VALUE_REGISTER_CONVENTION;
489 }
490
491 /* Values of the types int, long, short, pointer, and char (length
492 is less than or equal to four bytes), as well as bit values of
493 lengths less than or equal to 32 bits, must be returned right
494 justified in GPR3 with signed values sign extended and unsigned
495 values zero extended, as necessary. */
496 if (TYPE_LENGTH (valtype) <= tdep->wordsize)
497 {
498 if (readbuf)
499 {
500 ULONGEST regval;
501
502 /* For reading we don't have to worry about sign extension. */
503 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
504 &regval);
505 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), byte_order,
506 regval);
507 }
508 if (writebuf)
509 {
510 /* For writing, use unpack_long since that should handle any
511 required sign extension. */
512 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
513 unpack_long (valtype, writebuf));
514 }
515
516 return RETURN_VALUE_REGISTER_CONVENTION;
517 }
518
519 /* Eight-byte non-floating-point scalar values must be returned in
520 GPR3:GPR4. */
521
522 if (TYPE_LENGTH (valtype) == 8)
523 {
524 gdb_assert (TYPE_CODE (valtype) != TYPE_CODE_FLT);
525 gdb_assert (tdep->wordsize == 4);
526
527 if (readbuf)
528 {
529 gdb_byte regval[8];
530
531 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, regval);
532 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
533 regval + 4);
534 memcpy (readbuf, regval, 8);
535 }
536 if (writebuf)
537 {
538 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
539 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
540 writebuf + 4);
541 }
542
543 return RETURN_VALUE_REGISTER_CONVENTION;
544 }
545
546 return RETURN_VALUE_STRUCT_CONVENTION;
547 }
548
549 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
550
551 Usually a function pointer's representation is simply the address
552 of the function. On the RS/6000 however, a function pointer is
553 represented by a pointer to an OPD entry. This OPD entry contains
554 three words, the first word is the address of the function, the
555 second word is the TOC pointer (r2), and the third word is the
556 static chain value. Throughout GDB it is currently assumed that a
557 function pointer contains the address of the function, which is not
558 easy to fix. In addition, the conversion of a function address to
559 a function pointer would require allocation of an OPD entry in the
560 inferior's memory space, with all its drawbacks. To be able to
561 call C++ virtual methods in the inferior (which are called via
562 function pointers), find_function_addr uses this function to get the
563 function address from a function pointer. */
564
565 /* Return real function address if ADDR (a function pointer) is in the data
566 space and is therefore a special function pointer. */
567
568 static CORE_ADDR
569 rs6000_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
570 CORE_ADDR addr,
571 struct target_ops *targ)
572 {
573 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
574 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
575 struct obj_section *s;
576
577 s = find_pc_section (addr);
578
579 /* Normally, functions live inside a section that is executable.
580 So, if ADDR points to a non-executable section, then treat it
581 as a function descriptor and return the target address iff
582 the target address itself points to a section that is executable. */
583 if (s && (s->the_bfd_section->flags & SEC_CODE) == 0)
584 {
585 CORE_ADDR pc =
586 read_memory_unsigned_integer (addr, tdep->wordsize, byte_order);
587 struct obj_section *pc_section = find_pc_section (pc);
588
589 if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
590 return pc;
591 }
592
593 return addr;
594 }
595
596
597 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
598
599 static CORE_ADDR
600 branch_dest (struct frame_info *frame, int opcode, int instr,
601 CORE_ADDR pc, CORE_ADDR safety)
602 {
603 struct gdbarch *gdbarch = get_frame_arch (frame);
604 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
605 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
606 CORE_ADDR dest;
607 int immediate;
608 int absolute;
609 int ext_op;
610
611 absolute = (int) ((instr >> 1) & 1);
612
613 switch (opcode)
614 {
615 case 18:
616 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
617 if (absolute)
618 dest = immediate;
619 else
620 dest = pc + immediate;
621 break;
622
623 case 16:
624 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
625 if (absolute)
626 dest = immediate;
627 else
628 dest = pc + immediate;
629 break;
630
631 case 19:
632 ext_op = (instr >> 1) & 0x3ff;
633
634 if (ext_op == 16) /* br conditional register */
635 {
636 dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
637
638 /* If we are about to return from a signal handler, dest is
639 something like 0x3c90. The current frame is a signal handler
640 caller frame, upon completion of the sigreturn system call
641 execution will return to the saved PC in the frame. */
642 if (dest < AIX_TEXT_SEGMENT_BASE)
643 dest = read_memory_unsigned_integer
644 (get_frame_base (frame) + SIG_FRAME_PC_OFFSET,
645 tdep->wordsize, byte_order);
646 }
647
648 else if (ext_op == 528) /* br cond to count reg */
649 {
650 dest = get_frame_register_unsigned (frame, tdep->ppc_ctr_regnum) & ~3;
651
652 /* If we are about to execute a system call, dest is something
653 like 0x22fc or 0x3b00. Upon completion the system call
654 will return to the address in the link register. */
655 if (dest < AIX_TEXT_SEGMENT_BASE)
656 dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
657 }
658 else
659 return -1;
660 break;
661
662 default:
663 return -1;
664 }
665 return (dest < AIX_TEXT_SEGMENT_BASE) ? safety : dest;
666 }
667
668 /* AIX does not support PT_STEP. Simulate it. */
669
670 static int
671 rs6000_software_single_step (struct frame_info *frame)
672 {
673 struct gdbarch *gdbarch = get_frame_arch (frame);
674 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
675 int ii, insn;
676 CORE_ADDR loc;
677 CORE_ADDR breaks[2];
678 int opcode;
679
680 loc = get_frame_pc (frame);
681
682 insn = read_memory_integer (loc, 4, byte_order);
683
684 if (ppc_deal_with_atomic_sequence (frame))
685 return 1;
686
687 breaks[0] = loc + PPC_INSN_SIZE;
688 opcode = insn >> 26;
689 breaks[1] = branch_dest (frame, opcode, insn, loc, breaks[0]);
690
691 /* Don't put two breakpoints on the same address. */
692 if (breaks[1] == breaks[0])
693 breaks[1] = -1;
694
695 for (ii = 0; ii < 2; ++ii)
696 {
697 /* ignore invalid breakpoint. */
698 if (breaks[ii] == -1)
699 continue;
700 insert_single_step_breakpoint (gdbarch, breaks[ii]);
701 }
702
703 errno = 0; /* FIXME, don't ignore errors! */
704 /* What errors? {read,write}_memory call error(). */
705 return 1;
706 }
707
708 static enum gdb_osabi
709 rs6000_aix_osabi_sniffer (bfd *abfd)
710 {
711
712 if (bfd_get_flavour (abfd) == bfd_target_xcoff_flavour);
713 return GDB_OSABI_AIX;
714
715 return GDB_OSABI_UNKNOWN;
716 }
717
718 static void
719 rs6000_aix_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
720 {
721 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
722
723 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
724 set_gdbarch_software_single_step (gdbarch, rs6000_software_single_step);
725
726 /* Displaced stepping is currently not supported in combination with
727 software single-stepping. */
728 set_gdbarch_displaced_step_copy_insn (gdbarch, NULL);
729 set_gdbarch_displaced_step_fixup (gdbarch, NULL);
730 set_gdbarch_displaced_step_free_closure (gdbarch, NULL);
731 set_gdbarch_displaced_step_location (gdbarch, NULL);
732
733 set_gdbarch_push_dummy_call (gdbarch, rs6000_push_dummy_call);
734 set_gdbarch_return_value (gdbarch, rs6000_return_value);
735 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
736
737 /* Handle RS/6000 function pointers (which are really function
738 descriptors). */
739 set_gdbarch_convert_from_func_ptr_addr
740 (gdbarch, rs6000_convert_from_func_ptr_addr);
741
742 /* Core file support. */
743 set_gdbarch_regset_from_core_section
744 (gdbarch, rs6000_aix_regset_from_core_section);
745
746 if (tdep->wordsize == 8)
747 tdep->lr_frame_offset = 16;
748 else
749 tdep->lr_frame_offset = 8;
750
751 if (tdep->wordsize == 4)
752 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
753 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
754 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
755 224. */
756 set_gdbarch_frame_red_zone_size (gdbarch, 224);
757 else
758 set_gdbarch_frame_red_zone_size (gdbarch, 0);
759 }
760
761 /* Provide a prototype to silence -Wmissing-prototypes. */
762 extern initialize_file_ftype _initialize_rs6000_aix_tdep;
763
764 void
765 _initialize_rs6000_aix_tdep (void)
766 {
767 gdbarch_register_osabi_sniffer (bfd_arch_rs6000,
768 bfd_target_xcoff_flavour,
769 rs6000_aix_osabi_sniffer);
770 gdbarch_register_osabi_sniffer (bfd_arch_powerpc,
771 bfd_target_xcoff_flavour,
772 rs6000_aix_osabi_sniffer);
773
774 gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_AIX,
775 rs6000_aix_init_osabi);
776 gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_AIX,
777 rs6000_aix_init_osabi);
778 }
779