1 /* Target-dependent code for SPARC.
3 Copyright 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 #include "arch-utils.h"
25 #include "floatformat.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
39 #include "gdb_assert.h"
40 #include "gdb_string.h"
42 #include "sparc-tdep.h"
46 /* This file implements the The SPARC 32-bit ABI as defined by the
47 section "Low-Level System Information" of the SPARC Compliance
48 Definition (SCD) 2.4.1, which is the 32-bit System V psABI for
49 SPARC. The SCD lists changes with respect to the origional 32-bit
50 psABI as defined in the "System V ABI, SPARC Processor
53 Note that if we talk about SunOS, we mean SunOS 4.x, which was
54 BSD-based, which is sometimes (retroactively?) referred to as
55 Solaris 1.x. If we talk about Solaris we mean Solaris 2.x and
56 above (Solaris 7, 8 and 9 are nothing but Solaris 2.7, 2.8 and 2.9
57 suffering from severe version number inflation). Solaris 2.x is
58 also known as SunOS 5.x, since that's what uname(1) says. Solaris
61 /* Please use the sparc32_-prefix for 32-bit specific code, the
62 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
63 code that can handle both. The 64-bit specific code lives in
64 sparc64-tdep.c; don't add any here. */
66 /* The SPARC Floating-Point Quad-Precision format is similar to
67 big-endian IA-64 Quad-recision format. */
68 #define floatformat_sparc_quad floatformat_ia64_quad_big
70 /* The stack pointer is offset from the stack frame by a BIAS of 2047
71 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
72 hosts, so undefine it first. */
76 /* Macros to extract fields from SPARC instructions. */
77 #define X_OP(i) (((i) >> 30) & 0x3)
78 #define X_RD(i) (((i) >> 25) & 0x1f)
79 #define X_A(i) (((i) >> 29) & 1)
80 #define X_COND(i) (((i) >> 25) & 0xf)
81 #define X_OP2(i) (((i) >> 22) & 0x7)
82 #define X_IMM22(i) ((i) & 0x3fffff)
83 #define X_OP3(i) (((i) >> 19) & 0x3f)
84 #define X_I(i) (((i) >> 13) & 1)
85 /* Sign extension macros. */
86 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
87 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
89 /* Fetch the instruction at PC. Instructions are always big-endian
90 even if the processor operates in little-endian mode. */
93 sparc_fetch_instruction (CORE_ADDR pc
)
99 read_memory (pc
, buf
, sizeof (buf
));
102 for (i
= 0; i
< sizeof (buf
); i
++)
103 insn
= (insn
<< 8) | buf
[i
];
107 /* Return the contents if register REGNUM as an address. */
110 sparc_address_from_register (int regnum
)
114 regcache_cooked_read_unsigned (current_regcache
, regnum
, &addr
);
119 /* The functions on this page are intended to be used to classify
120 function arguments. */
122 /* Check whether TYPE is "Integral or Pointer". */
125 sparc_integral_or_pointer_p (const struct type
*type
)
127 switch (TYPE_CODE (type
))
133 case TYPE_CODE_RANGE
:
135 /* We have byte, half-word, word and extended-word/doubleword
136 integral types. The doubleword is an extension to the
137 origional 32-bit ABI by the SCD 2.4.x. */
138 int len
= TYPE_LENGTH (type
);
139 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
145 /* Allow either 32-bit or 64-bit pointers. */
146 int len
= TYPE_LENGTH (type
);
147 return (len
== 4 || len
== 8);
157 /* Check whether TYPE is "Floating". */
160 sparc_floating_p (const struct type
*type
)
162 switch (TYPE_CODE (type
))
166 int len
= TYPE_LENGTH (type
);
167 return (len
== 4 || len
== 8 || len
== 16);
176 /* Check whether TYPE is "Structure or Union". */
179 sparc_structure_or_union_p (const struct type
*type
)
181 switch (TYPE_CODE (type
))
183 case TYPE_CODE_STRUCT
:
184 case TYPE_CODE_UNION
:
193 /* Register information. */
195 static const char *sparc32_register_names
[] =
197 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
198 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
199 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
200 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
202 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
203 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
204 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
205 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
207 "y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
210 /* Total number of registers. */
211 #define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
213 /* We provide the aliases %d0..%d30 for the floating registers as
214 "psuedo" registers. */
216 static const char *sparc32_pseudo_register_names
[] =
218 "d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
219 "d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30"
222 /* Total number of pseudo registers. */
223 #define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names)
225 /* Return the name of register REGNUM. */
228 sparc32_register_name (int regnum
)
230 if (regnum
>= 0 && regnum
< SPARC32_NUM_REGS
)
231 return sparc32_register_names
[regnum
];
233 if (regnum
< SPARC32_NUM_REGS
+ SPARC32_NUM_PSEUDO_REGS
)
234 return sparc32_pseudo_register_names
[regnum
- SPARC32_NUM_REGS
];
239 /* Return the GDB type object for the "standard" data type of data in
243 sparc32_register_type (struct gdbarch
*gdbarch
, int regnum
)
245 if (regnum
>= SPARC_F0_REGNUM
&& regnum
<= SPARC_F31_REGNUM
)
246 return builtin_type_float
;
248 if (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
)
249 return builtin_type_double
;
251 if (regnum
== SPARC_SP_REGNUM
|| regnum
== SPARC_FP_REGNUM
)
252 return builtin_type_void_data_ptr
;
254 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
255 return builtin_type_void_func_ptr
;
257 return builtin_type_int32
;
261 sparc32_pseudo_register_read (struct gdbarch
*gdbarch
,
262 struct regcache
*regcache
,
263 int regnum
, void *buf
)
265 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
267 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
268 regcache_raw_read (regcache
, regnum
, buf
);
269 regcache_raw_read (regcache
, regnum
+ 1, ((char *)buf
) + 4);
273 sparc32_pseudo_register_write (struct gdbarch
*gdbarch
,
274 struct regcache
*regcache
,
275 int regnum
, const void *buf
)
277 gdb_assert (regnum
>= SPARC32_D0_REGNUM
&& regnum
<= SPARC32_D30_REGNUM
);
279 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC32_D0_REGNUM
);
280 regcache_raw_write (regcache
, regnum
, buf
);
281 regcache_raw_write (regcache
, regnum
+ 1, ((const char *)buf
) + 4);
286 sparc32_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
,
287 CORE_ADDR funcaddr
, int using_gcc
,
288 struct value
**args
, int nargs
,
289 struct type
*value_type
,
290 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
)
295 if (using_struct_return (value_type
, using_gcc
))
299 /* This is an UNIMP instruction. */
300 store_unsigned_integer (buf
, 4, TYPE_LENGTH (value_type
) & 0x1fff);
301 write_memory (sp
- 8, buf
, 4);
309 sparc32_store_arguments (struct regcache
*regcache
, int nargs
,
310 struct value
**args
, CORE_ADDR sp
,
311 int struct_return
, CORE_ADDR struct_addr
)
313 /* Number of words in the "parameter array". */
314 int num_elements
= 0;
318 for (i
= 0; i
< nargs
; i
++)
320 struct type
*type
= VALUE_TYPE (args
[i
]);
321 int len
= TYPE_LENGTH (type
);
323 if (sparc_structure_or_union_p (type
)
324 || (sparc_floating_p (type
) && len
== 16))
326 /* Structure, Union and Quad-Precision Arguments. */
329 /* Use doubleword alignment for these values. That's always
330 correct, and wasting a few bytes shouldn't be a problem. */
333 write_memory (sp
, VALUE_CONTENTS (args
[i
]), len
);
334 args
[i
] = value_from_pointer (lookup_pointer_type (type
), sp
);
337 else if (sparc_floating_p (type
))
339 /* Floating arguments. */
340 gdb_assert (len
== 4 || len
== 8);
341 num_elements
+= (len
/ 4);
345 /* Integral and pointer arguments. */
346 gdb_assert (sparc_integral_or_pointer_p (type
));
349 args
[i
] = value_cast (builtin_type_int32
, args
[i
]);
350 num_elements
+= ((len
+ 3) / 4);
354 /* Always allocate at least six words. */
355 sp
-= max (6, num_elements
) * 4;
357 /* The psABI says that "Software convention requires space for the
358 struct/union return value pointer, even if the word is unused." */
361 /* The psABI says that "Although software convention and the
362 operating system require every stack frame to be doubleword
366 for (i
= 0; i
< nargs
; i
++)
368 char *valbuf
= VALUE_CONTENTS (args
[i
]);
369 struct type
*type
= VALUE_TYPE (args
[i
]);
370 int len
= TYPE_LENGTH (type
);
372 gdb_assert (len
== 4 || len
== 8);
376 int regnum
= SPARC_O0_REGNUM
+ element
;
378 regcache_cooked_write (regcache
, regnum
, valbuf
);
379 if (len
> 4 && element
< 5)
380 regcache_cooked_write (regcache
, regnum
+ 1, valbuf
+ 4);
383 /* Always store the argument in memory. */
384 write_memory (sp
+ 4 + element
* 4, valbuf
, len
);
388 gdb_assert (element
== num_elements
);
394 store_unsigned_integer (buf
, 4, struct_addr
);
395 write_memory (sp
, buf
, 4);
402 sparc32_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
403 struct regcache
*regcache
, CORE_ADDR bp_addr
,
404 int nargs
, struct value
**args
, CORE_ADDR sp
,
405 int struct_return
, CORE_ADDR struct_addr
)
407 CORE_ADDR call_pc
= (struct_return
? (bp_addr
- 12) : (bp_addr
- 8));
409 /* Set return address. */
410 regcache_cooked_write_unsigned (regcache
, SPARC_O7_REGNUM
, call_pc
);
412 /* Set up function arguments. */
413 sp
= sparc32_store_arguments (regcache
, nargs
, args
, sp
,
414 struct_return
, struct_addr
);
416 /* Allocate the 16-word window save area. */
419 /* Stack should be doubleword aligned at this point. */
420 gdb_assert (sp
% 8 == 0);
422 /* Finally, update the stack pointer. */
423 regcache_cooked_write_unsigned (regcache
, SPARC_SP_REGNUM
, sp
);
429 /* Use the program counter to determine the contents and size of a
430 breakpoint instruction. Return a pointer to a string of bytes that
431 encode a breakpoint instruction, store the length of the string in
432 *LEN and optionally adjust *PC to point to the correct memory
433 location for inserting the breakpoint. */
435 static const unsigned char *
436 sparc_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
438 static unsigned char break_insn
[] = { 0x91, 0xd0, 0x20, 0x01 };
440 *len
= sizeof (break_insn
);
445 /* Allocate and initialize a frame cache. */
447 static struct sparc_frame_cache
*
448 sparc_alloc_frame_cache (void)
450 struct sparc_frame_cache
*cache
;
453 cache
= FRAME_OBSTACK_ZALLOC (struct sparc_frame_cache
);
459 /* Frameless until proven otherwise. */
460 cache
->frameless_p
= 1;
462 cache
->struct_return_p
= 0;
468 sparc_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
469 struct sparc_frame_cache
*cache
)
471 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
476 if (current_pc
<= pc
)
479 /* We have to handle to "Procedure Linkage Table" (PLT) special. On
480 SPARC the linker usually defines a symbol (typically
481 _PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
482 This symbol makes us end up here with PC pointing at the start of
483 the PLT and CURRENT_PC probably pointing at a PLT entry. If we
484 would do our normal prologue analysis, we would probably conclude
485 that we've got a frame when in reality we don't, since the
486 dynamic linker patches up the first PLT with some code that
487 starts with a SAVE instruction. Patch up PC such that it points
488 at the start of our PLT entry. */
489 if (tdep
->plt_entry_size
> 0 && in_plt_section (current_pc
, NULL
))
490 pc
= current_pc
- ((current_pc
- pc
) % tdep
->plt_entry_size
);
492 insn
= sparc_fetch_instruction (pc
);
494 /* Recognize a SETHI insn and record its destination. */
495 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 0x04)
500 insn
= sparc_fetch_instruction (pc
+ 4);
503 /* Allow for an arithmetic operation on DEST or %g1. */
504 if (X_OP (insn
) == 2 && X_I (insn
)
505 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
509 insn
= sparc_fetch_instruction (pc
+ 8);
512 /* Check for the SAVE instruction that sets up the frame. */
513 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
515 cache
->frameless_p
= 0;
516 return pc
+ offset
+ 4;
523 sparc_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
525 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
526 return frame_unwind_register_unsigned (next_frame
, tdep
->pc_regnum
);
529 /* Return PC of first real instruction of the function starting at
533 sparc32_skip_prologue (CORE_ADDR start_pc
)
535 struct symtab_and_line sal
;
536 CORE_ADDR func_start
, func_end
;
537 struct sparc_frame_cache cache
;
539 /* This is the preferred method, find the end of the prologue by
540 using the debugging information. */
541 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
543 sal
= find_pc_line (func_start
, 0);
545 if (sal
.end
< func_end
546 && start_pc
<= sal
.end
)
550 return sparc_analyze_prologue (start_pc
, 0xffffffffUL
, &cache
);
555 struct sparc_frame_cache
*
556 sparc_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
558 struct sparc_frame_cache
*cache
;
563 cache
= sparc_alloc_frame_cache ();
566 /* In priciple, for normal frames, %fp (%i6) holds the frame
567 pointer, which holds the base address for the current stack
570 cache
->base
= frame_unwind_register_unsigned (next_frame
, SPARC_FP_REGNUM
);
571 if (cache
->base
== 0)
574 cache
->pc
= frame_func_unwind (next_frame
);
577 CORE_ADDR addr_in_block
= frame_unwind_address_in_block (next_frame
);
578 sparc_analyze_prologue (cache
->pc
, addr_in_block
, cache
);
581 if (cache
->frameless_p
)
583 /* We didn't find a valid frame, which means that CACHE->base
584 currently holds the frame pointer for our calling frame. */
585 cache
->base
= frame_unwind_register_unsigned (next_frame
,
592 struct sparc_frame_cache
*
593 sparc32_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
595 struct sparc_frame_cache
*cache
;
601 cache
= sparc_frame_cache (next_frame
, this_cache
);
603 sym
= find_pc_function (cache
->pc
);
606 struct type
*type
= check_typedef (SYMBOL_TYPE (sym
));
607 enum type_code code
= TYPE_CODE (type
);
609 if (code
== TYPE_CODE_FUNC
|| code
== TYPE_CODE_METHOD
)
611 type
= check_typedef (TYPE_TARGET_TYPE (type
));
612 if (sparc_structure_or_union_p (type
)
613 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
614 cache
->struct_return_p
= 1;
622 sparc32_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
623 struct frame_id
*this_id
)
625 struct sparc_frame_cache
*cache
=
626 sparc32_frame_cache (next_frame
, this_cache
);
628 /* This marks the outermost frame. */
629 if (cache
->base
== 0)
632 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
636 sparc32_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
637 int regnum
, int *optimizedp
,
638 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
639 int *realnump
, void *valuep
)
641 struct sparc_frame_cache
*cache
=
642 sparc32_frame_cache (next_frame
, this_cache
);
644 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== SPARC32_NPC_REGNUM
)
652 CORE_ADDR pc
= (regnum
== SPARC32_NPC_REGNUM
) ? 4 : 0;
654 /* If this functions has a Structure, Union or
655 Quad-Precision return value, we have to skip the UNIMP
656 instruction that encodes the size of the structure. */
657 if (cache
->struct_return_p
)
660 regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
661 pc
+= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
662 store_unsigned_integer (valuep
, 4, pc
);
667 /* The previous frame's `local' and `in' registers have been saved
668 in the register save area. */
669 if (!cache
->frameless_p
670 && regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
)
673 *lvalp
= lval_memory
;
674 *addrp
= cache
->base
+ (regnum
- SPARC_L0_REGNUM
) * 4;
678 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
680 /* Read the value in from memory. */
681 read_memory (*addrp
, valuep
, register_size (gdbarch
, regnum
));
686 /* The previous frame's `out' registers are accessable as the
687 current frame's `in' registers. */
688 if (!cache
->frameless_p
689 && regnum
>= SPARC_O0_REGNUM
&& regnum
<= SPARC_O7_REGNUM
)
690 regnum
+= (SPARC_I0_REGNUM
- SPARC_O0_REGNUM
);
692 frame_register_unwind (next_frame
, regnum
,
693 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
696 static const struct frame_unwind sparc32_frame_unwind
=
699 sparc32_frame_this_id
,
700 sparc32_frame_prev_register
703 static const struct frame_unwind
*
704 sparc32_frame_sniffer (struct frame_info
*next_frame
)
706 return &sparc32_frame_unwind
;
711 sparc32_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
713 struct sparc_frame_cache
*cache
=
714 sparc32_frame_cache (next_frame
, this_cache
);
719 static const struct frame_base sparc32_frame_base
=
721 &sparc32_frame_unwind
,
722 sparc32_frame_base_address
,
723 sparc32_frame_base_address
,
724 sparc32_frame_base_address
727 static struct frame_id
728 sparc_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
732 sp
= frame_unwind_register_unsigned (next_frame
, SPARC_SP_REGNUM
);
733 return frame_id_build (sp
, frame_pc_unwind (next_frame
));
737 /* Extract from an array REGBUF containing the (raw) register state, a
738 function return value of TYPE, and copy that into VALBUF. */
741 sparc32_extract_return_value (struct type
*type
, struct regcache
*regcache
,
744 int len
= TYPE_LENGTH (type
);
747 gdb_assert (!sparc_structure_or_union_p (type
));
748 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
750 if (sparc_floating_p (type
))
752 /* Floating return values. */
753 regcache_cooked_read (regcache
, SPARC_F0_REGNUM
, buf
);
755 regcache_cooked_read (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
756 memcpy (valbuf
, buf
, len
);
760 /* Integral and pointer return values. */
761 gdb_assert (sparc_integral_or_pointer_p (type
));
763 regcache_cooked_read (regcache
, SPARC_O0_REGNUM
, buf
);
766 regcache_cooked_read (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
767 gdb_assert (len
== 8);
768 memcpy (valbuf
, buf
, 8);
772 /* Just stripping off any unused bytes should preserve the
773 signed-ness just fine. */
774 memcpy (valbuf
, buf
+ 4 - len
, len
);
779 /* Write into the appropriate registers a function return value stored
780 in VALBUF of type TYPE. */
783 sparc32_store_return_value (struct type
*type
, struct regcache
*regcache
,
786 int len
= TYPE_LENGTH (type
);
789 gdb_assert (!sparc_structure_or_union_p (type
));
790 gdb_assert (!(sparc_floating_p (type
) && len
== 16));
792 if (sparc_floating_p (type
))
794 /* Floating return values. */
795 memcpy (buf
, valbuf
, len
);
796 regcache_cooked_write (regcache
, SPARC_F0_REGNUM
, buf
);
798 regcache_cooked_write (regcache
, SPARC_F1_REGNUM
, buf
+ 4);
802 /* Integral and pointer return values. */
803 gdb_assert (sparc_integral_or_pointer_p (type
));
807 gdb_assert (len
== 8);
808 memcpy (buf
, valbuf
, 8);
809 regcache_cooked_write (regcache
, SPARC_O1_REGNUM
, buf
+ 4);
813 /* ??? Do we need to do any sign-extension here? */
814 memcpy (buf
+ 4 - len
, valbuf
, len
);
816 regcache_cooked_write (regcache
, SPARC_O0_REGNUM
, buf
);
820 static enum return_value_convention
821 sparc32_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
822 struct regcache
*regcache
, void *readbuf
,
823 const void *writebuf
)
825 if (sparc_structure_or_union_p (type
)
826 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16))
827 return RETURN_VALUE_STRUCT_CONVENTION
;
830 sparc32_extract_return_value (type
, regcache
, readbuf
);
832 sparc32_store_return_value (type
, regcache
, writebuf
);
834 return RETURN_VALUE_REGISTER_CONVENTION
;
837 /* Extract from REGCACHE, which contains the (raw) register state, the
838 address in which a function should return its structure value, as a
842 sparc32_extract_struct_value_address (struct regcache
*regcache
)
846 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
847 return read_memory_unsigned_integer (sp
+ 64, 4);
851 sparc32_stabs_argument_has_addr (struct gdbarch
*gdbarch
, struct type
*type
)
853 return (sparc_structure_or_union_p (type
)
854 || (sparc_floating_p (type
) && TYPE_LENGTH (type
) == 16));
858 /* The SPARC Architecture doesn't have hardware single-step support,
859 and most operating systems don't implement it either, so we provide
860 software single-step mechanism. */
863 sparc_analyze_control_transfer (CORE_ADDR pc
, CORE_ADDR
*npc
)
865 unsigned long insn
= sparc_fetch_instruction (pc
);
866 int conditional_p
= X_COND (insn
) & 0x7;
868 long offset
= 0; /* Must be signed for sign-extend. */
870 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 3 && (insn
& 0x1000000) == 0)
872 /* Branch on Integer Register with Prediction (BPr). */
876 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 6)
878 /* Branch on Floating-Point Condition Codes (FBfcc). */
880 offset
= 4 * X_DISP22 (insn
);
882 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 5)
884 /* Branch on Floating-Point Condition Codes with Prediction
887 offset
= 4 * X_DISP19 (insn
);
889 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 2)
891 /* Branch on Integer Condition Codes (Bicc). */
893 offset
= 4 * X_DISP22 (insn
);
895 else if (X_OP (insn
) == 0 && X_OP2 (insn
) == 1)
897 /* Branch on Integer Condition Codes with Prediction (BPcc). */
899 offset
= 4 * X_DISP19 (insn
);
902 /* FIXME: Handle DONE and RETRY instructions. */
904 /* FIXME: Handle the Trap instruction. */
910 /* For conditional branches, return nPC + 4 iff the annul
912 return (X_A (insn
) ? *npc
+ 4 : 0);
916 /* For unconditional branches, return the target if its
917 specified condition is "always" and return nPC + 4 if the
918 condition is "never". If the annul bit is 1, set *NPC to
920 if (X_COND (insn
) == 0x0)
921 pc
= *npc
, offset
= 4;
925 gdb_assert (offset
!= 0);
934 sparc_software_single_step (enum target_signal sig
, int insert_breakpoints_p
)
936 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
937 static CORE_ADDR npc
, nnpc
;
938 static char npc_save
[4], nnpc_save
[4];
940 if (insert_breakpoints_p
)
944 pc
= sparc_address_from_register (tdep
->pc_regnum
);
945 npc
= sparc_address_from_register (tdep
->npc_regnum
);
947 /* Analyze the instruction at PC. */
948 nnpc
= sparc_analyze_control_transfer (pc
, &npc
);
950 target_insert_breakpoint (npc
, npc_save
);
952 target_insert_breakpoint (nnpc
, nnpc_save
);
954 /* Assert that we have set at least one breakpoint, and that
955 they're not set at the same spot. */
956 gdb_assert (npc
!= 0 || nnpc
!= 0);
957 gdb_assert (nnpc
!= npc
);
962 target_remove_breakpoint (npc
, npc_save
);
964 target_remove_breakpoint (nnpc
, nnpc_save
);
969 sparc_write_pc (CORE_ADDR pc
, ptid_t ptid
)
971 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
973 write_register_pid (tdep
->pc_regnum
, pc
, ptid
);
974 write_register_pid (tdep
->npc_regnum
, pc
+ 4, ptid
);
977 /* Unglobalize NAME. */
980 sparc_stabs_unglobalize_name (char *name
)
982 /* The Sun compilers (Sun ONE Studio, Forte Developer, Sun WorkShop,
983 SunPRO) convert file static variables into global values, a
984 process known as globalization. In order to do this, the
985 compiler will create a unique prefix and prepend it to each file
986 static variable. For static variables within a function, this
987 globalization prefix is followed by the function name (nested
988 static variables within a function are supposed to generate a
989 warning message, and are left alone). The procedure is
990 documented in the Stabs Interface Manual, which is distrubuted
991 with the compilers, although version 4.0 of the manual seems to
992 be incorrect in some places, at least for SPARC. The
993 globalization prefix is encoded into an N_OPT stab, with the form
994 "G=<prefix>". The globalization prefix always seems to start
995 with a dollar sign '$'; a dot '.' is used as a seperator. So we
996 simply strip everything up until the last dot. */
1000 char *p
= strrchr (name
, '.');
1009 /* Return the appropriate register set for the core section identified
1010 by SECT_NAME and SECT_SIZE. */
1012 const struct regset
*
1013 sparc_regset_from_core_section (struct gdbarch
*gdbarch
,
1014 const char *sect_name
, size_t sect_size
)
1016 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1018 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1019 return tdep
->gregset
;
1021 if (strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1022 return tdep
->fpregset
;
1028 static struct gdbarch
*
1029 sparc32_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1031 struct gdbarch_tdep
*tdep
;
1032 struct gdbarch
*gdbarch
;
1034 /* If there is already a candidate, use it. */
1035 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1037 return arches
->gdbarch
;
1039 /* Allocate space for the new architecture. */
1040 tdep
= XMALLOC (struct gdbarch_tdep
);
1041 gdbarch
= gdbarch_alloc (&info
, tdep
);
1043 tdep
->pc_regnum
= SPARC32_PC_REGNUM
;
1044 tdep
->npc_regnum
= SPARC32_NPC_REGNUM
;
1045 tdep
->gregset
= NULL
;
1046 tdep
->sizeof_gregset
= 20 * 4;
1047 tdep
->fpregset
= NULL
;
1048 tdep
->sizeof_fpregset
= 33 * 4;
1049 tdep
->plt_entry_size
= 0;
1051 set_gdbarch_long_double_bit (gdbarch
, 128);
1052 set_gdbarch_long_double_format (gdbarch
, &floatformat_sparc_quad
);
1054 set_gdbarch_num_regs (gdbarch
, SPARC32_NUM_REGS
);
1055 set_gdbarch_register_name (gdbarch
, sparc32_register_name
);
1056 set_gdbarch_register_type (gdbarch
, sparc32_register_type
);
1057 set_gdbarch_num_pseudo_regs (gdbarch
, SPARC32_NUM_PSEUDO_REGS
);
1058 set_gdbarch_pseudo_register_read (gdbarch
, sparc32_pseudo_register_read
);
1059 set_gdbarch_pseudo_register_write (gdbarch
, sparc32_pseudo_register_write
);
1061 /* Register numbers of various important registers. */
1062 set_gdbarch_sp_regnum (gdbarch
, SPARC_SP_REGNUM
); /* %sp */
1063 set_gdbarch_pc_regnum (gdbarch
, SPARC32_PC_REGNUM
); /* %pc */
1064 set_gdbarch_fp0_regnum (gdbarch
, SPARC_F0_REGNUM
); /* %f0 */
1066 /* Call dummy code. */
1067 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
1068 set_gdbarch_push_dummy_code (gdbarch
, sparc32_push_dummy_code
);
1069 set_gdbarch_push_dummy_call (gdbarch
, sparc32_push_dummy_call
);
1071 set_gdbarch_return_value (gdbarch
, sparc32_return_value
);
1072 set_gdbarch_extract_struct_value_address
1073 (gdbarch
, sparc32_extract_struct_value_address
);
1074 set_gdbarch_stabs_argument_has_addr
1075 (gdbarch
, sparc32_stabs_argument_has_addr
);
1077 set_gdbarch_skip_prologue (gdbarch
, sparc32_skip_prologue
);
1079 /* Stack grows downward. */
1080 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1082 set_gdbarch_breakpoint_from_pc (gdbarch
, sparc_breakpoint_from_pc
);
1083 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
1085 set_gdbarch_frame_args_skip (gdbarch
, 8);
1087 set_gdbarch_print_insn (gdbarch
, print_insn_sparc
);
1089 set_gdbarch_software_single_step (gdbarch
, sparc_software_single_step
);
1090 set_gdbarch_write_pc (gdbarch
, sparc_write_pc
);
1092 set_gdbarch_unwind_dummy_id (gdbarch
, sparc_unwind_dummy_id
);
1094 set_gdbarch_unwind_pc (gdbarch
, sparc_unwind_pc
);
1096 frame_base_set_default (gdbarch
, &sparc32_frame_base
);
1098 /* Hook in ABI-specific overrides, if they have been registered. */
1099 gdbarch_init_osabi (info
, gdbarch
);
1101 frame_unwind_append_sniffer (gdbarch
, sparc32_frame_sniffer
);
1103 /* If we have register sets, enable the generic core file support. */
1104 if (tdep
->gregset
&& tdep
->fpregset
)
1105 set_gdbarch_regset_from_core_section (gdbarch
,
1106 sparc_regset_from_core_section
);
1111 /* Helper functions for dealing with register windows. */
1114 sparc_supply_rwindow (struct regcache
*regcache
, CORE_ADDR sp
, int regnum
)
1122 /* Registers are 64-bit. */
1125 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1127 if (regnum
== i
|| regnum
== -1)
1129 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1130 regcache_raw_supply (regcache
, i
, buf
);
1136 /* Registers are 32-bit. Toss any sign-extension of the stack
1140 /* Clear out the top half of the temporary buffer, and put the
1141 register value in the bottom half if we're in 64-bit mode. */
1142 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1148 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1150 if (regnum
== i
|| regnum
== -1)
1152 target_read_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1154 regcache_raw_supply (regcache
, i
, buf
);
1161 sparc_collect_rwindow (const struct regcache
*regcache
,
1162 CORE_ADDR sp
, int regnum
)
1170 /* Registers are 64-bit. */
1173 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1175 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1177 regcache_raw_collect (regcache
, i
, buf
);
1178 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 8), buf
, 8);
1184 /* Registers are 32-bit. Toss any sign-extension of the stack
1188 /* Only use the bottom half if we're in 64-bit mode. */
1189 if (gdbarch_ptr_bit (current_gdbarch
) == 64)
1192 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1194 if (regnum
== -1 || regnum
== SPARC_SP_REGNUM
|| regnum
== i
)
1196 regcache_raw_collect (regcache
, i
, buf
);
1197 target_write_memory (sp
+ ((i
- SPARC_L0_REGNUM
) * 4),
1204 /* Helper functions for dealing with register sets. */
1207 sparc32_supply_gregset (const struct sparc_gregset
*gregset
,
1208 struct regcache
*regcache
,
1209 int regnum
, const void *gregs
)
1211 const char *regs
= gregs
;
1214 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1215 regcache_raw_supply (regcache
, SPARC32_PSR_REGNUM
,
1216 regs
+ gregset
->r_psr_offset
);
1218 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1219 regcache_raw_supply (regcache
, SPARC32_PC_REGNUM
,
1220 regs
+ gregset
->r_pc_offset
);
1222 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1223 regcache_raw_supply (regcache
, SPARC32_NPC_REGNUM
,
1224 regs
+ gregset
->r_npc_offset
);
1226 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1227 regcache_raw_supply (regcache
, SPARC32_Y_REGNUM
,
1228 regs
+ gregset
->r_y_offset
);
1230 if (regnum
== SPARC_G0_REGNUM
|| regnum
== -1)
1231 regcache_raw_supply (regcache
, SPARC_G0_REGNUM
, NULL
);
1233 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1235 int offset
= gregset
->r_g1_offset
;
1237 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1239 if (regnum
== i
|| regnum
== -1)
1240 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1245 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1247 /* Not all of the register set variants include Locals and
1248 Inputs. For those that don't, we read them off the stack. */
1249 if (gregset
->r_l0_offset
== -1)
1253 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
1254 sparc_supply_rwindow (regcache
, sp
, regnum
);
1258 int offset
= gregset
->r_l0_offset
;
1260 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1262 if (regnum
== i
|| regnum
== -1)
1263 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1271 sparc32_collect_gregset (const struct sparc_gregset
*gregset
,
1272 const struct regcache
*regcache
,
1273 int regnum
, void *gregs
)
1278 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1279 regcache_raw_collect (regcache
, SPARC32_PSR_REGNUM
,
1280 regs
+ gregset
->r_psr_offset
);
1282 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1283 regcache_raw_collect (regcache
, SPARC32_PC_REGNUM
,
1284 regs
+ gregset
->r_pc_offset
);
1286 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1287 regcache_raw_collect (regcache
, SPARC32_NPC_REGNUM
,
1288 regs
+ gregset
->r_npc_offset
);
1290 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1291 regcache_raw_collect (regcache
, SPARC32_Y_REGNUM
,
1292 regs
+ gregset
->r_y_offset
);
1294 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1296 int offset
= gregset
->r_g1_offset
;
1298 /* %g0 is always zero. */
1299 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1301 if (regnum
== i
|| regnum
== -1)
1302 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1307 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1309 /* Not all of the register set variants include Locals and
1310 Inputs. For those that don't, we read them off the stack. */
1311 if (gregset
->r_l0_offset
!= -1)
1313 int offset
= gregset
->r_l0_offset
;
1315 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1317 if (regnum
== i
|| regnum
== -1)
1318 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1326 sparc32_supply_fpregset (struct regcache
*regcache
,
1327 int regnum
, const void *fpregs
)
1329 const char *regs
= fpregs
;
1332 for (i
= 0; i
< 32; i
++)
1334 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1335 regcache_raw_supply (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1338 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1339 regcache_raw_supply (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1343 sparc32_collect_fpregset (const struct regcache
*regcache
,
1344 int regnum
, void *fpregs
)
1346 char *regs
= fpregs
;
1349 for (i
= 0; i
< 32; i
++)
1351 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1352 regcache_raw_collect (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1355 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1356 regcache_raw_collect (regcache
, SPARC32_FSR_REGNUM
, regs
+ (32 * 4) + 4);
1362 /* From <machine/reg.h>. */
1363 const struct sparc_gregset sparc32_sunos4_gregset
=
1376 /* Provide a prototype to silence -Wmissing-prototypes. */
1377 void _initialize_sparc_tdep (void);
1380 _initialize_sparc_tdep (void)
1382 register_gdbarch_init (bfd_arch_sparc
, sparc32_gdbarch_init
);