1 /* Target-dependent code for UltraSPARC.
3 Copyright 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 #include "arch-utils.h"
24 #include "floatformat.h"
26 #include "frame-base.h"
27 #include "frame-unwind.h"
38 #include "gdb_assert.h"
39 #include "gdb_string.h"
41 #include "sparc64-tdep.h"
43 /* This file implements the The SPARC 64-bit ABI as defined by the
44 section "Low-Level System Information" of the SPARC Compliance
45 Definition (SCD) 2.4.1, which is the 64-bit System V psABI for
48 /* Please use the sparc32_-prefix for 32-bit specific code, the
49 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
50 code can handle both. */
52 /* The stack pointer is offset from the stack frame by a BIAS of 2047
53 (0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
54 hosts, so undefine it first. */
58 /* Macros to extract fields from SPARC instructions. */
59 #define X_OP(i) (((i) >> 30) & 0x3)
60 #define X_RD(i) (((i) >> 25) & 0x1f)
61 #define X_A(i) (((i) >> 29) & 1)
62 #define X_COND(i) (((i) >> 25) & 0xf)
63 #define X_OP2(i) (((i) >> 22) & 0x7)
64 #define X_IMM22(i) ((i) & 0x3fffff)
65 #define X_OP3(i) (((i) >> 19) & 0x3f)
66 #define X_I(i) (((i) >> 13) & 1)
67 /* Sign extension macros. */
68 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
69 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
71 /* Fetch the instruction at PC. Instructions are always big-endian
72 even if the processor operates in little-endian mode. */
75 sparc_fetch_instruction (CORE_ADDR pc
)
81 read_memory (pc
, buf
, sizeof (buf
));
84 for (i
= 0; i
< sizeof (buf
); i
++)
85 insn
= (insn
<< 8) | buf
[i
];
89 /* The functions on this page are intended to be used to classify
90 function arguments. */
92 /* Return the contents if register REGNUM as an address. */
95 sparc_address_from_register (int regnum
)
99 regcache_cooked_read_unsigned (current_regcache
, regnum
, &addr
);
103 /* Check whether TYPE is "Integral or Pointer". */
106 sparc64_integral_or_pointer_p (const struct type
*type
)
108 switch (TYPE_CODE (type
))
114 case TYPE_CODE_RANGE
:
116 int len
= TYPE_LENGTH (type
);
117 gdb_assert (len
== 1 || len
== 2 || len
== 4 || len
== 8);
123 int len
= TYPE_LENGTH (type
);
124 gdb_assert (len
== 8);
134 /* Check whether TYPE is "Floating". */
137 sparc64_floating_p (const struct type
*type
)
139 switch (TYPE_CODE (type
))
143 int len
= TYPE_LENGTH (type
);
144 gdb_assert (len
== 4 || len
== 8 || len
== 16);
154 /* Check whether TYPE is "Structure or Union". */
157 sparc64_structure_or_union_p (const struct type
*type
)
159 switch (TYPE_CODE (type
))
161 case TYPE_CODE_STRUCT
:
162 case TYPE_CODE_UNION
:
171 /* Register information. */
173 struct sparc64_register_info
179 static struct sparc64_register_info sparc64_register_info
[] =
181 { "g0", &builtin_type_int64
},
182 { "g1", &builtin_type_int64
},
183 { "g2", &builtin_type_int64
},
184 { "g3", &builtin_type_int64
},
185 { "g4", &builtin_type_int64
},
186 { "g5", &builtin_type_int64
},
187 { "g6", &builtin_type_int64
},
188 { "g7", &builtin_type_int64
},
190 { "o0", &builtin_type_int64
},
191 { "o1", &builtin_type_int64
},
192 { "o2", &builtin_type_int64
},
193 { "o3", &builtin_type_int64
},
194 { "o4", &builtin_type_int64
},
195 { "o5", &builtin_type_int64
},
196 { "sp", &builtin_type_void_data_ptr
},
197 { "o7", &builtin_type_int64
},
199 { "l0", &builtin_type_int64
},
200 { "l1", &builtin_type_int64
},
201 { "l2", &builtin_type_int64
},
202 { "l3", &builtin_type_int64
},
203 { "l4", &builtin_type_int64
},
204 { "l5", &builtin_type_int64
},
205 { "l6", &builtin_type_int64
},
206 { "l7", &builtin_type_int64
},
208 { "i0", &builtin_type_int64
},
209 { "i1", &builtin_type_int64
},
210 { "i2", &builtin_type_int64
},
211 { "i3", &builtin_type_int64
},
212 { "i4", &builtin_type_int64
},
213 { "i5", &builtin_type_int64
},
214 { "fp", &builtin_type_void_data_ptr
},
215 { "i7", &builtin_type_int64
},
217 { "f0", &builtin_type_float
},
218 { "f1", &builtin_type_float
},
219 { "f2", &builtin_type_float
},
220 { "f3", &builtin_type_float
},
221 { "f4", &builtin_type_float
},
222 { "f5", &builtin_type_float
},
223 { "f6", &builtin_type_float
},
224 { "f7", &builtin_type_float
},
225 { "f8", &builtin_type_float
},
226 { "f9", &builtin_type_float
},
227 { "f10", &builtin_type_float
},
228 { "f11", &builtin_type_float
},
229 { "f12", &builtin_type_float
},
230 { "f13", &builtin_type_float
},
231 { "f14", &builtin_type_float
},
232 { "f15", &builtin_type_float
},
233 { "f16", &builtin_type_float
},
234 { "f17", &builtin_type_float
},
235 { "f18", &builtin_type_float
},
236 { "f19", &builtin_type_float
},
237 { "f20", &builtin_type_float
},
238 { "f21", &builtin_type_float
},
239 { "f22", &builtin_type_float
},
240 { "f23", &builtin_type_float
},
241 { "f24", &builtin_type_float
},
242 { "f25", &builtin_type_float
},
243 { "f26", &builtin_type_float
},
244 { "f27", &builtin_type_float
},
245 { "f28", &builtin_type_float
},
246 { "f29", &builtin_type_float
},
247 { "f30", &builtin_type_float
},
248 { "f31", &builtin_type_float
},
249 { "f32", &builtin_type_double
},
250 { "f34", &builtin_type_double
},
251 { "f36", &builtin_type_double
},
252 { "f38", &builtin_type_double
},
253 { "f40", &builtin_type_double
},
254 { "f42", &builtin_type_double
},
255 { "f44", &builtin_type_double
},
256 { "f46", &builtin_type_double
},
257 { "f48", &builtin_type_double
},
258 { "f50", &builtin_type_double
},
259 { "f52", &builtin_type_double
},
260 { "f54", &builtin_type_double
},
261 { "f56", &builtin_type_double
},
262 { "f58", &builtin_type_double
},
263 { "f60", &builtin_type_double
},
264 { "f62", &builtin_type_double
},
266 { "pc", &builtin_type_void_func_ptr
},
267 { "npc", &builtin_type_void_func_ptr
},
269 /* This raw register contains the contents of %cwp, %pstate, %asi
270 and %ccr as laid out in a %tstate register. */
271 /* FIXME: Give it a name until we start using register groups. */
272 { "state", &builtin_type_int64
},
274 { "fsr", &builtin_type_int64
},
275 { "fprs", &builtin_type_int64
},
277 /* "Although Y is a 64-bit register, its high-order 32 bits are
278 reserved and always read as 0." */
279 { "y", &builtin_type_int64
}
282 /* Total number of registers. */
283 #define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
285 /* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
286 registers as "psuedo" registers. */
288 static struct sparc64_register_info sparc64_pseudo_register_info
[] =
290 { "cwp", &builtin_type_int64
},
291 { "pstate", &builtin_type_int64
},
292 { "asi", &builtin_type_int64
},
293 { "ccr", &builtin_type_int64
},
295 { "d0", &builtin_type_double
},
296 { "d2", &builtin_type_double
},
297 { "d4", &builtin_type_double
},
298 { "d6", &builtin_type_double
},
299 { "d8", &builtin_type_double
},
300 { "d10", &builtin_type_double
},
301 { "d12", &builtin_type_double
},
302 { "d14", &builtin_type_double
},
303 { "d16", &builtin_type_double
},
304 { "d18", &builtin_type_double
},
305 { "d20", &builtin_type_double
},
306 { "d22", &builtin_type_double
},
307 { "d24", &builtin_type_double
},
308 { "d26", &builtin_type_double
},
309 { "d28", &builtin_type_double
},
310 { "d30", &builtin_type_double
},
311 { "d32", &builtin_type_double
},
312 { "d34", &builtin_type_double
},
313 { "d36", &builtin_type_double
},
314 { "d38", &builtin_type_double
},
315 { "d40", &builtin_type_double
},
316 { "d42", &builtin_type_double
},
317 { "d44", &builtin_type_double
},
318 { "d46", &builtin_type_double
},
319 { "d48", &builtin_type_double
},
320 { "d50", &builtin_type_double
},
321 { "d52", &builtin_type_double
},
322 { "d54", &builtin_type_double
},
323 { "d56", &builtin_type_double
},
324 { "d58", &builtin_type_double
},
325 { "d60", &builtin_type_double
},
326 { "d62", &builtin_type_double
},
328 { "q0", &builtin_type_long_double
},
329 { "q4", &builtin_type_long_double
},
330 { "q8", &builtin_type_long_double
},
331 { "q12", &builtin_type_long_double
},
332 { "q16", &builtin_type_long_double
},
333 { "q20", &builtin_type_long_double
},
334 { "q24", &builtin_type_long_double
},
335 { "q28", &builtin_type_long_double
},
336 { "q32", &builtin_type_long_double
},
337 { "q36", &builtin_type_long_double
},
338 { "q40", &builtin_type_long_double
},
339 { "q44", &builtin_type_long_double
},
340 { "q48", &builtin_type_long_double
},
341 { "q52", &builtin_type_long_double
},
342 { "q56", &builtin_type_long_double
},
343 { "q60", &builtin_type_long_double
}
346 /* Total number of pseudo registers. */
347 #define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
349 /* Return the name of register REGNUM. */
352 sparc64_register_name (int regnum
)
354 if (regnum
>= 0 && regnum
< SPARC64_NUM_REGS
)
355 return sparc64_register_info
[regnum
].name
;
357 if (regnum
>= SPARC64_NUM_REGS
358 && regnum
< SPARC64_NUM_REGS
+ SPARC64_NUM_PSEUDO_REGS
)
359 return sparc64_pseudo_register_info
[regnum
- SPARC64_NUM_REGS
].name
;
364 /* Return the GDB type object for the "standard" data type of data in
368 sparc64_register_type (struct gdbarch
*gdbarch
, int regnum
)
370 if (regnum
>= SPARC64_NUM_REGS
371 && regnum
< SPARC64_NUM_REGS
+ SPARC64_NUM_PSEUDO_REGS
)
372 return *sparc64_pseudo_register_info
[regnum
- SPARC64_NUM_REGS
].type
;
374 gdb_assert (regnum
>= 0 && regnum
< SPARC64_NUM_REGS
);
375 return *sparc64_register_info
[regnum
].type
;
379 sparc64_pseudo_register_read (struct gdbarch
*gdbarch
,
380 struct regcache
*regcache
,
381 int regnum
, void *buf
)
383 gdb_assert (regnum
>= SPARC64_NUM_REGS
);
385 if (regnum
>= SPARC64_D0_REGNUM
&& regnum
<= SPARC64_D30_REGNUM
)
387 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC64_D0_REGNUM
);
388 regcache_raw_read (regcache
, regnum
, buf
);
389 regcache_raw_read (regcache
, regnum
+ 1, ((char *)buf
) + 4);
391 else if (regnum
>= SPARC64_D32_REGNUM
&& regnum
<= SPARC64_D62_REGNUM
)
393 regnum
= SPARC64_F32_REGNUM
+ (regnum
- SPARC64_D32_REGNUM
);
394 regcache_raw_read (regcache
, regnum
, buf
);
396 else if (regnum
>= SPARC64_Q0_REGNUM
&& regnum
<= SPARC64_Q28_REGNUM
)
398 regnum
= SPARC_F0_REGNUM
+ 4 * (regnum
- SPARC64_Q0_REGNUM
);
399 regcache_raw_read (regcache
, regnum
, buf
);
400 regcache_raw_read (regcache
, regnum
+ 1, ((char *)buf
) + 4);
401 regcache_raw_read (regcache
, regnum
+ 2, ((char *)buf
) + 8);
402 regcache_raw_read (regcache
, regnum
+ 3, ((char *)buf
) + 12);
404 else if (regnum
>= SPARC64_Q32_REGNUM
&& regnum
<= SPARC64_Q60_REGNUM
)
406 regnum
= SPARC64_F32_REGNUM
+ 2 * (regnum
- SPARC64_Q32_REGNUM
);
407 regcache_raw_read (regcache
, regnum
, buf
);
408 regcache_raw_read (regcache
, regnum
+ 1, ((char *)buf
) + 8);
410 else if (regnum
== SPARC64_CWP_REGNUM
411 || regnum
== SPARC64_PSTATE_REGNUM
412 || regnum
== SPARC64_ASI_REGNUM
413 || regnum
== SPARC64_CCR_REGNUM
)
417 regcache_raw_read_unsigned (regcache
, SPARC64_STATE_REGNUM
, &state
);
420 case SPARC64_CWP_REGNUM
:
421 state
= (state
>> 0) & ((1 << 5) - 1);
423 case SPARC64_PSTATE_REGNUM
:
424 state
= (state
>> 8) & ((1 << 12) - 1);
426 case SPARC64_ASI_REGNUM
:
427 state
= (state
>> 24) & ((1 << 8) - 1);
429 case SPARC64_CCR_REGNUM
:
430 state
= (state
>> 32) & ((1 << 8) - 1);
433 store_unsigned_integer (buf
, 8, state
);
438 sparc64_pseudo_register_write (struct gdbarch
*gdbarch
,
439 struct regcache
*regcache
,
440 int regnum
, const void *buf
)
442 gdb_assert (regnum
>= SPARC64_NUM_REGS
);
444 if (regnum
>= SPARC64_D0_REGNUM
&& regnum
<= SPARC64_D30_REGNUM
)
446 regnum
= SPARC_F0_REGNUM
+ 2 * (regnum
- SPARC64_D0_REGNUM
);
447 regcache_raw_write (regcache
, regnum
, buf
);
448 regcache_raw_write (regcache
, regnum
+ 1, ((const char *)buf
) + 4);
450 else if (regnum
>= SPARC64_D32_REGNUM
&& regnum
<= SPARC64_D62_REGNUM
)
452 regnum
= SPARC64_F32_REGNUM
+ (regnum
- SPARC64_D32_REGNUM
);
453 regcache_raw_write (regcache
, regnum
, buf
);
455 else if (regnum
>= SPARC64_Q0_REGNUM
&& regnum
<= SPARC64_Q28_REGNUM
)
457 regnum
= SPARC_F0_REGNUM
+ 4 * (regnum
- SPARC64_Q0_REGNUM
);
458 regcache_raw_write (regcache
, regnum
, buf
);
459 regcache_raw_write (regcache
, regnum
+ 1, ((const char *)buf
) + 4);
460 regcache_raw_write (regcache
, regnum
+ 2, ((const char *)buf
) + 8);
461 regcache_raw_write (regcache
, regnum
+ 3, ((const char *)buf
) + 12);
463 else if (regnum
>= SPARC64_Q32_REGNUM
&& regnum
<= SPARC64_Q60_REGNUM
)
465 regnum
= SPARC64_F32_REGNUM
+ 2 * (regnum
- SPARC64_Q32_REGNUM
);
466 regcache_raw_write (regcache
, regnum
, buf
);
467 regcache_raw_write (regcache
, regnum
+ 1, ((const char *)buf
) + 8);
469 else if (regnum
== SPARC64_CWP_REGNUM
470 || regnum
== SPARC64_PSTATE_REGNUM
471 || regnum
== SPARC64_ASI_REGNUM
472 || regnum
== SPARC64_CCR_REGNUM
)
474 ULONGEST state
, bits
;
476 regcache_raw_read_unsigned (regcache
, SPARC64_STATE_REGNUM
, &state
);
477 bits
= extract_unsigned_integer (buf
, 8);
480 case SPARC64_CWP_REGNUM
:
481 state
|= ((bits
& ((1 << 5) - 1)) << 0);
483 case SPARC64_PSTATE_REGNUM
:
484 state
|= ((bits
& ((1 << 12) - 1)) << 8);
486 case SPARC64_ASI_REGNUM
:
487 state
|= ((bits
& ((1 << 8) - 1)) << 24);
489 case SPARC64_CCR_REGNUM
:
490 state
|= ((bits
& ((1 << 8) - 1)) << 32);
493 regcache_raw_write_unsigned (regcache
, SPARC64_STATE_REGNUM
, state
);
498 struct sparc64_frame_cache
504 /* Do we have a frame? */
508 /* Allocate and initialize a frame cache. */
510 static struct sparc64_frame_cache
*
511 sparc64_alloc_frame_cache (void)
513 struct sparc64_frame_cache
*cache
;
516 cache
= FRAME_OBSTACK_ZALLOC (struct sparc64_frame_cache
);
522 /* Frameless until proven otherwise. */
523 cache
->frameless_p
= 1;
529 sparc64_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
530 struct sparc64_frame_cache
*cache
)
532 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
537 if (current_pc
<= pc
)
540 /* We have to handle to "Procedure Linkage Table" (PLT) special. On
541 SPARC the linker usually defines a symbol (typically
542 _PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
543 This symbol makes us end up here with PC pointing at the start of
544 the PLT and CURRENT_PC probably pointing at a PLT entry. If we
545 would do our normal prologue analysis, we would probably conclude
546 that we've got a frame when in reality we don't, since the
547 dynamic linker patches up the first PLT with some code that
548 starts with a SAVE instruction. Patch up PC such that it points
549 at the start of our PLT entry. */
550 if (tdep
->plt_entry_size
> 0 && in_plt_section (current_pc
, NULL
))
551 pc
= current_pc
- ((current_pc
- pc
) % tdep
->plt_entry_size
);
553 insn
= sparc_fetch_instruction (pc
);
555 /* Recognize a SETHI insn and record its destination. */
556 if (X_OP (insn
) == 0 && X_OP2 (insn
) == 0x04)
561 insn
= sparc_fetch_instruction (pc
+ 4);
564 /* Allow for an arithmetic operation on DEST or %g1. */
565 if (X_OP (insn
) == 2 && X_I (insn
)
566 && (X_RD (insn
) == 1 || X_RD (insn
) == dest
))
570 insn
= sparc_fetch_instruction (pc
+ 8);
573 /* Check for the SAVE instruction that sets up the frame. */
574 if (X_OP (insn
) == 2 && X_OP3 (insn
) == 0x3c)
576 cache
->frameless_p
= 0;
577 return pc
+ offset
+ 4;
583 /* Return PC of first real instruction of the function starting at
587 sparc64_skip_prologue (CORE_ADDR start_pc
)
589 struct symtab_and_line sal
;
590 CORE_ADDR func_start
, func_end
;
591 struct sparc64_frame_cache cache
;
593 /* This is the preferred method, find the end of the prologue by
594 using the debugging information. */
595 if (find_pc_partial_function (start_pc
, NULL
, &func_start
, &func_end
))
597 sal
= find_pc_line (func_start
, 0);
599 if (sal
.end
< func_end
600 && start_pc
<= sal
.end
)
604 return sparc64_analyze_prologue (start_pc
, 0xffffffffffffffffUL
, &cache
);
609 static struct sparc64_frame_cache
*
610 sparc64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
612 struct sparc64_frame_cache
*cache
;
617 cache
= sparc64_alloc_frame_cache ();
620 /* In priciple, for normal frames, %fp (%i6) holds the frame
621 pointer, which holds the base address for the current stack
624 cache
->base
= frame_unwind_register_unsigned (next_frame
, SPARC_FP_REGNUM
);
625 if (cache
->base
== 0)
628 cache
->pc
= frame_func_unwind (next_frame
);
631 CORE_ADDR addr_in_block
= frame_unwind_address_in_block (next_frame
);
632 sparc64_analyze_prologue (cache
->pc
, addr_in_block
, cache
);
635 if (cache
->frameless_p
)
637 /* We didn't find a valid frame, which means that CACHE->base
638 currently holds the frame pointer for our calling frame. */
639 cache
->base
= frame_unwind_register_unsigned (next_frame
,
647 sparc64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
648 struct frame_id
*this_id
)
650 struct sparc64_frame_cache
*cache
=
651 sparc64_frame_cache (next_frame
, this_cache
);
653 /* This marks the outermost frame. */
654 if (cache
->base
== 0)
657 (*this_id
) = frame_id_build (cache
->base
, cache
->pc
);
661 sparc64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
662 int regnum
, int *optimizedp
,
663 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
664 int *realnump
, void *valuep
)
666 struct sparc64_frame_cache
*cache
=
667 sparc64_frame_cache (next_frame
, this_cache
);
669 if (regnum
== SPARC64_PC_REGNUM
|| regnum
== SPARC64_NPC_REGNUM
)
677 CORE_ADDR pc
= (regnum
== SPARC64_NPC_REGNUM
) ? 4 : 0;
679 regnum
= cache
->frameless_p
? SPARC_O7_REGNUM
: SPARC_I7_REGNUM
;
680 pc
+= frame_unwind_register_unsigned (next_frame
, regnum
) + 8;
681 store_unsigned_integer (valuep
, 8, pc
);
686 /* The previous frame's `local' and `in' registers have been saved
687 in the register save area. */
688 if (!cache
->frameless_p
689 && regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
)
692 *lvalp
= lval_memory
;
693 *addrp
= cache
->base
+ BIAS
+ (regnum
- SPARC_L0_REGNUM
) * 8;
697 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
699 /* Read the value in from memory. */
700 read_memory (*addrp
, valuep
, register_size (gdbarch
, regnum
));
705 /* The previous frame's `out' registers are accessable as the
706 current frame's `in' registers. */
707 if (!cache
->frameless_p
708 && regnum
>= SPARC_O0_REGNUM
&& regnum
<= SPARC_O7_REGNUM
)
709 regnum
+= (SPARC_I0_REGNUM
- SPARC_O0_REGNUM
);
711 frame_register_unwind (next_frame
, regnum
,
712 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
715 static const struct frame_unwind sparc64_frame_unwind
=
718 sparc64_frame_this_id
,
719 sparc64_frame_prev_register
722 static const struct frame_unwind
*
723 sparc64_frame_sniffer (struct frame_info
*next_frame
)
725 return &sparc64_frame_unwind
;
730 sparc64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
732 struct sparc64_frame_cache
*cache
=
733 sparc64_frame_cache (next_frame
, this_cache
);
735 /* ??? Should we take BIAS into account here? */
739 static const struct frame_base sparc64_frame_base
=
741 &sparc64_frame_unwind
,
742 sparc64_frame_base_address
,
743 sparc64_frame_base_address
,
744 sparc64_frame_base_address
747 /* Check whether TYPE must be 16-byte aligned. */
750 sparc64_16_byte_align_p (struct type
*type
)
752 if (sparc64_floating_p (type
) && TYPE_LENGTH (type
) == 16)
755 if (sparc64_structure_or_union_p (type
))
759 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
760 if (sparc64_16_byte_align_p (TYPE_FIELD_TYPE (type
, i
)))
767 /* Store floating fields of element ELEMENT of an "parameter array"
768 that has type TYPE and is stored at BITPOS in VALBUF in the
769 apropriate registers of REGCACHE. This function can be called
770 recursively and therefore handles floating types in addition to
774 sparc64_store_floating_fields (struct regcache
*regcache
, struct type
*type
,
775 char *valbuf
, int element
, int bitpos
)
777 gdb_assert (element
< 16);
779 if (sparc64_floating_p (type
))
781 int len
= TYPE_LENGTH (type
);
786 gdb_assert (bitpos
== 0);
787 gdb_assert ((element
% 2) == 0);
789 regnum
= SPARC64_Q0_REGNUM
+ element
/ 2;
790 regcache_cooked_write (regcache
, regnum
, valbuf
);
794 gdb_assert (bitpos
== 0 || bitpos
== 64);
796 regnum
= SPARC64_D0_REGNUM
+ element
+ bitpos
/ 64;
797 regcache_cooked_write (regcache
, regnum
, valbuf
+ (bitpos
/ 8));
801 gdb_assert (len
== 4);
802 gdb_assert (bitpos
% 32 == 0 && bitpos
>= 0 && bitpos
< 128);
804 regnum
= SPARC_F0_REGNUM
+ element
* 2 + bitpos
/ 32;
805 regcache_cooked_write (regcache
, regnum
, valbuf
+ (bitpos
/ 8));
808 else if (sparc64_structure_or_union_p (type
))
812 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
813 sparc64_store_floating_fields (regcache
, TYPE_FIELD_TYPE (type
, i
),
815 bitpos
+ TYPE_FIELD_BITPOS (type
, i
));
819 /* Fetch floating fields from a variable of type TYPE from the
820 appropriate registers for BITPOS in REGCACHE and store it at BITPOS
821 in VALBUF. This function can be called recursively and therefore
822 handles floating types in addition to structures. */
825 sparc64_extract_floating_fields (struct regcache
*regcache
, struct type
*type
,
826 char *valbuf
, int bitpos
)
828 if (sparc64_floating_p (type
))
830 int len
= TYPE_LENGTH (type
);
835 gdb_assert (bitpos
== 0 || bitpos
== 128);
837 regnum
= SPARC64_Q0_REGNUM
+ bitpos
/ 128;
838 regcache_cooked_read (regcache
, regnum
, valbuf
+ (bitpos
/ 8));
842 gdb_assert (bitpos
% 64 == 0 && bitpos
>= 0 && bitpos
< 256);
844 regnum
= SPARC64_D0_REGNUM
+ bitpos
/ 64;
845 regcache_cooked_read (regcache
, regnum
, valbuf
+ (bitpos
/ 8));
849 gdb_assert (len
== 4);
850 gdb_assert (bitpos
% 32 == 0 && bitpos
>= 0 && bitpos
< 256);
852 regnum
= SPARC_F0_REGNUM
+ bitpos
/ 32;
853 regcache_cooked_read (regcache
, regnum
, valbuf
+ (bitpos
/ 8));
856 else if (sparc64_structure_or_union_p (type
))
860 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
861 sparc64_extract_floating_fields (regcache
, TYPE_FIELD_TYPE (type
, i
),
863 bitpos
+ TYPE_FIELD_BITPOS (type
, i
));
867 /* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is
868 non-zero) in REGCACHE and on the stack (starting from address SP). */
871 sparc64_store_arguments (struct regcache
*regcache
, int nargs
,
872 struct value
**args
, CORE_ADDR sp
,
873 int struct_return
, CORE_ADDR struct_addr
)
875 /* Number of extended words in the "parameter array". */
876 int num_elements
= 0;
880 /* Take BIAS into account. */
883 /* First we calculate the number of extended words in the "parameter
884 array". While doing so we also convert some of the arguments. */
889 for (i
= 0; i
< nargs
; i
++)
891 struct type
*type
= VALUE_TYPE (args
[i
]);
892 int len
= TYPE_LENGTH (type
);
894 if (sparc64_structure_or_union_p (type
))
896 /* Structure or Union arguments. */
899 if (num_elements
% 2 && sparc64_16_byte_align_p (type
))
901 num_elements
+= ((len
+ 7) / 8);
905 /* The psABI says that "Structures or unions larger than
906 sixteen bytes are copied by the caller and passed
907 indirectly; the caller will pass the address of a
908 correctly aligned structure value. This sixty-four
909 bit address will occupy one word in the parameter
910 array, and may be promoted to an %o register like any
911 other pointer value." Allocate memory for these
912 values on the stack. */
915 /* Use 16-byte alignment for these values. That's
916 always correct, and wasting a few bytes shouldn't be
920 write_memory (sp
, VALUE_CONTENTS (args
[i
]), len
);
921 args
[i
] = value_from_pointer (lookup_pointer_type (type
), sp
);
925 else if (sparc64_floating_p (type
))
927 /* Floating arguments. */
931 /* The psABI says that "Each quad-precision parameter
932 value will be assigned to two extended words in the
936 /* The psABI says that "Long doubles must be
937 quad-aligned, and thus a hole might be introduced
938 into the parameter array to force alignment." Skip
939 an element if necessary. */
940 if (num_elements
% 2)
948 /* Integral and pointer arguments. */
949 gdb_assert (sparc64_integral_or_pointer_p (type
));
951 /* The psABI says that "Each argument value of integral type
952 smaller than an extended word will be widened by the
953 caller to an extended word according to the signed-ness
954 of the argument type." */
956 args
[i
] = value_cast (builtin_type_int64
, args
[i
]);
961 /* Allocate the "parameter array". */
962 sp
-= num_elements
* 8;
964 /* The psABI says that "Every stack frame must be 16-byte aligned." */
967 /* Now we store the arguments in to the "paramater array". Some
968 Integer or Pointer arguments and Structure or Union arguments
969 will be passed in %o registers. Some Floating arguments and
970 floating members of structures are passed in floating-point
971 registers. However, for functions with variable arguments,
972 floating arguments are stored in an %0 register, and for
973 functions without a prototype floating arguments are stored in
974 both a floating-point and an %o registers, or a floating-point
975 register and memory. To simplify the logic here we always pass
976 arguments in memory, an %o register, and a floating-point
977 register if appropriate. This should be no problem since the
978 contents of any unused memory or registers in the "parameter
979 array" are undefined. */
983 regcache_cooked_write_unsigned (regcache
, SPARC_O0_REGNUM
, struct_addr
);
987 for (i
= 0; i
< nargs
; i
++)
989 char *valbuf
= VALUE_CONTENTS (args
[i
]);
990 struct type
*type
= VALUE_TYPE (args
[i
]);
991 int len
= TYPE_LENGTH (type
);
995 if (sparc64_structure_or_union_p (type
))
997 /* Structure or Union arguments. */
998 gdb_assert (len
<= 16);
999 memset (buf
, 0, sizeof (buf
));
1000 valbuf
= memcpy (buf
, valbuf
, len
);
1002 if (element
% 2 && sparc64_16_byte_align_p (type
))
1007 regnum
= SPARC_O0_REGNUM
+ element
;
1008 if (len
> 8 && element
< 5)
1009 regcache_cooked_write (regcache
, regnum
+ 1, valbuf
+ 8);
1013 sparc64_store_floating_fields (regcache
, type
, valbuf
, element
, 0);
1015 else if (sparc64_floating_p (type
))
1017 /* Floating arguments. */
1023 regnum
= SPARC64_Q0_REGNUM
+ element
/ 2;
1028 regnum
= SPARC64_D0_REGNUM
+ element
;
1032 /* The psABI says "Each single-precision parameter value
1033 will be assigned to one extended word in the
1034 parameter array, and right-justified within that
1035 word; the left half (even floatregister) is
1036 undefined." Even though the psABI says that "the
1037 left half is undefined", set it to zero here. */
1039 valbuf
= memcpy (buf
+ 4, valbuf
, 4);
1042 regnum
= SPARC64_D0_REGNUM
;
1047 /* Integral and pointer arguments. */
1048 gdb_assert (len
== 8);
1050 regnum
= SPARC_O0_REGNUM
+ element
;
1055 regcache_cooked_write (regcache
, regnum
, valbuf
);
1057 /* If we're storing the value in a floating-point register,
1058 also store it in the corresponding %0 register(s). */
1059 if (regnum
>= SPARC64_D0_REGNUM
&& regnum
<= SPARC64_D10_REGNUM
)
1061 gdb_assert (element
< 6);
1062 regnum
= SPARC_O0_REGNUM
+ element
;
1063 regcache_cooked_write (regcache
, regnum
, valbuf
);
1065 else if (regnum
>= SPARC64_Q0_REGNUM
&& regnum
<= SPARC64_Q8_REGNUM
)
1067 gdb_assert (element
< 6);
1068 regnum
= SPARC_O0_REGNUM
+ element
;
1069 regcache_cooked_write (regcache
, regnum
, valbuf
);
1070 regcache_cooked_write (regcache
, regnum
+ 1, valbuf
);
1074 /* Always store the argument in memeory. */
1075 write_memory (sp
+ element
* 8, valbuf
, len
);
1076 element
+= ((len
+ 7) / 8);
1079 gdb_assert (element
== num_elements
);
1081 /* Take BIAS into account. */
1087 sparc64_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1088 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1089 int nargs
, struct value
**args
, CORE_ADDR sp
,
1090 int struct_return
, CORE_ADDR struct_addr
)
1092 /* Set return address. */
1093 regcache_cooked_write_unsigned (regcache
, SPARC_O7_REGNUM
, bp_addr
- 8);
1095 /* Set up function arguments. */
1096 sp
= sparc64_store_arguments (regcache
, nargs
, args
, sp
,
1097 struct_return
, struct_addr
);
1099 /* Allocate the register save area. */
1102 /* Stack should be 16-byte aligned at this point. */
1103 gdb_assert ((sp
+ BIAS
) % 16 == 0);
1105 /* Finally, update the stack pointer. */
1106 regcache_cooked_write_unsigned (regcache
, SPARC_SP_REGNUM
, sp
);
1112 /* Extract from an array REGBUF containing the (raw) register state, a
1113 function return value of TYPE, and copy that into VALBUF. */
1116 sparc64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1119 int len
= TYPE_LENGTH (type
);
1123 if (sparc64_structure_or_union_p (type
))
1125 /* Structure or Union return values. */
1126 gdb_assert (len
<= 32);
1128 for (i
= 0; i
< ((len
+ 7) / 8); i
++)
1129 regcache_cooked_read (regcache
, SPARC_O0_REGNUM
+ i
, buf
+ i
* 8);
1130 if (TYPE_CODE (type
) != TYPE_CODE_UNION
)
1131 sparc64_extract_floating_fields (regcache
, type
, buf
, 0);
1132 memcpy (valbuf
, buf
, len
);
1134 else if (sparc64_floating_p (type
))
1136 /* Floating return values. */
1137 for (i
= 0; i
< len
/ 4; i
++)
1138 regcache_cooked_read (regcache
, SPARC_F0_REGNUM
+ i
, buf
+ i
* 4);
1139 memcpy (valbuf
, buf
, len
);
1143 /* Integral and pointer return values. */
1144 gdb_assert (sparc64_integral_or_pointer_p (type
));
1146 /* Just stripping off any unused bytes should preserve the
1147 signed-ness just fine. */
1148 regcache_cooked_read (regcache
, SPARC_O0_REGNUM
, buf
);
1149 memcpy (valbuf
, buf
+ 8 - len
, len
);
1153 /* Write into the appropriate registers a function return value stored
1154 in VALBUF of type TYPE. */
1157 sparc64_store_return_value (struct type
*type
, struct regcache
*regcache
,
1160 int len
= TYPE_LENGTH (type
);
1164 if (sparc64_structure_or_union_p (type
))
1166 /* Structure or Union return values. */
1167 gdb_assert (len
<= 32);
1169 /* Simplify matters by storing the complete value (including
1170 floating members) into %o0 and %o1. Floating members are
1171 also store in the appropriate floating-point registers. */
1172 memset (buf
, 0, sizeof (buf
));
1173 memcpy (buf
, valbuf
, len
);
1174 for (i
= 0; i
< ((len
+ 7) / 8); i
++)
1175 regcache_cooked_write (regcache
, SPARC_O0_REGNUM
+ i
, buf
+ i
* 4);
1176 if (TYPE_CODE (type
) != TYPE_CODE_UNION
)
1177 sparc64_store_floating_fields (regcache
, type
, buf
, 0, 0);
1179 else if (sparc64_floating_p (type
))
1181 /* Floating return values. */
1182 memcpy (buf
, valbuf
, len
);
1183 for (i
= 0; i
< len
/ 4; i
++)
1184 regcache_cooked_write (regcache
, SPARC_F0_REGNUM
+ i
, buf
+ i
* 4);
1188 /* Integral and pointer return values. */
1189 gdb_assert (sparc64_integral_or_pointer_p (type
));
1191 /* ??? Do we need to do any sign-extension here? */
1193 memcpy (buf
+ 8 - len
, valbuf
, len
);
1194 regcache_cooked_write (regcache
, SPARC_O0_REGNUM
, buf
);
1199 sparc64_use_struct_convention (int gcc_p
, struct type
*type
)
1201 /* Structure and union types up to 32 bytes in size are returned in
1203 return (TYPE_LENGTH (type
) > 32);
1208 sparc64_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1210 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1212 tdep
->pc_regnum
= SPARC64_PC_REGNUM
;
1213 tdep
->npc_regnum
= SPARC64_NPC_REGNUM
;
1215 /* This is what all the fuss is about. */
1216 set_gdbarch_long_bit (gdbarch
, 64);
1217 set_gdbarch_long_long_bit (gdbarch
, 64);
1218 set_gdbarch_ptr_bit (gdbarch
, 64);
1220 set_gdbarch_num_regs (gdbarch
, SPARC64_NUM_REGS
);
1221 set_gdbarch_register_name (gdbarch
, sparc64_register_name
);
1222 set_gdbarch_register_type (gdbarch
, sparc64_register_type
);
1223 set_gdbarch_num_pseudo_regs (gdbarch
, SPARC64_NUM_PSEUDO_REGS
);
1224 set_gdbarch_pseudo_register_read (gdbarch
, sparc64_pseudo_register_read
);
1225 set_gdbarch_pseudo_register_write (gdbarch
, sparc64_pseudo_register_write
);
1227 /* Register numbers of various important registers. */
1228 set_gdbarch_pc_regnum (gdbarch
, SPARC64_PC_REGNUM
); /* %pc */
1230 /* Call dummy code. */
1231 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
1232 set_gdbarch_push_dummy_code (gdbarch
, NULL
);
1233 set_gdbarch_push_dummy_call (gdbarch
, sparc64_push_dummy_call
);
1235 set_gdbarch_extract_return_value (gdbarch
, sparc64_extract_return_value
);
1236 set_gdbarch_store_return_value (gdbarch
, sparc64_store_return_value
);
1237 set_gdbarch_use_struct_convention (gdbarch
, sparc64_use_struct_convention
);
1238 set_gdbarch_return_value_on_stack
1239 (gdbarch
, generic_return_value_on_stack_not
);
1240 set_gdbarch_stabs_argument_has_addr
1241 (gdbarch
, default_stabs_argument_has_addr
);
1243 set_gdbarch_skip_prologue (gdbarch
, sparc64_skip_prologue
);
1245 frame_unwind_append_sniffer (gdbarch
, sparc64_frame_sniffer
);
1246 frame_base_set_default (gdbarch
, &sparc64_frame_base
);
1250 /* Helper functions for dealing with register sets. */
1252 #define TSTATE_CWP 0x000000000000001f
1253 #define TSTATE_ICC 0x0000000f00000000
1254 #define TSTATE_XCC 0x000000f000000000
1256 #define PSR_S 0x00000080
1257 #define PSR_ICC 0x00f00000
1258 #define PSR_VERS 0x0f000000
1259 #define PSR_IMPL 0xf0000000
1260 #define PSR_V8PLUS 0xff000000
1261 #define PSR_XCC 0x000f0000
1264 sparc64_supply_gregset (const struct sparc_gregset
*gregset
,
1265 struct regcache
*regcache
,
1266 int regnum
, const void *gregs
)
1268 int sparc32
= (gdbarch_ptr_bit (current_gdbarch
) == 32);
1269 const char *regs
= gregs
;
1274 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1276 int offset
= gregset
->r_tstate_offset
;
1277 ULONGEST tstate
, psr
;
1280 tstate
= extract_unsigned_integer (regs
+ offset
, 8);
1281 psr
= ((tstate
& TSTATE_CWP
) | PSR_S
| ((tstate
& TSTATE_ICC
) >> 12)
1282 | ((tstate
& TSTATE_XCC
) >> 20) | PSR_V8PLUS
);
1283 store_unsigned_integer (buf
, 4, psr
);
1284 regcache_raw_supply (regcache
, SPARC32_PSR_REGNUM
, buf
);
1287 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1288 regcache_raw_supply (regcache
, SPARC32_PC_REGNUM
,
1289 regs
+ gregset
->r_pc_offset
+ 4);
1291 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1292 regcache_raw_supply (regcache
, SPARC32_NPC_REGNUM
,
1293 regs
+ gregset
->r_npc_offset
+ 4);
1295 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1297 int offset
= gregset
->r_y_offset
+ 8 - gregset
->r_y_size
;
1298 regcache_raw_supply (regcache
, SPARC32_Y_REGNUM
, regs
+ offset
);
1303 if (regnum
== SPARC64_STATE_REGNUM
|| regnum
== -1)
1304 regcache_raw_supply (regcache
, SPARC64_STATE_REGNUM
,
1305 regs
+ gregset
->r_tstate_offset
);
1307 if (regnum
== SPARC64_PC_REGNUM
|| regnum
== -1)
1308 regcache_raw_supply (regcache
, SPARC64_PC_REGNUM
,
1309 regs
+ gregset
->r_pc_offset
);
1311 if (regnum
== SPARC64_NPC_REGNUM
|| regnum
== -1)
1312 regcache_raw_supply (regcache
, SPARC64_NPC_REGNUM
,
1313 regs
+ gregset
->r_npc_offset
);
1315 if (regnum
== SPARC64_Y_REGNUM
|| regnum
== -1)
1320 memcpy (buf
+ 8 - gregset
->r_y_size
,
1321 regs
+ gregset
->r_y_offset
, gregset
->r_y_size
);
1322 regcache_raw_supply (regcache
, SPARC64_Y_REGNUM
, buf
);
1326 if (regnum
== SPARC_G0_REGNUM
|| regnum
== -1)
1327 regcache_raw_supply (regcache
, SPARC_G0_REGNUM
, NULL
);
1329 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1331 int offset
= gregset
->r_g1_offset
;
1336 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1338 if (regnum
== i
|| regnum
== -1)
1339 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1344 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1346 /* Not all of the register set variants include Locals and
1347 Inputs. For those that don't, we read them off the stack. */
1348 if (gregset
->r_l0_offset
== -1)
1352 regcache_cooked_read_unsigned (regcache
, SPARC_SP_REGNUM
, &sp
);
1353 sparc_supply_rwindow (regcache
, sp
, regnum
);
1357 int offset
= gregset
->r_l0_offset
;
1362 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1364 if (regnum
== i
|| regnum
== -1)
1365 regcache_raw_supply (regcache
, i
, regs
+ offset
);
1373 sparc64_collect_gregset (const struct sparc_gregset
*gregset
,
1374 const struct regcache
*regcache
,
1375 int regnum
, void *gregs
)
1377 int sparc32
= (gdbarch_ptr_bit (current_gdbarch
) == 32);
1383 if (regnum
== SPARC32_PSR_REGNUM
|| regnum
== -1)
1385 int offset
= gregset
->r_tstate_offset
;
1386 ULONGEST tstate
, psr
;
1389 tstate
= extract_unsigned_integer (regs
+ offset
, 8);
1390 regcache_raw_collect (regcache
, SPARC32_PSR_REGNUM
, buf
);
1391 psr
= extract_unsigned_integer (buf
, 4);
1392 tstate
|= (psr
& PSR_ICC
) << 12;
1393 if ((psr
& (PSR_VERS
| PSR_IMPL
)) == PSR_V8PLUS
)
1394 tstate
|= (psr
& PSR_XCC
) << 20;
1395 store_unsigned_integer (buf
, 8, tstate
);
1396 memcpy (regs
+ offset
, buf
, 8);
1399 if (regnum
== SPARC32_PC_REGNUM
|| regnum
== -1)
1400 regcache_raw_collect (regcache
, SPARC32_PC_REGNUM
,
1401 regs
+ gregset
->r_pc_offset
+ 4);
1403 if (regnum
== SPARC32_NPC_REGNUM
|| regnum
== -1)
1404 regcache_raw_collect (regcache
, SPARC32_NPC_REGNUM
,
1405 regs
+ gregset
->r_npc_offset
+ 4);
1407 if (regnum
== SPARC32_Y_REGNUM
|| regnum
== -1)
1409 int offset
= gregset
->r_y_offset
+ 8 - gregset
->r_y_size
;
1410 regcache_raw_collect (regcache
, SPARC32_Y_REGNUM
, regs
+ offset
);
1415 if (regnum
== SPARC64_STATE_REGNUM
|| regnum
== -1)
1416 regcache_raw_collect (regcache
, SPARC64_STATE_REGNUM
,
1417 regs
+ gregset
->r_tstate_offset
);
1419 if (regnum
== SPARC64_PC_REGNUM
|| regnum
== -1)
1420 regcache_raw_collect (regcache
, SPARC64_PC_REGNUM
,
1421 regs
+ gregset
->r_pc_offset
);
1423 if (regnum
== SPARC64_NPC_REGNUM
|| regnum
== -1)
1424 regcache_raw_collect (regcache
, SPARC64_NPC_REGNUM
,
1425 regs
+ gregset
->r_npc_offset
);
1427 if (regnum
== SPARC64_Y_REGNUM
|| regnum
== -1)
1431 regcache_raw_collect (regcache
, SPARC64_Y_REGNUM
, buf
);
1432 memcpy (regs
+ gregset
->r_y_offset
,
1433 buf
+ 8 - gregset
->r_y_size
, gregset
->r_y_size
);
1437 if ((regnum
>= SPARC_G1_REGNUM
&& regnum
<= SPARC_O7_REGNUM
) || regnum
== -1)
1439 int offset
= gregset
->r_g1_offset
;
1444 /* %g0 is always zero. */
1445 for (i
= SPARC_G1_REGNUM
; i
<= SPARC_O7_REGNUM
; i
++)
1447 if (regnum
== i
|| regnum
== -1)
1448 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1453 if ((regnum
>= SPARC_L0_REGNUM
&& regnum
<= SPARC_I7_REGNUM
) || regnum
== -1)
1455 /* Not all of the register set variants include Locals and
1456 Inputs. For those that don't, we read them off the stack. */
1457 if (gregset
->r_l0_offset
!= -1)
1459 int offset
= gregset
->r_l0_offset
;
1464 for (i
= SPARC_L0_REGNUM
; i
<= SPARC_I7_REGNUM
; i
++)
1466 if (regnum
== i
|| regnum
== -1)
1467 regcache_raw_collect (regcache
, i
, regs
+ offset
);
1475 sparc64_supply_fpregset (struct regcache
*regcache
,
1476 int regnum
, const void *fpregs
)
1478 int sparc32
= (gdbarch_ptr_bit (current_gdbarch
) == 32);
1479 const char *regs
= fpregs
;
1482 for (i
= 0; i
< 32; i
++)
1484 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1485 regcache_raw_supply (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1490 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1491 regcache_raw_supply (regcache
, SPARC32_FSR_REGNUM
,
1492 regs
+ (32 * 4) + (16 * 8) + 4);
1496 for (i
= 0; i
< 16; i
++)
1498 if (regnum
== (SPARC64_F32_REGNUM
+ i
) || regnum
== -1)
1499 regcache_raw_supply (regcache
, SPARC64_F32_REGNUM
+ i
,
1500 regs
+ (32 * 4) + (i
* 8));
1503 if (regnum
== SPARC64_FSR_REGNUM
|| regnum
== -1)
1504 regcache_raw_supply (regcache
, SPARC64_FSR_REGNUM
,
1505 regs
+ (32 * 4) + (16 * 8));
1510 sparc64_collect_fpregset (const struct regcache
*regcache
,
1511 int regnum
, void *fpregs
)
1513 int sparc32
= (gdbarch_ptr_bit (current_gdbarch
) == 32);
1514 char *regs
= fpregs
;
1517 for (i
= 0; i
< 32; i
++)
1519 if (regnum
== (SPARC_F0_REGNUM
+ i
) || regnum
== -1)
1520 regcache_raw_collect (regcache
, SPARC_F0_REGNUM
+ i
, regs
+ (i
* 4));
1525 if (regnum
== SPARC32_FSR_REGNUM
|| regnum
== -1)
1526 regcache_raw_collect (regcache
, SPARC32_FSR_REGNUM
,
1527 regs
+ (32 * 4) + (16 * 8) + 4);
1531 for (i
= 0; i
< 16; i
++)
1533 if (regnum
== (SPARC64_F32_REGNUM
+ i
) || regnum
== -1)
1534 regcache_raw_collect (regcache
, SPARC64_F32_REGNUM
+ i
,
1535 regs
+ (32 * 4) + (i
* 8));
1538 if (regnum
== SPARC64_FSR_REGNUM
|| regnum
== -1)
1539 regcache_raw_collect (regcache
, SPARC64_FSR_REGNUM
,
1540 regs
+ (32 * 4) + (16 * 8));