1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
30 #include "frame-unwind.h"
31 #include "frame-base.h"
32 #include "trad-frame.h"
41 #include "reggroups.h"
42 #include "floatformat.h"
48 /* The tdep structure. */
51 /* The spufs ID identifying our address space. */
54 /* SPU-specific vector type. */
55 struct type
*spu_builtin_type_vec128
;
59 /* SPU-specific vector type. */
61 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
63 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
65 if (!tdep
->spu_builtin_type_vec128
)
67 const struct builtin_type
*bt
= builtin_type (gdbarch
);
70 t
= arch_composite_type (gdbarch
,
71 "__spu_builtin_type_vec128", TYPE_CODE_UNION
);
72 append_composite_type_field (t
, "uint128", bt
->builtin_int128
);
73 append_composite_type_field (t
, "v2_int64",
74 init_vector_type (bt
->builtin_int64
, 2));
75 append_composite_type_field (t
, "v4_int32",
76 init_vector_type (bt
->builtin_int32
, 4));
77 append_composite_type_field (t
, "v8_int16",
78 init_vector_type (bt
->builtin_int16
, 8));
79 append_composite_type_field (t
, "v16_int8",
80 init_vector_type (bt
->builtin_int8
, 16));
81 append_composite_type_field (t
, "v2_double",
82 init_vector_type (bt
->builtin_double
, 2));
83 append_composite_type_field (t
, "v4_float",
84 init_vector_type (bt
->builtin_float
, 4));
87 TYPE_NAME (t
) = "spu_builtin_type_vec128";
89 tdep
->spu_builtin_type_vec128
= t
;
92 return tdep
->spu_builtin_type_vec128
;
96 /* The list of available "info spu " commands. */
97 static struct cmd_list_element
*infospucmdlist
= NULL
;
102 spu_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
104 static char *register_names
[] =
106 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
107 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
108 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
109 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
110 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
111 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
112 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
113 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
114 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
115 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
116 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
117 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
118 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
119 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
120 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
121 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
122 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
127 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
130 return register_names
[reg_nr
];
134 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
136 if (reg_nr
< SPU_NUM_GPRS
)
137 return spu_builtin_type_vec128 (gdbarch
);
142 return builtin_type (gdbarch
)->builtin_uint32
;
145 return builtin_type (gdbarch
)->builtin_func_ptr
;
148 return builtin_type (gdbarch
)->builtin_data_ptr
;
150 case SPU_FPSCR_REGNUM
:
151 return builtin_type (gdbarch
)->builtin_uint128
;
153 case SPU_SRR0_REGNUM
:
154 return builtin_type (gdbarch
)->builtin_uint32
;
156 case SPU_LSLR_REGNUM
:
157 return builtin_type (gdbarch
)->builtin_uint32
;
159 case SPU_DECR_REGNUM
:
160 return builtin_type (gdbarch
)->builtin_uint32
;
162 case SPU_DECR_STATUS_REGNUM
:
163 return builtin_type (gdbarch
)->builtin_uint32
;
166 internal_error (__FILE__
, __LINE__
, "invalid regnum");
170 /* Pseudo registers for preferred slots - stack pointer. */
173 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
176 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
177 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
182 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
183 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
184 memset (reg
, 0, sizeof reg
);
185 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
188 store_unsigned_integer (buf
, 4, byte_order
, strtoulst (reg
, NULL
, 16));
192 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
193 int regnum
, gdb_byte
*buf
)
202 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
203 memcpy (buf
, reg
, 4);
206 case SPU_FPSCR_REGNUM
:
207 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
208 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
209 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
212 case SPU_SRR0_REGNUM
:
213 spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
216 case SPU_LSLR_REGNUM
:
217 spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
220 case SPU_DECR_REGNUM
:
221 spu_pseudo_register_read_spu (regcache
, "decr", buf
);
224 case SPU_DECR_STATUS_REGNUM
:
225 spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
229 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
234 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
237 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
238 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
243 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
244 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
245 xsnprintf (reg
, sizeof reg
, "0x%s",
246 phex_nz (extract_unsigned_integer (buf
, 4, byte_order
), 4));
247 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
248 reg
, 0, strlen (reg
));
252 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
253 int regnum
, const gdb_byte
*buf
)
262 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
263 memcpy (reg
, buf
, 4);
264 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
267 case SPU_FPSCR_REGNUM
:
268 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
269 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
270 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
273 case SPU_SRR0_REGNUM
:
274 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
277 case SPU_LSLR_REGNUM
:
278 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
281 case SPU_DECR_REGNUM
:
282 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
285 case SPU_DECR_STATUS_REGNUM
:
286 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
290 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
294 /* Value conversion -- access scalar values at the preferred slot. */
296 static struct value
*
297 spu_value_from_register (struct type
*type
, int regnum
,
298 struct frame_info
*frame
)
300 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
301 int len
= TYPE_LENGTH (type
);
303 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
305 int preferred_slot
= len
< 4 ? 4 - len
: 0;
306 set_value_offset (value
, preferred_slot
);
312 /* Register groups. */
315 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
316 struct reggroup
*group
)
318 /* Registers displayed via 'info regs'. */
319 if (group
== general_reggroup
)
322 /* Registers displayed via 'info float'. */
323 if (group
== float_reggroup
)
326 /* Registers that need to be saved/restored in order to
327 push or pop frames. */
328 if (group
== save_reggroup
|| group
== restore_reggroup
)
331 return default_register_reggroup_p (gdbarch
, regnum
, group
);
334 /* Address conversion. */
337 spu_gdbarch_id (struct gdbarch
*gdbarch
)
339 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
342 /* The objfile architecture of a standalone SPU executable does not
343 provide an SPU ID. Retrieve it from the the objfile's relocated
344 address range in this special case. */
346 && symfile_objfile
&& symfile_objfile
->obfd
347 && bfd_get_arch (symfile_objfile
->obfd
) == bfd_arch_spu
348 && symfile_objfile
->sections
!= symfile_objfile
->sections_end
)
349 id
= SPUADDR_SPU (obj_section_addr (symfile_objfile
->sections
));
361 return SPU_LS_SIZE
- 1;
363 xsnprintf (annex
, sizeof annex
, "%d/lslr", id
);
364 memset (buf
, 0, sizeof buf
);
365 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
368 return strtoulst (buf
, NULL
, 16);
372 spu_address_to_pointer (struct gdbarch
*gdbarch
,
373 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
375 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
376 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
,
377 SPUADDR_ADDR (addr
));
381 spu_pointer_to_address (struct gdbarch
*gdbarch
,
382 struct type
*type
, const gdb_byte
*buf
)
384 int id
= spu_gdbarch_id (gdbarch
);
385 ULONGEST lslr
= spu_lslr (id
);
386 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
388 = extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
390 return addr
? SPUADDR (id
, addr
& lslr
) : 0;
394 spu_integer_to_address (struct gdbarch
*gdbarch
,
395 struct type
*type
, const gdb_byte
*buf
)
397 int id
= spu_gdbarch_id (gdbarch
);
398 ULONGEST lslr
= spu_lslr (id
);
399 ULONGEST addr
= unpack_long (type
, buf
);
401 return SPUADDR (id
, addr
& lslr
);
405 /* Decoding SPU instructions. */
442 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
444 if ((insn
>> 21) == op
)
447 *ra
= (insn
>> 7) & 127;
448 *rb
= (insn
>> 14) & 127;
456 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
458 if ((insn
>> 28) == op
)
460 *rt
= (insn
>> 21) & 127;
461 *ra
= (insn
>> 7) & 127;
462 *rb
= (insn
>> 14) & 127;
471 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
473 if ((insn
>> 21) == op
)
476 *ra
= (insn
>> 7) & 127;
477 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
485 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
487 if ((insn
>> 24) == op
)
490 *ra
= (insn
>> 7) & 127;
491 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
499 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
501 if ((insn
>> 23) == op
)
504 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
512 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
514 if ((insn
>> 25) == op
)
517 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
525 is_branch (unsigned int insn
, int *offset
, int *reg
)
529 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
530 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
531 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
532 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
533 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
534 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
536 *reg
= SPU_PC_REGNUM
;
541 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
542 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
549 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
550 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
551 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
552 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
553 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
554 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
564 /* Prolog parsing. */
566 struct spu_prologue_data
568 /* Stack frame size. -1 if analysis was unsuccessful. */
571 /* How to find the CFA. The CFA is equal to SP at function entry. */
575 /* Offset relative to CFA where a register is saved. -1 if invalid. */
576 int reg_offset
[SPU_NUM_GPRS
];
580 spu_analyze_prologue (struct gdbarch
*gdbarch
,
581 CORE_ADDR start_pc
, CORE_ADDR end_pc
,
582 struct spu_prologue_data
*data
)
584 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
588 int reg_immed
[SPU_NUM_GPRS
];
590 CORE_ADDR prolog_pc
= start_pc
;
595 /* Initialize DATA to default values. */
598 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
599 data
->cfa_offset
= 0;
601 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
602 data
->reg_offset
[i
] = -1;
604 /* Set up REG_IMMED array. This is non-zero for a register if we know its
605 preferred slot currently holds this immediate value. */
606 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
609 /* Scan instructions until the first branch.
611 The following instructions are important prolog components:
613 - The first instruction to set up the stack pointer.
614 - The first instruction to set up the frame pointer.
615 - The first instruction to save the link register.
617 We return the instruction after the latest of these three,
618 or the incoming PC if none is found. The first instruction
619 to set up the stack pointer also defines the frame size.
621 Note that instructions saving incoming arguments to their stack
622 slots are not counted as important, because they are hard to
623 identify with certainty. This should not matter much, because
624 arguments are relevant only in code compiled with debug data,
625 and in such code the GDB core will advance until the first source
626 line anyway, using SAL data.
628 For purposes of stack unwinding, we analyze the following types
629 of instructions in addition:
631 - Any instruction adding to the current frame pointer.
632 - Any instruction loading an immediate constant into a register.
633 - Any instruction storing a register onto the stack.
635 These are used to compute the CFA and REG_OFFSET output. */
637 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
640 int rt
, ra
, rb
, rc
, immed
;
642 if (target_read_memory (pc
, buf
, 4))
644 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
646 /* AI is the typical instruction to set up a stack frame.
647 It is also used to initialize the frame pointer. */
648 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
650 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
651 data
->cfa_offset
-= immed
;
653 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
661 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
667 data
->cfa_reg
= SPU_FP_REGNUM
;
668 data
->cfa_offset
-= immed
;
672 /* A is used to set up stack frames of size >= 512 bytes.
673 If we have tracked the contents of the addend register,
674 we can handle this as well. */
675 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
677 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
679 if (reg_immed
[rb
] != 0)
680 data
->cfa_offset
-= reg_immed
[rb
];
682 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
685 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
691 if (reg_immed
[rb
] != 0)
692 data
->size
= -reg_immed
[rb
];
696 /* We need to track IL and ILA used to load immediate constants
697 in case they are later used as input to an A instruction. */
698 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
700 reg_immed
[rt
] = immed
;
702 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
706 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
708 reg_immed
[rt
] = immed
& 0x3ffff;
710 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
714 /* STQD is used to save registers to the stack. */
715 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
717 if (ra
== data
->cfa_reg
)
718 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
720 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
728 /* _start uses SELB to set up the stack pointer. */
729 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
731 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
735 /* We terminate if we find a branch. */
736 else if (is_branch (insn
, &immed
, &ra
))
741 /* If we successfully parsed until here, and didn't find any instruction
742 modifying SP, we assume we have a frameless function. */
746 /* Return cooked instead of raw SP. */
747 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
748 data
->cfa_reg
= SPU_SP_REGNUM
;
753 /* Return the first instruction after the prologue starting at PC. */
755 spu_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
757 struct spu_prologue_data data
;
758 return spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
761 /* Return the frame pointer in use at address PC. */
763 spu_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
764 int *reg
, LONGEST
*offset
)
766 struct spu_prologue_data data
;
767 spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
769 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
771 /* The 'frame pointer' address is CFA minus frame size. */
773 *offset
= data
.cfa_offset
- data
.size
;
777 /* ??? We don't really know ... */
778 *reg
= SPU_SP_REGNUM
;
783 /* Return true if we are in the function's epilogue, i.e. after the
784 instruction that destroyed the function's stack frame.
786 1) scan forward from the point of execution:
787 a) If you find an instruction that modifies the stack pointer
788 or transfers control (except a return), execution is not in
790 b) Stop scanning if you find a return instruction or reach the
791 end of the function or reach the hard limit for the size of
793 2) scan backward from the point of execution:
794 a) If you find an instruction that modifies the stack pointer,
795 execution *is* in an epilogue, return.
796 b) Stop scanning if you reach an instruction that transfers
797 control or the beginning of the function or reach the hard
798 limit for the size of an epilogue. */
801 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
803 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
804 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
807 int rt
, ra
, rb
, rc
, immed
;
809 /* Find the search limits based on function boundaries and hard limit.
810 We assume the epilogue can be up to 64 instructions long. */
812 const int spu_max_epilogue_size
= 64 * 4;
814 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
817 if (pc
- func_start
< spu_max_epilogue_size
)
818 epilogue_start
= func_start
;
820 epilogue_start
= pc
- spu_max_epilogue_size
;
822 if (func_end
- pc
< spu_max_epilogue_size
)
823 epilogue_end
= func_end
;
825 epilogue_end
= pc
+ spu_max_epilogue_size
;
827 /* Scan forward until next 'bi $0'. */
829 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
831 if (target_read_memory (scan_pc
, buf
, 4))
833 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
835 if (is_branch (insn
, &immed
, &ra
))
837 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
843 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
844 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
845 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
847 if (rt
== SPU_RAW_SP_REGNUM
)
852 if (scan_pc
>= epilogue_end
)
855 /* Scan backward until adjustment to stack pointer (R1). */
857 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
859 if (target_read_memory (scan_pc
, buf
, 4))
861 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
863 if (is_branch (insn
, &immed
, &ra
))
866 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
867 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
868 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
870 if (rt
== SPU_RAW_SP_REGNUM
)
879 /* Normal stack frames. */
881 struct spu_unwind_cache
884 CORE_ADDR frame_base
;
885 CORE_ADDR local_base
;
887 struct trad_frame_saved_reg
*saved_regs
;
890 static struct spu_unwind_cache
*
891 spu_frame_unwind_cache (struct frame_info
*this_frame
,
892 void **this_prologue_cache
)
894 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
895 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
896 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
897 struct spu_unwind_cache
*info
;
898 struct spu_prologue_data data
;
899 CORE_ADDR id
= tdep
->id
;
902 if (*this_prologue_cache
)
903 return *this_prologue_cache
;
905 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
906 *this_prologue_cache
= info
;
907 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
908 info
->frame_base
= 0;
909 info
->local_base
= 0;
911 /* Find the start of the current function, and analyze its prologue. */
912 info
->func
= get_frame_func (this_frame
);
915 /* Fall back to using the current PC as frame ID. */
916 info
->func
= get_frame_pc (this_frame
);
920 spu_analyze_prologue (gdbarch
, info
->func
, get_frame_pc (this_frame
),
923 /* If successful, use prologue analysis data. */
924 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
929 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
930 get_frame_register (this_frame
, data
.cfa_reg
, buf
);
931 cfa
= extract_unsigned_integer (buf
, 4, byte_order
) + data
.cfa_offset
;
932 cfa
= SPUADDR (id
, cfa
);
934 /* Call-saved register slots. */
935 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
936 if (i
== SPU_LR_REGNUM
937 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
938 if (data
.reg_offset
[i
] != -1)
939 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
942 info
->frame_base
= cfa
;
943 info
->local_base
= cfa
- data
.size
;
946 /* Otherwise, fall back to reading the backchain link. */
953 /* Get the backchain. */
954 reg
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
955 status
= safe_read_memory_integer (SPUADDR (id
, reg
), 4, byte_order
,
958 /* A zero backchain terminates the frame chain. Also, sanity
959 check against the local store size limit. */
960 if (status
&& backchain
> 0 && backchain
< SPU_LS_SIZE
)
962 /* Assume the link register is saved into its slot. */
963 if (backchain
+ 16 < SPU_LS_SIZE
)
964 info
->saved_regs
[SPU_LR_REGNUM
].addr
= SPUADDR (id
, backchain
+ 16);
967 info
->frame_base
= SPUADDR (id
, backchain
);
968 info
->local_base
= SPUADDR (id
, reg
);
972 /* If we didn't find a frame, we cannot determine SP / return address. */
973 if (info
->frame_base
== 0)
976 /* The previous SP is equal to the CFA. */
977 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
,
978 SPUADDR_ADDR (info
->frame_base
));
980 /* Read full contents of the unwound link register in order to
981 be able to determine the return address. */
982 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
983 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
985 get_frame_register (this_frame
, SPU_LR_REGNUM
, buf
);
987 /* Normally, the return address is contained in the slot 0 of the
988 link register, and slots 1-3 are zero. For an overlay return,
989 slot 0 contains the address of the overlay manager return stub,
990 slot 1 contains the partition number of the overlay section to
991 be returned to, and slot 2 contains the return address within
992 that section. Return the latter address in that case. */
993 if (extract_unsigned_integer (buf
+ 8, 4, byte_order
) != 0)
994 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
995 extract_unsigned_integer (buf
+ 8, 4, byte_order
));
997 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
998 extract_unsigned_integer (buf
, 4, byte_order
));
1004 spu_frame_this_id (struct frame_info
*this_frame
,
1005 void **this_prologue_cache
, struct frame_id
*this_id
)
1007 struct spu_unwind_cache
*info
=
1008 spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1010 if (info
->frame_base
== 0)
1013 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
1016 static struct value
*
1017 spu_frame_prev_register (struct frame_info
*this_frame
,
1018 void **this_prologue_cache
, int regnum
)
1020 struct spu_unwind_cache
*info
1021 = spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1023 /* Special-case the stack pointer. */
1024 if (regnum
== SPU_RAW_SP_REGNUM
)
1025 regnum
= SPU_SP_REGNUM
;
1027 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1030 static const struct frame_unwind spu_frame_unwind
= {
1033 spu_frame_prev_register
,
1035 default_frame_sniffer
1039 spu_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1041 struct spu_unwind_cache
*info
1042 = spu_frame_unwind_cache (this_frame
, this_cache
);
1043 return info
->local_base
;
1046 static const struct frame_base spu_frame_base
= {
1048 spu_frame_base_address
,
1049 spu_frame_base_address
,
1050 spu_frame_base_address
1054 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1056 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1057 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
1058 /* Mask off interrupt enable bit. */
1059 return SPUADDR (tdep
->id
, pc
& -4);
1063 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1065 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1066 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1067 return SPUADDR (tdep
->id
, sp
);
1071 spu_read_pc (struct regcache
*regcache
)
1073 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1075 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1076 /* Mask off interrupt enable bit. */
1077 return SPUADDR (tdep
->id
, pc
& -4);
1081 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1083 /* Keep interrupt enabled state unchanged. */
1085 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1086 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1087 (SPUADDR_ADDR (pc
) & -4) | (old_pc
& 3));
1091 /* Function calling convention. */
1094 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1100 spu_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
1101 struct value
**args
, int nargs
, struct type
*value_type
,
1102 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
1103 struct regcache
*regcache
)
1105 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1106 sp
= (sp
- 4) & ~15;
1107 /* Store the address of that breakpoint */
1109 /* The call starts at the callee's entry point. */
1116 spu_scalar_value_p (struct type
*type
)
1118 switch (TYPE_CODE (type
))
1121 case TYPE_CODE_ENUM
:
1122 case TYPE_CODE_RANGE
:
1123 case TYPE_CODE_CHAR
:
1124 case TYPE_CODE_BOOL
:
1127 return TYPE_LENGTH (type
) <= 16;
1135 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1136 struct type
*type
, const gdb_byte
*in
)
1138 int len
= TYPE_LENGTH (type
);
1140 if (spu_scalar_value_p (type
))
1142 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1143 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1149 regcache_cooked_write (regcache
, regnum
++, in
);
1155 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1160 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1161 struct type
*type
, gdb_byte
*out
)
1163 int len
= TYPE_LENGTH (type
);
1165 if (spu_scalar_value_p (type
))
1167 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1168 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1174 regcache_cooked_read (regcache
, regnum
++, out
);
1180 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1185 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1186 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1187 int nargs
, struct value
**args
, CORE_ADDR sp
,
1188 int struct_return
, CORE_ADDR struct_addr
)
1190 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1193 int regnum
= SPU_ARG1_REGNUM
;
1197 /* Set the return address. */
1198 memset (buf
, 0, sizeof buf
);
1199 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (bp_addr
));
1200 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1202 /* If STRUCT_RETURN is true, then the struct return address (in
1203 STRUCT_ADDR) will consume the first argument-passing register.
1204 Both adjust the register count and store that value. */
1207 memset (buf
, 0, sizeof buf
);
1208 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (struct_addr
));
1209 regcache_cooked_write (regcache
, regnum
++, buf
);
1212 /* Fill in argument registers. */
1213 for (i
= 0; i
< nargs
; i
++)
1215 struct value
*arg
= args
[i
];
1216 struct type
*type
= check_typedef (value_type (arg
));
1217 const gdb_byte
*contents
= value_contents (arg
);
1218 int len
= TYPE_LENGTH (type
);
1219 int n_regs
= align_up (len
, 16) / 16;
1221 /* If the argument doesn't wholly fit into registers, it and
1222 all subsequent arguments go to the stack. */
1223 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1229 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1233 /* Overflow arguments go to the stack. */
1234 if (stack_arg
!= -1)
1238 /* Allocate all required stack size. */
1239 for (i
= stack_arg
; i
< nargs
; i
++)
1241 struct type
*type
= check_typedef (value_type (args
[i
]));
1242 sp
-= align_up (TYPE_LENGTH (type
), 16);
1245 /* Fill in stack arguments. */
1247 for (i
= stack_arg
; i
< nargs
; i
++)
1249 struct value
*arg
= args
[i
];
1250 struct type
*type
= check_typedef (value_type (arg
));
1251 int len
= TYPE_LENGTH (type
);
1254 if (spu_scalar_value_p (type
))
1255 preferred_slot
= len
< 4 ? 4 - len
: 0;
1259 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1260 ap
+= align_up (TYPE_LENGTH (type
), 16);
1264 /* Allocate stack frame header. */
1267 /* Store stack back chain. */
1268 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1269 target_write_memory (sp
, buf
, 16);
1271 /* Finally, update all slots of the SP register. */
1272 sp_delta
= sp
- extract_unsigned_integer (buf
, 4, byte_order
);
1273 for (i
= 0; i
< 4; i
++)
1275 CORE_ADDR sp_slot
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1276 store_unsigned_integer (buf
+ 4*i
, 4, byte_order
, sp_slot
+ sp_delta
);
1278 regcache_cooked_write (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1283 static struct frame_id
1284 spu_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1286 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1287 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, SPU_PC_REGNUM
);
1288 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1289 return frame_id_build (SPUADDR (tdep
->id
, sp
), SPUADDR (tdep
->id
, pc
& -4));
1292 /* Function return value access. */
1294 static enum return_value_convention
1295 spu_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1296 struct type
*type
, struct regcache
*regcache
,
1297 gdb_byte
*out
, const gdb_byte
*in
)
1299 enum return_value_convention rvc
;
1301 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1302 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1304 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1310 case RETURN_VALUE_REGISTER_CONVENTION
:
1311 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1314 case RETURN_VALUE_STRUCT_CONVENTION
:
1315 error ("Cannot set function return value.");
1323 case RETURN_VALUE_REGISTER_CONVENTION
:
1324 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1327 case RETURN_VALUE_STRUCT_CONVENTION
:
1328 error ("Function return value unknown.");
1339 static const gdb_byte
*
1340 spu_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
* pcptr
, int *lenptr
)
1342 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1344 *lenptr
= sizeof breakpoint
;
1349 /* Software single-stepping support. */
1352 spu_software_single_step (struct frame_info
*frame
)
1354 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1355 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1356 CORE_ADDR pc
, next_pc
;
1361 pc
= get_frame_pc (frame
);
1363 if (target_read_memory (pc
, buf
, 4))
1365 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
1367 /* Next sequential instruction is at PC + 4, except if the current
1368 instruction is a PPE-assisted call, in which case it is at PC + 8.
1369 Wrap around LS limit to be on the safe side. */
1370 if ((insn
& 0xffffff00) == 0x00002100)
1371 next_pc
= (SPUADDR_ADDR (pc
) + 8) & (SPU_LS_SIZE
- 1);
1373 next_pc
= (SPUADDR_ADDR (pc
) + 4) & (SPU_LS_SIZE
- 1);
1375 insert_single_step_breakpoint (gdbarch
, SPUADDR (SPUADDR_SPU (pc
), next_pc
));
1377 if (is_branch (insn
, &offset
, ®
))
1379 CORE_ADDR target
= offset
;
1381 if (reg
== SPU_PC_REGNUM
)
1382 target
+= SPUADDR_ADDR (pc
);
1385 get_frame_register_bytes (frame
, reg
, 0, 4, buf
);
1386 target
+= extract_unsigned_integer (buf
, 4, byte_order
) & -4;
1389 target
= target
& (SPU_LS_SIZE
- 1);
1390 if (target
!= next_pc
)
1391 insert_single_step_breakpoint (gdbarch
,
1392 SPUADDR (SPUADDR_SPU (pc
), target
));
1399 /* Longjmp support. */
1402 spu_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1404 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1405 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1406 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1410 /* Jump buffer is pointed to by the argument register $r3. */
1411 get_frame_register_bytes (frame
, SPU_ARG1_REGNUM
, 0, 4, buf
);
1412 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
1413 if (target_read_memory (SPUADDR (tdep
->id
, jb_addr
), buf
, 4))
1416 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1417 *pc
= SPUADDR (tdep
->id
, *pc
);
1424 struct spu_dis_asm_data
1426 struct gdbarch
*gdbarch
;
1431 spu_dis_asm_print_address (bfd_vma addr
, struct disassemble_info
*info
)
1433 struct spu_dis_asm_data
*data
= info
->application_data
;
1434 print_address (data
->gdbarch
, SPUADDR (data
->id
, addr
), info
->stream
);
1438 gdb_print_insn_spu (bfd_vma memaddr
, struct disassemble_info
*info
)
1440 /* The opcodes disassembler does 18-bit address arithmetic. Make sure the
1441 SPU ID encoded in the high bits is added back when we call print_address. */
1442 struct disassemble_info spu_info
= *info
;
1443 struct spu_dis_asm_data data
;
1444 data
.gdbarch
= info
->application_data
;
1445 data
.id
= SPUADDR_SPU (memaddr
);
1447 spu_info
.application_data
= &data
;
1448 spu_info
.print_address_func
= spu_dis_asm_print_address
;
1449 return print_insn_spu (memaddr
, &spu_info
);
1453 /* Target overlays for the SPU overlay manager.
1455 See the documentation of simple_overlay_update for how the
1456 interface is supposed to work.
1458 Data structures used by the overlay manager:
1466 } _ovly_table[]; -- one entry per overlay section
1468 struct ovly_buf_table
1471 } _ovly_buf_table[]; -- one entry per overlay buffer
1473 _ovly_table should never change.
1475 Both tables are aligned to a 16-byte boundary, the symbols _ovly_table
1476 and _ovly_buf_table are of type STT_OBJECT and their size set to the size
1477 of the respective array. buf in _ovly_table is an index into _ovly_buf_table.
1479 mapped is an index into _ovly_table. Both the mapped and buf indices start
1480 from one to reference the first entry in their respective tables. */
1482 /* Using the per-objfile private data mechanism, we store for each
1483 objfile an array of "struct spu_overlay_table" structures, one
1484 for each obj_section of the objfile. This structure holds two
1485 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1486 is *not* an overlay section. If it is non-zero, it represents
1487 a target address. The overlay section is mapped iff the target
1488 integer at this location equals MAPPED_VAL. */
1490 static const struct objfile_data
*spu_overlay_data
;
1492 struct spu_overlay_table
1494 CORE_ADDR mapped_ptr
;
1495 CORE_ADDR mapped_val
;
1498 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1499 the _ovly_table data structure from the target and initialize the
1500 spu_overlay_table data structure from it. */
1501 static struct spu_overlay_table
*
1502 spu_get_overlay_table (struct objfile
*objfile
)
1504 enum bfd_endian byte_order
= bfd_big_endian (objfile
->obfd
)?
1505 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1506 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1507 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1508 unsigned ovly_table_size
, ovly_buf_table_size
;
1509 struct spu_overlay_table
*tbl
;
1510 struct obj_section
*osect
;
1514 tbl
= objfile_data (objfile
, spu_overlay_data
);
1518 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1519 if (!ovly_table_msym
)
1522 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table", NULL
, objfile
);
1523 if (!ovly_buf_table_msym
)
1526 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1527 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1529 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1530 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1532 ovly_table
= xmalloc (ovly_table_size
);
1533 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1535 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1536 objfile
->sections_end
- objfile
->sections
,
1537 struct spu_overlay_table
);
1539 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1541 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0,
1543 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4,
1545 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8,
1547 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12,
1550 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1553 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1554 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1555 && pos
== osect
->the_bfd_section
->filepos
)
1557 int ndx
= osect
- objfile
->sections
;
1558 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1559 tbl
[ndx
].mapped_val
= i
+ 1;
1565 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1569 /* Read _ovly_buf_table entry from the target to dermine whether
1570 OSECT is currently mapped, and update the mapped state. */
1572 spu_overlay_update_osect (struct obj_section
*osect
)
1574 enum bfd_endian byte_order
= bfd_big_endian (osect
->objfile
->obfd
)?
1575 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1576 struct spu_overlay_table
*ovly_table
;
1579 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1583 ovly_table
+= osect
- osect
->objfile
->sections
;
1584 if (ovly_table
->mapped_ptr
== 0)
1587 id
= SPUADDR_SPU (obj_section_addr (osect
));
1588 val
= read_memory_unsigned_integer (SPUADDR (id
, ovly_table
->mapped_ptr
),
1590 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1593 /* If OSECT is NULL, then update all sections' mapped state.
1594 If OSECT is non-NULL, then update only OSECT's mapped state. */
1596 spu_overlay_update (struct obj_section
*osect
)
1598 /* Just one section. */
1600 spu_overlay_update_osect (osect
);
1605 struct objfile
*objfile
;
1607 ALL_OBJSECTIONS (objfile
, osect
)
1608 if (section_is_overlay (osect
))
1609 spu_overlay_update_osect (osect
);
1613 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1614 If there is one, go through all sections and make sure for non-
1615 overlay sections LMA equals VMA, while for overlay sections LMA
1616 is larger than local store size. */
1618 spu_overlay_new_objfile (struct objfile
*objfile
)
1620 struct spu_overlay_table
*ovly_table
;
1621 struct obj_section
*osect
;
1623 /* If we've already touched this file, do nothing. */
1624 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1627 /* Consider only SPU objfiles. */
1628 if (bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1631 /* Check if this objfile has overlays. */
1632 ovly_table
= spu_get_overlay_table (objfile
);
1636 /* Now go and fiddle with all the LMAs. */
1637 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1639 bfd
*obfd
= objfile
->obfd
;
1640 asection
*bsect
= osect
->the_bfd_section
;
1641 int ndx
= osect
- objfile
->sections
;
1643 if (ovly_table
[ndx
].mapped_ptr
== 0)
1644 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1646 bfd_section_lma (obfd
, bsect
) = bsect
->filepos
+ SPU_LS_SIZE
;
1651 /* "info spu" commands. */
1654 info_spu_event_command (char *args
, int from_tty
)
1656 struct frame_info
*frame
= get_selected_frame (NULL
);
1657 ULONGEST event_status
= 0;
1658 ULONGEST event_mask
= 0;
1659 struct cleanup
*chain
;
1665 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
1666 error (_("\"info spu\" is only supported on the SPU architecture."));
1668 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1670 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
1671 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1672 buf
, 0, (sizeof (buf
) - 1));
1674 error (_("Could not read event_status."));
1676 event_status
= strtoulst (buf
, NULL
, 16);
1678 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
1679 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1680 buf
, 0, (sizeof (buf
) - 1));
1682 error (_("Could not read event_mask."));
1684 event_mask
= strtoulst (buf
, NULL
, 16);
1686 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoEvent");
1688 if (ui_out_is_mi_like_p (uiout
))
1690 ui_out_field_fmt (uiout
, "event_status",
1691 "0x%s", phex_nz (event_status
, 4));
1692 ui_out_field_fmt (uiout
, "event_mask",
1693 "0x%s", phex_nz (event_mask
, 4));
1697 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
1698 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
1701 do_cleanups (chain
);
1705 info_spu_signal_command (char *args
, int from_tty
)
1707 struct frame_info
*frame
= get_selected_frame (NULL
);
1708 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1709 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1710 ULONGEST signal1
= 0;
1711 ULONGEST signal1_type
= 0;
1712 int signal1_pending
= 0;
1713 ULONGEST signal2
= 0;
1714 ULONGEST signal2_type
= 0;
1715 int signal2_pending
= 0;
1716 struct cleanup
*chain
;
1722 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1723 error (_("\"info spu\" is only supported on the SPU architecture."));
1725 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1727 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
1728 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
1730 error (_("Could not read signal1."));
1733 signal1
= extract_unsigned_integer (buf
, 4, byte_order
);
1734 signal1_pending
= 1;
1737 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
1738 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1739 buf
, 0, (sizeof (buf
) - 1));
1741 error (_("Could not read signal1_type."));
1743 signal1_type
= strtoulst (buf
, NULL
, 16);
1745 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
1746 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
1748 error (_("Could not read signal2."));
1751 signal2
= extract_unsigned_integer (buf
, 4, byte_order
);
1752 signal2_pending
= 1;
1755 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
1756 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1757 buf
, 0, (sizeof (buf
) - 1));
1759 error (_("Could not read signal2_type."));
1761 signal2_type
= strtoulst (buf
, NULL
, 16);
1763 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoSignal");
1765 if (ui_out_is_mi_like_p (uiout
))
1767 ui_out_field_int (uiout
, "signal1_pending", signal1_pending
);
1768 ui_out_field_fmt (uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
1769 ui_out_field_int (uiout
, "signal1_type", signal1_type
);
1770 ui_out_field_int (uiout
, "signal2_pending", signal2_pending
);
1771 ui_out_field_fmt (uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
1772 ui_out_field_int (uiout
, "signal2_type", signal2_type
);
1776 if (signal1_pending
)
1777 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
1779 printf_filtered (_("Signal 1 not pending "));
1782 printf_filtered (_("(Type Or)\n"));
1784 printf_filtered (_("(Type Overwrite)\n"));
1786 if (signal2_pending
)
1787 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
1789 printf_filtered (_("Signal 2 not pending "));
1792 printf_filtered (_("(Type Or)\n"));
1794 printf_filtered (_("(Type Overwrite)\n"));
1797 do_cleanups (chain
);
1801 info_spu_mailbox_list (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
,
1802 const char *field
, const char *msg
)
1804 struct cleanup
*chain
;
1810 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 1, nr
, "mbox");
1812 ui_out_table_header (uiout
, 32, ui_left
, field
, msg
);
1813 ui_out_table_body (uiout
);
1815 for (i
= 0; i
< nr
; i
++)
1817 struct cleanup
*val_chain
;
1819 val_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "mbox");
1820 val
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1821 ui_out_field_fmt (uiout
, field
, "0x%s", phex (val
, 4));
1822 do_cleanups (val_chain
);
1824 if (!ui_out_is_mi_like_p (uiout
))
1825 printf_filtered ("\n");
1828 do_cleanups (chain
);
1832 info_spu_mailbox_command (char *args
, int from_tty
)
1834 struct frame_info
*frame
= get_selected_frame (NULL
);
1835 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1836 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1837 struct cleanup
*chain
;
1843 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1844 error (_("\"info spu\" is only supported on the SPU architecture."));
1846 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
1848 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoMailbox");
1850 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
1851 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1852 buf
, 0, sizeof buf
);
1854 error (_("Could not read mbox_info."));
1856 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
1857 "mbox", "SPU Outbound Mailbox");
1859 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
1860 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1861 buf
, 0, sizeof buf
);
1863 error (_("Could not read ibox_info."));
1865 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
1866 "ibox", "SPU Outbound Interrupt Mailbox");
1868 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
1869 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
1870 buf
, 0, sizeof buf
);
1872 error (_("Could not read wbox_info."));
1874 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
1875 "wbox", "SPU Inbound Mailbox");
1877 do_cleanups (chain
);
1881 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
1883 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
1884 return (word
>> (63 - last
)) & mask
;
1888 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
)
1890 static char *spu_mfc_opcode
[256] =
1892 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1893 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1894 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1895 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1896 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
1897 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
1898 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
1899 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1900 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
1901 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
1902 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1903 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1904 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1905 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1906 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1907 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1908 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1909 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
1910 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1911 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1912 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
1913 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1914 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
1915 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1916 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1917 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
1918 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1919 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1920 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1921 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1922 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1923 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1926 int *seq
= alloca (nr
* sizeof (int));
1928 struct cleanup
*chain
;
1932 /* Determine sequence in which to display (valid) entries. */
1933 for (i
= 0; i
< nr
; i
++)
1935 /* Search for the first valid entry all of whose
1936 dependencies are met. */
1937 for (j
= 0; j
< nr
; j
++)
1939 ULONGEST mfc_cq_dw3
;
1940 ULONGEST dependencies
;
1942 if (done
& (1 << (nr
- 1 - j
)))
1946 = extract_unsigned_integer (buf
+ 32*j
+ 24,8, byte_order
);
1947 if (!spu_mfc_get_bitfield (mfc_cq_dw3
, 16, 16))
1950 dependencies
= spu_mfc_get_bitfield (mfc_cq_dw3
, 0, nr
- 1);
1951 if ((dependencies
& done
) != dependencies
)
1955 done
|= 1 << (nr
- 1 - j
);
1966 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 10, nr
, "dma_cmd");
1968 ui_out_table_header (uiout
, 7, ui_left
, "opcode", "Opcode");
1969 ui_out_table_header (uiout
, 3, ui_left
, "tag", "Tag");
1970 ui_out_table_header (uiout
, 3, ui_left
, "tid", "TId");
1971 ui_out_table_header (uiout
, 3, ui_left
, "rid", "RId");
1972 ui_out_table_header (uiout
, 18, ui_left
, "ea", "EA");
1973 ui_out_table_header (uiout
, 7, ui_left
, "lsa", "LSA");
1974 ui_out_table_header (uiout
, 7, ui_left
, "size", "Size");
1975 ui_out_table_header (uiout
, 7, ui_left
, "lstaddr", "LstAddr");
1976 ui_out_table_header (uiout
, 7, ui_left
, "lstsize", "LstSize");
1977 ui_out_table_header (uiout
, 1, ui_left
, "error_p", "E");
1979 ui_out_table_body (uiout
);
1981 for (i
= 0; i
< nr
; i
++)
1983 struct cleanup
*cmd_chain
;
1984 ULONGEST mfc_cq_dw0
;
1985 ULONGEST mfc_cq_dw1
;
1986 ULONGEST mfc_cq_dw2
;
1987 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
1988 int lsa
, size
, list_lsa
, list_size
, mfc_lsa
, mfc_size
;
1990 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
1992 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
1993 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
1996 = extract_unsigned_integer (buf
+ 32*seq
[i
], 8, byte_order
);
1998 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 8, 8, byte_order
);
2000 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 16, 8, byte_order
);
2002 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
2003 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
2004 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
2005 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
2006 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
2007 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
2008 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
2010 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
2011 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
2013 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
2014 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
2015 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
2016 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
2017 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
2018 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
2020 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "cmd");
2022 if (spu_mfc_opcode
[mfc_cmd_opcode
])
2023 ui_out_field_string (uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
2025 ui_out_field_int (uiout
, "opcode", mfc_cmd_opcode
);
2027 ui_out_field_int (uiout
, "tag", mfc_cmd_tag
);
2028 ui_out_field_int (uiout
, "tid", tclass_id
);
2029 ui_out_field_int (uiout
, "rid", rclass_id
);
2032 ui_out_field_fmt (uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
2034 ui_out_field_skip (uiout
, "ea");
2036 ui_out_field_fmt (uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
2038 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
<< 4);
2040 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
);
2044 ui_out_field_fmt (uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
2045 ui_out_field_fmt (uiout
, "lstsize", "0x%05x", list_size
<< 3);
2049 ui_out_field_skip (uiout
, "lstaddr");
2050 ui_out_field_skip (uiout
, "lstsize");
2054 ui_out_field_string (uiout
, "error_p", "*");
2056 ui_out_field_skip (uiout
, "error_p");
2058 do_cleanups (cmd_chain
);
2060 if (!ui_out_is_mi_like_p (uiout
))
2061 printf_filtered ("\n");
2064 do_cleanups (chain
);
2068 info_spu_dma_command (char *args
, int from_tty
)
2070 struct frame_info
*frame
= get_selected_frame (NULL
);
2071 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2072 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2073 ULONGEST dma_info_type
;
2074 ULONGEST dma_info_mask
;
2075 ULONGEST dma_info_status
;
2076 ULONGEST dma_info_stall_and_notify
;
2077 ULONGEST dma_info_atomic_command_status
;
2078 struct cleanup
*chain
;
2084 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2085 error (_("\"info spu\" is only supported on the SPU architecture."));
2087 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2089 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
2090 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2091 buf
, 0, 40 + 16 * 32);
2093 error (_("Could not read dma_info."));
2096 = extract_unsigned_integer (buf
, 8, byte_order
);
2098 = extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2100 = extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2101 dma_info_stall_and_notify
2102 = extract_unsigned_integer (buf
+ 24, 8, byte_order
);
2103 dma_info_atomic_command_status
2104 = extract_unsigned_integer (buf
+ 32, 8, byte_order
);
2106 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoDMA");
2108 if (ui_out_is_mi_like_p (uiout
))
2110 ui_out_field_fmt (uiout
, "dma_info_type", "0x%s",
2111 phex_nz (dma_info_type
, 4));
2112 ui_out_field_fmt (uiout
, "dma_info_mask", "0x%s",
2113 phex_nz (dma_info_mask
, 4));
2114 ui_out_field_fmt (uiout
, "dma_info_status", "0x%s",
2115 phex_nz (dma_info_status
, 4));
2116 ui_out_field_fmt (uiout
, "dma_info_stall_and_notify", "0x%s",
2117 phex_nz (dma_info_stall_and_notify
, 4));
2118 ui_out_field_fmt (uiout
, "dma_info_atomic_command_status", "0x%s",
2119 phex_nz (dma_info_atomic_command_status
, 4));
2123 const char *query_msg
= _("no query pending");
2125 if (dma_info_type
& 4)
2126 switch (dma_info_type
& 3)
2128 case 1: query_msg
= _("'any' query pending"); break;
2129 case 2: query_msg
= _("'all' query pending"); break;
2130 default: query_msg
= _("undefined query type"); break;
2133 printf_filtered (_("Tag-Group Status 0x%s\n"),
2134 phex (dma_info_status
, 4));
2135 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2136 phex (dma_info_mask
, 4), query_msg
);
2137 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2138 phex (dma_info_stall_and_notify
, 4));
2139 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2140 phex (dma_info_atomic_command_status
, 4));
2141 printf_filtered ("\n");
2144 info_spu_dma_cmdlist (buf
+ 40, 16, byte_order
);
2145 do_cleanups (chain
);
2149 info_spu_proxydma_command (char *args
, int from_tty
)
2151 struct frame_info
*frame
= get_selected_frame (NULL
);
2152 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2153 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2154 ULONGEST dma_info_type
;
2155 ULONGEST dma_info_mask
;
2156 ULONGEST dma_info_status
;
2157 struct cleanup
*chain
;
2163 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2164 error (_("\"info spu\" is only supported on the SPU architecture."));
2166 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2168 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
2169 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2170 buf
, 0, 24 + 8 * 32);
2172 error (_("Could not read proxydma_info."));
2174 dma_info_type
= extract_unsigned_integer (buf
, 8, byte_order
);
2175 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2176 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2178 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoProxyDMA");
2180 if (ui_out_is_mi_like_p (uiout
))
2182 ui_out_field_fmt (uiout
, "proxydma_info_type", "0x%s",
2183 phex_nz (dma_info_type
, 4));
2184 ui_out_field_fmt (uiout
, "proxydma_info_mask", "0x%s",
2185 phex_nz (dma_info_mask
, 4));
2186 ui_out_field_fmt (uiout
, "proxydma_info_status", "0x%s",
2187 phex_nz (dma_info_status
, 4));
2191 const char *query_msg
;
2193 switch (dma_info_type
& 3)
2195 case 0: query_msg
= _("no query pending"); break;
2196 case 1: query_msg
= _("'any' query pending"); break;
2197 case 2: query_msg
= _("'all' query pending"); break;
2198 default: query_msg
= _("undefined query type"); break;
2201 printf_filtered (_("Tag-Group Status 0x%s\n"),
2202 phex (dma_info_status
, 4));
2203 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2204 phex (dma_info_mask
, 4), query_msg
);
2205 printf_filtered ("\n");
2208 info_spu_dma_cmdlist (buf
+ 24, 8, byte_order
);
2209 do_cleanups (chain
);
2213 info_spu_command (char *args
, int from_tty
)
2215 printf_unfiltered (_("\"info spu\" must be followed by the name of an SPU facility.\n"));
2216 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
2220 /* Set up gdbarch struct. */
2222 static struct gdbarch
*
2223 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2225 struct gdbarch
*gdbarch
;
2226 struct gdbarch_tdep
*tdep
;
2229 /* Which spufs ID was requested as address space? */
2231 id
= *(int *)info
.tdep_info
;
2232 /* For objfile architectures of SPU solibs, decode the ID from the name.
2233 This assumes the filename convention employed by solib-spu.c. */
2236 char *name
= strrchr (info
.abfd
->filename
, '@');
2238 sscanf (name
, "@0x%*x <%d>", &id
);
2241 /* Find a candidate among extant architectures. */
2242 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2244 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2246 tdep
= gdbarch_tdep (arches
->gdbarch
);
2247 if (tdep
&& tdep
->id
== id
)
2248 return arches
->gdbarch
;
2251 /* None found, so create a new architecture. */
2252 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2254 gdbarch
= gdbarch_alloc (&info
, tdep
);
2257 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_spu
);
2260 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2261 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2262 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2263 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2264 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2265 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2266 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2267 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2268 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2269 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2270 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2271 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2274 set_gdbarch_char_signed (gdbarch
, 0);
2275 set_gdbarch_ptr_bit (gdbarch
, 32);
2276 set_gdbarch_addr_bit (gdbarch
, 32);
2277 set_gdbarch_short_bit (gdbarch
, 16);
2278 set_gdbarch_int_bit (gdbarch
, 32);
2279 set_gdbarch_long_bit (gdbarch
, 32);
2280 set_gdbarch_long_long_bit (gdbarch
, 64);
2281 set_gdbarch_float_bit (gdbarch
, 32);
2282 set_gdbarch_double_bit (gdbarch
, 64);
2283 set_gdbarch_long_double_bit (gdbarch
, 64);
2284 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2285 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2286 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2288 /* Address conversion. */
2289 set_gdbarch_address_to_pointer (gdbarch
, spu_address_to_pointer
);
2290 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2291 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2293 /* Inferior function calls. */
2294 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2295 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2296 set_gdbarch_frame_red_zone_size (gdbarch
, 2000);
2297 set_gdbarch_push_dummy_code (gdbarch
, spu_push_dummy_code
);
2298 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2299 set_gdbarch_dummy_id (gdbarch
, spu_dummy_id
);
2300 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2302 /* Frame handling. */
2303 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2304 frame_unwind_append_unwinder (gdbarch
, &spu_frame_unwind
);
2305 frame_base_set_default (gdbarch
, &spu_frame_base
);
2306 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2307 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2308 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2309 set_gdbarch_frame_args_skip (gdbarch
, 0);
2310 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2311 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2314 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2315 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2316 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2317 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2318 set_gdbarch_get_longjmp_target (gdbarch
, spu_get_longjmp_target
);
2321 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2326 /* Provide a prototype to silence -Wmissing-prototypes. */
2327 extern initialize_file_ftype _initialize_spu_tdep
;
2330 _initialize_spu_tdep (void)
2332 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2334 /* Add ourselves to objfile event chain. */
2335 observer_attach_new_objfile (spu_overlay_new_objfile
);
2336 spu_overlay_data
= register_objfile_data ();
2338 /* Add root prefix command for all "info spu" commands. */
2339 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2340 _("Various SPU specific commands."),
2341 &infospucmdlist
, "info spu ", 0, &infolist
);
2343 /* Add various "info spu" commands. */
2344 add_cmd ("event", class_info
, info_spu_event_command
,
2345 _("Display SPU event facility status.\n"),
2347 add_cmd ("signal", class_info
, info_spu_signal_command
,
2348 _("Display SPU signal notification facility status.\n"),
2350 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2351 _("Display SPU mailbox facility status.\n"),
2353 add_cmd ("dma", class_info
, info_spu_dma_command
,
2354 _("Display MFC DMA status.\n"),
2356 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2357 _("Display MFC Proxy-DMA status.\n"),