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Fix missing files for ld when test suite not compiled in the source directory
[thirdparty/binutils-gdb.git] / gdb / testsuite / gdb.arch / altivec-regs.exp
1 # Copyright (C) 2002-2016 Free Software Foundation, Inc.
2 #
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with this program. If not, see <http://www.gnu.org/licenses/>.
15 #
16
17 # Tests for Powerpc AltiVec register setting and fetching
18
19 #
20 # Test the use of registers, especially AltiVec registers, for Powerpc.
21 # This file uses altivec-regs.c for input.
22 #
23
24
25 if {![istarget "powerpc*"] || [skip_altivec_tests]} then {
26 verbose "Skipping altivec register tests."
27 return
28 }
29
30 standard_testfile
31
32 set compile_flags {debug nowarnings}
33 if [get_compiler_info] {
34 warning "get_compiler failed"
35 return -1
36 }
37
38 if [test_compiler_info gcc*] {
39 set compile_flags "$compile_flags additional_flags=-maltivec additional_flags=-mabi=altivec"
40 } elseif [test_compiler_info xlc*] {
41 set compile_flags "$compile_flags additional_flags=-qaltivec"
42 } else {
43 warning "unknown compiler"
44 return -1
45 }
46
47 if { [gdb_compile ${srcdir}/${subdir}/${srcfile} ${binfile} executable $compile_flags] != "" } {
48 untested altivec-regs.exp
49 return -1
50 }
51
52 gdb_start
53 gdb_reinitialize_dir $srcdir/$subdir
54 gdb_load ${binfile}
55
56 #
57 # Run to `main' where we begin our tests.
58 #
59
60 if ![runto_main] then {
61 gdb_suppress_tests
62 }
63
64 gdb_test "set print frame-arguments all"
65
66 # set all the registers integer portions to 1
67 for {set i 0} {$i < 32} {incr i 1} {
68 for {set j 0} {$j < 4} {incr j 1} {
69 gdb_test "set \$vr$i.v4_int32\[$j\] = 1" "" "set reg vr$i.v4si.f\[$j\]"
70 }
71 }
72
73 gdb_test "set \$vscr = 1" "" ""
74 gdb_test "set \$vrsave = 1" "" ""
75
76 # Now execute some target code, so that GDB's register cache is flushed.
77
78 gdb_test "next" "" ""
79
80 set endianness ""
81 set msg "detect endianness"
82 gdb_test_multiple "show endian" "$msg" {
83 -re "(The target endianness is set automatically .currently )(big|little)( endian.*)$gdb_prompt $" {
84 pass "$msg"
85 set endianness $expect_out(2,string)
86 }
87 -re ".*$gdb_prompt $" {
88 fail "$msg"
89 }
90 }
91
92 # And then read the AltiVec registers back, to see that
93 # a) the register write above worked, and
94 # b) the register read (below) also works.
95
96 if {$endianness == "big"} {
97 set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.."
98 } else {
99 set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
100 }
101
102 for {set i 0} {$i < 32} {incr i 1} {
103 gdb_test "info reg vr$i" "vr$i.*$vector_register" "info reg vr$i"
104 }
105
106 gdb_test "info reg vrsave" "vrsave.*0x1\t1" "info reg vrsave"
107 gdb_test "info reg vscr" "vscr.*0x1\t1" "info reg vscr"
108
109 # Now redo the same tests, but using the print command.
110 # Note: in LE case, the char array is printed WITHOUT the last character.
111 # Gdb treats the terminating null char in the array like the terminating
112 # null char in a string and doesn't print it. This is not a failure, but
113 # the way gdb works.
114
115 if {$endianness == "big"} {
116 set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = .0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1.."
117 } else {
118 set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = .1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0.."
119 }
120
121 for {set i 0} {$i < 32} {incr i 1} {
122 gdb_test "print \$vr$i" ".* = $decimal_vector" "print vr$i"
123 }
124
125 gdb_test "print \$vrsave" ".* = 1" "print vrsave"
126 gdb_test "print \$vscr" ".* = 1" "print vscr"
127
128 for {set i 0} {$i < 32} {incr i 1} {
129 set pattern$i ".*vr$i.*"
130 append pattern$i $vector_register
131 }
132
133 send_gdb "info vector\n"
134 gdb_expect_list "info vector" ".*$gdb_prompt $" {
135 [$pattern0]
136 [$pattern1]
137 [$pattern2]
138 [$pattern3]
139 [$pattern4]
140 [$pattern5]
141 [$pattern6]
142 [$pattern7]
143 [$pattern8]
144 [$pattern9]
145 [$pattern10]
146 [$pattern11]
147 [$pattern12]
148 [$pattern13]
149 [$pattern14]
150 [$pattern15]
151 [$pattern16]
152 [$pattern17]
153 [$pattern18]
154 [$pattern19]
155 [$pattern20]
156 [$pattern21]
157 [$pattern22]
158 [$pattern23]
159 [$pattern24]
160 [$pattern25]
161 [$pattern26]
162 [$pattern27]
163 [$pattern28]
164 [$pattern29]
165 [$pattern30]
166 [$pattern31]
167 "\[ \t\n\r\]+vscr\[ \t\]+0x1"
168 "\[ \t\n\r\]+vrsave\[ \t\]+0x1"
169 }
170
171 gdb_test "break vector_fun" \
172 "Breakpoint 2 at.*altivec-regs.c, line \[0-9\]+\\." \
173 "Set breakpoint at vector_fun"
174
175 # Actually it is nuch easier to see these results printed in hex.
176 gdb_test "set output-radix 16" \
177 "Output radix now set to decimal 16, hex 10, octal 20." \
178 "Set output radix to hex"
179
180 gdb_test "continue" \
181 "Breakpoint 2, vector_fun .a=.0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe., b=.0x1010101, 0x1010101, 0x1010101, 0x1010101.*altivec-regs.c.*vec_splat_u8.2..;" \
182 "continue to vector_fun"
183
184 # Do a next over the assignment to vector 'a'.
185 gdb_test "next" ".*b = \\(\\(vector unsigned int\\) vec_splat_u8\\(3\\)\\);" \
186 "next (1)"
187
188 # Do a next over the assignment to vector 'b'.
189 gdb_test "next" "c = vec_add \\(a, b\\);" \
190 "next (2)"
191
192 # Now 'a' should be '0x02020202...' and 'b' should be '0x03030303...'
193 gdb_test "print/x a" \
194 ".*= .0x2020202, 0x2020202, 0x2020202, 0x2020202." \
195 "print vector parameter a"
196
197 gdb_test "print/x b" \
198 ".*= .0x3030303, 0x3030303, 0x3030303, 0x3030303." \
199 "print vector parameter b"
200
201 # If we do an 'up' now, and print 'x' and 'y' we should see the values they
202 # have in main, not the values they have in vector_fun.
203 gdb_test "up" ".1.*main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);" \
204 "up to main"
205
206 gdb_test "print/x x" \
207 ".*= .0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe." \
208 "print vector x"
209
210 gdb_test "print/x y" \
211 ".*= .0x1010101, 0x1010101, 0x1010101, 0x1010101." \
212 "print vector y"
213
214 # now go back to vector_func and do a finish, to see if we can print the return
215 # value correctly.
216
217 gdb_test "down" \
218 ".0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*c = vec_add \\(a, b\\);" \
219 "down to vector_fun"
220
221 gdb_test "finish" \
222 "Run till exit from .0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*in main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);.*Value returned is.*= .0x5050505, 0x5050505, 0x5050505, 0x5050505." \
223 "finish returned correct value"
224
225
226