]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gdb/testsuite/gdb.base/float.exp
Update copyright year range in header of all files managed by GDB
[thirdparty/binutils-gdb.git] / gdb / testsuite / gdb.base / float.exp
1 # Copyright 2003-2024 Free Software Foundation, Inc.
2
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with this program. If not, see <http://www.gnu.org/licenses/>.
15
16 # Please email any bugs, comments, and/or additions to this file to:
17 # bug-gdb@gnu.org
18
19 # This file is part of the gdb testsuite.
20
21 #
22 # Test floating-point related functionality.
23 #
24
25
26 if { [prepare_for_testing "failed to prepare" float float.c] } {
27 return -1
28 }
29
30 # Set it up at a breakpoint so we have its registers.
31
32 if {![runto_main]} {
33 return
34 }
35
36 # Test "info float".
37
38 if {[is_aarch64_target]} {
39 gdb_test "info float" "d0.*d1.*d31.*s0.*s1.*s31.*"
40 } elseif {[istarget "alpha*-*-*"]} {
41 gdb_test "info float" "f0.*"
42 } elseif {[is_aarch32_target]} {
43 gdb_test_multiple "info float" "info float" {
44 -re "Software FPU type.*mask:.*flags:.*$gdb_prompt $" {
45 pass "info float (FPA)"
46 }
47 -re "fpscr.*s0.*s1.*s31.*$gdb_prompt $" {
48 # Only check for single precision; d0 might be a vector register
49 # if we have NEON.
50 pass "info float (VFP)"
51 }
52 -re "No floating.point info available for this processor.*$gdb_prompt $" {
53 pass "info float (without FPU)"
54 }
55 }
56 } elseif {[istarget "i?86-*-*"] || [istarget "x86_64-*-*"]} {
57 gdb_test "info float" "R7:.*Status Word:.*Opcode:.*"
58 } elseif {[istarget "ia64-*-*"]} {
59 gdb_test "info float" "f0.*f1.*f127.*"
60 } elseif {[istarget "m68k-*-*"]} {
61 gdb_test_multiple "info float" "info_float" {
62 -re "fp0.*fp1.*fp7.*$gdb_prompt $" {
63 pass "info float (with FPU)"
64 }
65 -re "No floating.point info available for this processor.*$gdb_prompt $" {
66 pass "info float (without FPU)"
67 }
68 }
69 } elseif {[istarget "mips*-*-*"]} {
70 gdb_test_multiple "info float" "info float" {
71 -re "fpu type: none / unused\r\n$gdb_prompt $" {
72 pass "info float (without FPU)"
73 }
74 -re "fpu type:.*cause.*mask.*flags.*round.*flush.*f0:.*flt:.*dbl:.*$gdb_prompt $" {
75 pass "info float (with FPU)"
76 }
77 }
78 } elseif {[istarget "nds32*-*-*"]} {
79 gdb_test_multiple "info float" "info_float" {
80 -re "fd0.*fd3.*$gdb_prompt $" {
81 pass "info float (with FPU)"
82 }
83 -re "No floating.point info available for this processor.*$gdb_prompt $" {
84 pass "info float (without FPU)"
85 }
86 }
87 } elseif {[istarget "powerpc*-*-*"]} {
88 gdb_test_multiple "info float" "info_float" {
89 -re "f0.*f1.*f31.*fpscr.*$gdb_prompt $" {
90 pass "info float (with FPU)"
91 }
92 -re "No floating.point info available for this processor.*$gdb_prompt $" {
93 pass "info float (without FPU)"
94 }
95 }
96 } elseif {[istarget "s390*-*-*"]} {
97 gdb_test "info float" "fpc.*f0.*f1.*f15.*" "info float"
98 } elseif {[istarget "sh*-*"]} {
99 # SH may or may not have an FPU
100 gdb_test_multiple "info float" "info float" {
101 -re "fpul.*fr0.*fr1.*fr15.*$gdb_prompt $" {
102 pass "info float (with FPU)"
103 }
104 -re "No floating.point info available for this processor.*$gdb_prompt $" {
105 pass "info float (without FPU)"
106 }
107 }
108 } elseif {[istarget "hppa*-*"]} {
109 gdb_test "info float" "fr4.*fr4R.*fr31R.*" "info float"
110 } elseif {[istarget "sparc*-*-*"]} {
111 gdb_test "info float" "f0.*f1.*f31.*d0.*d30.*" "info float"
112 } elseif {[istarget "riscv*-*-*"]} {
113 # RISC-V may or may not have an FPU. Additionally, the order of
114 # fcsr relative to fflags and frm can change depending on whether
115 # the fflags and frm registers are implemented as real registers
116 # (supplied in the target description) or pseudo-registers
117 # (supplied by GDB as a view into fcsr).
118 gdb_test_multiple "info float" "info float" {
119 -re "ft0.*ft1.*ft11.*fflags.*frm.*fcsr.*$gdb_prompt $" {
120 pass "info float (with FPU)"
121 }
122 -re "ft0.*ft1.*ft11.*fcsr.*fflags.*frm.*$gdb_prompt $" {
123 pass "info float (with FPU)"
124 }
125 -re "No floating.point info available for this processor.*$gdb_prompt $" {
126 pass "info float (without FPU)"
127 }
128 }
129 } elseif {[istarget "loongarch*-*-*"]} {
130 gdb_test "info float" "f.*fcc0.*fcsr.*" "info float"
131 } else {
132 gdb_test "info float" "No floating.point info available for this processor." "info float (unknown target)"
133 }
134
135 gdb_test "step"
136 gdb_test "finish" "Value returned is .* = (inf|nan).*"