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1 /* i387-specific utility functions, for the remote server for GDB.
2 Copyright (C) 2000-2024 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 #include "server.h"
20 #include "i387-fp.h"
21 #include "gdbsupport/x86-xstate.h"
22 #include "nat/x86-xstate.h"
23
24 /* Default to SSE. */
25 static unsigned long long x86_xcr0 = X86_XSTATE_SSE_MASK;
26
27 static const int num_mpx_bnd_registers = 4;
28 static const int num_mpx_cfg_registers = 2;
29 static const int num_avx512_k_registers = 8;
30 static const int num_pkeys_registers = 1;
31
32 static x86_xsave_layout xsave_layout;
33
34 /* Note: These functions preserve the reserved bits in control registers.
35 However, gdbserver promptly throws away that information. */
36
37 /* These structs should have the proper sizes and alignment on both
38 i386 and x86-64 machines. */
39
40 struct i387_fsave
41 {
42 /* All these are only sixteen bits, plus padding, except for fop (which
43 is only eleven bits), and fooff / fioff (which are 32 bits each). */
44 unsigned short fctrl;
45 unsigned short pad1;
46 unsigned short fstat;
47 unsigned short pad2;
48 unsigned short ftag;
49 unsigned short pad3;
50 unsigned int fioff;
51 unsigned short fiseg;
52 unsigned short fop;
53 unsigned int fooff;
54 unsigned short foseg;
55 unsigned short pad4;
56
57 /* Space for eight 80-bit FP values. */
58 unsigned char st_space[80];
59 };
60
61 struct i387_fxsave
62 {
63 /* All these are only sixteen bits, plus padding, except for fop (which
64 is only eleven bits), and fooff / fioff (which are 32 bits each). */
65 unsigned short fctrl;
66 unsigned short fstat;
67 unsigned short ftag;
68 unsigned short fop;
69 unsigned int fioff;
70 unsigned short fiseg;
71 unsigned short pad1;
72 unsigned int fooff;
73 unsigned short foseg;
74 unsigned short pad12;
75
76 unsigned int mxcsr;
77 unsigned int pad3;
78
79 /* Space for eight 80-bit FP values in 128-bit spaces. */
80 unsigned char st_space[128];
81
82 /* Space for eight 128-bit XMM values, or 16 on x86-64. */
83 unsigned char xmm_space[256];
84 };
85
86 static_assert (sizeof(i387_fxsave) == 416);
87
88 struct i387_xsave : public i387_fxsave
89 {
90 unsigned char reserved1[48];
91
92 /* The extended control register 0 (the XFEATURE_ENABLED_MASK
93 register). */
94 unsigned long long xcr0;
95
96 unsigned char reserved2[40];
97
98 /* The XSTATE_BV bit vector. */
99 unsigned long long xstate_bv;
100
101 /* The XCOMP_BV bit vector. */
102 unsigned long long xcomp_bv;
103
104 unsigned char reserved3[48];
105
106 /* Byte 576. End of registers with fixed position in XSAVE.
107 The position of other XSAVE registers will be calculated
108 from the appropriate CPUID calls. */
109
110 private:
111 /* Base address of XSAVE data as an unsigned char *. Used to derive
112 pointers to XSAVE state components in the extended state
113 area. */
114 unsigned char *xsave ()
115 { return reinterpret_cast<unsigned char *> (this); }
116
117 public:
118 /* Memory address of eight upper 128-bit YMM values, or 16 on x86-64. */
119 unsigned char *ymmh_space ()
120 { return xsave () + xsave_layout.avx_offset; }
121
122 /* Memory address of 4 bound registers values of 128 bits. */
123 unsigned char *bndregs_space ()
124 { return xsave () + xsave_layout.bndregs_offset; }
125
126 /* Memory address of 2 MPX configuration registers of 64 bits
127 plus reserved space. */
128 unsigned char *bndcfg_space ()
129 { return xsave () + xsave_layout.bndcfg_offset; }
130
131 /* Memory address of 8 OpMask register values of 64 bits. */
132 unsigned char *k_space ()
133 { return xsave () + xsave_layout.k_offset; }
134
135 /* Memory address of 16 256-bit zmm0-15. */
136 unsigned char *zmmh_space ()
137 { return xsave () + xsave_layout.zmm_h_offset; }
138
139 /* Memory address of 16 512-bit zmm16-31 values. */
140 unsigned char *zmm16_space ()
141 { return xsave () + xsave_layout.zmm_offset; }
142
143 /* Memory address of 1 32-bit PKRU register. The HW XSTATE size for this
144 feature is actually 64 bits, but WRPKRU/RDPKRU instructions ignore upper
145 32 bits. */
146 unsigned char *pkru_space ()
147 { return xsave () + xsave_layout.pkru_offset; }
148 };
149
150 static_assert (sizeof(i387_xsave) == 576);
151
152 void
153 i387_cache_to_fsave (struct regcache *regcache, void *buf)
154 {
155 struct i387_fsave *fp = (struct i387_fsave *) buf;
156 int i;
157 int st0_regnum = find_regno (regcache->tdesc, "st0");
158 unsigned long val2;
159
160 for (i = 0; i < 8; i++)
161 collect_register (regcache, i + st0_regnum,
162 ((char *) &fp->st_space[0]) + i * 10);
163
164 fp->fioff = regcache_raw_get_unsigned_by_name (regcache, "fioff");
165 fp->fooff = regcache_raw_get_unsigned_by_name (regcache, "fooff");
166
167 /* This one's 11 bits... */
168 val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
169 fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800);
170
171 /* Some registers are 16-bit. */
172 fp->fctrl = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
173 fp->fstat = regcache_raw_get_unsigned_by_name (regcache, "fstat");
174 fp->ftag = regcache_raw_get_unsigned_by_name (regcache, "ftag");
175 fp->fiseg = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
176 fp->foseg = regcache_raw_get_unsigned_by_name (regcache, "foseg");
177 }
178
179 void
180 i387_fsave_to_cache (struct regcache *regcache, const void *buf)
181 {
182 struct i387_fsave *fp = (struct i387_fsave *) buf;
183 int i;
184 int st0_regnum = find_regno (regcache->tdesc, "st0");
185 unsigned long val;
186
187 for (i = 0; i < 8; i++)
188 supply_register (regcache, i + st0_regnum,
189 ((char *) &fp->st_space[0]) + i * 10);
190
191 supply_register_by_name (regcache, "fioff", &fp->fioff);
192 supply_register_by_name (regcache, "fooff", &fp->fooff);
193
194 /* Some registers are 16-bit. */
195 val = fp->fctrl & 0xFFFF;
196 supply_register_by_name (regcache, "fctrl", &val);
197
198 val = fp->fstat & 0xFFFF;
199 supply_register_by_name (regcache, "fstat", &val);
200
201 val = fp->ftag & 0xFFFF;
202 supply_register_by_name (regcache, "ftag", &val);
203
204 val = fp->fiseg & 0xFFFF;
205 supply_register_by_name (regcache, "fiseg", &val);
206
207 val = fp->foseg & 0xFFFF;
208 supply_register_by_name (regcache, "foseg", &val);
209
210 /* fop has only 11 valid bits. */
211 val = (fp->fop) & 0x7FF;
212 supply_register_by_name (regcache, "fop", &val);
213 }
214
215 void
216 i387_cache_to_fxsave (struct regcache *regcache, void *buf)
217 {
218 struct i387_fxsave *fp = (struct i387_fxsave *) buf;
219 int i;
220 int st0_regnum = find_regno (regcache->tdesc, "st0");
221 int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
222 unsigned long val, val2;
223 /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
224 int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
225
226 for (i = 0; i < 8; i++)
227 collect_register (regcache, i + st0_regnum,
228 ((char *) &fp->st_space[0]) + i * 16);
229 for (i = 0; i < num_xmm_registers; i++)
230 collect_register (regcache, i + xmm0_regnum,
231 ((char *) &fp->xmm_space[0]) + i * 16);
232
233 fp->fioff = regcache_raw_get_unsigned_by_name (regcache, "fioff");
234 fp->fooff = regcache_raw_get_unsigned_by_name (regcache, "fooff");
235 fp->mxcsr = regcache_raw_get_unsigned_by_name (regcache, "mxcsr");
236
237 /* This one's 11 bits... */
238 val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
239 fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800);
240
241 /* Some registers are 16-bit. */
242 fp->fctrl = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
243 fp->fstat = regcache_raw_get_unsigned_by_name (regcache, "fstat");
244
245 /* Convert to the simplifed tag form stored in fxsave data. */
246 val = regcache_raw_get_unsigned_by_name (regcache, "ftag");
247 val2 = 0;
248 for (i = 7; i >= 0; i--)
249 {
250 int tag = (val >> (i * 2)) & 3;
251
252 if (tag != 3)
253 val2 |= (1 << i);
254 }
255 fp->ftag = val2;
256
257 fp->fiseg = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
258 fp->foseg = regcache_raw_get_unsigned_by_name (regcache, "foseg");
259 }
260
261 void
262 i387_cache_to_xsave (struct regcache *regcache, void *buf)
263 {
264 struct i387_xsave *fp = (struct i387_xsave *) buf;
265 bool amd64 = register_size (regcache->tdesc, 0) == 8;
266 int i;
267 unsigned long val, val2;
268 unsigned long long xstate_bv = 0;
269 unsigned long long clear_bv = 0;
270 char raw[64];
271 unsigned char *p;
272
273 /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
274 int num_xmm_registers = amd64 ? 16 : 8;
275 /* AVX512 adds 16 extra ZMM regs in Amd64 mode, but none in I386 mode.*/
276 int num_zmm_high_registers = amd64 ? 16 : 0;
277
278 /* The supported bits in `xstat_bv' are 8 bytes. Clear part in
279 vector registers if its bit in xstat_bv is zero. */
280 clear_bv = (~fp->xstate_bv) & x86_xcr0;
281
282 /* Clear part in x87 and vector registers if its bit in xstat_bv is
283 zero. */
284 if (clear_bv)
285 {
286 if ((clear_bv & X86_XSTATE_X87))
287 {
288 for (i = 0; i < 8; i++)
289 memset (((char *) &fp->st_space[0]) + i * 16, 0, 10);
290
291 fp->fioff = 0;
292 fp->fooff = 0;
293 fp->fctrl = I387_FCTRL_INIT_VAL;
294 fp->fstat = 0;
295 fp->ftag = 0;
296 fp->fiseg = 0;
297 fp->foseg = 0;
298 fp->fop = 0;
299 }
300
301 if ((clear_bv & X86_XSTATE_SSE))
302 for (i = 0; i < num_xmm_registers; i++)
303 memset (((char *) &fp->xmm_space[0]) + i * 16, 0, 16);
304
305 if ((clear_bv & X86_XSTATE_AVX))
306 for (i = 0; i < num_xmm_registers; i++)
307 memset (fp->ymmh_space () + i * 16, 0, 16);
308
309 if ((clear_bv & X86_XSTATE_SSE) && (clear_bv & X86_XSTATE_AVX))
310 memset (((char *) &fp->mxcsr), 0, 4);
311
312 if ((clear_bv & X86_XSTATE_BNDREGS))
313 for (i = 0; i < num_mpx_bnd_registers; i++)
314 memset (fp->bndregs_space () + i * 16, 0, 16);
315
316 if ((clear_bv & X86_XSTATE_BNDCFG))
317 for (i = 0; i < num_mpx_cfg_registers; i++)
318 memset (fp->bndcfg_space () + i * 8, 0, 8);
319
320 if ((clear_bv & X86_XSTATE_K))
321 for (i = 0; i < num_avx512_k_registers; i++)
322 memset (fp->k_space () + i * 8, 0, 8);
323
324 if ((clear_bv & X86_XSTATE_ZMM_H))
325 for (i = 0; i < num_xmm_registers; i++)
326 memset (fp->zmmh_space () + i * 32, 0, 32);
327
328 if ((clear_bv & X86_XSTATE_ZMM))
329 for (i = 0; i < num_zmm_high_registers; i++)
330 memset (fp->zmm16_space () + i * 64, 0, 64);
331
332 if ((clear_bv & X86_XSTATE_PKRU))
333 for (i = 0; i < num_pkeys_registers; i++)
334 memset (fp->pkru_space () + i * 4, 0, 4);
335 }
336
337 /* Check if any x87 registers are changed. */
338 if ((x86_xcr0 & X86_XSTATE_X87))
339 {
340 int st0_regnum = find_regno (regcache->tdesc, "st0");
341
342 for (i = 0; i < 8; i++)
343 {
344 collect_register (regcache, i + st0_regnum, raw);
345 p = fp->st_space + i * 16;
346 if (memcmp (raw, p, 10))
347 {
348 xstate_bv |= X86_XSTATE_X87;
349 memcpy (p, raw, 10);
350 }
351 }
352 }
353
354 /* Check if any SSE registers are changed. */
355 if ((x86_xcr0 & X86_XSTATE_SSE))
356 {
357 int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
358
359 for (i = 0; i < num_xmm_registers; i++)
360 {
361 collect_register (regcache, i + xmm0_regnum, raw);
362 p = fp->xmm_space + i * 16;
363 if (memcmp (raw, p, 16))
364 {
365 xstate_bv |= X86_XSTATE_SSE;
366 memcpy (p, raw, 16);
367 }
368 }
369 }
370
371 /* Check if any AVX registers are changed. */
372 if ((x86_xcr0 & X86_XSTATE_AVX))
373 {
374 int ymm0h_regnum = find_regno (regcache->tdesc, "ymm0h");
375
376 for (i = 0; i < num_xmm_registers; i++)
377 {
378 collect_register (regcache, i + ymm0h_regnum, raw);
379 p = fp->ymmh_space () + i * 16;
380 if (memcmp (raw, p, 16))
381 {
382 xstate_bv |= X86_XSTATE_AVX;
383 memcpy (p, raw, 16);
384 }
385 }
386 }
387
388 /* Check if any bound register has changed. */
389 if ((x86_xcr0 & X86_XSTATE_BNDREGS))
390 {
391 int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
392
393 for (i = 0; i < num_mpx_bnd_registers; i++)
394 {
395 collect_register (regcache, i + bnd0r_regnum, raw);
396 p = fp->bndregs_space () + i * 16;
397 if (memcmp (raw, p, 16))
398 {
399 xstate_bv |= X86_XSTATE_BNDREGS;
400 memcpy (p, raw, 16);
401 }
402 }
403 }
404
405 /* Check if any status register has changed. */
406 if ((x86_xcr0 & X86_XSTATE_BNDCFG))
407 {
408 int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
409
410 for (i = 0; i < num_mpx_cfg_registers; i++)
411 {
412 collect_register (regcache, i + bndcfg_regnum, raw);
413 p = fp->bndcfg_space () + i * 8;
414 if (memcmp (raw, p, 8))
415 {
416 xstate_bv |= X86_XSTATE_BNDCFG;
417 memcpy (p, raw, 8);
418 }
419 }
420 }
421
422 /* Check if any K registers are changed. */
423 if ((x86_xcr0 & X86_XSTATE_K))
424 {
425 int k0_regnum = find_regno (regcache->tdesc, "k0");
426
427 for (i = 0; i < num_avx512_k_registers; i++)
428 {
429 collect_register (regcache, i + k0_regnum, raw);
430 p = fp->k_space () + i * 8;
431 if (memcmp (raw, p, 8) != 0)
432 {
433 xstate_bv |= X86_XSTATE_K;
434 memcpy (p, raw, 8);
435 }
436 }
437 }
438
439 /* Check if any of ZMM0H-ZMM15H registers are changed. */
440 if ((x86_xcr0 & X86_XSTATE_ZMM_H))
441 {
442 int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h");
443
444 for (i = 0; i < num_xmm_registers; i++)
445 {
446 collect_register (regcache, i + zmm0h_regnum, raw);
447 p = fp->zmmh_space () + i * 32;
448 if (memcmp (raw, p, 32) != 0)
449 {
450 xstate_bv |= X86_XSTATE_ZMM_H;
451 memcpy (p, raw, 32);
452 }
453 }
454 }
455
456 /* Check if any of ZMM16-ZMM31 registers are changed. */
457 if ((x86_xcr0 & X86_XSTATE_ZMM) && num_zmm_high_registers != 0)
458 {
459 int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
460 int ymm16h_regnum = find_regno (regcache->tdesc, "ymm16h");
461 int xmm16_regnum = find_regno (regcache->tdesc, "xmm16");
462
463 for (i = 0; i < num_zmm_high_registers; i++)
464 {
465 p = fp->zmm16_space () + i * 64;
466
467 /* ZMMH sub-register. */
468 collect_register (regcache, i + zmm16h_regnum, raw);
469 if (memcmp (raw, p + 32, 32) != 0)
470 {
471 xstate_bv |= X86_XSTATE_ZMM;
472 memcpy (p + 32, raw, 32);
473 }
474
475 /* YMMH sub-register. */
476 collect_register (regcache, i + ymm16h_regnum, raw);
477 if (memcmp (raw, p + 16, 16) != 0)
478 {
479 xstate_bv |= X86_XSTATE_ZMM;
480 memcpy (p + 16, raw, 16);
481 }
482
483 /* XMM sub-register. */
484 collect_register (regcache, i + xmm16_regnum, raw);
485 if (memcmp (raw, p, 16) != 0)
486 {
487 xstate_bv |= X86_XSTATE_ZMM;
488 memcpy (p, raw, 16);
489 }
490 }
491 }
492
493 /* Check if any PKEYS registers are changed. */
494 if ((x86_xcr0 & X86_XSTATE_PKRU))
495 {
496 int pkru_regnum = find_regno (regcache->tdesc, "pkru");
497
498 for (i = 0; i < num_pkeys_registers; i++)
499 {
500 collect_register (regcache, i + pkru_regnum, raw);
501 p = fp->pkru_space () + i * 4;
502 if (memcmp (raw, p, 4) != 0)
503 {
504 xstate_bv |= X86_XSTATE_PKRU;
505 memcpy (p, raw, 4);
506 }
507 }
508 }
509
510 if ((x86_xcr0 & X86_XSTATE_SSE) || (x86_xcr0 & X86_XSTATE_AVX))
511 {
512 collect_register_by_name (regcache, "mxcsr", raw);
513 if (memcmp (raw, &fp->mxcsr, 4) != 0)
514 {
515 if (((fp->xstate_bv | xstate_bv)
516 & (X86_XSTATE_SSE | X86_XSTATE_AVX)) == 0)
517 xstate_bv |= X86_XSTATE_SSE;
518 memcpy (&fp->mxcsr, raw, 4);
519 }
520 }
521
522 if (x86_xcr0 & X86_XSTATE_X87)
523 {
524 collect_register_by_name (regcache, "fioff", raw);
525 if (memcmp (raw, &fp->fioff, 4) != 0)
526 {
527 xstate_bv |= X86_XSTATE_X87;
528 memcpy (&fp->fioff, raw, 4);
529 }
530
531 collect_register_by_name (regcache, "fooff", raw);
532 if (memcmp (raw, &fp->fooff, 4) != 0)
533 {
534 xstate_bv |= X86_XSTATE_X87;
535 memcpy (&fp->fooff, raw, 4);
536 }
537
538 /* This one's 11 bits... */
539 val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
540 val2 = (val2 & 0x7FF) | (fp->fop & 0xF800);
541 if (fp->fop != val2)
542 {
543 xstate_bv |= X86_XSTATE_X87;
544 fp->fop = val2;
545 }
546
547 /* Some registers are 16-bit. */
548 val = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
549 if (fp->fctrl != val)
550 {
551 xstate_bv |= X86_XSTATE_X87;
552 fp->fctrl = val;
553 }
554
555 val = regcache_raw_get_unsigned_by_name (regcache, "fstat");
556 if (fp->fstat != val)
557 {
558 xstate_bv |= X86_XSTATE_X87;
559 fp->fstat = val;
560 }
561
562 /* Convert to the simplifed tag form stored in fxsave data. */
563 val = regcache_raw_get_unsigned_by_name (regcache, "ftag");
564 val2 = 0;
565 for (i = 7; i >= 0; i--)
566 {
567 int tag = (val >> (i * 2)) & 3;
568
569 if (tag != 3)
570 val2 |= (1 << i);
571 }
572 if (fp->ftag != val2)
573 {
574 xstate_bv |= X86_XSTATE_X87;
575 fp->ftag = val2;
576 }
577
578 val = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
579 if (fp->fiseg != val)
580 {
581 xstate_bv |= X86_XSTATE_X87;
582 fp->fiseg = val;
583 }
584
585 val = regcache_raw_get_unsigned_by_name (regcache, "foseg");
586 if (fp->foseg != val)
587 {
588 xstate_bv |= X86_XSTATE_X87;
589 fp->foseg = val;
590 }
591 }
592
593 /* Update the corresponding bits in xstate_bv if any SSE/AVX
594 registers are changed. */
595 fp->xstate_bv |= xstate_bv;
596 }
597
598 static int
599 i387_ftag (struct i387_fxsave *fp, int regno)
600 {
601 unsigned char *raw = &fp->st_space[regno * 16];
602 unsigned int exponent;
603 unsigned long fraction[2];
604 int integer;
605
606 integer = raw[7] & 0x80;
607 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
608 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
609 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
610 | (raw[5] << 8) | raw[4]);
611
612 if (exponent == 0x7fff)
613 {
614 /* Special. */
615 return (2);
616 }
617 else if (exponent == 0x0000)
618 {
619 if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
620 {
621 /* Zero. */
622 return (1);
623 }
624 else
625 {
626 /* Special. */
627 return (2);
628 }
629 }
630 else
631 {
632 if (integer)
633 {
634 /* Valid. */
635 return (0);
636 }
637 else
638 {
639 /* Special. */
640 return (2);
641 }
642 }
643 }
644
645 void
646 i387_fxsave_to_cache (struct regcache *regcache, const void *buf)
647 {
648 struct i387_fxsave *fp = (struct i387_fxsave *) buf;
649 int i, top;
650 int st0_regnum = find_regno (regcache->tdesc, "st0");
651 int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
652 unsigned long val;
653 /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
654 int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
655
656 for (i = 0; i < 8; i++)
657 supply_register (regcache, i + st0_regnum,
658 ((char *) &fp->st_space[0]) + i * 16);
659 for (i = 0; i < num_xmm_registers; i++)
660 supply_register (regcache, i + xmm0_regnum,
661 ((char *) &fp->xmm_space[0]) + i * 16);
662
663 supply_register_by_name (regcache, "fioff", &fp->fioff);
664 supply_register_by_name (regcache, "fooff", &fp->fooff);
665 supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
666
667 /* Some registers are 16-bit. */
668 val = fp->fctrl & 0xFFFF;
669 supply_register_by_name (regcache, "fctrl", &val);
670
671 val = fp->fstat & 0xFFFF;
672 supply_register_by_name (regcache, "fstat", &val);
673
674 /* Generate the form of ftag data that GDB expects. */
675 top = (fp->fstat >> 11) & 0x7;
676 val = 0;
677 for (i = 7; i >= 0; i--)
678 {
679 int tag;
680 if (fp->ftag & (1 << i))
681 tag = i387_ftag (fp, (i + 8 - top) % 8);
682 else
683 tag = 3;
684 val |= tag << (2 * i);
685 }
686 supply_register_by_name (regcache, "ftag", &val);
687
688 val = fp->fiseg & 0xFFFF;
689 supply_register_by_name (regcache, "fiseg", &val);
690
691 val = fp->foseg & 0xFFFF;
692 supply_register_by_name (regcache, "foseg", &val);
693
694 val = (fp->fop) & 0x7FF;
695 supply_register_by_name (regcache, "fop", &val);
696 }
697
698 void
699 i387_xsave_to_cache (struct regcache *regcache, const void *buf)
700 {
701 struct i387_xsave *fp = (struct i387_xsave *) buf;
702 bool amd64 = register_size (regcache->tdesc, 0) == 8;
703 int i, top;
704 unsigned long val;
705 unsigned long long clear_bv;
706 unsigned char *p;
707
708 /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
709 int num_xmm_registers = amd64 ? 16 : 8;
710 /* AVX512 adds 16 extra ZMM regs in Amd64 mode, but none in I386 mode.*/
711 int num_zmm_high_registers = amd64 ? 16 : 0;
712
713 /* The supported bits in `xstat_bv' are 8 bytes. Clear part in
714 vector registers if its bit in xstat_bv is zero. */
715 clear_bv = (~fp->xstate_bv) & x86_xcr0;
716
717 /* Check if any x87 registers are changed. */
718 if ((x86_xcr0 & X86_XSTATE_X87) != 0)
719 {
720 int st0_regnum = find_regno (regcache->tdesc, "st0");
721
722 if ((clear_bv & X86_XSTATE_X87) != 0)
723 {
724 for (i = 0; i < 8; i++)
725 supply_register_zeroed (regcache, i + st0_regnum);
726 }
727 else
728 {
729 p = (gdb_byte *) &fp->st_space[0];
730 for (i = 0; i < 8; i++)
731 supply_register (regcache, i + st0_regnum, p + i * 16);
732 }
733 }
734
735 if ((x86_xcr0 & X86_XSTATE_SSE) != 0)
736 {
737 int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
738
739 if ((clear_bv & X86_XSTATE_SSE))
740 {
741 for (i = 0; i < num_xmm_registers; i++)
742 supply_register_zeroed (regcache, i + xmm0_regnum);
743 }
744 else
745 {
746 p = (gdb_byte *) &fp->xmm_space[0];
747 for (i = 0; i < num_xmm_registers; i++)
748 supply_register (regcache, i + xmm0_regnum, p + i * 16);
749 }
750 }
751
752 if ((x86_xcr0 & X86_XSTATE_AVX) != 0)
753 {
754 int ymm0h_regnum = find_regno (regcache->tdesc, "ymm0h");
755
756 if ((clear_bv & X86_XSTATE_AVX) != 0)
757 {
758 for (i = 0; i < num_xmm_registers; i++)
759 supply_register_zeroed (regcache, i + ymm0h_regnum);
760 }
761 else
762 {
763 p = fp->ymmh_space ();
764 for (i = 0; i < num_xmm_registers; i++)
765 supply_register (regcache, i + ymm0h_regnum, p + i * 16);
766 }
767 }
768
769 if ((x86_xcr0 & X86_XSTATE_BNDREGS))
770 {
771 int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
772
773
774 if ((clear_bv & X86_XSTATE_BNDREGS) != 0)
775 {
776 for (i = 0; i < num_mpx_bnd_registers; i++)
777 supply_register_zeroed (regcache, i + bnd0r_regnum);
778 }
779 else
780 {
781 p = fp->bndregs_space ();
782 for (i = 0; i < num_mpx_bnd_registers; i++)
783 supply_register (regcache, i + bnd0r_regnum, p + i * 16);
784 }
785
786 }
787
788 if ((x86_xcr0 & X86_XSTATE_BNDCFG))
789 {
790 int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
791
792 if ((clear_bv & X86_XSTATE_BNDCFG) != 0)
793 {
794 for (i = 0; i < num_mpx_cfg_registers; i++)
795 supply_register_zeroed (regcache, i + bndcfg_regnum);
796 }
797 else
798 {
799 p = fp->bndcfg_space ();
800 for (i = 0; i < num_mpx_cfg_registers; i++)
801 supply_register (regcache, i + bndcfg_regnum, p + i * 8);
802 }
803 }
804
805 if ((x86_xcr0 & X86_XSTATE_K) != 0)
806 {
807 int k0_regnum = find_regno (regcache->tdesc, "k0");
808
809 if ((clear_bv & X86_XSTATE_K) != 0)
810 {
811 for (i = 0; i < num_avx512_k_registers; i++)
812 supply_register_zeroed (regcache, i + k0_regnum);
813 }
814 else
815 {
816 p = fp->k_space ();
817 for (i = 0; i < num_avx512_k_registers; i++)
818 supply_register (regcache, i + k0_regnum, p + i * 8);
819 }
820 }
821
822 if ((x86_xcr0 & X86_XSTATE_ZMM_H) != 0)
823 {
824 int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h");
825
826 if ((clear_bv & X86_XSTATE_ZMM_H) != 0)
827 {
828 for (i = 0; i < num_xmm_registers; i++)
829 supply_register_zeroed (regcache, i + zmm0h_regnum);
830 }
831 else
832 {
833 p = fp->zmmh_space ();
834 for (i = 0; i < num_xmm_registers; i++)
835 supply_register (regcache, i + zmm0h_regnum, p + i * 32);
836 }
837 }
838
839 if ((x86_xcr0 & X86_XSTATE_ZMM) != 0 && num_zmm_high_registers != 0)
840 {
841 int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
842 int ymm16h_regnum = find_regno (regcache->tdesc, "ymm16h");
843 int xmm16_regnum = find_regno (regcache->tdesc, "xmm16");
844
845 if ((clear_bv & X86_XSTATE_ZMM) != 0)
846 {
847 for (i = 0; i < num_zmm_high_registers; i++)
848 {
849 supply_register_zeroed (regcache, i + zmm16h_regnum);
850 supply_register_zeroed (regcache, i + ymm16h_regnum);
851 supply_register_zeroed (regcache, i + xmm16_regnum);
852 }
853 }
854 else
855 {
856 p = fp->zmm16_space ();
857 for (i = 0; i < num_zmm_high_registers; i++)
858 {
859 supply_register (regcache, i + zmm16h_regnum, p + 32 + i * 64);
860 supply_register (regcache, i + ymm16h_regnum, p + 16 + i * 64);
861 supply_register (regcache, i + xmm16_regnum, p + i * 64);
862 }
863 }
864 }
865
866 if ((x86_xcr0 & X86_XSTATE_PKRU) != 0)
867 {
868 int pkru_regnum = find_regno (regcache->tdesc, "pkru");
869
870 if ((clear_bv & X86_XSTATE_PKRU) != 0)
871 {
872 for (i = 0; i < num_pkeys_registers; i++)
873 supply_register_zeroed (regcache, i + pkru_regnum);
874 }
875 else
876 {
877 p = fp->pkru_space ();
878 for (i = 0; i < num_pkeys_registers; i++)
879 supply_register (regcache, i + pkru_regnum, p + i * 4);
880 }
881 }
882
883 if ((clear_bv & (X86_XSTATE_SSE | X86_XSTATE_AVX))
884 == (X86_XSTATE_SSE | X86_XSTATE_AVX))
885 {
886 unsigned int default_mxcsr = I387_MXCSR_INIT_VAL;
887 supply_register_by_name (regcache, "mxcsr", &default_mxcsr);
888 }
889 else
890 supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
891
892 if ((clear_bv & X86_XSTATE_X87) != 0)
893 {
894 supply_register_by_name_zeroed (regcache, "fioff");
895 supply_register_by_name_zeroed (regcache, "fooff");
896
897 val = I387_FCTRL_INIT_VAL;
898 supply_register_by_name (regcache, "fctrl", &val);
899
900 supply_register_by_name_zeroed (regcache, "fstat");
901
902 val = 0xFFFF;
903 supply_register_by_name (regcache, "ftag", &val);
904
905 supply_register_by_name_zeroed (regcache, "fiseg");
906 supply_register_by_name_zeroed (regcache, "foseg");
907 supply_register_by_name_zeroed (regcache, "fop");
908 }
909 else
910 {
911 supply_register_by_name (regcache, "fioff", &fp->fioff);
912 supply_register_by_name (regcache, "fooff", &fp->fooff);
913
914 /* Some registers are 16-bit. */
915 val = fp->fctrl & 0xFFFF;
916 supply_register_by_name (regcache, "fctrl", &val);
917
918 val = fp->fstat & 0xFFFF;
919 supply_register_by_name (regcache, "fstat", &val);
920
921 /* Generate the form of ftag data that GDB expects. */
922 top = (fp->fstat >> 11) & 0x7;
923 val = 0;
924 for (i = 7; i >= 0; i--)
925 {
926 int tag;
927 if (fp->ftag & (1 << i))
928 tag = i387_ftag (fp, (i + 8 - top) % 8);
929 else
930 tag = 3;
931 val |= tag << (2 * i);
932 }
933 supply_register_by_name (regcache, "ftag", &val);
934
935 val = fp->fiseg & 0xFFFF;
936 supply_register_by_name (regcache, "fiseg", &val);
937
938 val = fp->foseg & 0xFFFF;
939 supply_register_by_name (regcache, "foseg", &val);
940
941 val = (fp->fop) & 0x7FF;
942 supply_register_by_name (regcache, "fop", &val);
943 }
944 }
945
946 /* See i387-fp.h. */
947
948 void
949 i387_set_xsave_mask (uint64_t xcr0, int len)
950 {
951 x86_xcr0 = xcr0;
952 xsave_layout = x86_fetch_xsave_layout (xcr0, len);
953 }