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[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-A
[thirdparty/binutils-gdb.git] / include / ChangeLog
1 2018-10-09 Sudakshina Das <sudi.das@arm.com>
2
3 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
4 (AARCH64_FEATURE_FRINTTS): New.
5 (AARCH64_ARCH_V8_5): Add both by default.
6
7 2018-10-09 Sudakshina Das <sudi.das@arm.com>
8
9 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
10 (AARCH64_ARCH_V8_5): New.
11
12 2018-10-08 Alan Modra <amodra@gmail.com>
13
14 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
15
16 2018-10-05 Sudakshina Das <sudi.das@arm.com>
17
18 * opcode/arm.h (ARM_EXT2_PREDRES): New.
19 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
20
21 2018-10-05 Sudakshina Das <sudi.das@arm.com>
22
23 * opcode/arm.h (ARM_EXT2_SB): New.
24 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
25
26 2018-10-05 Sudakshina Das <sudi.das@arm.com>
27
28 * opcode/arm.h (ARM_EXT2_V8_5A): New.
29 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
30
31 2018-10-05 Richard Henderson <rth@twiddle.net>
32
33 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
34 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
35 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
36 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
37 R_OR1K_SLO13, R_OR1K_PLTA26.
38
39 2018-10-05 Richard Henderson <rth@twiddle.net>
40
41 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
42 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
43 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
44
45 2018-10-03 Tamar Christina <tamar.christina@arm.com>
46
47 * opcode/aarch64.h (aarch64_inst): Remove.
48 (enum err_type): Add ERR_VFI.
49 (aarch64_is_destructive_by_operands): New.
50 (init_insn_sequence): New.
51 (aarch64_decode_insn): Remove param name.
52
53 2018-10-03 Tamar Christina <tamar.christina@arm.com>
54
55 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
56 more arguments.
57
58 2018-10-03 Tamar Christina <tamar.christina@arm.com>
59
60 * opcode/aarch64.h (enum err_type): New.
61 (aarch64_decode_insn): Use it.
62
63 2018-10-03 Tamar Christina <tamar.christina@arm.com>
64
65 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
66 (aarch64_opcode_encode): Use it.
67
68 2018-10-03 Tamar Christina <tamar.christina@arm.com>
69
70 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
71 extend flags field size.
72 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
73
74 2018-10-03 John Darrington <john@darrington.wattle.id.au>
75
76 * dis-asm.h (print_insn_s12z): New declaration.
77
78 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
79
80 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
81 (MASK_FENCE_TSO): Likewise.
82
83 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
84
85 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
86
87 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
88
89 PR binutils/23694
90 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
91 include zero size sections at start of PT_NOTE segment.
92
93 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
94
95 * elf/nds32.h: Remove the unused target features.
96 * dis-asm.h (disassemble_init_nds32): Declared.
97 * elf/nds32.h (E_NDS32_NULL): Removed.
98 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
99 * opcode/nds32.h: Ident.
100 (N32_SUB6, INSN_LW): New macros.
101 (enum n32_opcodes): Updated.
102 * elf/nds32.h: Doc fixes.
103 * elf/nds32.h: Add R_NDS32_LSI.
104 * elf/nds32.h: Add new relocations for TLS.
105
106 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
107
108 * elf/common.h (AT_SUN_HWCAP): Rename to ...
109 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
110 compatibility.
111 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
112 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
113
114 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
115
116 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
117
118 2018-08-31 Alan Modra <amodra@gmail.com>
119
120 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
121 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
122 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
123 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
124
125 2018-08-30 Kito Cheng <kito@andestech.com>
126
127 * opcode/riscv.h (MAX_SUBSET_NUM): New.
128 (riscv_opcode): Add xlen_requirement field and change type of
129 subset.
130
131 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
132
133 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
134 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
135
136 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
137
138 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
139 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
140
141 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
142
143 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
144 E_MIPS_MACH_GS464.
145 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
146 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
147 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
148 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
149
150 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
151
152 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
153 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
154 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
155
156 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
157
158 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
159 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
160 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
161
162 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
163
164 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
165 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
166 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
167
168 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
169
170 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
171 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
172 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
173 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
174 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
175 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
176 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
177 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
178 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
179 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
180 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
181 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
182 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
183 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
184 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
185 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
186 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
187 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
188 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
189 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
190 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
191 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
192 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
193 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
194 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
195 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
196 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
197 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
198 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
199 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
200 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
201 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
202 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
203 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
204 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
205 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
206 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
207 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
208 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
209 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
210 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
211 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
212 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
213 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
214 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
215 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
216 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
217 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
218 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
219 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
220 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
221 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
222 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
223 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
224 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
225 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
226
227 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
228
229 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
230
231 2018-08-21 John Darrington <john@darrington.wattle.id.au>
232
233 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
234
235 2018-08-21 Alan Modra <amodra@gmail.com>
236
237 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
238 Mention use of "extract" function to provide default value.
239 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
240 (ppc_optional_operand_value): Rewrite to use extract function.
241
242 2018-08-18 John Darrington <john@darrington.wattle.id.au>
243
244 * opcode/s12z.h: New file.
245
246 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
247
248 * elf/arm.h: Updated comments for e_flags definitions.
249
250 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
251
252 * elf/arc.h (Tag_ARC_ATR_version): New tag.
253
254 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
255
256 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
257
258 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
259
260 Copy over from GCC
261 2018-07-26 Martin Liska <mliska@suse.cz>
262
263 PR lto/86548
264 * libiberty.h (make_temp_file_with_prefix): New function.
265
266 2018-07-30 Jim Wilson <jimw@sifive.com>
267
268 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
269 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
270 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
271
272 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
273
274 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
275 * elf/csky.h: New file.
276
277 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
278 Maciej W. Rozycki <macro@linux-mips.org>
279
280 * elf/mips.h (AFL_ASE_MASK): Correct typo.
281
282 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
283
284 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
285
286 2018-07-26 Alan Modra <amodra@gmail.com>
287
288 * elf/ppc64.h: Specify byte offset to local entry for values
289 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
290 value for such functions when entering via global entry point.
291 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
292
293 2018-07-24 Alan Modra <amodra@gmail.com>
294
295 PR 23430
296 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
297
298 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
299 Maciej W. Rozycki <macro@mips.com>
300
301 * elf/mips.h (AFL_ASE_MMI): New macro.
302 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
303 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
304
305 2018-07-17 Maciej W. Rozycki <macro@mips.com>
306
307 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
308
309 2018-07-06 Alan Modra <amodra@gmail.com>
310
311 * diagnostics.h: Comment on macro usage.
312
313 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
314
315 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
316 Define for clang.
317
318 2018-07-02 Maciej W. Rozycki <macro@mips.com>
319
320 PR tdep/8282
321 * dis-asm.h (disasm_option_arg_t): New typedef.
322 (disasm_options_and_args_t): Likewise.
323 (disasm_options_t): Add `arg' member, document members.
324 (disassembler_options_mips): New prototype.
325 (disassembler_options_arm, disassembler_options_powerpc)
326 (disassembler_options_s390): Update prototypes.
327
328 2018-06-29 Tamar Christina <tamar.christina@arm.com>
329
330 PR binutils/23192
331 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
332
333 2018-06-26 Alan Modra <amodra@gmail.com>
334
335 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
336
337 2018-06-24 Nick Clifton <nickc@redhat.com>
338
339 2.31 branch created.
340
341 2018-06-21 Alan Hayward <alan.hayward@arm.com>
342
343 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
344 for non SHT_NOBITS.
345
346 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
347
348 Sync with GCC
349
350 2018-05-24 Tom Rix <trix@juniper.net>
351
352 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
353
354 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
355
356 * longlong.h [__riscv] (__umulsidi3): Define.
357 [__riscv] (umul_ppmm): Likewise.
358 [__riscv] (__muluw3): Likewise.
359
360 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
361
362 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
363 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
364 * opcode/mips.h: Document "+\" operand format.
365 (ASE_GINV): New macro.
366
367 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
368 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
369
370 * elf/mips.h (AFL_ASE_CRC): New macro.
371 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
372 * opcode/mips.h (ASE_CRC): New macro.
373 * opcode/mips.h (ASE_CRC64): Likewise.
374
375 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
376
377 * elf/xtensa.h (xtensa_read_table_entries)
378 (xtensa_compute_fill_extra_space): New declarations.
379
380 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
381
382 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
383 define for GCC.
384
385 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
386
387 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
388 (DIAGNOSTIC_STRINGIFY): Likewise.
389 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
390 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
391 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
392 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
393 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
394 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
395
396 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
397
398 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
399
400 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
401
402 * splay-tree.h (splay_tree_compare_strings,
403 splay_tree_delete_pointers): Declare new utility functions.
404
405 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
406
407 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
408
409 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
410
411 * elf/riscv.h (EF_RISCV_RVE): New define.
412
413 2018-05-18 John Darrington <john@darrington.wattle.id.au>
414
415 * elf/s12z.h: New header.
416
417 2018-05-15 Tamar Christina <tamar.christina@arm.com>
418
419 PR binutils/21446
420 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
421
422 2018-05-15 Tamar Christina <tamar.christina@arm.com>
423
424 PR binutils/21446
425 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
426 (aarch64_print_operand): Support notes.
427
428 2018-05-15 Tamar Christina <tamar.christina@arm.com>
429
430 PR binutils/21446
431 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
432 (aarch64_decode_insn): Accept error struct.
433
434 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
435
436 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
437
438 2018-05-10 John Darrington <john@darrington.wattle.id.au>
439
440 * elf/common.h (EM_S12Z): New macro.
441
442 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
443
444 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
445 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
446 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
447 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
448
449 2018-05-08 Jim Wilson <jimw@sifive.com>
450
451 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
452 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
453 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
454
455 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
456
457 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
458 (vle_num_opcodes): Likewise.
459 (spe2_num_opcodes): Likewise.
460
461 2018-05-04 Alan Modra <amodra@gmail.com>
462
463 * ansidecl.h: Import from gcc.
464 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
465 to s_name.
466 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
467
468 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
469
470 * dis-asm.h: Added print_nfp_disassembler_options prototype.
471 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
472 Generic System V Application Binary Interface.
473 * elf/nfp.h: New, for NFP support.
474 * opcode/nfp.h: New, for NFP support.
475
476 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
477 Mickaël Guêné <mickael.guene@st.com>
478
479 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
480 R_ARM_TLS_IE32_FDPIC.
481
482 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
483 Mickaël Guêné <mickael.guene@st.com>
484
485 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
486 (R_ARM_FUNCDESC)
487 (R_ARM_FUNCDESC_VALUE): Define new relocations.
488
489 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
490 Mickaël Guêné <mickael.guene@st.com>
491
492 * elf/arm.h (EF_ARM_FDPIC): New.
493
494 2018-04-18 Alan Modra <amodra@gmail.com>
495
496 * coff/mipspe.h: Delete.
497
498 2018-04-18 Alan Modra <amodra@gmail.com>
499
500 * aout/dynix3.h: Delete.
501
502 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
503
504 Microblaze Target: PIC data text relative
505
506 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
507 * elf/microblaze.h (Add 3 new relocations):
508 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
509 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
510
511 2018-04-17 Alan Modra <amodra@gmail.com>
512
513 * elf/i370.h: Revert removal.
514 * elf/i860.h: Likewise.
515 * elf/i960.h: Likewise.
516
517 2018-04-16 Alan Modra <amodra@gmail.com>
518
519 * coff/sparc.h: Delete.
520
521 2018-04-16 Alan Modra <amodra@gmail.com>
522
523 * aout/host.h: Remove m68k-aout and m68k-coff support.
524 * aout/hp300hpux.h: Delete.
525 * coff/apollo.h: Delete.
526 * coff/aux-coff.h: Delete.
527 * coff/m68k.h: Delete.
528
529 2018-04-16 Alan Modra <amodra@gmail.com>
530
531 * dis-asm.h: Remove sh5 and sh64 support.
532
533 2018-04-16 Alan Modra <amodra@gmail.com>
534
535 * coff/internal.h: Remove w65 support.
536 * coff/w65.h: Delete.
537
538 2018-04-16 Alan Modra <amodra@gmail.com>
539
540 * coff/we32k.h: Delete.
541
542 2018-04-16 Alan Modra <amodra@gmail.com>
543
544 * coff/internal.h: Remove m88k support.
545 * coff/m88k.h: Delete.
546 * opcode/m88k.h: Delete.
547
548 2018-04-16 Alan Modra <amodra@gmail.com>
549
550 * elf/i370.h: Delete.
551 * opcode/i370.h: Delete.
552
553 2018-04-16 Alan Modra <amodra@gmail.com>
554
555 * coff/h8500.h: Delete.
556 * coff/internal.h: Remove h8500 support.
557
558 2018-04-16 Alan Modra <amodra@gmail.com>
559
560 * coff/h8300.h: Delete.
561
562 2018-04-16 Alan Modra <amodra@gmail.com>
563
564 * ieee.h: Delete.
565
566 2018-04-16 Alan Modra <amodra@gmail.com>
567
568 * aout/host.h: Remove newsos3 support.
569
570 2018-04-16 Alan Modra <amodra@gmail.com>
571
572 * nlm/ChangeLog-9315: Delete.
573 * nlm/alpha-ext.h: Delete.
574 * nlm/common.h: Delete.
575 * nlm/external.h: Delete.
576 * nlm/i386-ext.h: Delete.
577 * nlm/internal.h: Delete.
578 * nlm/ppc-ext.h: Delete.
579 * nlm/sparc32-ext.h: Delete.
580
581 2018-04-16 Alan Modra <amodra@gmail.com>
582
583 * opcode/tahoe.h: Delete.
584
585 2018-04-11 Alan Modra <amodra@gmail.com>
586
587 * aout/adobe.h: Delete.
588 * aout/reloc.h: Delete.
589 * coff/i860.h: Delete.
590 * coff/i960.h: Delete.
591 * elf/i860.h: Delete.
592 * elf/i960.h: Delete.
593 * opcode/i860.h: Delete.
594 * opcode/i960.h: Delete.
595 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
596 * aout/ar.h (ARMAGB): Remove.
597 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
598 union internal_auxent): Remove i960 support.
599
600 2018-04-09 Alan Modra <amodra@gmail.com>
601
602 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
603 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
604
605 2018-03-28 Renlin Li <renlin.li@arm.com>
606
607 PR ld/22970
608 * elf/aarch64.h: Add relocation number for
609 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
610 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
611 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
612 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
613 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
614 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
615 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
616 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
617
618 2018-03-28 Nick Clifton <nickc@redhat.com>
619
620 PR 22988
621 * opcode/aarch64.h (enum aarch64_opnd): Add
622 AARCH64_OPND_SVE_ADDR_R.
623
624 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
625
626 * elf/common.h (DF_1_KMOD): New.
627 (DF_1_WEAKFILTER): Likewise.
628 (DF_1_NOCOMMON): Likewise.
629
630 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
631
632 * opcode/riscv.h (OP_MASK_FUNCT3): New.
633 (OP_SH_FUNCT3): Likewise.
634 (OP_MASK_FUNCT7): Likewise.
635 (OP_SH_FUNCT7): Likewise.
636 (OP_MASK_OP2): Likewise.
637 (OP_SH_OP2): Likewise.
638 (OP_MASK_CFUNCT4): Likewise.
639 (OP_SH_CFUNCT4): Likewise.
640 (OP_MASK_CFUNCT3): Likewise.
641 (OP_SH_CFUNCT3): Likewise.
642 (riscv_insn_types): Likewise.
643
644 2018-03-13 Nick Clifton <nickc@redhat.com>
645
646 PR 22113
647 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
648 field.
649
650 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
651
652 * opcode/i386 (OLDGCC_COMPAT): Removed.
653
654 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
655
656 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
657
658 2018-02-20 Maciej W. Rozycki <macro@mips.com>
659
660 * opcode/mips.h: Remove `M' operand code.
661
662 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
663
664 * coff/msdos.h: New header.
665 * coff/pe.h: Move common defines to msdos.h.
666 * coff/powerpc.h: Likewise.
667
668 2018-01-13 Nick Clifton <nickc@redhat.com>
669
670 2.30 branch created.
671
672 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
673
674 PR ld/22393
675 * bfdlink.h (bfd_link_info): Add separate_code.
676
677 2018-01-04 Jim Wilson <jimw@sifive.com>
678
679 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
680 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
681 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
682 Add alias to map mbadaddr to CSR_MTVAL.
683
684 2018-01-03 Alan Modra <amodra@gmail.com>
685
686 Update year range in copyright notice of all files.
687
688 For older changes see ChangeLog-2017
689 \f
690 Copyright (C) 2018 Free Software Foundation, Inc.
691
692 Copying and distribution of this file, with or without modification,
693 are permitted in any medium without royalty provided the copyright
694 notice and this notice are preserved.
695
696 Local Variables:
697 mode: change-log
698 left-margin: 8
699 fill-column: 74
700 version-control: never
701 End: