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or1k: Add relocations for high-signed and low-stores
[thirdparty/binutils-gdb.git] / include / ChangeLog
1 2018-10-05 Richard Henderson <rth@twiddle.net>
2
3 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
4 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
5 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
6
7 2018-10-03 Tamar Christina <tamar.christina@arm.com>
8
9 * opcode/aarch64.h (aarch64_inst): Remove.
10 (enum err_type): Add ERR_VFI.
11 (aarch64_is_destructive_by_operands): New.
12 (init_insn_sequence): New.
13 (aarch64_decode_insn): Remove param name.
14
15 2018-10-03 Tamar Christina <tamar.christina@arm.com>
16
17 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
18 more arguments.
19
20 2018-10-03 Tamar Christina <tamar.christina@arm.com>
21
22 * opcode/aarch64.h (enum err_type): New.
23 (aarch64_decode_insn): Use it.
24
25 2018-10-03 Tamar Christina <tamar.christina@arm.com>
26
27 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
28 (aarch64_opcode_encode): Use it.
29
30 2018-10-03 Tamar Christina <tamar.christina@arm.com>
31
32 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
33 extend flags field size.
34 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
35
36 2018-10-03 John Darrington <john@darrington.wattle.id.au>
37
38 * dis-asm.h (print_insn_s12z): New declaration.
39
40 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
41
42 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
43 (MASK_FENCE_TSO): Likewise.
44
45 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
46
47 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
48
49 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
50
51 PR binutils/23694
52 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
53 include zero size sections at start of PT_NOTE segment.
54
55 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
56
57 * elf/nds32.h: Remove the unused target features.
58 * dis-asm.h (disassemble_init_nds32): Declared.
59 * elf/nds32.h (E_NDS32_NULL): Removed.
60 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
61 * opcode/nds32.h: Ident.
62 (N32_SUB6, INSN_LW): New macros.
63 (enum n32_opcodes): Updated.
64 * elf/nds32.h: Doc fixes.
65 * elf/nds32.h: Add R_NDS32_LSI.
66 * elf/nds32.h: Add new relocations for TLS.
67
68 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
69
70 * elf/common.h (AT_SUN_HWCAP): Rename to ...
71 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
72 compatibility.
73 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
74 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
75
76 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
77
78 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
79
80 2018-08-31 Alan Modra <amodra@gmail.com>
81
82 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
83 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
84 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
85 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
86
87 2018-08-30 Kito Cheng <kito@andestech.com>
88
89 * opcode/riscv.h (MAX_SUBSET_NUM): New.
90 (riscv_opcode): Add xlen_requirement field and change type of
91 subset.
92
93 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
94
95 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
96 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
97
98 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
99
100 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
101 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
102
103 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
104
105 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
106 E_MIPS_MACH_GS464.
107 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
108 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
109 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
110 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
111
112 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
113
114 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
115 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
116 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
117
118 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
119
120 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
121 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
122 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
123
124 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
125
126 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
127 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
128 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
129
130 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
131
132 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
133 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
134 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
135 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
136 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
137 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
138 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
139 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
140 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
141 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
142 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
143 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
144 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
145 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
146 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
147 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
148 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
149 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
150 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
151 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
152 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
153 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
154 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
155 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
156 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
157 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
158 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
159 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
160 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
161 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
162 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
163 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
164 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
165 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
166 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
167 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
168 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
169 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
170 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
171 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
172 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
173 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
174 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
175 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
176 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
177 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
178 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
179 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
180 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
181 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
182 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
183 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
184 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
185 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
186 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
187 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
188
189 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
190
191 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
192
193 2018-08-21 John Darrington <john@darrington.wattle.id.au>
194
195 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
196
197 2018-08-21 Alan Modra <amodra@gmail.com>
198
199 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
200 Mention use of "extract" function to provide default value.
201 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
202 (ppc_optional_operand_value): Rewrite to use extract function.
203
204 2018-08-18 John Darrington <john@darrington.wattle.id.au>
205
206 * opcode/s12z.h: New file.
207
208 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
209
210 * elf/arm.h: Updated comments for e_flags definitions.
211
212 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
213
214 * elf/arc.h (Tag_ARC_ATR_version): New tag.
215
216 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
217
218 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
219
220 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
221
222 Copy over from GCC
223 2018-07-26 Martin Liska <mliska@suse.cz>
224
225 PR lto/86548
226 * libiberty.h (make_temp_file_with_prefix): New function.
227
228 2018-07-30 Jim Wilson <jimw@sifive.com>
229
230 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
231 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
232 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
233
234 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
235
236 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
237 * elf/csky.h: New file.
238
239 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
240 Maciej W. Rozycki <macro@linux-mips.org>
241
242 * elf/mips.h (AFL_ASE_MASK): Correct typo.
243
244 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
245
246 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
247
248 2018-07-26 Alan Modra <amodra@gmail.com>
249
250 * elf/ppc64.h: Specify byte offset to local entry for values
251 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
252 value for such functions when entering via global entry point.
253 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
254
255 2018-07-24 Alan Modra <amodra@gmail.com>
256
257 PR 23430
258 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
259
260 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
261 Maciej W. Rozycki <macro@mips.com>
262
263 * elf/mips.h (AFL_ASE_MMI): New macro.
264 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
265 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
266
267 2018-07-17 Maciej W. Rozycki <macro@mips.com>
268
269 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
270
271 2018-07-06 Alan Modra <amodra@gmail.com>
272
273 * diagnostics.h: Comment on macro usage.
274
275 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
276
277 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
278 Define for clang.
279
280 2018-07-02 Maciej W. Rozycki <macro@mips.com>
281
282 PR tdep/8282
283 * dis-asm.h (disasm_option_arg_t): New typedef.
284 (disasm_options_and_args_t): Likewise.
285 (disasm_options_t): Add `arg' member, document members.
286 (disassembler_options_mips): New prototype.
287 (disassembler_options_arm, disassembler_options_powerpc)
288 (disassembler_options_s390): Update prototypes.
289
290 2018-06-29 Tamar Christina <tamar.christina@arm.com>
291
292 PR binutils/23192
293 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
294
295 2018-06-26 Alan Modra <amodra@gmail.com>
296
297 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
298
299 2018-06-24 Nick Clifton <nickc@redhat.com>
300
301 2.31 branch created.
302
303 2018-06-21 Alan Hayward <alan.hayward@arm.com>
304
305 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
306 for non SHT_NOBITS.
307
308 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
309
310 Sync with GCC
311
312 2018-05-24 Tom Rix <trix@juniper.net>
313
314 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
315
316 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
317
318 * longlong.h [__riscv] (__umulsidi3): Define.
319 [__riscv] (umul_ppmm): Likewise.
320 [__riscv] (__muluw3): Likewise.
321
322 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
323
324 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
325 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
326 * opcode/mips.h: Document "+\" operand format.
327 (ASE_GINV): New macro.
328
329 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
330 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
331
332 * elf/mips.h (AFL_ASE_CRC): New macro.
333 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
334 * opcode/mips.h (ASE_CRC): New macro.
335 * opcode/mips.h (ASE_CRC64): Likewise.
336
337 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
338
339 * elf/xtensa.h (xtensa_read_table_entries)
340 (xtensa_compute_fill_extra_space): New declarations.
341
342 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
343
344 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
345 define for GCC.
346
347 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
348
349 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
350 (DIAGNOSTIC_STRINGIFY): Likewise.
351 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
352 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
353 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
354 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
355 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
356 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
357
358 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
359
360 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
361
362 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
363
364 * splay-tree.h (splay_tree_compare_strings,
365 splay_tree_delete_pointers): Declare new utility functions.
366
367 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
368
369 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
370
371 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
372
373 * elf/riscv.h (EF_RISCV_RVE): New define.
374
375 2018-05-18 John Darrington <john@darrington.wattle.id.au>
376
377 * elf/s12z.h: New header.
378
379 2018-05-15 Tamar Christina <tamar.christina@arm.com>
380
381 PR binutils/21446
382 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
383
384 2018-05-15 Tamar Christina <tamar.christina@arm.com>
385
386 PR binutils/21446
387 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
388 (aarch64_print_operand): Support notes.
389
390 2018-05-15 Tamar Christina <tamar.christina@arm.com>
391
392 PR binutils/21446
393 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
394 (aarch64_decode_insn): Accept error struct.
395
396 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
397
398 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
399
400 2018-05-10 John Darrington <john@darrington.wattle.id.au>
401
402 * elf/common.h (EM_S12Z): New macro.
403
404 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
405
406 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
407 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
408 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
409 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
410
411 2018-05-08 Jim Wilson <jimw@sifive.com>
412
413 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
414 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
415 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
416
417 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
418
419 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
420 (vle_num_opcodes): Likewise.
421 (spe2_num_opcodes): Likewise.
422
423 2018-05-04 Alan Modra <amodra@gmail.com>
424
425 * ansidecl.h: Import from gcc.
426 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
427 to s_name.
428 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
429
430 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
431
432 * dis-asm.h: Added print_nfp_disassembler_options prototype.
433 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
434 Generic System V Application Binary Interface.
435 * elf/nfp.h: New, for NFP support.
436 * opcode/nfp.h: New, for NFP support.
437
438 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
439 Mickaël Guêné <mickael.guene@st.com>
440
441 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
442 R_ARM_TLS_IE32_FDPIC.
443
444 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
445 Mickaël Guêné <mickael.guene@st.com>
446
447 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
448 (R_ARM_FUNCDESC)
449 (R_ARM_FUNCDESC_VALUE): Define new relocations.
450
451 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
452 Mickaël Guêné <mickael.guene@st.com>
453
454 * elf/arm.h (EF_ARM_FDPIC): New.
455
456 2018-04-18 Alan Modra <amodra@gmail.com>
457
458 * coff/mipspe.h: Delete.
459
460 2018-04-18 Alan Modra <amodra@gmail.com>
461
462 * aout/dynix3.h: Delete.
463
464 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
465
466 Microblaze Target: PIC data text relative
467
468 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
469 * elf/microblaze.h (Add 3 new relocations):
470 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
471 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
472
473 2018-04-17 Alan Modra <amodra@gmail.com>
474
475 * elf/i370.h: Revert removal.
476 * elf/i860.h: Likewise.
477 * elf/i960.h: Likewise.
478
479 2018-04-16 Alan Modra <amodra@gmail.com>
480
481 * coff/sparc.h: Delete.
482
483 2018-04-16 Alan Modra <amodra@gmail.com>
484
485 * aout/host.h: Remove m68k-aout and m68k-coff support.
486 * aout/hp300hpux.h: Delete.
487 * coff/apollo.h: Delete.
488 * coff/aux-coff.h: Delete.
489 * coff/m68k.h: Delete.
490
491 2018-04-16 Alan Modra <amodra@gmail.com>
492
493 * dis-asm.h: Remove sh5 and sh64 support.
494
495 2018-04-16 Alan Modra <amodra@gmail.com>
496
497 * coff/internal.h: Remove w65 support.
498 * coff/w65.h: Delete.
499
500 2018-04-16 Alan Modra <amodra@gmail.com>
501
502 * coff/we32k.h: Delete.
503
504 2018-04-16 Alan Modra <amodra@gmail.com>
505
506 * coff/internal.h: Remove m88k support.
507 * coff/m88k.h: Delete.
508 * opcode/m88k.h: Delete.
509
510 2018-04-16 Alan Modra <amodra@gmail.com>
511
512 * elf/i370.h: Delete.
513 * opcode/i370.h: Delete.
514
515 2018-04-16 Alan Modra <amodra@gmail.com>
516
517 * coff/h8500.h: Delete.
518 * coff/internal.h: Remove h8500 support.
519
520 2018-04-16 Alan Modra <amodra@gmail.com>
521
522 * coff/h8300.h: Delete.
523
524 2018-04-16 Alan Modra <amodra@gmail.com>
525
526 * ieee.h: Delete.
527
528 2018-04-16 Alan Modra <amodra@gmail.com>
529
530 * aout/host.h: Remove newsos3 support.
531
532 2018-04-16 Alan Modra <amodra@gmail.com>
533
534 * nlm/ChangeLog-9315: Delete.
535 * nlm/alpha-ext.h: Delete.
536 * nlm/common.h: Delete.
537 * nlm/external.h: Delete.
538 * nlm/i386-ext.h: Delete.
539 * nlm/internal.h: Delete.
540 * nlm/ppc-ext.h: Delete.
541 * nlm/sparc32-ext.h: Delete.
542
543 2018-04-16 Alan Modra <amodra@gmail.com>
544
545 * opcode/tahoe.h: Delete.
546
547 2018-04-11 Alan Modra <amodra@gmail.com>
548
549 * aout/adobe.h: Delete.
550 * aout/reloc.h: Delete.
551 * coff/i860.h: Delete.
552 * coff/i960.h: Delete.
553 * elf/i860.h: Delete.
554 * elf/i960.h: Delete.
555 * opcode/i860.h: Delete.
556 * opcode/i960.h: Delete.
557 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
558 * aout/ar.h (ARMAGB): Remove.
559 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
560 union internal_auxent): Remove i960 support.
561
562 2018-04-09 Alan Modra <amodra@gmail.com>
563
564 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
565 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
566
567 2018-03-28 Renlin Li <renlin.li@arm.com>
568
569 PR ld/22970
570 * elf/aarch64.h: Add relocation number for
571 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
572 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
573 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
574 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
575 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
576 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
577 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
578 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
579
580 2018-03-28 Nick Clifton <nickc@redhat.com>
581
582 PR 22988
583 * opcode/aarch64.h (enum aarch64_opnd): Add
584 AARCH64_OPND_SVE_ADDR_R.
585
586 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
587
588 * elf/common.h (DF_1_KMOD): New.
589 (DF_1_WEAKFILTER): Likewise.
590 (DF_1_NOCOMMON): Likewise.
591
592 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
593
594 * opcode/riscv.h (OP_MASK_FUNCT3): New.
595 (OP_SH_FUNCT3): Likewise.
596 (OP_MASK_FUNCT7): Likewise.
597 (OP_SH_FUNCT7): Likewise.
598 (OP_MASK_OP2): Likewise.
599 (OP_SH_OP2): Likewise.
600 (OP_MASK_CFUNCT4): Likewise.
601 (OP_SH_CFUNCT4): Likewise.
602 (OP_MASK_CFUNCT3): Likewise.
603 (OP_SH_CFUNCT3): Likewise.
604 (riscv_insn_types): Likewise.
605
606 2018-03-13 Nick Clifton <nickc@redhat.com>
607
608 PR 22113
609 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
610 field.
611
612 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
613
614 * opcode/i386 (OLDGCC_COMPAT): Removed.
615
616 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
617
618 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
619
620 2018-02-20 Maciej W. Rozycki <macro@mips.com>
621
622 * opcode/mips.h: Remove `M' operand code.
623
624 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
625
626 * coff/msdos.h: New header.
627 * coff/pe.h: Move common defines to msdos.h.
628 * coff/powerpc.h: Likewise.
629
630 2018-01-13 Nick Clifton <nickc@redhat.com>
631
632 2.30 branch created.
633
634 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
635
636 PR ld/22393
637 * bfdlink.h (bfd_link_info): Add separate_code.
638
639 2018-01-04 Jim Wilson <jimw@sifive.com>
640
641 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
642 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
643 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
644 Add alias to map mbadaddr to CSR_MTVAL.
645
646 2018-01-03 Alan Modra <amodra@gmail.com>
647
648 Update year range in copyright notice of all files.
649
650 For older changes see ChangeLog-2017
651 \f
652 Copyright (C) 2018 Free Software Foundation, Inc.
653
654 Copying and distribution of this file, with or without modification,
655 are permitted in any medium without royalty provided the copyright
656 notice and this notice are preserved.
657
658 Local Variables:
659 mode: change-log
660 left-margin: 8
661 fill-column: 74
662 version-control: never
663 End: