3 #ld: -melf64ppc --no-plt-align --no-ld-generated-unwind-info --emit-relocs
8 Disassembly of section \.text:
11 [0-9a-f ]*: (49 bf 00 39|39 00 bf 49) bl .*
12 [0-9a-f ]*: R_PPC64_REL24 far
13 [0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
14 [0-9a-f ]*: (49 bf 00 25|25 00 bf 49) bl .*
15 [0-9a-f ]*: R_PPC64_REL24 far2far
16 [0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
17 [0-9a-f ]*: (49 bf 00 11|11 00 bf 49) bl .*
18 [0-9a-f ]*: R_PPC64_REL24 huge
19 [0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
20 [0-9a-f ]*: 00 00 00 00 \.long 0x0
21 [0-9a-f ]*: (4b ff ff e4|e4 ff ff 4b) b .* <_start>
24 [0-9a-f ]*<.*plt_branch.*>:
25 [0-9a-f ]*: (e9 82 80 f8|f8 80 82 e9) ld r12,-32520\(r2\)
26 [0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f8
27 [0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
28 [0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
30 [0-9a-f ]*<.*plt_branch.*>:
31 [0-9a-f ]*: (e9 82 81 00|00 81 82 e9) ld r12,-32512\(r2\)
32 [0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f0100
33 [0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
34 [0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
36 [0-9a-f ]*<.*long_branch.*>:
37 [0-9a-f ]*: (49 bf 00 04|04 00 bf 49) b .* <far>
38 [0-9a-f ]*: R_PPC64_REL24 far
42 [0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
46 [0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
50 [0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
52 Disassembly of section \.branch_lt:
55 [0-9a-f ]*: (00 00 00 00|f4 00 7e 15) .*
56 [0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00f4
57 [0-9a-f ]*: (15 7e 00 f4|00 00 00 00) .*
58 [0-9a-f ]*: (00 00 00 00|f0 00 bf 13) .*
59 [0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00f0
60 [0-9a-f ]*: (13 bf 00 f0|00 00 00 00) .*