ld/testsuite/ld-powerpc/tlsexenors.d

   1 #source: tls.s
   2 #as: -a64
   3 #ld: --no-tls-optimize tmpdir/libtlslib.so
   4 #objdump: -dr
   5 #target: powerpc64*-*-*
   6
   7 .*
   8
   9 Disassembly of section \.text:
  10
  11 .* <.*plt_call\.__tls_get_addr(|_opt)>:
  12 .*:     (e8 03 00 00|00 00 03 e8)       ld      r0,0\(r3\)
  13 .*:     (e9 83 00 08|08 00 83 e9)       ld      r12,8\(r3\)
  14 .*:     (2c 20 00 00|00 00 20 2c)       cmpdi   r0,0
  15 .*:     (7c 60 1b 78|78 1b 60 7c)       mr      r0,r3
  16 .*:     (7c 6c 6a 14|14 6a 6c 7c)       add     r3,r12,r13
  17 .*:     (4d 82 00 20|20 00 82 4d)       beqlr *
  18 .*:     (7c 03 03 78|78 03 03 7c)       mr      r3,r0
  19 .*:     (7c 08 02 a6|a6 02 08 7c)       mflr    r0
  20 .*:     (f8 01 00 10|10 00 01 f8)       std     r0,16\(r1\)
  21 .*:     (f8 81 ff b8|b8 ff 81 f8)       std     r4,-72\(r1\)
  22 .*:     (f8 a1 ff c0|c0 ff a1 f8)       std     r5,-64\(r1\)
  23 .*:     (f8 c1 ff c8|c8 ff c1 f8)       std     r6,-56\(r1\)
  24 .*:     (f8 e1 ff d0|d0 ff e1 f8)       std     r7,-48\(r1\)
  25 .*:     (f9 01 ff d8|d8 ff 01 f9)       std     r8,-40\(r1\)
  26 .*:     (f9 21 ff e0|e0 ff 21 f9)       std     r9,-32\(r1\)
  27 .*:     (f9 41 ff e8|e8 ff 41 f9)       std     r10,-24\(r1\)
  28 .*:     (f9 61 ff f0|f0 ff 61 f9)       std     r11,-16\(r1\)
  29 .*:     (f8 21 ff 81|81 ff 21 f8)       stdu    r1,-128\(r1\)
  30 .*:     (f8 41 00 28|28 00 41 f8)       std     r2,40\(r1\)
  31 .*:     (e9 82 80 88|88 80 82 e9)       ld      r12,-32632\(r2\)
  32 .*:     (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
  33 .*:     (e8 42 80 90|90 80 42 e8)       ld      r2,-32624\(r2\)
  34 .*:     (4e 80 04 21|21 04 80 4e)       bctrl
  35 .*:     (e8 41 00 28|28 00 41 e8)       ld      r2,40\(r1\)
  36 .*:     (e8 81 00 38|38 00 81 e8)       ld      r4,56\(r1\)
  37 .*:     (e8 a1 00 40|40 00 a1 e8)       ld      r5,64\(r1\)
  38 .*:     (e8 c1 00 48|48 00 c1 e8)       ld      r6,72\(r1\)
  39 .*:     (e8 e1 00 50|50 00 e1 e8)       ld      r7,80\(r1\)
  40 .*:     (e9 01 00 58|58 00 01 e9)       ld      r8,88\(r1\)
  41 .*:     (e9 21 00 60|60 00 21 e9)       ld      r9,96\(r1\)
  42 .*:     (e9 41 00 68|68 00 41 e9)       ld      r10,104\(r1\)
  43 .*:     (e9 61 00 70|70 00 61 e9)       ld      r11,112\(r1\)
  44 .*:     (38 21 00 80|80 00 21 38)       addi    r1,r1,128
  45 .*:     (e8 01 00 10|10 00 01 e8)       ld      r0,16\(r1\)
  46 .*:     (7c 08 03 a6|a6 03 08 7c)       mtlr    r0
  47 .*:     (4e 80 00 20|20 00 80 4e)       blr
  48
  49 .* <\._start>:
  50 .*:     (38 62 80 20|20 80 62 38)       addi    r3,r2,-32736
  51 .*:     (4b ff ff 6d|6d ff ff 4b)       bl      .*
  52 .*:     (60 00 00 00|00 00 00 60)       nop
  53 .*:     (38 62 80 30|30 80 62 38)       addi    r3,r2,-32720
  54 .*:     (4b ff ff 61|61 ff ff 4b)       bl      .*
  55 .*:     (60 00 00 00|00 00 00 60)       nop
  56 .*:     (38 62 80 48|48 80 62 38)       addi    r3,r2,-32696
  57 .*:     (4b ff ff 55|55 ff ff 4b)       bl      .*
  58 .*:     (60 00 00 00|00 00 00 60)       nop
  59 .*:     (38 62 80 60|60 80 62 38)       addi    r3,r2,-32672
  60 .*:     (4b ff ff 49|49 ff ff 4b)       bl      .*
  61 .*:     (60 00 00 00|00 00 00 60)       nop
  62 .*:     (39 23 80 40|40 80 23 39)       addi    r9,r3,-32704
  63 .*:     (3d 23 00 00|00 00 23 3d)       addis   r9,r3,0
  64 .*:     (81 49 80 48|48 80 49 81)       lwz     r10,-32696\(r9\)
  65 .*:     (e9 22 80 40|40 80 22 e9)       ld      r9,-32704\(r2\)
  66 .*:     (7d 49 18 2a|2a 18 49 7d)       ldx     r10,r9,r3
  67 .*:     (e9 22 80 58|58 80 22 e9)       ld      r9,-32680\(r2\)
  68 .*:     (7d 49 6a 2e|2e 6a 49 7d)       lhzx    r10,r9,r13
  69 .*:     (89 4d 90 60|60 90 4d 89)       lbz     r10,-28576\(r13\)
  70 .*:     (3d 2d 00 00|00 00 2d 3d)       addis   r9,r13,0
  71 .*:     (99 49 90 68|68 90 49 99)       stb     r10,-28568\(r9\)
  72 .*:     (38 62 80 08|08 80 62 38)       addi    r3,r2,-32760
  73 .*:     (4b ff ff 15|15 ff ff 4b)       bl      .*
  74 .*:     (60 00 00 00|00 00 00 60)       nop
  75 .*:     (38 62 80 60|60 80 62 38)       addi    r3,r2,-32672
  76 .*:     (4b ff ff 09|09 ff ff 4b)       bl      .*
  77 .*:     (60 00 00 00|00 00 00 60)       nop
  78 .*:     (f9 43 80 08|08 80 43 f9)       std     r10,-32760\(r3\)
  79 .*:     (3d 23 00 00|00 00 23 3d)       addis   r9,r3,0
  80 .*:     (91 49 80 10|10 80 49 91)       stw     r10,-32752\(r9\)
  81 .*:     (e9 22 80 18|18 80 22 e9)       ld      r9,-32744\(r2\)
  82 .*:     (7d 49 19 2a|2a 19 49 7d)       stdx    r10,r9,r3
  83 .*:     (e9 22 80 58|58 80 22 e9)       ld      r9,-32680\(r2\)
  84 .*:     (7d 49 6b 2e|2e 6b 49 7d)       sthx    r10,r9,r13
  85 .*:     (e9 4d 90 2a|2a 90 4d e9)       lwa     r10,-28632\(r13\)
  86 .*:     (3d 2d 00 00|00 00 2d 3d)       addis   r9,r13,0
  87 .*:     (a9 49 90 30|30 90 49 a9)       lha     r10,-28624\(r9\)
  88 .*:     (00 00 00 00|78 02 01 00)       .*
  89 .*:     (00 01 02 78|00 00 00 00)       .*
  90
  91 .* <__glink_PLTresolve>:
  92 .*:     (7d 88 02 a6|a6 02 88 7d)       mflr    r12
  93 .*:     (42 9f 00 05|05 00 9f 42)       bcl     .*
  94 .*:     (7d 68 02 a6|a6 02 68 7d)       mflr    r11
  95 .*:     (e8 4b ff f0|f0 ff 4b e8)       ld      r2,-16\(r11\)
  96 .*:     (7d 88 03 a6|a6 03 88 7d)       mtlr    r12
  97 .*:     (7d 62 5a 14|14 5a 62 7d)       add     r11,r2,r11
  98 .*:     (e9 8b 00 00|00 00 8b e9)       ld      r12,0\(r11\)
  99 .*:     (e8 4b 00 08|08 00 4b e8)       ld      r2,8\(r11\)
 100 .*:     (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
 101 .*:     (e9 6b 00 10|10 00 6b e9)       ld      r11,16\(r11\)
 102 .*:     (4e 80 04 20|20 04 80 4e)       bctr
 103
 104 .* <__tls_get_addr_opt@plt>:
 105 .*:     (38 00 00 00|00 00 00 38)       li      r0,0
 106 .*:     (4b ff ff d0|d0 ff ff 4b)       b       .* <__glink_PLTresolve>