opcodes/ChangeLog

   1 2010-10-09  Matt Rice  <ratmice@gmail.com>
   2
   3         * fr30-desc.h: Regenerate.
   4         * frv-desc.h: Regenerate.
   5         * ip2k-desc.h: Regenerate.
   6         * iq2000-desc.h: Regenerate.
   7         * lm32-desc.h: Regenerate.
   8         * m32c-desc.h: Regenerate.
   9         * m32r-desc.h: Regenerate.
  10         * mep-desc.h: Regenerate.
  11         * mep-opc.c: Regenerate.
  12         * mt-desc.h: Regenerate.
  13         * openrisc-desc.h: Regenerate.
  14         * xc16x-desc.h: Regenerate.
  15         * xstormy16-desc.h: Regenerate.
  16
  17 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
  18
  19         Fix build with -DDEBUG=7
  20         * frv-opc.c: Regenerate.
  21         * or32-dis.c (DEBUG): Don't redefine.
  22         (find_bytes_big, or32_extract, or32_opcode_match, or32_print_register):
  23         Adapt DEBUG code to some type changes throughout.
  24         * or32-opc.c (or32_extract): Likewise.
  25
  26 2010-10-07  Bernd Schmidt  <bernds@codesourcery.com>
  27
  28         * tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field
  29         in SPKERNEL instructions.
  30
  31 2010-10-02  H.J. Lu  <hongjiu.lu@intel.com>
  32
  33         PR binutils/12076
  34         * i386-dis.c (RMAL): Remove duplicate.
  35
  36 2010-09-30  Pierre Muller  <muller@ics.u-strasbg.fr>
  37
  38         * s390-mkopc.c (main): Exit with error 1 if sscanf fails
  39         to parse all 6 parameters.
  40
  41 2010-09-28  Pierre Muller  <muller@ics.u-strasbg.fr>
  42
  43         * s390-mkopc.c (main): Change description array size to 80.
  44         Add maximum length of 79 to description parsing.
  45
  46 2010-09-27  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  47
  48         * configure: Regenerate.
  49
  50 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  51
  52         * s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
  53         (main): Recognize the new CPU string.
  54         * s390-opc.c: Add new instruction formats and masks.
  55         * s390-opc.txt: Add new z196 instructions.
  56
  57 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  58
  59         * s390-dis.c (print_insn_s390): Pick instruction with most
  60         specific mask.
  61         * s390-opc.c: Add unused bits to the insn mask.
  62         * s390-opc.txt: Reorder some instructions to prefer more recent
  63         versions.
  64
  65 2010-09-27  Tejas Belagod  <tejas.belagod@arm.com>
  66
  67         * arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
  68         correction to unaligned PCs while printing comment.
  69
  70 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  71
  72         * arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
  73         (thumb32_opcodes): Likewise.
  74         (banked_regname): New function.
  75         (print_insn_arm): Add Virtualization Extensions support.
  76         (print_insn_thumb32): Likewise.
  77
  78 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  79
  80         * arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
  81         ARM state.
  82
  83 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  84
  85         * arm-dis.c (arm_opcodes): SMC implies Security Extensions.
  86         (thumb32_opcodes): Likewise.
  87
  88 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  89
  90         * arm-dis.c (arm_opcodes): Add support for pldw.
  91         (thumb32_opcodes): Likewise.
  92
  93 2010-09-22  Robin Getz  <robin.getz@analog.com>
  94
  95         * bfin-dis.c (fmtconst): Cast address to 32bits.
  96
  97 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  98
  99         * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
 100
 101 2010-09-22  Robin Getz  <robin.getz@analog.com>
 102
 103         * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
 104         Reject P6/P7 to TESTSET.
 105         (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
 106         SP onto the stack.
 107         (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
 108         P/D fields match all the time.
 109         (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
 110         are 0 for accumulator compares.
 111         (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
 112         (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
 113         decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
 114         decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
 115         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
 116         decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
 117         insns.
 118         (decode_dagMODim_0): Verify br field for IREG ops.
 119         (decode_LDST_0): Reject preg load into same preg.
 120         (_print_insn_bfin): Handle returns for ILLEGAL decodes.
 121         (print_insn_bfin): Likewise.
 122
 123 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 124
 125         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
 126
 127 2010-09-22  Robin Getz  <robin.getz@analog.com>
 128
 129         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
 130
 131 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 132
 133         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
 134
 135 2010-09-22  Robin Getz  <robin.getz@analog.com>
 136
 137         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
 138         register values greater than 8.
 139         (IS_RESERVEDREG, allreg, mostreg): New helpers.
 140         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
 141         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
 142         (decode_CC2dreg_0): Check valid CC register number.
 143
 144 2010-09-22  Robin Getz  <robin.getz@analog.com>
 145
 146         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
 147
 148 2010-09-22  Robin Getz  <robin.getz@analog.com>
 149
 150         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
 151         (reg_names): Likewise.
 152         (decode_statbits): Likewise; while reformatting to make manageable.
 153
 154 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
 157         (decode_pseudoOChar_0): New function.
 158         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
 159
 160 2010-09-22  Robin Getz  <robin.getz@analog.com>
 161
 162         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
 163         LSHIFT instead of SHIFT.
 164
 165 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 166
 167         * bfin-dis.c (constant_formats): Constify the whole structure.
 168         (fmtconst): Add const to return value.
 169         (reg_names): Mark const.
 170         (decode_multfunc): Mark s0/s1 as const.
 171         (decode_macfunc): Mark a/sop as const.
 172
 173 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
 174
 175         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
 176
 177 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
 178
 179         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
 180         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
 181
 182 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
 183
 184         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
 185         dlx_insn_type array.
 186
 187 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
 188
 189         PR binutils/11960
 190         * i386-dis.c (sIv): New.
 191         (dis386): Replace Iq with sIv on "pushT".
 192         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
 193         (x86_64_table): Replace {T|}/{P|} with P.
 194         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
 195         (OP_sI): Update v_mode.  Remove w_mode.
 196
 197 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
 198
 199         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
 200         on E500 and E500MC.
 201
 202 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 203
 204         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
 205         prefetchw.
 206
 207 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 208
 209         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
 210         to processor flags for PENTIUMPRO processors and later.
 211         * i386-opc.h (enum): Add CpuNop.
 212         (i386_cpu_flags): Add cpunop bit.
 213         * i386-opc.tbl: Change nop cpu_flags.
 214         * i386-init.h: Regenerated.
 215         * i386-tbl.h: Likewise.
 216
 217 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 218
 219         * i386-opc.h (enum): Fix typos in comments.
 220
 221 2010-08-06  Alan Modra  <amodra@gmail.com>
 222
 223         * disassemble.c: Formatting.
 224         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 225
 226 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 227
 228         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 229         * i386-tbl.h: Regenerated.
 230
 231 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 232
 233         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 234
 235         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 236         * i386-tbl.h: Regenerated.
 237
 238 2010-07-29  DJ Delorie  <dj@redhat.com>
 239
 240         * rx-decode.opc (SRR): New.
 241         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 242         r0,r0) and NOP3 (max r0,r0) special cases.
 243         * rx-decode.c: Regenerate.
 244
 245 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 246
 247         * i386-dis.c: Add 0F to VEX opcode enums.
 248
 249 2010-07-27  DJ Delorie  <dj@redhat.com>
 250
 251         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 252         (rx_decode_opcode): Likewise.
 253         * rx-decode.c: Regenerate.
 254
 255 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 256             Ina Pandit  <ina.pandit@kpitcummins.com>
 257
 258         * v850-dis.c (v850_sreg_names): Updated structure for system
 259         registers.
 260         (float_cc_names): new structure for condition codes.
 261         (print_value): Update the function that prints value.
 262         (get_operand_value): New function to get the operand value.
 263         (disassemble): Updated to handle the disassembly of instructions.
 264         (print_insn_v850): Updated function to print instruction for different
 265         families.
 266         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 267         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 268         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 269         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 270         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 271         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 272         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 273         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 274         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 275         (v850_operands): Update with the relocation name. Also update
 276         the instructions with specific set of processors.
 277
 278 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 279
 280         * arm-dis.c (print_insn_arm): Add cases for printing more
 281         symbolic operands.
 282         (print_insn_thumb32): Likewise.
 283
 284 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 285
 286         * mips-dis.c (print_insn_mips): Correct branch instruction type
 287         determination.
 288
 289 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 290
 291         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 292         type and delay slot determination.
 293         (print_insn_mips16): Extend branch instruction type and delay
 294         slot determination to cover all instructions.
 295         * mips16-opc.c (BR): Remove macro.
 296         (UBR, CBR): New macros.
 297         (mips16_opcodes): Update branch annotation for "b", "beqz",
 298         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 299         and "jrc".
 300
 301 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 302
 303         AVX Programming Reference (June, 2010)
 304         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 305         * i386-opc.tbl: Likewise.
 306         * i386-tbl.h: Regenerated.
 307
 308 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 309
 310         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 311
 312 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 313
 314         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 315         ppc_cpu_t before inverting.
 316         (ppc_parse_cpu): Likewise.
 317         (print_insn_powerpc): Likewise.
 318
 319 2010-07-03  Alan Modra  <amodra@gmail.com>
 320
 321         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 322         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 323         (PPC64, MFDEC2): Update.
 324         (NON32, NO371): Define.
 325         (powerpc_opcode): Update to not use old opcode flags, and avoid
 326         -m601 duplicates.
 327
 328 2010-07-03  DJ Delorie  <dj@delorie.com>
 329
 330         * m32c-ibld.c: Regenerate.
 331
 332 2010-07-03  Alan Modra  <amodra@gmail.com>
 333
 334         * ppc-opc.c (PWR2COM): Define.
 335         (PPCPWR2): Add PPC_OPCODE_COMMON.
 336         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 337         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 338         "rac" from -mcom.
 339
 340 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 341
 342         AVX Programming Reference (June, 2010)
 343         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 344         (PREFIX_0FAE_REG_1): Likewise.
 345         (PREFIX_0FAE_REG_2): Likewise.
 346         (PREFIX_0FAE_REG_3): Likewise.
 347         (PREFIX_VEX_3813): Likewise.
 348         (PREFIX_VEX_3A1D): Likewise.
 349         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 350         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 351         PREFIX_VEX_3A1D.
 352         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 353         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 354         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 355
 356         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 357         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 358         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 359
 360         * i386-opc.h (CpuXsaveopt): New.
 361         (CpuFSGSBase): Likewise.
 362         (CpuRdRnd): Likewise.
 363         (CpuF16C): Likewise.
 364         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 365         cpuf16c.
 366
 367         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 368         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 369         * i386-init.h: Regenerated.
 370         * i386-tbl.h: Likewise.
 371
 372 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 373
 374         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 375         and mtocrf on EFS.
 376
 377 2010-06-29  Alan Modra  <amodra@gmail.com>
 378
 379         * maxq-dis.c: Delete file.
 380         * Makefile.am: Remove references to maxq.
 381         * configure.in: Likewise.
 382         * disassemble.c: Likewise.
 383         * Makefile.in: Regenerate.
 384         * configure: Regenerate.
 385         * po/POTFILES.in: Regenerate.
 386
 387 2010-06-29  Alan Modra  <amodra@gmail.com>
 388
 389         * mep-dis.c: Regenerate.
 390
 391 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 392
 393         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 394
 395 2010-06-27  Alan Modra  <amodra@gmail.com>
 396
 397         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 398         (decodeInstr): Likewise.
 399         * dlx-dis.c (print_insn_dlx): Likewise.
 400         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 401         * maxq-dis.c (check_move, print_insn): Likewise.
 402         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 403         * msp430-dis.c (msp430_branchinstr): Likewise.
 404         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 405         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 406         * sparc-dis.c (print_insn_sparc): Likewise.
 407         * fr30-asm.c: Regenerate.
 408         * frv-asm.c: Regenerate.
 409         * ip2k-asm.c: Regenerate.
 410         * iq2000-asm.c: Regenerate.
 411         * lm32-asm.c: Regenerate.
 412         * m32c-asm.c: Regenerate.
 413         * m32r-asm.c: Regenerate.
 414         * mep-asm.c: Regenerate.
 415         * mt-asm.c: Regenerate.
 416         * openrisc-asm.c: Regenerate.
 417         * xc16x-asm.c: Regenerate.
 418         * xstormy16-asm.c: Regenerate.
 419
 420 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 421
 422         PR gas/11673
 423         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 424
 425 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 426
 427         PR binutils/11676
 428         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 429
 430 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 431
 432         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 433         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 434         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 435         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 436         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 437         Treat lwsync as msync on e500.
 438
 439 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 440
 441         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 442
 443 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 444
 445         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 446         constants is the same on 32-bit and 64-bit hosts.
 447
 448 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 449
 450         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 451         .short directives so that they can be reassembled.
 452
 453 2010-05-26  Catherine Moore <clm@codesourcery.com>
 454             David Ung  <davidu@mips.com>
 455
 456         * mips-opc.c: Change membership to I1 for instructions ssnop and
 457         ehb.
 458
 459 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 460
 461         * i386-dis.c (sib): New.
 462         (get_sib): Likewise.
 463         (print_insn): Call get_sib.
 464         OP_E_memory): Use sib.
 465
 466 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 467
 468         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 469         * mips-opc.c (I16): Remove.
 470         (mips_builtin_op): Reclassify jalx.
 471
 472 2010-05-19  Alan Modra  <amodra@gmail.com>
 473
 474         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 475         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 476
 477 2010-05-13  Alan Modra  <amodra@gmail.com>
 478
 479         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 480
 481 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 482
 483         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 484         format.
 485         (print_insn_thumb16): Add support for new %W format.
 486
 487 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 488
 489         * Makefile.in: Regenerate with automake 1.11.1.
 490         * aclocal.m4: Ditto.
 491
 492 2010-05-05  Nick Clifton  <nickc@redhat.com>
 493
 494         * po/es.po: Updated Spanish translation.
 495
 496 2010-04-22  Nick Clifton  <nickc@redhat.com>
 497
 498         * po/opcodes.pot: Updated by the Translation project.
 499         * po/vi.po: Updated Vietnamese translation.
 500
 501 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 502
 503         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 504         bits in opcode.
 505
 506 2010-04-09  Nick Clifton  <nickc@redhat.com>
 507
 508         * i386-dis.c (print_insn): Remove unused variable op.
 509         (OP_sI): Remove unused variable mask.
 510
 511 2010-04-07  Alan Modra  <amodra@gmail.com>
 512
 513         * configure: Regenerate.
 514
 515 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 516
 517         * ppc-opc.c (RBOPT): New define.
 518         ("dccci"): Enable for PPCA2.  Make operands optional.
 519         ("iccci"): Likewise.  Do not deprecate for PPC476.
 520
 521 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 522
 523         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 524
 525 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 526
 527         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 528         * Makefile.in: Regenerate.
 529         * configure.in (bfd_tic6x_arch): New.
 530         * configure: Regenerate.
 531         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 532         (disassembler): Handle TI C6X.
 533         * tic6x-dis.c: New.
 534
 535 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 536
 537         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 538
 539 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 540
 541         * dis-buf.c (buffer_read_memory): Give error for reading just
 542         before the start of memory.
 543
 544 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 545             Quentin Neill <quentin.neill@amd.com>
 546
 547         * i386-dis.c (OP_LWP_I): Removed.
 548         (reg_table): Do not use OP_LWP_I, use Iq.
 549         (OP_LWPCB_E): Remove use of names16.
 550         (OP_LWP_E): Same.
 551         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 552         should not set the Vex.length bit.
 553         * i386-tbl.h: Regenerated.
 554
 555 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 556
 557         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 558
 559 2010-02-24  Nick Clifton  <nickc@redhat.com>
 560
 561         PR binutils/6773
 562         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 563         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 564         (thumb32_opcodes): Likewise.
 565
 566 2010-02-15  Nick Clifton  <nickc@redhat.com>
 567
 568         * po/vi.po: Updated Vietnamese translation.
 569
 570 2010-02-12  Doug Evans  <dje@sebabeach.org>
 571
 572         * lm32-opinst.c: Regenerate.
 573
 574 2010-02-11  Doug Evans  <dje@sebabeach.org>
 575
 576         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 577         (print_address): Delete CGEN_PRINT_ADDRESS.
 578         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 579         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 580         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 581         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 582
 583         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 584         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 585         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 586         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 587         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 588         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 589         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 590         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 591         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 592         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 593         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 594         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 595
 596 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 597
 598         * i386-dis.c: Update copyright.
 599         * i386-gen.c: Likewise.
 600         * i386-opc.h: Likewise.
 601         * i386-opc.tbl: Likewise.
 602
 603 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 604             Sebastian Pop  <sebastian.pop@amd.com>
 605
 606         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 607         function to handle 5th imm8 operand.
 608         (PREFIX_VEX_3A48): Added.
 609         (PREFIX_VEX_3A49): Added.
 610         (VEX_W_3A48_P_2): Added.
 611         (VEX_W_3A49_P_2): Added.
 612         (prefix table): Added entries for PREFIX_VEX_3A48
 613         and PREFIX_VEX_3A49.
 614         (vex table): Added entries for VEX_W_3A48_P_2 and
 615         and VEX_W_3A49_P_2.
 616         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 617         for Vec_Imm4 operands.
 618         * i386-opc.h (enum): Added Vec_Imm4.
 619         (i386_operand_type): Added vec_imm4.
 620         * i386-opc.tbl: Add entries for vpermilp[ds].
 621         * i386-init.h: Regenerated.
 622         * i386-tbl.h: Regenerated.
 623
 624 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 625
 626         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 627         and "pwr7".  Move "a2" into alphabetical order.
 628
 629 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 630
 631         * ppc-dis.c (ppc_opts): Add titan entry.
 632         * ppc-opc.c (TITAN, MULHW): Define.
 633         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 634
 635 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 636
 637         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 638         to CPU_BDVER1_FLAGS
 639         * i386-init.h: Regenerated.
 640
 641 2010-02-03  Anthony Green  <green@moxielogic.com>
 642
 643         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 644         0x0f, and make 0x00 an illegal instruction.
 645
 646 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 647
 648         * opcodes/arm-dis.c (struct arm_private_data): New.
 649         (print_insn_coprocessor, print_insn_arm): Update to use struct
 650         arm_private_data.
 651         (is_mapping_symbol, get_map_sym_type): New functions.
 652         (get_sym_code_type): Check the symbol's section.  Do not check
 653         mapping symbols.
 654         (print_insn): Default to disassembling ARM mode code.  Check
 655         for mapping symbols separately from other symbols.  Use
 656         struct arm_private_data.
 657
 658 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 659
 660         * i386-dis.c (EXVexWdqScalar): New.
 661         (vex_scalar_w_dq_mode): Likewise.
 662         (prefix_table): Update entries for PREFIX_VEX_3899,
 663         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 664         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 665         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 666         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 667         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 668         (OP_EX): Likewise.
 669
 670 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 671
 672         * i386-dis.c (XMScalar): New.
 673         (EXdScalar): Likewise.
 674         (EXqScalar): Likewise.
 675         (EXqScalarS): Likewise.
 676         (VexScalar): Likewise.
 677         (EXdVexScalarS): Likewise.
 678         (EXqVexScalarS): Likewise.
 679         (XMVexScalar): Likewise.
 680         (scalar_mode): Likewise.
 681         (d_scalar_mode): Likewise.
 682         (d_scalar_swap_mode): Likewise.
 683         (q_scalar_mode): Likewise.
 684         (q_scalar_swap_mode): Likewise.
 685         (vex_scalar_mode): Likewise.
 686         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 687         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 688         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 689         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 690         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 691         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 692         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 693         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 694         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 695         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 696         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 697         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 698         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 699         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 700         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 701         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 702         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 703         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 704         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 705         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 706         q_scalar_mode, q_scalar_swap_mode.
 707         (OP_XMM): Handle scalar_mode.
 708         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 709         and q_scalar_swap_mode.
 710         (OP_VEX): Handle vex_scalar_mode.
 711
 712 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 713
 714         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 715
 716 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 717
 718         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 719
 720 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 721
 722         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 723
 724 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 725
 726         * i386-dis.c (Bad_Opcode): New.
 727         (bad_opcode): Likewise.
 728         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 729         (dis386_twobyte): Likewise.
 730         (reg_table): Likewise.
 731         (prefix_table): Likewise.
 732         (x86_64_table): Likewise.
 733         (vex_len_table): Likewise.
 734         (vex_w_table): Likewise.
 735         (mod_table): Likewise.
 736         (rm_table): Likewise.
 737         (float_reg): Likewise.
 738         (reg_table): Remove trailing "(bad)" entries.
 739         (prefix_table): Likewise.
 740         (x86_64_table): Likewise.
 741         (vex_len_table): Likewise.
 742         (vex_w_table): Likewise.
 743         (mod_table): Likewise.
 744         (rm_table): Likewise.
 745         (get_valid_dis386): Handle bytemode 0.
 746
 747 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 748
 749         * i386-opc.h (VEXScalar): New.
 750
 751         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 752         instructions.
 753         * i386-tbl.h: Regenerated.
 754
 755 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 756
 757         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 758
 759         * i386-opc.tbl: Add xsave64 and xrstor64.
 760         * i386-tbl.h: Regenerated.
 761
 762 2010-01-20  Nick Clifton  <nickc@redhat.com>
 763
 764         PR 11170
 765         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 766         based post-indexed addressing.
 767
 768 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 769
 770         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 771         * i386-tbl.h: Regenerated.
 772
 773 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 774
 775         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 776         comments.
 777
 778 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 779
 780         * i386-dis.c (names_mm): New.
 781         (intel_names_mm): Likewise.
 782         (att_names_mm): Likewise.
 783         (names_xmm): Likewise.
 784         (intel_names_xmm): Likewise.
 785         (att_names_xmm): Likewise.
 786         (names_ymm): Likewise.
 787         (intel_names_ymm): Likewise.
 788         (att_names_ymm): Likewise.
 789         (print_insn): Set names_mm, names_xmm and names_ymm.
 790         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 791         (OP_XMM): Likewise.
 792         (OP_EM): Likewise.
 793         (OP_EMC): Likewise.
 794         (OP_MXC): Likewise.
 795         (OP_EX): Likewise.
 796         (XMM_Fixup): Likewise.
 797         (OP_VEX): Likewise.
 798         (OP_EX_VexReg): Likewise.
 799         (OP_Vex_2src): Likewise.
 800         (OP_Vex_2src_1): Likewise.
 801         (OP_Vex_2src_2): Likewise.
 802         (OP_REG_VexI4): Likewise.
 803
 804 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 805
 806         * i386-dis.c (print_insn): Update comments.
 807
 808 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 809
 810         * i386-dis.c (rex_original): Removed.
 811         (ckprefix): Remove rex_original.
 812         (print_insn): Update comments.
 813
 814 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 815
 816         * Makefile.in: Regenerate.
 817         * configure: Regenerate.
 818
 819 2010-01-07  Doug Evans  <dje@sebabeach.org>
 820
 821         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 822         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 823         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 824         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 825         * xstormy16-ibld.c: Regenerate.
 826
 827 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 828
 829         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 830         * i386-init.h: Regenerated.
 831
 832 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 833
 834         * arm-dis.c (print_insn): Fixed search for next symbol and data
 835         dumping condition, and the initial mapping symbol state.
 836
 837 2010-01-05  Doug Evans  <dje@sebabeach.org>
 838
 839         * cgen-ibld.in: #include "cgen/basic-modes.h".
 840         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 841         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 842         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 843         * xstormy16-ibld.c: Regenerate.
 844
 845 2010-01-04  Nick Clifton  <nickc@redhat.com>
 846
 847         PR 11123
 848         * arm-dis.c (print_insn_coprocessor): Initialise value.
 849
 850 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 851
 852         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 853
 854 2010-01-02  Doug Evans  <dje@sebabeach.org>
 855
 856         * cgen-asm.in: Update copyright year.
 857         * cgen-dis.in: Update copyright year.
 858         * cgen-ibld.in: Update copyright year.
 859         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 860         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 861         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 862         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 863         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 864         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 865         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 866         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 867         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 868         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 869         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 870         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 871         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 872         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 873         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 874         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 875         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 876         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 877         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 878         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 879         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 880
 881 For older changes see ChangeLog-2009
 882 \f
 883 Local Variables:
 884 mode: change-log
 885 left-margin: 8
 886 fill-column: 74
 887 version-control: never
 888 End: