opcodes/ChangeLog

   1 2020-01-18  Nick Clifton  <nickc@redhat.com>
   2
   3         * configure: Regenerate.
   4         * po/opcodes.pot: Regenerate.
   5
   6 2020-01-18  Nick Clifton  <nickc@redhat.com>
   7
   8         Binutils 2.34 branch created.
   9
  10 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
  11
  12         * opintl.h: Fix spelling error (seperate).
  13
  14 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
  15
  16         * i386-opc.tbl: Add {vex} pseudo prefix.
  17         * i386-tbl.h: Regenerated.
  18
  19 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  20
  21         PR 25376
  22         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
  23         (neon_opcodes): Likewise.
  24         (select_arm_features): Make sure we enable MVE bits when selecting
  25         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
  26         any architecture.
  27
  28 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  29
  30         * i386-opc.tbl: Drop stale comment from XOP section.
  31
  32 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  33
  34         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
  35         (extractps): Add VexWIG to SSE2AVX forms.
  36         * i386-tbl.h: Re-generate.
  37
  38 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  39
  40         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
  41         Size64 from and use VexW1 on SSE2AVX forms.
  42         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
  43         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
  44         * i386-tbl.h: Re-generate.
  45
  46 2020-01-15  Alan Modra  <amodra@gmail.com>
  47
  48         * tic4x-dis.c (tic4x_version): Make unsigned long.
  49         (optab, optab_special, registernames): New file scope vars.
  50         (tic4x_print_register): Set up registernames rather than
  51         malloc'd registertable.
  52         (tic4x_disassemble): Delete optable and optable_special.  Use
  53         optab and optab_special instead.  Throw away old optab,
  54         optab_special and registernames when info->mach changes.
  55
  56 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
  57
  58         PR 25377
  59         * z80-dis.c (suffix): Use .db instruction to generate double
  60         prefix.
  61
  62 2020-01-14  Alan Modra  <amodra@gmail.com>
  63
  64         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
  65         values to unsigned before shifting.
  66
  67 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
  68
  69         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
  70         flow instructions.
  71         (print_insn_thumb16, print_insn_thumb32): Likewise.
  72         (print_insn): Initialize the insn info.
  73         * i386-dis.c (print_insn): Initialize the insn info fields, and
  74         detect jumps.
  75
  76 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
  77
  78         * arc-opc.c (C_NE): Make it required.
  79
  80 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
  81
  82         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
  83         reserved register name.
  84
  85 2020-01-13  Alan Modra  <amodra@gmail.com>
  86
  87         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
  88         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
  89
  90 2020-01-13  Alan Modra  <amodra@gmail.com>
  91
  92         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
  93         result of wasm_read_leb128 in a uint64_t and check that bits
  94         are not lost when copying to other locals.  Use uint32_t for
  95         most locals.  Use PRId64 when printing int64_t.
  96
  97 2020-01-13  Alan Modra  <amodra@gmail.com>
  98
  99         * score-dis.c: Formatting.
 100         * score7-dis.c: Formatting.
 101
 102 2020-01-13  Alan Modra  <amodra@gmail.com>
 103
 104         * score-dis.c (print_insn_score48): Use unsigned variables for
 105         unsigned values.  Don't left shift negative values.
 106         (print_insn_score32): Likewise.
 107         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
 108
 109 2020-01-13  Alan Modra  <amodra@gmail.com>
 110
 111         * tic4x-dis.c (tic4x_print_register): Remove dead code.
 112
 113 2020-01-13  Alan Modra  <amodra@gmail.com>
 114
 115         * fr30-ibld.c: Regenerate.
 116
 117 2020-01-13  Alan Modra  <amodra@gmail.com>
 118
 119         * xgate-dis.c (print_insn): Don't left shift signed value.
 120         (ripBits): Formatting, use 1u.
 121
 122 2020-01-10  Alan Modra  <amodra@gmail.com>
 123
 124         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
 125         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
 126
 127 2020-01-10  Alan Modra  <amodra@gmail.com>
 128
 129         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
 130         and XRREG value earlier to avoid a shift with negative exponent.
 131         * m10200-dis.c (disassemble): Similarly.
 132
 133 2020-01-09  Nick Clifton  <nickc@redhat.com>
 134
 135         PR 25224
 136         * z80-dis.c (ld_ii_ii): Use correct cast.
 137
 138 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
 139
 140         PR 25224
 141         * z80-dis.c (ld_ii_ii): Use character constant when checking
 142         opcode byte value.
 143
 144 2020-01-09  Jan Beulich  <jbeulich@suse.com>
 145
 146         * i386-dis.c (SEP_Fixup): New.
 147         (SEP): Define.
 148         (dis386_twobyte): Use it for sysenter/sysexit.
 149         (enum x86_64_isa): Change amd64 enumerator to value 1.
 150         (OP_J): Compare isa64 against intel64 instead of amd64.
 151         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
 152         forms.
 153         * i386-tbl.h: Re-generate.
 154
 155 2020-01-08  Alan Modra  <amodra@gmail.com>
 156
 157         * z8k-dis.c: Include libiberty.h
 158         (instr_data_s): Make max_fetched unsigned.
 159         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
 160         Don't exceed byte_info bounds.
 161         (output_instr): Make num_bytes unsigned.
 162         (unpack_instr): Likewise for nibl_count and loop.
 163         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
 164         idx unsigned.
 165         * z8k-opc.h: Regenerate.
 166
 167 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
 168
 169         * arc-tbl.h (llock): Use 'LLOCK' as class.
 170         (llockd): Likewise.
 171         (scond): Use 'SCOND' as class.
 172         (scondd): Likewise.
 173         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
 174         (scondd): Likewise.
 175
 176 2020-01-06  Alan Modra  <amodra@gmail.com>
 177
 178         * m32c-ibld.c: Regenerate.
 179
 180 2020-01-06  Alan Modra  <amodra@gmail.com>
 181
 182         PR 25344
 183         * z80-dis.c (suffix): Don't use a local struct buffer copy.
 184         Peek at next byte to prevent recursion on repeated prefix bytes.
 185         Ensure uninitialised "mybuf" is not accessed.
 186         (print_insn_z80): Don't zero n_fetch and n_used here,..
 187         (print_insn_z80_buf): ..do it here instead.
 188
 189 2020-01-04  Alan Modra  <amodra@gmail.com>
 190
 191         * m32r-ibld.c: Regenerate.
 192
 193 2020-01-04  Alan Modra  <amodra@gmail.com>
 194
 195         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
 196
 197 2020-01-04  Alan Modra  <amodra@gmail.com>
 198
 199         * crx-dis.c (match_opcode): Avoid shift left of signed value.
 200
 201 2020-01-04  Alan Modra  <amodra@gmail.com>
 202
 203         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
 204
 205 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 206
 207         * aarch64-tbl.h (aarch64_opcode_table): Use
 208         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 209
 210 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 211
 212         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
 213         forms of SUDOT and USDOT.
 214
 215 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 216
 217         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
 218         uzip{1,2}.
 219         * opcodes/aarch64-dis-2.c: Re-generate.
 220
 221 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 222
 223         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
 224         FMMLA encoding.
 225         * opcodes/aarch64-dis-2.c: Re-generate.
 226
 227 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 228
 229         * z80-dis.c: Add support for eZ80 and Z80 instructions.
 230
 231 2020-01-01  Alan Modra  <amodra@gmail.com>
 232
 233         Update year range in copyright notice of all files.
 234
 235 For older changes see ChangeLog-2019
 236 \f
 237 Copyright (C) 2020 Free Software Foundation, Inc.
 238
 239 Copying and distribution of this file, with or without modification,
 240 are permitted in any medium without royalty provided the copyright
 241 notice and this notice are preserved.
 242
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 244 mode: change-log
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