opcodes/ChangeLog

   1 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
   2
   3         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
   4         move/branch operations to the bottom so that VR5400 multimedia
   5         instructions take precedence in disassembly.
   6
   7 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
   8
   9         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
  10         ISA-specific "break" encoding.
  11
  12 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
  13
  14         * arm-opc.h: Fix typo in comment.
  15
  16 2004-07-11  Andreas Schwab  <schwab@suse.de>
  17
  18         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
  19
  20 2004-07-09  Andreas Schwab  <schwab@suse.de>
  21
  22         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
  23
  24 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
  25
  26         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
  27         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
  28         (crx-dis.lo): New target.
  29         (crx-opc.lo): Likewise.
  30         * Makefile.in: Regenerate.
  31         * configure.in: Handle bfd_crx_arch.
  32         * configure: Regenerate.
  33         * crx-dis.c: New file.
  34         * crx-opc.c: New file.
  35         * disassemble.c (ARCH_crx): Define.
  36         (disassembler): Handle ARCH_crx.
  37
  38 2004-06-29  James E Wilson  <wilson@specifixinc.com>
  39
  40         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
  41         * ia64-asmtab.c: Regnerate.
  42
  43 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
  44
  45         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
  46         (extract_fxm): Don't test dialect.
  47         (XFXFXM_MASK): Include the power4 bit.
  48         (XFXM): Add p4 param.
  49         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
  50
  51 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
  52
  53         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
  54         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
  55
  56 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
  57
  58         * ppc-opc.c (BH, XLBH_MASK): Define.
  59         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
  60
  61 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
  62
  63         * i386-dis.c (x_mode): Comment.
  64         (two_source_ops): File scope.
  65         (float_mem): Correct fisttpll and fistpll.
  66         (float_mem_mode): New table.
  67         (dofloat): Use it.
  68         (OP_E): Correct intel mode PTR output.
  69         (ptr_reg): Use open_char and close_char.
  70         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
  71         operands.  Set two_source_ops.
  72
  73 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
  74
  75         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
  76         instead of _raw_size.
  77
  78 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
  79
  80         * ia64-gen.c (in_iclass): Handle more postinc st
  81         and ld variants.
  82         * ia64-asmtab.c: Rebuilt.
  83
  84 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  85
  86         * s390-opc.txt: Correct architecture mask for some opcodes.
  87         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
  88         in the esa mode as well.
  89
  90 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
  91
  92         * sh-dis.c (target_arch): Make unsigned.
  93         (print_insn_sh): Replace (most of) switch with a call to
  94         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
  95         * sh-opc.h: Redefine architecture flags values.
  96         Add sh3-nommu architecture.
  97         Reorganise <arch>_up macros so they make more visual sense.
  98         (SH_MERGE_ARCH_SET): Define new macro.
  99         (SH_VALID_BASE_ARCH_SET): Likewise.
 100         (SH_VALID_MMU_ARCH_SET): Likewise.
 101         (SH_VALID_CO_ARCH_SET): Likewise.
 102         (SH_VALID_ARCH_SET): Likewise.
 103         (SH_MERGE_ARCH_SET_VALID): Likewise.
 104         (SH_ARCH_SET_HAS_FPU): Likewise.
 105         (SH_ARCH_SET_HAS_DSP): Likewise.
 106         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 107         (sh_get_arch_from_bfd_mach): Add prototype.
 108         (sh_get_arch_up_from_bfd_mach): Likewise.
 109         (sh_get_bfd_mach_from_arch_set): Likewise.
 110         (sh_merge_bfd_arc): Likewise.
 111
 112 2004-05-24  Peter Barada  <peter@the-baradas.com>
 113
 114         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 115         into new match_insn_m68k function.  Loop over canidate
 116         matches and select first that completely matches.
 117         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 118         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 119         to verify addressing for MAC/EMAC.
 120         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 121         reigster halves since 'fpu' and 'spl' look misleading.
 122         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 123         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 124         first, tighten up match masks.
 125         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 126         'size' from special case code in print_insn_m68k to
 127         determine decode size of insns.
 128
 129 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 130
 131         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 132         well as when -mpower4.
 133
 134 2004-05-13  Nick Clifton  <nickc@redhat.com>
 135
 136         * po/fr.po: Updated French translation.
 137
 138 2004-05-05  Peter Barada  <peter@the-baradas.com>
 139
 140         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 141         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 142         * m68k-op.c: Switch from ColdFire chips to core variants.
 143
 144 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 145
 146         PR 147.
 147         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 148
 149 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 150
 151         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 152         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 153
 154 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 155
 156         * sh-dis.c (print_insn_sh): Print the value in constant pool
 157         as a symbol if it looks like a symbol.
 158
 159 2004-04-22  Peter Barada <peter@the-baradas.com>
 160
 161         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 162         appropriate ColdFire architectures.
 163         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 164         mask addressing.
 165         Add EMAC instructions, fix MAC instructions. Remove
 166         macmw/macml/msacmw/msacml instructions since mask addressing now
 167         supported.
 168
 169 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 170
 171         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 172         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 173         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 174         macro.  Adjust all users.
 175
 176 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 177
 178         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 179         separately.
 180
 181 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 182
 183         * m32r-asm.c: Regenerate.
 184
 185 2004-03-29  Stan Shebs  <shebs@apple.com>
 186
 187         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 188         used.
 189
 190 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 191
 192         * aclocal.m4: Regenerate.
 193         * config.in: Regenerate.
 194         * configure: Regenerate.
 195         * po/POTFILES.in: Regenerate.
 196         * po/opcodes.pot: Regenerate.
 197
 198 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 199
 200         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 201         PPC_OPERANDS_GPR_0.
 202         * ppc-opc.c (RA0): Define.
 203         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 204         (RAOPT): Rename from RAO.  Update all uses.
 205         (powerpc_opcodes): Use RA0 as appropriate.
 206
 207 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 208
 209         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 210
 211 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 212
 213         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 214
 215 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 216
 217         * i386-dis.c (GRPPLOCK): Delete.
 218         (grps): Delete GRPPLOCK entry.
 219
 220 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 221
 222         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 223         (M, Mp): Use OP_M.
 224         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 225         (GRPPADLCK): Define.
 226         (dis386): Use NOP_Fixup on "nop".
 227         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 228         (twobyte_has_modrm): Set for 0xa7.
 229         (padlock_table): Delete.  Move to..
 230         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 231         and clflush.
 232         (print_insn): Revert PADLOCK_SPECIAL code.
 233         (OP_E): Delete sfence, lfence, mfence checks.
 234
 235 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 236
 237         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 238         (INVLPG_Fixup): New function.
 239         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 240
 241 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 242
 243         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 244         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 245         (padlock_table): New struct with PadLock instructions.
 246         (print_insn): Handle PADLOCK_SPECIAL.
 247
 248 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 249
 250         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 251         (OP_E): Twiddle clflush to sfence here.
 252
 253 2004-03-08  Nick Clifton  <nickc@redhat.com>
 254
 255         * po/de.po: Updated German translation.
 256
 257 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 258
 259         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 260         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 261         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 262         accordingly.
 263
 264 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 265
 266         * frv-asm.c: Regenerate.
 267         * frv-desc.c: Regenerate.
 268         * frv-desc.h: Regenerate.
 269         * frv-dis.c: Regenerate.
 270         * frv-ibld.c: Regenerate.
 271         * frv-opc.c: Regenerate.
 272         * frv-opc.h: Regenerate.
 273
 274 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 275
 276         * frv-desc.c, frv-opc.c: Regenerate.
 277
 278 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 279
 280         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 281
 282 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 283
 284         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 285         Also correct mistake in the comment.
 286
 287 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 288
 289         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 290         ensure that double registers have even numbers.
 291         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 292         that reserved instruction 0xfffd does not decode the same
 293         as 0xfdfd (ftrv).
 294         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 295         REG_N refers to a double register.
 296         Add REG_N_B01 nibble type and use it instead of REG_NM
 297         in ftrv.
 298         Adjust the bit patterns in a few comments.
 299
 300 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 301
 302         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 303
 304 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 305
 306         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 307
 308 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 309
 310         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 311
 312 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 313
 314         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 315         mtivor32, mtivor33, mtivor34.
 316
 317 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 318
 319         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 320
 321 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 322
 323         * arm-opc.h Maverick accumulator register opcode fixes.
 324
 325 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 326
 327         * m32r-dis.c: Regenerate.
 328
 329 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 330
 331         * sh-opc.h (sh_table): "fsrra", not "fssra".
 332
 333 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 334
 335         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 336         contraints.
 337
 338 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 339
 340         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 341
 342 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 343
 344         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 345         1.  Don't print scale factor on AT&T mode when index missing.
 346
 347 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 348
 349         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 350         when loaded into XR registers.
 351
 352 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 353
 354         * frv-desc.h: Regenerate.
 355         * frv-desc.c: Regenerate.
 356         * frv-opc.c: Regenerate.
 357
 358 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 359
 360         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 361
 362 2004-01-09  Paul Brook  <paul@codesourcery.com>
 363
 364         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 365         specific opcodes.
 366
 367 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 368
 369         * Makefile.am (libopcodes_la_DEPENDENCIES)
 370         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 371         comment about the problem.
 372         * Makefile.in: Regenerate.
 373
 374 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 375
 376         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 377         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 378         cut&paste errors in shifting/truncating numerical operands.
 379         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 380         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 381         (parse_uslo16): Likewise.
 382         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 383         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 384         (parse_s12): Likewise.
 385         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 386         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 387         (parse_uslo16): Likewise.
 388         (parse_uhi16): Parse gothi and gotfuncdeschi.
 389         (parse_d12): Parse got12 and gotfuncdesc12.
 390         (parse_s12): Likewise.
 391
 392 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 393
 394         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 395         instruction which looks similar to an 'rla' instruction.
 396
 397 For older changes see ChangeLog-0203
 398 \f
 399 Local Variables:
 400 mode: change-log
 401 left-margin: 8
 402 fill-column: 74
 403 version-control: never
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