1 2020-07-14 Jan Beulich <jbeulich@suse.com>
3 * i386-dis.c (Rd, Rdq, MaskR): Delete.
4 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
5 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
6 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
7 MOD_EVEX_0F387C): New enumerators.
8 (reg_table): Use Edq for rdssp.
9 (prefix_table): Use Edq for incssp.
10 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
11 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
12 ktest*, and kshift*. Use Edq / MaskE for kmov*.
13 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
14 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
15 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
16 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
17 0F3828_P_1 and 0F3838_P_1.
18 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
19 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
21 2020-07-14 Jan Beulich <jbeulich@suse.com>
23 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
24 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
25 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
26 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
27 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
28 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
29 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
30 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
31 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
32 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
33 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
34 (reg_table, prefix_table, three_byte_table, vex_table,
35 vex_len_table, mod_table, rm_table): Replace / remove respective
37 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
38 of PREFIX_DATA in used_prefixes.
40 2020-07-14 Jan Beulich <jbeulich@suse.com>
42 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
43 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
44 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
45 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
46 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
47 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
48 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
49 VEX_W_0F3A33_L_0): Delete.
50 (dis386): Adjust "BW" description.
51 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
52 0F3A31, 0F3A32, and 0F3A33.
53 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
55 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
58 2020-07-14 Jan Beulich <jbeulich@suse.com>
60 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
61 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
62 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
63 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
64 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
65 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
66 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
67 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
68 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
69 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
70 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
71 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
72 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
73 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
74 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
75 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
76 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
77 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
78 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
79 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
80 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
81 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
82 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
83 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
84 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
85 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
86 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
87 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
88 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
89 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
90 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
91 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
92 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
93 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
94 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
95 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
96 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
97 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
98 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
99 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
100 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
101 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
102 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
103 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
104 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
105 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
106 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
107 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
108 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
109 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
110 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
111 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
112 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
113 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
114 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
115 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
116 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
117 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
118 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
119 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
120 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
121 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
122 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
123 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
124 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
125 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
126 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
127 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
128 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
129 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
130 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
131 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
132 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
133 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
134 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
135 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
136 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
137 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
138 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
139 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
140 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
141 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
142 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
143 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
144 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
145 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
146 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
147 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
148 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
149 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
150 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
151 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
152 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
153 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
154 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
155 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
156 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
157 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
158 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
159 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
160 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
161 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
162 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
163 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
164 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
165 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
166 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
167 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
168 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
169 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
170 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
171 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
172 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
173 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
174 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
175 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
176 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
177 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
178 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
179 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
180 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
181 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
182 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
183 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
184 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
185 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
186 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
187 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
188 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
189 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
190 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
191 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
192 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
193 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
194 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
195 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
196 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
197 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
198 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
199 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
200 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
201 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
202 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
203 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
204 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
205 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
206 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
207 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
208 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
209 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
210 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
211 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
212 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
213 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
214 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
215 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
216 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
217 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
218 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
219 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
220 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
221 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
222 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
223 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
224 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
225 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
226 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
227 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
228 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
229 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
230 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
231 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
232 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
233 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
234 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
235 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
236 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
237 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
238 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
239 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
240 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
241 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
242 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
243 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
244 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
245 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
246 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
247 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
248 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
249 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
250 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
251 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
252 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
253 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
254 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
255 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
256 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
257 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
258 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
259 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
260 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
261 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
262 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
263 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
264 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
265 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
266 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
267 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
268 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
269 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
270 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
271 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
272 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
273 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
274 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
275 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
276 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
277 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
278 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
279 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
280 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
281 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
282 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
283 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
284 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
285 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
286 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
287 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
288 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
289 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
290 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
291 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
292 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
293 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
294 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
295 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
296 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
297 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
298 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
299 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
300 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
301 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
302 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
303 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
304 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
305 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
306 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
307 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
308 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
309 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
310 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
311 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
312 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
313 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
314 EVEX_W_0F3A72_P_2): Rename to ...
315 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
316 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
317 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
318 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
319 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
320 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
321 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
322 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
323 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
324 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
325 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
326 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
327 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
328 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
329 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
330 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
331 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
332 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
333 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
334 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
335 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
336 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
337 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
338 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
339 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
340 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
341 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
342 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
343 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
344 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
345 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
346 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
347 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
348 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
349 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
350 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
351 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
352 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
353 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
354 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
355 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
356 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
357 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
358 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
359 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
360 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
361 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
362 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
363 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
364 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
365 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
366 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
367 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
368 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
369 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
370 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
371 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
372 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
373 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
374 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
375 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
376 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
377 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
378 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
379 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
380 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
381 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
382 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
383 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
384 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
385 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
386 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
388 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
389 vex_w_table, mod_table): Replace / remove respective entries.
390 (print_insn): Move up dp->prefix_requirement handling. Handle
392 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
393 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
394 Replace / remove respective entries.
396 2020-07-14 Jan Beulich <jbeulich@suse.com>
398 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
399 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
400 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
401 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
402 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
404 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
405 0F2C, 0F2D, 0F2E, and 0F2F.
406 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
409 2020-07-14 Jan Beulich <jbeulich@suse.com>
411 * i386-dis.c (OP_VexR, VexScalarR): New.
412 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
413 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
414 need_vex_reg): Delete.
415 (prefix_table): Replace VexScalar by VexScalarR and
416 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
417 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
418 (vex_len_table): Replace EXqVexScalarS by EXqS.
419 (get_valid_dis386): Don't set need_vex_reg.
420 (print_insn): Don't initialize need_vex_reg.
421 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
422 q_scalar_swap_mode cases.
423 (OP_EX): Don't check for d_scalar_swap_mode and
425 (OP_VEX): Done check need_vex_reg.
426 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
427 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
428 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
430 2020-07-14 Jan Beulich <jbeulich@suse.com>
432 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
433 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
434 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
435 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
436 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
437 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
438 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
439 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
440 (vex_table): Replace Vex128 by Vex.
441 (vex_len_table): Likewise. Adjust referenced enum names.
442 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
443 referenced enum names.
444 (OP_VEX): Drop vex128_mode and vex256_mode cases.
445 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
447 2020-07-14 Jan Beulich <jbeulich@suse.com>
449 * i386-dis.c (dis386): "LW" description now applies to "DQ".
450 (putop): Handle "DQ". Don't handle "LW" anymore.
451 (prefix_table, mod_table): Replace %LW by %DQ.
452 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
454 2020-07-14 Jan Beulich <jbeulich@suse.com>
456 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
457 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
458 d_scalar_swap_mode case handling. Move shift adjsutment into
459 the case its applicable to.
461 2020-07-14 Jan Beulich <jbeulich@suse.com>
463 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
464 (EXbScalar, EXwScalar): Fold to ...
465 (EXbwUnit): ... this.
466 (b_scalar_mode, w_scalar_mode): Fold to ...
467 (bw_unit_mode): ... this.
468 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
469 w_scalar_mode handling by bw_unit_mode one.
470 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
472 * i386-dis-evex-prefix.h: ... here.
474 2020-07-14 Jan Beulich <jbeulich@suse.com>
476 * i386-dis.c (PCMPESTR_Fixup): Delete.
477 (dis386): Adjust "LQ" description.
478 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
479 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
480 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
481 vpcmpestrm, and vpcmpestri.
482 (putop): Honor "cond" when handling LQ.
483 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
484 vcvtsi2ss and vcvtusi2ss.
485 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
486 vcvtsi2sd and vcvtusi2sd.
488 2020-07-14 Jan Beulich <jbeulich@suse.com>
490 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
491 (simd_cmp_op): Add const.
492 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
493 (CMP_Fixup): Handle VEX case.
494 (prefix_table): Replace VCMP by CMP.
495 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
497 2020-07-14 Jan Beulich <jbeulich@suse.com>
499 * i386-dis.c (MOVBE_Fixup): Delete.
501 (prefix_table): Use Mv for movbe entries.
503 2020-07-14 Jan Beulich <jbeulich@suse.com>
505 * i386-dis.c (CRC32_Fixup): Delete.
506 (prefix_table): Use Eb/Ev for crc32 entries.
508 2020-07-14 Jan Beulich <jbeulich@suse.com>
510 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
511 Conditionalize invocations of "USED_REX (0)".
513 2020-07-14 Jan Beulich <jbeulich@suse.com>
515 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
516 CH, DH, BH, AX, DX): Delete.
517 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
518 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
519 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
521 2020-07-10 Lili Cui <lili.cui@intel.com>
523 * i386-dis.c (TMM): New.
526 (MVexSIBMEM): Likewise.
527 (tmm_mode): Likewise.
528 (vex_sibmem_mode): Likewise.
529 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
530 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
531 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
532 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
533 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
534 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
535 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
536 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
537 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
538 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
539 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
540 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
541 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
542 (PREFIX_VEX_0F3849_X86_64): Likewise.
543 (PREFIX_VEX_0F384B_X86_64): Likewise.
544 (PREFIX_VEX_0F385C_X86_64): Likewise.
545 (PREFIX_VEX_0F385E_X86_64): Likewise.
546 (X86_64_VEX_0F3849): Likewise.
547 (X86_64_VEX_0F384B): Likewise.
548 (X86_64_VEX_0F385C): Likewise.
549 (X86_64_VEX_0F385E): Likewise.
550 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
551 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
552 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
553 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
554 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
555 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
556 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
557 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
558 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
559 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
560 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
561 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
562 (VEX_W_0F3849_X86_64_P_0): Likewise.
563 (VEX_W_0F3849_X86_64_P_2): Likewise.
564 (VEX_W_0F3849_X86_64_P_3): Likewise.
565 (VEX_W_0F384B_X86_64_P_1): Likewise.
566 (VEX_W_0F384B_X86_64_P_2): Likewise.
567 (VEX_W_0F384B_X86_64_P_3): Likewise.
568 (VEX_W_0F385C_X86_64_P_1): Likewise.
569 (VEX_W_0F385E_X86_64_P_0): Likewise.
570 (VEX_W_0F385E_X86_64_P_1): Likewise.
571 (VEX_W_0F385E_X86_64_P_2): Likewise.
572 (VEX_W_0F385E_X86_64_P_3): Likewise.
573 (names_tmm): Likewise.
574 (att_names_tmm): Likewise.
575 (intel_operand_size): Handle void_mode.
576 (OP_XMM): Handle tmm_mode.
579 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
580 CpuAMX_BF16 and CpuAMX_TILE.
581 (operand_type_shorthands): Add RegTMM.
582 (operand_type_init): Likewise.
583 (operand_types): Add Tmmword.
584 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
585 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
586 * i386-opc.h (CpuAMX_INT8): New.
587 (CpuAMX_BF16): Likewise.
588 (CpuAMX_TILE): Likewise.
591 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
592 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
593 (i386_operand_type): Add tmmword.
594 * i386-opc.tbl: Add AMX instructions.
595 * i386-reg.tbl: Add AMX registers.
596 * i386-init.h: Regenerated.
597 * i386-tbl.h: Likewise.
599 2020-07-08 Jan Beulich <jbeulich@suse.com>
601 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
602 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
604 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
605 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
607 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
608 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
609 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
610 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
611 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
612 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
613 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
614 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
615 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
616 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
617 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
618 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
619 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
620 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
621 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
622 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
623 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
624 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
625 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
626 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
627 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
628 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
629 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
630 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
631 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
632 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
633 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
634 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
635 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
636 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
637 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
638 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
639 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
640 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
641 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
642 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
643 (reg_table): Re-order XOP entries. Adjust their operands.
644 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
645 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
646 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
647 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
648 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
649 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
650 entries by references ...
651 (vex_len_table): ... to resepctive new entries here. For several
652 new and existing entries reference ...
653 (vex_w_table): ... new entries here.
654 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
656 2020-07-08 Jan Beulich <jbeulich@suse.com>
658 * i386-dis.c (XMVexScalarI4): Define.
659 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
660 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
661 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
662 (vex_len_table): Move scalar FMA4 entries ...
663 (prefix_table): ... here.
664 (OP_REG_VexI4): Handle scalar_mode.
665 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
666 * i386-tbl.h: Re-generate.
668 2020-07-08 Jan Beulich <jbeulich@suse.com>
670 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
672 (OP_VexW, VexW): New.
673 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
674 for shifts and rotates by register.
676 2020-07-08 Jan Beulich <jbeulich@suse.com>
678 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
679 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
680 OP_EX_VexReg): Delete.
681 (OP_VexI4, VexI4): New.
682 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
683 (prefix_table): ... here.
684 (print_insn): Drop setting of vex_w_done.
686 2020-07-08 Jan Beulich <jbeulich@suse.com>
688 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
689 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
690 (xop_table): Replace operands of 4-operand insns.
691 (OP_REG_VexI4): Move VEX.W based operand swaping here.
693 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
695 * arc-opc.c (insert_rbd): New function.
698 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
701 2020-07-07 Jan Beulich <jbeulich@suse.com>
703 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
704 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
705 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
706 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
708 (putop): Handle "BW".
709 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
710 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
712 * i386-dis-evex-prefix.h: ... here.
714 2020-07-06 Jan Beulich <jbeulich@suse.com>
716 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
717 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
718 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
719 VEX_W_0FXOP_09_83): New enumerators.
720 (xop_table): Reference the above.
721 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
722 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
723 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
724 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
726 2020-07-06 Jan Beulich <jbeulich@suse.com>
728 * i386-dis.c (EVEX_W_0F3838_P_1,
729 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
730 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
731 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
732 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
733 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
734 (putop): Centralize management of last[]. Delete SAVE_LAST.
735 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
736 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
737 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
738 * i386-dis-evex-prefix.h: here.
740 2020-07-06 Jan Beulich <jbeulich@suse.com>
742 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
743 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
744 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
745 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
747 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
748 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
749 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
750 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
751 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
752 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
753 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
754 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
756 * i386-dis-evex-len.h: Adjust comments.
757 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
758 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
759 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
760 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
761 MOD_EVEX_0F385B_P_2_W_1 table entries.
762 * i386-dis-evex-w.h: Reference mod_table[] for
763 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
766 2020-07-06 Jan Beulich <jbeulich@suse.com>
768 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
769 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
771 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
772 Likewise. Mark 256-bit entries invalid.
774 2020-07-06 Jan Beulich <jbeulich@suse.com>
776 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
777 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
778 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
779 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
780 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
781 PREFIX_EVEX_0F382B): Delete.
782 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
783 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
784 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
785 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
786 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
788 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
789 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
790 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
791 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
793 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
794 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
795 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
796 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
797 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
798 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
799 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
800 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
801 PREFIX_EVEX_0F382B): Remove table entries.
802 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
803 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
804 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
806 2020-07-06 Jan Beulich <jbeulich@suse.com>
808 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
809 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
811 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
812 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
813 EVEX_LEN_0F3A01_P_2_W_1 table entries.
814 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
817 2020-07-06 Jan Beulich <jbeulich@suse.com>
819 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
820 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
821 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
822 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
823 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
824 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
825 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
826 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
827 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
830 2020-07-06 Jan Beulich <jbeulich@suse.com>
832 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
833 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
834 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
836 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
838 * i386-dis-evex.h (evex_table): Reference VEX table entry for
840 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
842 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
844 2020-07-06 Jan Beulich <jbeulich@suse.com>
846 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
847 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
848 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
849 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
850 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
851 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
852 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
853 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
854 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
855 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
856 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
857 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
858 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
859 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
860 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
861 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
862 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
863 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
864 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
865 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
866 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
867 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
868 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
869 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
870 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
871 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
872 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
873 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
874 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
875 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
876 (prefix_table): Add EXxEVexR to FMA table entries.
877 (OP_Rounding): Move abort() invocation.
878 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
879 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
880 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
881 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
882 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
883 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
884 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
885 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
886 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
887 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
889 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
890 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
891 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
892 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
893 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
894 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
895 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
896 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
897 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
898 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
899 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
900 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
901 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
902 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
903 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
904 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
905 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
906 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
907 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
908 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
909 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
910 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
911 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
912 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
913 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
914 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
915 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
916 Delete table entries.
917 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
918 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
919 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
922 2020-07-06 Jan Beulich <jbeulich@suse.com>
924 * i386-dis.c (EXqScalarS): Delete.
925 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
926 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
928 2020-07-06 Jan Beulich <jbeulich@suse.com>
930 * i386-dis.c (safe-ctype.h): Include.
931 (EXdScalar, EXqScalar): Delete.
932 (d_scalar_mode, q_scalar_mode): Delete.
933 (prefix_table, vex_len_table): Use EXxmm_md in place of
934 EXdScalar and EXxmm_mq in place of EXqScalar.
935 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
936 d_scalar_mode and q_scalar_mode.
937 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
938 (vmovsd): Use EXxmm_mq.
940 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
943 * arc-dis.c: Fix spelling mistake.
944 * po/opcodes.pot: Regenerate.
946 2020-07-06 Nick Clifton <nickc@redhat.com>
948 * po/pt_BR.po: Updated Brazilian Portugugese translation.
949 * po/uk.po: Updated Ukranian translation.
951 2020-07-04 Nick Clifton <nickc@redhat.com>
953 * configure: Regenerate.
954 * po/opcodes.pot: Regenerate.
956 2020-07-04 Nick Clifton <nickc@redhat.com>
958 Binutils 2.35 branch created.
960 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
962 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
963 * i386-opc.h (VexSwapSources): New.
964 (i386_opcode_modifier): Add vexswapsources.
965 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
966 with two source operands swapped.
967 * i386-tbl.h: Regenerated.
969 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
971 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
972 unprivileged CSR can also be initialized.
974 2020-06-29 Alan Modra <amodra@gmail.com>
976 * arm-dis.c: Use C style comments.
977 * cr16-opc.c: Likewise.
978 * ft32-dis.c: Likewise.
979 * moxie-opc.c: Likewise.
980 * tic54x-dis.c: Likewise.
981 * s12z-opc.c: Remove useless comment.
982 * xgate-dis.c: Likewise.
984 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
986 * i386-opc.tbl: Add a blank line.
988 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
990 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
991 (VecSIB128): Renamed to ...
993 (VecSIB256): Renamed to ...
995 (VecSIB512): Renamed to ...
997 (VecSIB): Renamed to ...
999 (i386_opcode_modifier): Replace vecsib with sib.
1000 * i386-opc.tbl (VecSIB128): New.
1001 (VecSIB256): Likewise.
1002 (VecSIB512): Likewise.
1003 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1004 and VecSIB512, respectively.
1006 2020-06-26 Jan Beulich <jbeulich@suse.com>
1008 * i386-dis.c: Adjust description of I macro.
1009 (x86_64_table): Drop use of I.
1010 (float_mem): Replace use of I.
1011 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1013 2020-06-26 Jan Beulich <jbeulich@suse.com>
1015 * i386-dis.c: (print_insn): Avoid straight assignment to
1016 priv.orig_sizeflag when processing -M sub-options.
1018 2020-06-25 Jan Beulich <jbeulich@suse.com>
1020 * i386-dis.c: Adjust description of J macro.
1021 (dis386, x86_64_table, mod_table): Replace J.
1022 (putop): Remove handling of J.
1024 2020-06-25 Jan Beulich <jbeulich@suse.com>
1026 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1028 2020-06-25 Jan Beulich <jbeulich@suse.com>
1030 * i386-dis.c: Adjust description of "LQ" macro.
1031 (dis386_twobyte): Use LQ for sysret.
1032 (putop): Adjust handling of LQ.
1034 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1036 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1037 * riscv-dis.c: Include elfxx-riscv.h.
1039 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1041 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1043 2020-06-17 Lili Cui <lili.cui@intel.com>
1045 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1047 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1050 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1051 * i386-opc.tbl: Likewise.
1052 * i386-tbl.h: Regenerated.
1054 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1056 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1058 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1060 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1061 (SR_CORE): Likewise.
1062 (SR_FEAT): Likewise.
1064 (SR_V8_1): Likewise.
1065 (SR_V8_2): Likewise.
1066 (SR_V8_3): Likewise.
1067 (SR_V8_4): Likewise.
1070 (SR_SSBS): Likewise.
1072 (SR_ID_PFR2): Likewise.
1073 (SR_PROFILE): Likewise.
1074 (SR_MEMTAG): Likewise.
1075 (SR_SCXTNUM): Likewise.
1076 (aarch64_sys_regs): Refactor to store feature information in the table.
1077 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1078 that now describe their own features.
1079 (aarch64_pstatefield_supported_p): Likewise.
1081 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1083 * i386-dis.c (prefix_table): Fix a typo in comments.
1085 2020-06-09 Jan Beulich <jbeulich@suse.com>
1087 * i386-dis.c (rex_ignored): Delete.
1088 (ckprefix): Drop rex_ignored initialization.
1089 (get_valid_dis386): Drop setting of rex_ignored.
1090 (print_insn): Drop checking of rex_ignored. Don't record data
1091 size prefix as used with VEX-and-alike encodings.
1093 2020-06-09 Jan Beulich <jbeulich@suse.com>
1095 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1096 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1097 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1098 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1099 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1100 VEX_0F12, and VEX_0F16.
1101 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1102 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1103 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1104 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1105 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1106 MOD_VEX_0F16_PREFIX_2 entries.
1108 2020-06-09 Jan Beulich <jbeulich@suse.com>
1110 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1111 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1112 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1113 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1114 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1115 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1116 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1117 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1118 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1119 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1120 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1121 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1122 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1123 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1124 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1125 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1126 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1127 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1128 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1129 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1130 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1131 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1132 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1133 EVEX_W_0FC6_P_2): Delete.
1134 (print_insn): Add EVEX.W vs embedded prefix consistency check
1135 to prefix validation.
1136 * i386-dis-evex.h (evex_table): Don't further descend for
1137 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1138 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1140 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1141 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1142 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1143 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1144 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1145 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1146 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1147 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1148 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1149 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1150 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1151 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1152 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1153 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1154 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1155 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1156 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1157 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1158 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1159 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1160 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1161 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1162 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1163 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1164 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1165 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1166 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1168 2020-06-09 Jan Beulich <jbeulich@suse.com>
1170 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1171 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1172 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1174 (print_insn): Drop pointless check against bad_opcode. Split
1175 prefix validation into legacy and VEX-and-alike parts.
1176 (putop): Re-work 'X' macro handling.
1178 2020-06-09 Jan Beulich <jbeulich@suse.com>
1180 * i386-dis.c (MOD_0F51): Rename to ...
1181 (MOD_0F50): ... this.
1183 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1185 * arm-dis.c (arm_opcodes): Add dfb.
1186 (thumb32_opcodes): Add dfb.
1188 2020-06-08 Jan Beulich <jbeulich@suse.com>
1190 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1192 2020-06-06 Alan Modra <amodra@gmail.com>
1194 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1196 2020-06-05 Alan Modra <amodra@gmail.com>
1198 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1199 size is large enough.
1201 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1203 * disassemble.c (disassemble_init_for_target): Set endian_code for
1205 * bpf-desc.c: Regenerate.
1206 * bpf-opc.c: Likewise.
1207 * bpf-dis.c: Likewise.
1209 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1211 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1212 (cgen_put_insn_value): Likewise.
1213 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1214 * cgen-dis.in (print_insn): Likewise.
1215 * cgen-ibld.in (insert_1): Likewise.
1216 (insert_1): Likewise.
1217 (insert_insn_normal): Likewise.
1218 (extract_1): Likewise.
1219 * bpf-dis.c: Regenerate.
1220 * bpf-ibld.c: Likewise.
1221 * bpf-ibld.c: Likewise.
1222 * cgen-dis.in: Likewise.
1223 * cgen-ibld.in: Likewise.
1224 * cgen-opc.c: Likewise.
1225 * epiphany-dis.c: Likewise.
1226 * epiphany-ibld.c: Likewise.
1227 * fr30-dis.c: Likewise.
1228 * fr30-ibld.c: Likewise.
1229 * frv-dis.c: Likewise.
1230 * frv-ibld.c: Likewise.
1231 * ip2k-dis.c: Likewise.
1232 * ip2k-ibld.c: Likewise.
1233 * iq2000-dis.c: Likewise.
1234 * iq2000-ibld.c: Likewise.
1235 * lm32-dis.c: Likewise.
1236 * lm32-ibld.c: Likewise.
1237 * m32c-dis.c: Likewise.
1238 * m32c-ibld.c: Likewise.
1239 * m32r-dis.c: Likewise.
1240 * m32r-ibld.c: Likewise.
1241 * mep-dis.c: Likewise.
1242 * mep-ibld.c: Likewise.
1243 * mt-dis.c: Likewise.
1244 * mt-ibld.c: Likewise.
1245 * or1k-dis.c: Likewise.
1246 * or1k-ibld.c: Likewise.
1247 * xc16x-dis.c: Likewise.
1248 * xc16x-ibld.c: Likewise.
1249 * xstormy16-dis.c: Likewise.
1250 * xstormy16-ibld.c: Likewise.
1252 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1254 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1255 (print_insn_): Handle instruction endian.
1256 * bpf-dis.c: Regenerate.
1257 * bpf-desc.c: Regenerate.
1258 * epiphany-dis.c: Likewise.
1259 * epiphany-desc.c: Likewise.
1260 * fr30-dis.c: Likewise.
1261 * fr30-desc.c: Likewise.
1262 * frv-dis.c: Likewise.
1263 * frv-desc.c: Likewise.
1264 * ip2k-dis.c: Likewise.
1265 * ip2k-desc.c: Likewise.
1266 * iq2000-dis.c: Likewise.
1267 * iq2000-desc.c: Likewise.
1268 * lm32-dis.c: Likewise.
1269 * lm32-desc.c: Likewise.
1270 * m32c-dis.c: Likewise.
1271 * m32c-desc.c: Likewise.
1272 * m32r-dis.c: Likewise.
1273 * m32r-desc.c: Likewise.
1274 * mep-dis.c: Likewise.
1275 * mep-desc.c: Likewise.
1276 * mt-dis.c: Likewise.
1277 * mt-desc.c: Likewise.
1278 * or1k-dis.c: Likewise.
1279 * or1k-desc.c: Likewise.
1280 * xc16x-dis.c: Likewise.
1281 * xc16x-desc.c: Likewise.
1282 * xstormy16-dis.c: Likewise.
1283 * xstormy16-desc.c: Likewise.
1285 2020-06-03 Nick Clifton <nickc@redhat.com>
1287 * po/sr.po: Updated Serbian translation.
1289 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1291 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1292 (riscv_get_priv_spec_class): Likewise.
1294 2020-06-01 Alan Modra <amodra@gmail.com>
1296 * bpf-desc.c: Regenerate.
1298 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1299 David Faust <david.faust@oracle.com>
1301 * bpf-desc.c: Regenerate.
1302 * bpf-opc.h: Likewise.
1303 * bpf-opc.c: Likewise.
1304 * bpf-dis.c: Likewise.
1306 2020-05-28 Alan Modra <amodra@gmail.com>
1308 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1311 2020-05-28 Alan Modra <amodra@gmail.com>
1313 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1315 (print_insn_ns32k): Revert last change.
1317 2020-05-28 Nick Clifton <nickc@redhat.com>
1319 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1322 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1324 Fix extraction of signed constants in nios2 disassembler (again).
1326 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1327 extractions of signed fields.
1329 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1331 * s390-opc.txt: Relocate vector load/store instructions with
1332 additional alignment parameter and change architecture level
1333 constraint from z14 to z13.
1335 2020-05-21 Alan Modra <amodra@gmail.com>
1337 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1338 * sparc-dis.c: Likewise.
1339 * tic4x-dis.c: Likewise.
1340 * xtensa-dis.c: Likewise.
1341 * bpf-desc.c: Regenerate.
1342 * epiphany-desc.c: Regenerate.
1343 * fr30-desc.c: Regenerate.
1344 * frv-desc.c: Regenerate.
1345 * ip2k-desc.c: Regenerate.
1346 * iq2000-desc.c: Regenerate.
1347 * lm32-desc.c: Regenerate.
1348 * m32c-desc.c: Regenerate.
1349 * m32r-desc.c: Regenerate.
1350 * mep-asm.c: Regenerate.
1351 * mep-desc.c: Regenerate.
1352 * mt-desc.c: Regenerate.
1353 * or1k-desc.c: Regenerate.
1354 * xc16x-desc.c: Regenerate.
1355 * xstormy16-desc.c: Regenerate.
1357 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1359 * riscv-opc.c (riscv_ext_version_table): The table used to store
1360 all information about the supported spec and the corresponding ISA
1361 versions. Currently, only Zicsr is supported to verify the
1362 correctness of Z sub extension settings. Others will be supported
1363 in the future patches.
1364 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1365 classes and the corresponding strings.
1366 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1367 spec class by giving a ISA spec string.
1368 * riscv-opc.c (struct priv_spec_t): New structure.
1369 (struct priv_spec_t priv_specs): List for all supported privilege spec
1370 classes and the corresponding strings.
1371 (riscv_get_priv_spec_class): New function. Get the corresponding
1372 privilege spec class by giving a spec string.
1373 (riscv_get_priv_spec_name): New function. Get the corresponding
1374 privilege spec string by giving a CSR version class.
1375 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1376 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1377 according to the chosen version. Build a hash table riscv_csr_hash to
1378 store the valid CSR for the chosen pirv verison. Dump the direct
1379 CSR address rather than it's name if it is invalid.
1380 (parse_riscv_dis_option_without_args): New function. Parse the options
1382 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1383 parse the options without arguments first, and then handle the options
1384 with arguments. Add the new option -Mpriv-spec, which has argument.
1385 * riscv-dis.c (print_riscv_disassembler_options): Add description
1386 about the new OBJDUMP option.
1388 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1390 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1391 WC values on POWER10 sync, dcbf and wait instructions.
1392 (insert_pl, extract_pl): New functions.
1393 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1394 (LS3): New , 3-bit L for sync.
1395 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1396 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1397 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1398 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1399 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1400 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1401 <wait>: Enable PL operand on POWER10.
1402 <dcbf>: Enable L3OPT operand on POWER10.
1403 <sync>: Enable SC2 operand on POWER10.
1405 2020-05-19 Stafford Horne <shorne@gmail.com>
1408 * or1k-asm.c: Regenerate.
1409 * or1k-desc.c: Regenerate.
1410 * or1k-desc.h: Regenerate.
1411 * or1k-dis.c: Regenerate.
1412 * or1k-ibld.c: Regenerate.
1413 * or1k-opc.c: Regenerate.
1414 * or1k-opc.h: Regenerate.
1415 * or1k-opinst.c: Regenerate.
1417 2020-05-11 Alan Modra <amodra@gmail.com>
1419 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1422 2020-05-11 Alan Modra <amodra@gmail.com>
1424 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1425 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1427 2020-05-11 Alan Modra <amodra@gmail.com>
1429 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1431 2020-05-11 Alan Modra <amodra@gmail.com>
1433 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1434 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1436 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1438 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1441 2020-05-11 Alan Modra <amodra@gmail.com>
1443 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1444 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1445 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1446 (prefix_opcodes): Add xxeval.
1448 2020-05-11 Alan Modra <amodra@gmail.com>
1450 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1451 xxgenpcvwm, xxgenpcvdm.
1453 2020-05-11 Alan Modra <amodra@gmail.com>
1455 * ppc-opc.c (MP, VXVAM_MASK): Define.
1456 (VXVAPS_MASK): Use VXVA_MASK.
1457 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1458 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1459 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1460 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1462 2020-05-11 Alan Modra <amodra@gmail.com>
1463 Peter Bergner <bergner@linux.ibm.com>
1465 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1467 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1468 YMSK2, XA6a, XA6ap, XB6a entries.
1469 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1470 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1472 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1473 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1474 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1475 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1476 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1477 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1478 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1479 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1480 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1481 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1482 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1483 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1484 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1485 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1487 2020-05-11 Alan Modra <amodra@gmail.com>
1489 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1490 (insert_xts, extract_xts): New functions.
1491 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1492 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1493 (VXRC_MASK, VXSH_MASK): Define.
1494 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1495 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1496 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1497 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1498 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1499 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1500 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1502 2020-05-11 Alan Modra <amodra@gmail.com>
1504 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1505 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1506 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1507 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1508 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1510 2020-05-11 Alan Modra <amodra@gmail.com>
1512 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1513 (XTP, DQXP, DQXP_MASK): Define.
1514 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1515 (prefix_opcodes): Add plxvp and pstxvp.
1517 2020-05-11 Alan Modra <amodra@gmail.com>
1519 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1520 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1521 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1523 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1525 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1527 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1529 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1531 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1533 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1535 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1537 2020-05-11 Alan Modra <amodra@gmail.com>
1539 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1541 2020-05-11 Alan Modra <amodra@gmail.com>
1543 * ppc-dis.c (ppc_opts): Add "power10" entry.
1544 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1545 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1547 2020-05-11 Nick Clifton <nickc@redhat.com>
1549 * po/fr.po: Updated French translation.
1551 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1553 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1554 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1555 (operand_general_constraint_met_p): validate
1556 AARCH64_OPND_UNDEFINED.
1557 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1559 * aarch64-asm-2.c: Regenerated.
1560 * aarch64-dis-2.c: Regenerated.
1561 * aarch64-opc-2.c: Regenerated.
1563 2020-04-29 Nick Clifton <nickc@redhat.com>
1566 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1569 2020-04-29 Nick Clifton <nickc@redhat.com>
1571 * po/sv.po: Updated Swedish translation.
1573 2020-04-29 Nick Clifton <nickc@redhat.com>
1576 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1577 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1578 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1581 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1584 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1585 cmpi only on m68020up and cpu32.
1587 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1589 * aarch64-asm.c (aarch64_ins_none): New.
1590 * aarch64-asm.h (ins_none): New declaration.
1591 * aarch64-dis.c (aarch64_ext_none): New.
1592 * aarch64-dis.h (ext_none): New declaration.
1593 * aarch64-opc.c (aarch64_print_operand): Update case for
1594 AARCH64_OPND_BARRIER_PSB.
1595 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1596 (AARCH64_OPERANDS): Update inserter/extracter for
1597 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1598 * aarch64-asm-2.c: Regenerated.
1599 * aarch64-dis-2.c: Regenerated.
1600 * aarch64-opc-2.c: Regenerated.
1602 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1604 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1605 (aarch64_feature_ras, RAS): Likewise.
1606 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1607 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1608 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1609 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1610 * aarch64-asm-2.c: Regenerated.
1611 * aarch64-dis-2.c: Regenerated.
1612 * aarch64-opc-2.c: Regenerated.
1614 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1616 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1617 (print_insn_neon): Support disassembly of conditional
1620 2020-02-16 David Faust <david.faust@oracle.com>
1622 * bpf-desc.c: Regenerate.
1623 * bpf-desc.h: Likewise.
1624 * bpf-opc.c: Regenerate.
1625 * bpf-opc.h: Likewise.
1627 2020-04-07 Lili Cui <lili.cui@intel.com>
1629 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1630 (prefix_table): New instructions (see prefixes above).
1631 (rm_table): Likewise
1632 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1633 CPU_ANY_TSXLDTRK_FLAGS.
1634 (cpu_flags): Add CpuTSXLDTRK.
1635 * i386-opc.h (enum): Add CpuTSXLDTRK.
1636 (i386_cpu_flags): Add cputsxldtrk.
1637 * i386-opc.tbl: Add XSUSPLDTRK insns.
1638 * i386-init.h: Regenerate.
1639 * i386-tbl.h: Likewise.
1641 2020-04-02 Lili Cui <lili.cui@intel.com>
1643 * i386-dis.c (prefix_table): New instructions serialize.
1644 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1645 CPU_ANY_SERIALIZE_FLAGS.
1646 (cpu_flags): Add CpuSERIALIZE.
1647 * i386-opc.h (enum): Add CpuSERIALIZE.
1648 (i386_cpu_flags): Add cpuserialize.
1649 * i386-opc.tbl: Add SERIALIZE insns.
1650 * i386-init.h: Regenerate.
1651 * i386-tbl.h: Likewise.
1653 2020-03-26 Alan Modra <amodra@gmail.com>
1655 * disassemble.h (opcodes_assert): Declare.
1656 (OPCODES_ASSERT): Define.
1657 * disassemble.c: Don't include assert.h. Include opintl.h.
1658 (opcodes_assert): New function.
1659 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1660 (bfd_h8_disassemble): Reduce size of data array. Correctly
1661 calculate maxlen. Omit insn decoding when insn length exceeds
1662 maxlen. Exit from nibble loop when looking for E, before
1663 accessing next data byte. Move processing of E outside loop.
1664 Replace tests of maxlen in loop with assertions.
1666 2020-03-26 Alan Modra <amodra@gmail.com>
1668 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1670 2020-03-25 Alan Modra <amodra@gmail.com>
1672 * z80-dis.c (suffix): Init mybuf.
1674 2020-03-22 Alan Modra <amodra@gmail.com>
1676 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1677 successflly read from section.
1679 2020-03-22 Alan Modra <amodra@gmail.com>
1681 * arc-dis.c (find_format): Use ISO C string concatenation rather
1682 than line continuation within a string. Don't access needs_limm
1683 before testing opcode != NULL.
1685 2020-03-22 Alan Modra <amodra@gmail.com>
1687 * ns32k-dis.c (print_insn_arg): Update comment.
1688 (print_insn_ns32k): Reduce size of index_offset array, and
1689 initialize, passing -1 to print_insn_arg for args that are not
1690 an index. Don't exit arg loop early. Abort on bad arg number.
1692 2020-03-22 Alan Modra <amodra@gmail.com>
1694 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1695 * s12z-opc.c: Formatting.
1696 (operands_f): Return an int.
1697 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1698 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1699 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1700 (exg_sex_discrim): Likewise.
1701 (create_immediate_operand, create_bitfield_operand),
1702 (create_register_operand_with_size, create_register_all_operand),
1703 (create_register_all16_operand, create_simple_memory_operand),
1704 (create_memory_operand, create_memory_auto_operand): Don't
1705 segfault on malloc failure.
1706 (z_ext24_decode): Return an int status, negative on fail, zero
1708 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1709 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1710 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1711 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1712 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1713 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1714 (loop_primitive_decode, shift_decode, psh_pul_decode),
1715 (bit_field_decode): Similarly.
1716 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1717 to return value, update callers.
1718 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1719 Don't segfault on NULL operand.
1720 (decode_operation): Return OP_INVALID on first fail.
1721 (decode_s12z): Check all reads, returning -1 on fail.
1723 2020-03-20 Alan Modra <amodra@gmail.com>
1725 * metag-dis.c (print_insn_metag): Don't ignore status from
1728 2020-03-20 Alan Modra <amodra@gmail.com>
1730 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1731 Initialize parts of buffer not written when handling a possible
1732 2-byte insn at end of section. Don't attempt decoding of such
1733 an insn by the 4-byte machinery.
1735 2020-03-20 Alan Modra <amodra@gmail.com>
1737 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1738 partially filled buffer. Prevent lookup of 4-byte insns when
1739 only VLE 2-byte insns are possible due to section size. Print
1740 ".word" rather than ".long" for 2-byte leftovers.
1742 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1745 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1747 2020-03-13 Jan Beulich <jbeulich@suse.com>
1749 * i386-dis.c (X86_64_0D): Rename to ...
1750 (X86_64_0E): ... this.
1752 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1754 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1755 * Makefile.in: Regenerated.
1757 2020-03-09 Jan Beulich <jbeulich@suse.com>
1759 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1761 * i386-tbl.h: Re-generate.
1763 2020-03-09 Jan Beulich <jbeulich@suse.com>
1765 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1766 vprot*, vpsha*, and vpshl*.
1767 * i386-tbl.h: Re-generate.
1769 2020-03-09 Jan Beulich <jbeulich@suse.com>
1771 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1772 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1773 * i386-tbl.h: Re-generate.
1775 2020-03-09 Jan Beulich <jbeulich@suse.com>
1777 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1778 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1779 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1780 * i386-tbl.h: Re-generate.
1782 2020-03-09 Jan Beulich <jbeulich@suse.com>
1784 * i386-gen.c (struct template_arg, struct template_instance,
1785 struct template_param, struct template, templates,
1786 parse_template, expand_templates): New.
1787 (process_i386_opcodes): Various local variables moved to
1788 expand_templates. Call parse_template and expand_templates.
1789 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1790 * i386-tbl.h: Re-generate.
1792 2020-03-06 Jan Beulich <jbeulich@suse.com>
1794 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1795 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1796 register and memory source templates. Replace VexW= by VexW*
1798 * i386-tbl.h: Re-generate.
1800 2020-03-06 Jan Beulich <jbeulich@suse.com>
1802 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1803 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1804 * i386-tbl.h: Re-generate.
1806 2020-03-06 Jan Beulich <jbeulich@suse.com>
1808 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1809 * i386-tbl.h: Re-generate.
1811 2020-03-06 Jan Beulich <jbeulich@suse.com>
1813 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1814 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1815 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1816 VexW0 on SSE2AVX variants.
1817 (vmovq): Drop NoRex64 from XMM/XMM variants.
1818 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1819 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1820 applicable use VexW0.
1821 * i386-tbl.h: Re-generate.
1823 2020-03-06 Jan Beulich <jbeulich@suse.com>
1825 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1826 * i386-opc.h (Rex64): Delete.
1827 (struct i386_opcode_modifier): Remove rex64 field.
1828 * i386-opc.tbl (crc32): Drop Rex64.
1829 Replace Rex64 with Size64 everywhere else.
1830 * i386-tbl.h: Re-generate.
1832 2020-03-06 Jan Beulich <jbeulich@suse.com>
1834 * i386-dis.c (OP_E_memory): Exclude recording of used address
1835 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1836 addressed memory operands for MPX insns.
1838 2020-03-06 Jan Beulich <jbeulich@suse.com>
1840 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
1841 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
1842 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
1843 (ptwrite): Split into non-64-bit and 64-bit forms.
1844 * i386-tbl.h: Re-generate.
1846 2020-03-06 Jan Beulich <jbeulich@suse.com>
1848 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
1850 * i386-tbl.h: Re-generate.
1852 2020-03-04 Jan Beulich <jbeulich@suse.com>
1854 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
1855 (prefix_table): Move vmmcall here. Add vmgexit.
1856 (rm_table): Replace vmmcall entry by prefix_table[] escape.
1857 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
1858 (cpu_flags): Add CpuSEV_ES entry.
1859 * i386-opc.h (CpuSEV_ES): New.
1860 (union i386_cpu_flags): Add cpusev_es field.
1861 * i386-opc.tbl (vmgexit): New.
1862 * i386-init.h, i386-tbl.h: Re-generate.
1864 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1866 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
1868 * i386-opc.h (IGNORESIZE): New.
1869 (DEFAULTSIZE): Likewise.
1870 (IgnoreSize): Removed.
1871 (DefaultSize): Likewise.
1872 (MnemonicSize): New.
1873 (i386_opcode_modifier): Replace ignoresize/defaultsize with
1875 * i386-opc.tbl (IgnoreSize): New.
1876 (DefaultSize): Likewise.
1877 * i386-tbl.h: Regenerated.
1879 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1882 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
1885 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1888 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
1889 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
1890 * i386-tbl.h: Regenerated.
1892 2020-02-26 Alan Modra <amodra@gmail.com>
1894 * aarch64-asm.c: Indent labels correctly.
1895 * aarch64-dis.c: Likewise.
1896 * aarch64-gen.c: Likewise.
1897 * aarch64-opc.c: Likewise.
1898 * alpha-dis.c: Likewise.
1899 * i386-dis.c: Likewise.
1900 * nds32-asm.c: Likewise.
1901 * nfp-dis.c: Likewise.
1902 * visium-dis.c: Likewise.
1904 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
1906 * arc-regs.h (int_vector_base): Make it available for all ARC
1909 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
1911 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
1914 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
1916 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
1917 c.mv/c.li if rs1 is zero.
1919 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
1921 * i386-gen.c (cpu_flag_init): Replace CpuABM with
1922 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
1924 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
1925 * i386-opc.h (CpuABM): Removed.
1927 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
1928 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
1929 popcnt. Remove CpuABM from lzcnt.
1930 * i386-init.h: Regenerated.
1931 * i386-tbl.h: Likewise.
1933 2020-02-17 Jan Beulich <jbeulich@suse.com>
1935 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
1936 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
1937 VexW1 instead of open-coding them.
1938 * i386-tbl.h: Re-generate.
1940 2020-02-17 Jan Beulich <jbeulich@suse.com>
1942 * i386-opc.tbl (AddrPrefixOpReg): Define.
1943 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
1944 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
1945 templates. Drop NoRex64.
1946 * i386-tbl.h: Re-generate.
1948 2020-02-17 Jan Beulich <jbeulich@suse.com>
1951 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
1952 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
1953 into Intel syntax instance (with Unpsecified) and AT&T one
1955 (vcvtneps2bf16): Likewise, along with folding the two so far
1957 * i386-tbl.h: Re-generate.
1959 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
1961 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
1962 CPU_ANY_SSE4A_FLAGS.
1964 2020-02-17 Alan Modra <amodra@gmail.com>
1966 * i386-gen.c (cpu_flag_init): Correct last change.
1968 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
1970 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
1973 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
1975 * i386-opc.tbl (movsx): Remove Intel syntax comments.
1978 2020-02-14 Jan Beulich <jbeulich@suse.com>
1981 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
1982 destination for Cpu64-only variant.
1983 (movzx): Fold patterns.
1984 * i386-tbl.h: Re-generate.
1986 2020-02-13 Jan Beulich <jbeulich@suse.com>
1988 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
1989 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
1990 CPU_ANY_SSE4_FLAGS entry.
1991 * i386-init.h: Re-generate.
1993 2020-02-12 Jan Beulich <jbeulich@suse.com>
1995 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
1996 with Unspecified, making the present one AT&T syntax only.
1997 * i386-tbl.h: Re-generate.
1999 2020-02-12 Jan Beulich <jbeulich@suse.com>
2001 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2002 * i386-tbl.h: Re-generate.
2004 2020-02-12 Jan Beulich <jbeulich@suse.com>
2007 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2008 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2009 Amd64 and Intel64 templates.
2010 (call, jmp): Likewise for far indirect variants. Dro
2012 * i386-tbl.h: Re-generate.
2014 2020-02-11 Jan Beulich <jbeulich@suse.com>
2016 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2017 * i386-opc.h (ShortForm): Delete.
2018 (struct i386_opcode_modifier): Remove shortform field.
2019 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2020 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2021 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2022 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2024 * i386-tbl.h: Re-generate.
2026 2020-02-11 Jan Beulich <jbeulich@suse.com>
2028 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2029 fucompi): Drop ShortForm from operand-less templates.
2030 * i386-tbl.h: Re-generate.
2032 2020-02-11 Alan Modra <amodra@gmail.com>
2034 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2035 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2036 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2037 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2038 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2040 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2042 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2043 (cde_opcodes): Add VCX* instructions.
2045 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2046 Matthew Malcomson <matthew.malcomson@arm.com>
2048 * arm-dis.c (struct cdeopcode32): New.
2049 (CDE_OPCODE): New macro.
2050 (cde_opcodes): New disassembly table.
2051 (regnames): New option to table.
2052 (cde_coprocs): New global variable.
2053 (print_insn_cde): New
2054 (print_insn_thumb32): Use print_insn_cde.
2055 (parse_arm_disassembler_options): Parse coprocN args.
2057 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2060 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2062 * i386-opc.h (AMD64): Removed.
2063 (Intel64): Likewose.
2065 (INTEL64): Likewise.
2066 (INTEL64ONLY): Likewise.
2067 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2068 * i386-opc.tbl (Amd64): New.
2069 (Intel64): Likewise.
2070 (Intel64Only): Likewise.
2071 Replace AMD64 with Amd64. Update sysenter/sysenter with
2072 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2073 * i386-tbl.h: Regenerated.
2075 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2078 * z80-dis.c: Add support for GBZ80 opcodes.
2080 2020-02-04 Alan Modra <amodra@gmail.com>
2082 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2084 2020-02-03 Alan Modra <amodra@gmail.com>
2086 * m32c-ibld.c: Regenerate.
2088 2020-02-01 Alan Modra <amodra@gmail.com>
2090 * frv-ibld.c: Regenerate.
2092 2020-01-31 Jan Beulich <jbeulich@suse.com>
2094 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2095 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2096 (OP_E_memory): Replace xmm_mdq_mode case label by
2097 vex_scalar_w_dq_mode one.
2098 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2100 2020-01-31 Jan Beulich <jbeulich@suse.com>
2102 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2103 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2104 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2105 (intel_operand_size): Drop vex_w_dq_mode case label.
2107 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2109 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2110 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2112 2020-01-30 Alan Modra <amodra@gmail.com>
2114 * m32c-ibld.c: Regenerate.
2116 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2118 * bpf-opc.c: Regenerate.
2120 2020-01-30 Jan Beulich <jbeulich@suse.com>
2122 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2123 (dis386): Use them to replace C2/C3 table entries.
2124 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2125 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2126 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2127 * i386-tbl.h: Re-generate.
2129 2020-01-30 Jan Beulich <jbeulich@suse.com>
2131 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2133 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2135 * i386-tbl.h: Re-generate.
2137 2020-01-30 Alan Modra <amodra@gmail.com>
2139 * tic4x-dis.c (tic4x_dp): Make unsigned.
2141 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2142 Jan Beulich <jbeulich@suse.com>
2145 * i386-dis.c (MOVSXD_Fixup): New function.
2146 (movsxd_mode): New enum.
2147 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2148 (intel_operand_size): Handle movsxd_mode.
2149 (OP_E_register): Likewise.
2151 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2152 register on movsxd. Add movsxd with 16-bit destination register
2153 for AMD64 and Intel64 ISAs.
2154 * i386-tbl.h: Regenerated.
2156 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2159 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2160 * aarch64-asm-2.c: Regenerate
2161 * aarch64-dis-2.c: Likewise.
2162 * aarch64-opc-2.c: Likewise.
2164 2020-01-21 Jan Beulich <jbeulich@suse.com>
2166 * i386-opc.tbl (sysret): Drop DefaultSize.
2167 * i386-tbl.h: Re-generate.
2169 2020-01-21 Jan Beulich <jbeulich@suse.com>
2171 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2173 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2174 * i386-tbl.h: Re-generate.
2176 2020-01-20 Nick Clifton <nickc@redhat.com>
2178 * po/de.po: Updated German translation.
2179 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2180 * po/uk.po: Updated Ukranian translation.
2182 2020-01-20 Alan Modra <amodra@gmail.com>
2184 * hppa-dis.c (fput_const): Remove useless cast.
2186 2020-01-20 Alan Modra <amodra@gmail.com>
2188 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2190 2020-01-18 Nick Clifton <nickc@redhat.com>
2192 * configure: Regenerate.
2193 * po/opcodes.pot: Regenerate.
2195 2020-01-18 Nick Clifton <nickc@redhat.com>
2197 Binutils 2.34 branch created.
2199 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2201 * opintl.h: Fix spelling error (seperate).
2203 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2205 * i386-opc.tbl: Add {vex} pseudo prefix.
2206 * i386-tbl.h: Regenerated.
2208 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2211 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2212 (neon_opcodes): Likewise.
2213 (select_arm_features): Make sure we enable MVE bits when selecting
2214 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2217 2020-01-16 Jan Beulich <jbeulich@suse.com>
2219 * i386-opc.tbl: Drop stale comment from XOP section.
2221 2020-01-16 Jan Beulich <jbeulich@suse.com>
2223 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2224 (extractps): Add VexWIG to SSE2AVX forms.
2225 * i386-tbl.h: Re-generate.
2227 2020-01-16 Jan Beulich <jbeulich@suse.com>
2229 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2230 Size64 from and use VexW1 on SSE2AVX forms.
2231 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2232 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2233 * i386-tbl.h: Re-generate.
2235 2020-01-15 Alan Modra <amodra@gmail.com>
2237 * tic4x-dis.c (tic4x_version): Make unsigned long.
2238 (optab, optab_special, registernames): New file scope vars.
2239 (tic4x_print_register): Set up registernames rather than
2240 malloc'd registertable.
2241 (tic4x_disassemble): Delete optable and optable_special. Use
2242 optab and optab_special instead. Throw away old optab,
2243 optab_special and registernames when info->mach changes.
2245 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2248 * z80-dis.c (suffix): Use .db instruction to generate double
2251 2020-01-14 Alan Modra <amodra@gmail.com>
2253 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2254 values to unsigned before shifting.
2256 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2258 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2260 (print_insn_thumb16, print_insn_thumb32): Likewise.
2261 (print_insn): Initialize the insn info.
2262 * i386-dis.c (print_insn): Initialize the insn info fields, and
2265 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2267 * arc-opc.c (C_NE): Make it required.
2269 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2271 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2272 reserved register name.
2274 2020-01-13 Alan Modra <amodra@gmail.com>
2276 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2277 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2279 2020-01-13 Alan Modra <amodra@gmail.com>
2281 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2282 result of wasm_read_leb128 in a uint64_t and check that bits
2283 are not lost when copying to other locals. Use uint32_t for
2284 most locals. Use PRId64 when printing int64_t.
2286 2020-01-13 Alan Modra <amodra@gmail.com>
2288 * score-dis.c: Formatting.
2289 * score7-dis.c: Formatting.
2291 2020-01-13 Alan Modra <amodra@gmail.com>
2293 * score-dis.c (print_insn_score48): Use unsigned variables for
2294 unsigned values. Don't left shift negative values.
2295 (print_insn_score32): Likewise.
2296 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2298 2020-01-13 Alan Modra <amodra@gmail.com>
2300 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2302 2020-01-13 Alan Modra <amodra@gmail.com>
2304 * fr30-ibld.c: Regenerate.
2306 2020-01-13 Alan Modra <amodra@gmail.com>
2308 * xgate-dis.c (print_insn): Don't left shift signed value.
2309 (ripBits): Formatting, use 1u.
2311 2020-01-10 Alan Modra <amodra@gmail.com>
2313 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2314 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2316 2020-01-10 Alan Modra <amodra@gmail.com>
2318 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2319 and XRREG value earlier to avoid a shift with negative exponent.
2320 * m10200-dis.c (disassemble): Similarly.
2322 2020-01-09 Nick Clifton <nickc@redhat.com>
2325 * z80-dis.c (ld_ii_ii): Use correct cast.
2327 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2330 * z80-dis.c (ld_ii_ii): Use character constant when checking
2333 2020-01-09 Jan Beulich <jbeulich@suse.com>
2335 * i386-dis.c (SEP_Fixup): New.
2337 (dis386_twobyte): Use it for sysenter/sysexit.
2338 (enum x86_64_isa): Change amd64 enumerator to value 1.
2339 (OP_J): Compare isa64 against intel64 instead of amd64.
2340 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2342 * i386-tbl.h: Re-generate.
2344 2020-01-08 Alan Modra <amodra@gmail.com>
2346 * z8k-dis.c: Include libiberty.h
2347 (instr_data_s): Make max_fetched unsigned.
2348 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2349 Don't exceed byte_info bounds.
2350 (output_instr): Make num_bytes unsigned.
2351 (unpack_instr): Likewise for nibl_count and loop.
2352 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2354 * z8k-opc.h: Regenerate.
2356 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2358 * arc-tbl.h (llock): Use 'LLOCK' as class.
2360 (scond): Use 'SCOND' as class.
2362 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2365 2020-01-06 Alan Modra <amodra@gmail.com>
2367 * m32c-ibld.c: Regenerate.
2369 2020-01-06 Alan Modra <amodra@gmail.com>
2372 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2373 Peek at next byte to prevent recursion on repeated prefix bytes.
2374 Ensure uninitialised "mybuf" is not accessed.
2375 (print_insn_z80): Don't zero n_fetch and n_used here,..
2376 (print_insn_z80_buf): ..do it here instead.
2378 2020-01-04 Alan Modra <amodra@gmail.com>
2380 * m32r-ibld.c: Regenerate.
2382 2020-01-04 Alan Modra <amodra@gmail.com>
2384 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2386 2020-01-04 Alan Modra <amodra@gmail.com>
2388 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2390 2020-01-04 Alan Modra <amodra@gmail.com>
2392 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2394 2020-01-03 Jan Beulich <jbeulich@suse.com>
2396 * aarch64-tbl.h (aarch64_opcode_table): Use
2397 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2399 2020-01-03 Jan Beulich <jbeulich@suse.com>
2401 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2402 forms of SUDOT and USDOT.
2404 2020-01-03 Jan Beulich <jbeulich@suse.com>
2406 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2408 * opcodes/aarch64-dis-2.c: Re-generate.
2410 2020-01-03 Jan Beulich <jbeulich@suse.com>
2412 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2414 * opcodes/aarch64-dis-2.c: Re-generate.
2416 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2418 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2420 2020-01-01 Alan Modra <amodra@gmail.com>
2422 Update year range in copyright notice of all files.
2424 For older changes see ChangeLog-2019
2426 Copyright (C) 2020 Free Software Foundation, Inc.
2428 Copying and distribution of this file, with or without modification,
2429 are permitted in any medium without royalty provided the copyright
2430 notice and this notice are preserved.
2436 version-control: never
projects / thirdparty / binutils-gdb.git / blob