1 2012-11-05 Alan Modra <amodra@gmail.com>
3 * configure.in: Apply 2012-09-10 change to config.in here.
5 2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
7 * s390-mkopc.c: Accept empty lines in s390-opc.txt.
8 * s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2
10 * s390-opc.txt: Add new instructions. New instruction type for lptea.
12 2012-10-26 Christian Groessler <chris@groessler.org>
14 * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
15 trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove
16 non-existing opcode trtrb.
17 * z8k-opc.h: Regenerate.
19 2012-10-26 Alan Modra <amodra@gmail.com>
21 * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
23 2012-10-24 Roland McGrath <mcgrathr@google.com>
25 * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
28 2012-10-22 Peter Bergner <bergner@vnet.ibm.com>
30 * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
32 2012-10-18 Tom Tromey <tromey@redhat.com>
34 * tic54x-dis.c (print_instruction): Don't use K&R style.
35 (print_parallel_instruction, sprint_dual_address)
36 (sprint_indirect_address, sprint_direct_address, sprint_mmr)
37 (sprint_cc2, sprint_condition): Likewise.
39 2012-10-18 Kai Tietz <ktietz@redhat.com>
41 * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
43 (do_special_encoding): Likewise.
44 (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
45 variables with default.
46 * arc-dis.c (write_comments_): Don't use strncat due
47 size of state->commentBuffer pointer isn't predictable.
49 2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
51 * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
52 rmr_el3; remove daifset and daifclr.
54 2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
56 * aarch64-opc.c (operand_general_constraint_met_p): Change to check
57 the alignment of addr.offset.imm instead of that of shifter.amount for
58 operand type AARCH64_OPND_ADDR_UIMM12.
60 2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
62 * arm-dis.c: Use preferred form of vrint instruction variants
65 2012-10-09 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
67 * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
68 * i386-init.h: Regenerated.
70 2012-10-05 Peter Bergner <bergner@vnet.ibm.com>
72 * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
73 * ppc-opc.c (VBA): New define.
74 (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
75 mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
77 2012-10-04 Nick Clifton <nickc@redhat.com>
79 * v850-dis.c (disassemble): Place square parentheses around second
80 register operand of clr1, not1, set1 and tst1 instructions.
82 2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
84 * s390-mkopc.c: Support new option zEC12.
85 * s390-opc.c: Add new instruction formats.
86 * s390-opc.txt: Add new instructions for zEC12.
88 2012-09-27 Anthony Green <green@moxielogic.com>
90 * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
91 * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
93 2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
95 * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
96 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
98 * i386-init.h: Regenerated.
100 2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
102 * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
103 CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
104 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
105 CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
106 (cpu_flags): Add CpuCX16.
107 * i386-opc.h (CpuCX16): New.
108 (i386_cpu_flags): Add cpucx16.
109 * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
110 * i386-tbl.h: Regenerate.
111 * i386-init.h: Likewise.
113 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
115 * arm-dis.c: Changed ldra and strl-form mnemonics
118 2012-09-18 Chao-ying Fu <fu@mips.com>
120 * micromips-opc.c (micromips_opcodes): Correct the encoding of
121 the "swxc1" instruction.
123 2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
125 * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
126 the parameter 'inst'.
127 (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
128 (convert_mov_to_movewide): Change to assert (0) when
129 aarch64_wide_constant_p returns FALSE.
131 2012-09-14 David Edelsohn <dje.gcc@gmail.com>
133 * configure: Regenerate.
135 2012-09-14 Anthony Green <green@moxielogic.com>
137 * moxie-dis.c (print_insn_moxie): Branch targets are relative to
138 the address after the branch instruction.
140 2012-09-13 Anthony Green <green@moxielogic.com>
142 * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
144 2012-09-10 Matthias Klose <doko@ubuntu.com>
146 * config.in: Disable sanity check for kfreebsd.
148 2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
150 * configure: Regenerated.
152 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
154 * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
155 * ia64-gen.c: Promote completer index type to longlong.
156 (irf_operand): Add new register recognition.
157 (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
158 (lookup_specifier): Add new resource recognition.
159 (insert_bit_table_ent): Relax abort condition according to the
160 changed completer index type.
161 (print_dis_table): Fix printf format for completer index.
162 * ia64-ic.tbl: Add a new instruction class.
163 * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
164 * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
165 * ia64-opc.h: Define short names for new operand types.
166 * ia64-raw.tbl: Add new RAW resource for DAHR register.
167 * ia64-waw.tbl: Add new WAW resource for DAHR register.
168 * ia64-asmtab.c: Regenerate.
170 2012-08-29 Peter Bergner <bergner@vnet.ibm.com>
172 * ppc-opc.c (VXASHB_MASK): New define.
173 (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
175 2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
177 * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
178 VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
179 (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
180 vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
181 vupklsh>: Use VXVA_MASK.
182 <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
183 <mfvscr>: Use VXVAVB_MASK.
184 <mtvscr>: Use VXVDVA_MASK.
185 <vspltb>: Use VXUIMM4_MASK.
186 <vsplth>: Use VXUIMM3_MASK.
187 <vspltw>: Use VXUIMM2_MASK.
189 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
191 * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
193 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
195 * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
197 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
199 * arm-dis.c (neon_opcodes): Handle VMULL.P64.
201 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
203 * arm-dis.c (neon_opcodes): Add support for AES instructions.
205 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
207 * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
210 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
212 * arm-dis.c (coprocessor_opcodes): Add VRINT.
213 (neon_opcodes): Likewise.
215 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
217 * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
219 (neon_opcodes): Likewise.
221 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
223 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
224 (neon_opcodes): Likewise.
226 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
228 * arm-dis.c (coprocessor_opcodes): Add VSEL.
229 (print_insn_coprocessor): Add new %<>c bitfield format
232 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
234 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
235 (thumb32_opcodes): Likewise.
236 (print_arm_insn): Add support for %<>T formatter.
238 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
240 * arm-dis.c (arm_opcodes): Add HLT.
241 (thumb_opcodes): Likewise.
243 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
245 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
247 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
249 * arm-dis.c (arm_opcodes): Add SEVL.
250 (thumb_opcodes): Likewise.
251 (thumb32_opcodes): Likewise.
253 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
255 * arm-dis.c (data_barrier_option): New function.
256 (print_insn_arm): Use data_barrier_option.
257 (print_insn_thumb32): Use data_barrier_option.
259 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
261 * arm-dis.c (COND_UNCOND): New constant.
262 (print_insn_coprocessor): Add support for %u format specifier.
263 (print_insn_neon): Likewise.
265 2012-08-21 David S. Miller <davem@davemloft.net>
267 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
270 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
272 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
273 vabsduh, vabsduw, mviwsplt.
275 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
277 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
280 * i386-opc.h: Update CpuPRFCHW comment.
282 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
283 * i386-init.h: Regenerated.
284 * i386-tbl.h: Likewise.
286 2012-08-17 Nick Clifton <nickc@redhat.com>
288 * po/uk.po: New Ukranian translation.
289 * configure.in (ALL_LINGUAS): Add uk.
290 * configure: Regenerate.
292 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
294 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
295 RBX for the third operand.
296 <"lswi">: Use RAX for second and NBI for the third operand.
298 2012-08-15 DJ Delorie <dj@redhat.com>
300 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
301 operands, so that data addresses can be corrected when not
303 * rl78-decode.c: Regenerate.
304 * rl78-dis.c (print_insn_rl78): Make order of modifiers
305 irrelevent. When the 'e' specifier is used on an operand and no
306 ES prefix is provided, adjust address to make it absolute.
308 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
310 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
312 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
314 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
316 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
318 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
319 macros, use local variables for info struct member accesses,
320 update the type of the variable used to hold the instruction
322 (print_insn_mips, print_mips16_insn_arg): Likewise.
323 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
324 local variables for info struct member accesses.
325 (print_insn_micromips): Add GET_OP_S local macro.
326 (_print_insn_mips): Update the type of the variable used to hold
327 the instruction word.
329 2012-08-13 Ian Bolton <ian.bolton@arm.com>
330 Laurent Desnogues <laurent.desnogues@arm.com>
331 Jim MacArthur <jim.macarthur@arm.com>
332 Marcus Shawcroft <marcus.shawcroft@arm.com>
333 Nigel Stephens <nigel.stephens@arm.com>
334 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
335 Richard Earnshaw <rearnsha@arm.com>
336 Sofiane Naci <sofiane.naci@arm.com>
337 Tejas Belagod <tejas.belagod@arm.com>
338 Yufeng Zhang <yufeng.zhang@arm.com>
340 * Makefile.am: Add AArch64.
341 * Makefile.in: Regenerate.
342 * aarch64-asm.c: New file.
343 * aarch64-asm.h: New file.
344 * aarch64-dis.c: New file.
345 * aarch64-dis.h: New file.
346 * aarch64-gen.c: New file.
347 * aarch64-opc.c: New file.
348 * aarch64-opc.h: New file.
349 * aarch64-tbl.h: New file.
350 * configure.in: Add AArch64.
351 * configure: Regenerate.
352 * disassemble.c: Add AArch64.
353 * aarch64-asm-2.c: New file (automatically generated).
354 * aarch64-dis-2.c: New file (automatically generated).
355 * aarch64-opc-2.c: New file (automatically generated).
356 * po/POTFILES.in: Regenerate.
358 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
360 * micromips-opc.c (micromips_opcodes): Update comment.
361 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
362 instructions for IOCT as appropriate.
363 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
365 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
366 the result of a check for the -Wno-missing-field-initializers
368 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
369 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
371 (mips16-opc.lo): Likewise.
372 (micromips-opc.lo): Likewise.
373 * aclocal.m4: Regenerate.
374 * configure: Regenerate.
375 * Makefile.in: Regenerate.
377 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
380 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
381 * i386-init.h: Regenerated.
383 2012-08-09 Nick Clifton <nickc@redhat.com>
385 * po/vi.po: Updated Vietnamese translation.
387 2012-08-07 Roland McGrath <mcgrathr@google.com>
389 * i386-dis.c (reg_table): Fill out REG_0F0D table with
390 AMD-reserved cases as "prefetch".
391 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
392 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
393 (reg_table): Use those under REG_0F18.
394 (mod_table): Add those cases as "nop/reserved".
396 2012-08-07 Jan Beulich <jbeulich@suse.com>
398 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
400 2012-08-06 Roland McGrath <mcgrathr@google.com>
402 * i386-dis.c (print_insn): Print spaces between multiple excess
403 prefixes. Return actual number of excess prefixes consumed,
406 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
408 2012-08-06 Roland McGrath <mcgrathr@google.com>
409 Victor Khimenko <khim@google.com>
410 H.J. Lu <hongjiu.lu@intel.com>
412 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
413 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
414 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
415 (OP_E_register): Likewise.
416 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
418 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
420 * configure.in: Formatting.
421 * configure: Regenerate.
423 2012-08-01 Alan Modra <amodra@gmail.com>
425 * h8300-dis.c: Fix printf arg warnings.
426 * i960-dis.c: Likewise.
427 * mips-dis.c: Likewise.
428 * pdp11-dis.c: Likewise.
429 * sh-dis.c: Likewise.
430 * v850-dis.c: Likewise.
431 * configure.in: Formatting.
432 * configure: Regenerate.
433 * rl78-decode.c: Regenerate.
434 * po/POTFILES.in: Regenerate.
436 2012-07-31 Chao-Ying Fu <fu@mips.com>
437 Catherine Moore <clm@codesourcery.com>
438 Maciej W. Rozycki <macro@codesourcery.com>
440 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
441 (DSP_VOLA): Likewise.
442 (D32, D33): Likewise.
443 (micromips_opcodes): Add DSP ASE instructions.
444 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
445 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
447 2012-07-31 Jan Beulich <jbeulich@suse.com>
449 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
450 instruction group. Mark as requiring AVX2.
451 * i386-tbl.h: Re-generate.
453 2012-07-30 Nick Clifton <nickc@redhat.com>
455 * po/opcodes.pot: Updated template.
456 * po/es.po: Updated Spanish translation.
457 * po/fi.po: Updated Finnish translation.
459 2012-07-27 Mike Frysinger <vapier@gentoo.org>
461 * configure.in (BFD_VERSION): Run bfd/configure --version and
462 parse the output of that.
463 * configure: Regenerate.
465 2012-07-25 James Lemke <jwlemke@codesourcery.com>
467 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
469 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
470 Dr David Alan Gilbert <dave@treblig.org>
473 * arm-dis.c: Add necessary casts for printing integer values.
474 Use %s when printing string values.
475 * hppa-dis.c: Likewise.
476 * m68k-dis.c: Likewise.
477 * microblaze-dis.c: Likewise.
478 * mips-dis.c: Likewise.
479 * sparc-dis.c: Likewise.
481 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
484 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
485 (VEX_LEN_0FXOP_08_CD): Likewise.
486 (VEX_LEN_0FXOP_08_CE): Likewise.
487 (VEX_LEN_0FXOP_08_CF): Likewise.
488 (VEX_LEN_0FXOP_08_EC): Likewise.
489 (VEX_LEN_0FXOP_08_ED): Likewise.
490 (VEX_LEN_0FXOP_08_EE): Likewise.
491 (VEX_LEN_0FXOP_08_EF): Likewise.
492 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
493 vpcomub, vpcomuw, vpcomud, vpcomuq.
494 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
495 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
496 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
499 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
501 * i386-dis.c (PREFIX_0F38F6): New.
502 (prefix_table): Add adcx, adox instructions.
503 (three_byte_table): Use PREFIX_0F38F6.
504 (mod_table): Add rdseed instruction.
505 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
506 (cpu_flags): Likewise.
507 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
508 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
509 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
511 * i386-tbl.h: Regenerate.
512 * i386-init.h: Likewise.
514 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
516 * mips-dis.c: Remove gratuitous newline.
518 2012-07-05 Sean Keys <skeys@ipdatasys.com>
520 * xgate-dis.c: Removed an IF statement that will
521 always be false due to overlapping operand masks.
522 * xgate-opc.c: Corrected 'com' opcode entry and
525 2012-07-02 Roland McGrath <mcgrathr@google.com>
527 * i386-opc.tbl: Add RepPrefixOk to nop.
528 * i386-tbl.h: Regenerate.
530 2012-06-28 Nick Clifton <nickc@redhat.com>
532 * po/vi.po: Updated Vietnamese translation.
534 2012-06-22 Roland McGrath <mcgrathr@google.com>
536 * i386-opc.tbl: Add RepPrefixOk to ret.
537 * i386-tbl.h: Regenerate.
539 * i386-opc.h (RepPrefixOk): New enum constant.
540 (i386_opcode_modifier): New bitfield 'repprefixok'.
541 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
542 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
543 instructions that have IsString.
544 * i386-tbl.h: Regenerate.
546 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
548 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
549 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
550 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
551 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
552 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
553 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
554 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
555 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
556 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
558 2012-05-19 Alan Modra <amodra@gmail.com>
560 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
561 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
563 2012-05-18 Alan Modra <amodra@gmail.com>
565 * ia64-opc.c: Remove #include "ansidecl.h".
566 * z8kgen.c: Include sysdep.h first.
568 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
569 * bfin-dis.c: Likewise.
570 * i860-dis.c: Likewise.
571 * ia64-dis.c: Likewise.
572 * ia64-gen.c: Likewise.
573 * m68hc11-dis.c: Likewise.
574 * mmix-dis.c: Likewise.
575 * msp430-dis.c: Likewise.
576 * or32-dis.c: Likewise.
577 * rl78-dis.c: Likewise.
578 * rx-dis.c: Likewise.
579 * tic4x-dis.c: Likewise.
580 * tilegx-opc.c: Likewise.
581 * tilepro-opc.c: Likewise.
582 * rx-decode.c: Regenerate.
584 2012-05-17 James Lemke <jwlemke@codesourcery.com>
586 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
588 2012-05-17 James Lemke <jwlemke@codesourcery.com>
590 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
592 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
593 Nick Clifton <nickc@redhat.com>
596 * configure.in: Add check that sysdep.h has been included before
597 any system header files.
598 * configure: Regenerate.
599 * config.in: Regenerate.
600 * sysdep.h: Generate an error if included before config.h.
601 * alpha-opc.c: Include sysdep.h before any other header file.
602 * alpha-dis.c: Likewise.
603 * avr-dis.c: Likewise.
604 * cgen-opc.c: Likewise.
605 * cr16-dis.c: Likewise.
606 * cris-dis.c: Likewise.
607 * crx-dis.c: Likewise.
608 * d10v-dis.c: Likewise.
609 * d10v-opc.c: Likewise.
610 * d30v-dis.c: Likewise.
611 * d30v-opc.c: Likewise.
612 * h8500-dis.c: Likewise.
613 * i370-dis.c: Likewise.
614 * i370-opc.c: Likewise.
615 * m10200-dis.c: Likewise.
616 * m10300-dis.c: Likewise.
617 * micromips-opc.c: Likewise.
618 * mips-opc.c: Likewise.
619 * mips61-opc.c: Likewise.
620 * moxie-dis.c: Likewise.
621 * or32-opc.c: Likewise.
622 * pj-dis.c: Likewise.
623 * ppc-dis.c: Likewise.
624 * ppc-opc.c: Likewise.
625 * s390-dis.c: Likewise.
626 * sh-dis.c: Likewise.
627 * sh64-dis.c: Likewise.
628 * sparc-dis.c: Likewise.
629 * sparc-opc.c: Likewise.
630 * spu-dis.c: Likewise.
631 * tic30-dis.c: Likewise.
632 * tic54x-dis.c: Likewise.
633 * tic80-dis.c: Likewise.
634 * tic80-opc.c: Likewise.
635 * tilegx-dis.c: Likewise.
636 * tilepro-dis.c: Likewise.
637 * v850-dis.c: Likewise.
638 * v850-opc.c: Likewise.
639 * vax-dis.c: Likewise.
640 * w65-dis.c: Likewise.
641 * xgate-dis.c: Likewise.
642 * xtensa-dis.c: Likewise.
643 * rl78-decode.opc: Likewise.
644 * rl78-decode.c: Regenerate.
645 * rx-decode.opc: Likewise.
646 * rx-decode.c: Regenerate.
648 2012-05-17 Alan Modra <amodra@gmail.com>
650 * ppc_dis.c: Don't include elf/ppc.h.
652 2012-05-16 Meador Inge <meadori@codesourcery.com>
654 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
657 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
658 Stephane Carrez <stcarrez@nerim.fr>
660 * configure.in: Add S12X and XGATE co-processor support to m68hc11
662 * disassemble.c: Likewise.
663 * configure: Regenerate.
664 * m68hc11-dis.c: Make objdump output more consistent, use hex
665 instead of decimal and use 0x prefix for hex.
666 * m68hc11-opc.c: Add S12X and XGATE opcodes.
668 2012-05-14 James Lemke <jwlemke@codesourcery.com>
670 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
671 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
672 (vle_opcd_indices): New array.
673 (lookup_vle): New function.
674 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
675 (print_insn_powerpc): Likewise.
676 * ppc-opc.c: Likewise.
678 2012-05-14 Catherine Moore <clm@codesourcery.com>
679 Maciej W. Rozycki <macro@codesourcery.com>
680 Rhonda Wittels <rhonda@codesourcery.com>
681 Nathan Froyd <froydnj@codesourcery.com>
683 * ppc-opc.c (insert_arx, extract_arx): New functions.
684 (insert_ary, extract_ary): New functions.
685 (insert_li20, extract_li20): New functions.
686 (insert_rx, extract_rx): New functions.
687 (insert_ry, extract_ry): New functions.
688 (insert_sci8, extract_sci8): New functions.
689 (insert_sci8n, extract_sci8n): New functions.
690 (insert_sd4h, extract_sd4h): New functions.
691 (insert_sd4w, extract_sd4w): New functions.
692 (insert_vlesi, extract_vlesi): New functions.
693 (insert_vlensi, extract_vlensi): New functions.
694 (insert_vleui, extract_vleui): New functions.
695 (insert_vleil, extract_vleil): New functions.
696 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
697 (BI16, BI32, BO32, B8): New.
698 (B15, B24, CRD32, CRS): New.
699 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
700 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
701 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
702 (SH6_MASK): Use PPC_OPSHIFT_INV.
703 (SI8, UI5, OIMM5, UI7, BO16): New.
704 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
705 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
707 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
708 (OPVUP, OPVUP_MASK OPVUP): New
709 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
710 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
711 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
712 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
713 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
714 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
715 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
716 (SE_IM5, SE_IM5_MASK): New.
717 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
718 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
719 (BO32DNZ, BO32DZ): New.
720 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
722 (powerpc_opcodes): Add new VLE instructions. Update existing
723 instruction to include PPCVLE if supported.
724 * ppc-dis.c (ppc_opts): Add vle entry.
725 (get_powerpc_dialect): New function.
726 (powerpc_init_dialect): VLE support.
727 (print_insn_big_powerpc): Call get_powerpc_dialect.
728 (print_insn_little_powerpc): Likewise.
729 (operand_value_powerpc): Handle negative shift counts.
730 (print_insn_powerpc): Handle 2-byte instruction lengths.
732 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
735 * configure.in: Invoke ACX_HEADER_STRING.
736 * configure: Regenerate.
737 * config.in: Regenerate.
738 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
739 string.h and strings.h.
741 2012-05-11 Nick Clifton <nickc@redhat.com>
744 * arm-dis.c (print_insn): Fix detection of instruction mode in
745 files containing multiple executable sections.
747 2012-05-03 Sean Keys <skeys@ipdatasys.com>
749 * Makefile.in, configure: regenerate
750 * disassemble.c (disassembler): Recognize ARCH_XGATE.
751 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
753 * configure.in: Recognize xgate.
754 * xgate-dis.c, xgate-opc.c: New files for support of xgate
755 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
756 and opcode generation for xgate.
758 2012-04-30 DJ Delorie <dj@redhat.com>
760 * rx-decode.opc (MOV): Do not sign-extend immediates which are
761 already the maximum bit size.
762 * rx-decode.c: Regenerate.
764 2012-04-27 David S. Miller <davem@davemloft.net>
766 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
767 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
769 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
770 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
772 * sparc-opc.c (CBCOND): New define.
773 (CBCOND_XCC): Likewise.
774 (cbcond): New helper macro.
775 (sparc_opcodes): Add compare-and-branch instructions.
777 * sparc-dis.c (print_insn_sparc): Handle ')'.
778 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
780 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
781 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
783 2012-04-12 David S. Miller <davem@davemloft.net>
785 * sparc-dis.c (X_DISP10): Define.
786 (print_insn_sparc): Handle '='.
788 2012-04-01 Mike Frysinger <vapier@gentoo.org>
790 * bfin-dis.c (fmtconst): Replace decimal handling with a single
791 sprintf call and the '*' field width.
793 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
795 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
797 2012-03-16 Alan Modra <amodra@gmail.com>
799 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
800 (powerpc_opcd_indices): Bump array size.
801 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
802 corresponding to unused opcodes to following entry.
803 (lookup_powerpc): New function, extracted and optimised from..
804 (print_insn_powerpc): ..here.
806 2012-03-15 Alan Modra <amodra@gmail.com>
807 James Lemke <jwlemke@codesourcery.com>
809 * disassemble.c (disassemble_init_for_target): Handle ppc init.
810 * ppc-dis.c (private): New var.
811 (powerpc_init_dialect): Don't return calloc failure, instead use
813 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
814 (powerpc_opcd_indices): New array.
815 (disassemble_init_powerpc): New function.
816 (print_insn_big_powerpc): Don't init dialect here.
817 (print_insn_little_powerpc): Likewise.
818 (print_insn_powerpc): Start search using powerpc_opcd_indices.
820 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
822 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
823 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
824 (PPCVEC2, PPCTMR, E6500): New short names.
825 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
826 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
827 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
828 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
829 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
830 optional operands on sync instruction for E6500 target.
832 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
834 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
836 2012-02-27 Alan Modra <amodra@gmail.com>
838 * mt-dis.c: Regenerate.
840 2012-02-27 Alan Modra <amodra@gmail.com>
842 * v850-opc.c (extract_v8): Rearrange to make it obvious this
843 is the inverse of corresponding insert function.
844 (extract_d22, extract_u9, extract_r4): Likewise.
845 (extract_d9): Correct sign extension.
846 (extract_d16_15): Don't assume "long" is 32 bits, and don't
847 rely on implementation defined behaviour for shift right of
849 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
850 (extract_d23): Likewise, and correct mask.
852 2012-02-27 Alan Modra <amodra@gmail.com>
854 * crx-dis.c (print_arg): Mask constant to 32 bits.
855 * crx-opc.c (cst4_map): Use int array.
857 2012-02-27 Alan Modra <amodra@gmail.com>
859 * arc-dis.c (BITS): Don't use shifts to mask off bits.
860 (FIELDD): Sign extend with xor,sub.
862 2012-02-25 Walter Lee <walt@tilera.com>
864 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
865 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
866 TILEPRO_OPC_LW_TLS_SN.
868 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
870 * i386-opc.h (HLEPrefixNone): New.
871 (HLEPrefixLock): Likewise.
872 (HLEPrefixAny): Likewise.
873 (HLEPrefixRelease): Likewise.
875 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
877 * i386-dis.c (HLE_Fixup1): New.
878 (HLE_Fixup2): Likewise.
879 (HLE_Fixup3): Likewise.
886 (MOD_C6_REG_7): Likewise.
887 (MOD_C7_REG_7): Likewise.
888 (RM_C6_REG_7): Likewise.
889 (RM_C7_REG_7): Likewise.
890 (XACQUIRE_PREFIX): Likewise.
891 (XRELEASE_PREFIX): Likewise.
892 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
893 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
894 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
895 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
896 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
897 MOD_C6_REG_7 and MOD_C7_REG_7.
898 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
899 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
901 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
902 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
904 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
906 (cpu_flags): Add CpuHLE and CpuRTM.
907 (opcode_modifiers): Add HLEPrefixOk.
909 * i386-opc.h (CpuHLE): New.
911 (HLEPrefixOk): Likewise.
912 (i386_cpu_flags): Add cpuhle and cpurtm.
913 (i386_opcode_modifier): Add hleprefixok.
915 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
916 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
917 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
918 operand. Add xacquire, xrelease, xabort, xbegin, xend and
920 * i386-init.h: Regenerated.
921 * i386-tbl.h: Likewise.
923 2012-01-24 DJ Delorie <dj@redhat.com>
925 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
926 * rl78-decode.c: Regenerate.
928 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
931 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
933 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
935 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
936 register and move them after pmove with PSR/PCSR register.
938 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
940 * i386-dis.c (mod_table): Add vmfunc.
942 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
943 (cpu_flags): CpuVMFUNC.
945 * i386-opc.h (CpuVMFUNC): New.
946 (i386_cpu_flags): Add cpuvmfunc.
948 * i386-opc.tbl: Add vmfunc.
949 * i386-init.h: Regenerated.
950 * i386-tbl.h: Likewise.
952 For older changes see ChangeLog-2011
958 version-control: never