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Add MIPS32 DSPr3 support.
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
1 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
2
3 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
4 mips64r6.
5 * mips-opc.c (D34): New macro.
6 (mips_builtin_opcodes): Define bposge32c for DSPr3.
7
8 2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
9
10 * i386-dis.c (prefix_table): Add RDPID instruction.
11 * i386-gen.c (cpu_flag_init): Add RDPID flag.
12 (cpu_flags): Add RDPID bitfield.
13 * i386-opc.h (enum): Add RDPID element.
14 (i386_cpu_flags): Add RDPID field.
15 * i386-opc.tbl: Add RDPID instruction.
16 * i386-init.h: Regenerate.
17 * i386-tbl.h: Regenerate.
18
19 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
20
21 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
22 branch type of a symbol.
23 (print_insn): Likewise.
24
25 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
26
27 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
28 Mainline Security Extensions instructions.
29 (thumb_opcodes): Add entries for narrow ARMv8-M Security
30 Extensions instructions.
31 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
32 instructions.
33 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
34 special registers.
35
36 2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
37
38 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
39
40 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
41
42 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
43 (arcExtMap_genOpcode): Likewise.
44 * arc-opc.c (arg_32bit_rc): Define new variable.
45 (arg_32bit_u6): Likewise.
46 (arg_32bit_limm): Likewise.
47
48 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
49
50 * aarch64-gen.c (VERIFIER): Define.
51 * aarch64-opc.c (VERIFIER): Define.
52 (verify_ldpsw): Use static linkage.
53 * aarch64-opc.h (verify_ldpsw): Remove.
54 * aarch64-tbl.h: Use VERIFIER for verifiers.
55
56 2016-04-28 Nick Clifton <nickc@redhat.com>
57
58 PR target/19722
59 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
60 * aarch64-opc.c (verify_ldpsw): New function.
61 * aarch64-opc.h (verify_ldpsw): New prototype.
62 * aarch64-tbl.h: Add initialiser for verifier field.
63 (LDPSW): Set verifier to verify_ldpsw.
64
65 2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
66
67 PR binutils/19983
68 PR binutils/19984
69 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
70 smaller than address size.
71
72 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
73
74 * alpha-dis.c: Regenerate.
75 * crx-dis.c: Likewise.
76 * disassemble.c: Likewise.
77 * epiphany-opc.c: Likewise.
78 * fr30-opc.c: Likewise.
79 * frv-opc.c: Likewise.
80 * ip2k-opc.c: Likewise.
81 * iq2000-opc.c: Likewise.
82 * lm32-opc.c: Likewise.
83 * lm32-opinst.c: Likewise.
84 * m32c-opc.c: Likewise.
85 * m32r-opc.c: Likewise.
86 * m32r-opinst.c: Likewise.
87 * mep-opc.c: Likewise.
88 * mt-opc.c: Likewise.
89 * or1k-opc.c: Likewise.
90 * or1k-opinst.c: Likewise.
91 * tic80-opc.c: Likewise.
92 * xc16x-opc.c: Likewise.
93 * xstormy16-opc.c: Likewise.
94
95 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
96
97 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
98 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
99 calcsd, and calcxd instructions.
100 * arc-opc.c (insert_nps_bitop_size): Delete.
101 (extract_nps_bitop_size): Delete.
102 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
103 (extract_nps_qcmp_m3): Define.
104 (extract_nps_qcmp_m2): Define.
105 (extract_nps_qcmp_m1): Define.
106 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
107 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
108 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
109 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
110 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
111 NPS_QCMP_M3.
112
113 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
114
115 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
116
117 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
118
119 * Makefile.in: Regenerated with automake 1.11.6.
120 * aclocal.m4: Likewise.
121
122 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
123
124 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
125 instructions.
126 * arc-opc.c (insert_nps_cmem_uimm16): New function.
127 (extract_nps_cmem_uimm16): New function.
128 (arc_operands): Add NPS_XLDST_UIMM16 operand.
129
130 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
131
132 * arc-dis.c (arc_insn_length): New function.
133 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
134 (find_format): Change insnLen parameter to unsigned.
135
136 2016-04-13 Nick Clifton <nickc@redhat.com>
137
138 PR target/19937
139 * v850-opc.c (v850_opcodes): Correct masks for long versions of
140 the LD.B and LD.BU instructions.
141
142 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
143
144 * arc-dis.c (find_format): Check for extension flags.
145 (print_flags): New function.
146 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
147 .extAuxRegister.
148 * arc-ext.c (arcExtMap_coreRegName): Use
149 LAST_EXTENSION_CORE_REGISTER.
150 (arcExtMap_coreReadWrite): Likewise.
151 (dump_ARC_extmap): Update printing.
152 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
153 (arc_aux_regs): Add cpu field.
154 * arc-regs.h: Add cpu field, lower case name aux registers.
155
156 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
157
158 * arc-tbl.h: Add rtsc, sleep with no arguments.
159
160 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
161
162 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
163 Initialize.
164 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
165 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
166 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
167 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
168 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
169 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
170 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
171 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
172 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
173 (arc_opcode arc_opcodes): Null terminate the array.
174 (arc_num_opcodes): Remove.
175 * arc-ext.h (INSERT_XOP): Define.
176 (extInstruction_t): Likewise.
177 (arcExtMap_instName): Delete.
178 (arcExtMap_insn): New function.
179 (arcExtMap_genOpcode): Likewise.
180 * arc-ext.c (ExtInstruction): Remove.
181 (create_map): Zero initialize instruction fields.
182 (arcExtMap_instName): Remove.
183 (arcExtMap_insn): New function.
184 (dump_ARC_extmap): More info while debuging.
185 (arcExtMap_genOpcode): New function.
186 * arc-dis.c (find_format): New function.
187 (print_insn_arc): Use find_format.
188 (arc_get_disassembler): Enable dump_ARC_extmap only when
189 debugging.
190
191 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
192
193 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
194 instruction bits out.
195
196 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
197
198 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
199 * arc-opc.c (arc_flag_operands): Add new flags.
200 (arc_flag_classes): Add new classes.
201
202 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
203
204 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
205
206 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
207
208 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
209 encode1, rflt, crc16, and crc32 instructions.
210 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
211 (arc_flag_classes): Add C_NPS_R.
212 (insert_nps_bitop_size_2b): New function.
213 (extract_nps_bitop_size_2b): Likewise.
214 (insert_nps_bitop_uimm8): Likewise.
215 (extract_nps_bitop_uimm8): Likewise.
216 (arc_operands): Add new operand entries.
217
218 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
219
220 * arc-regs.h: Add a new subclass field. Add double assist
221 accumulator register values.
222 * arc-tbl.h: Use DPA subclass to mark the double assist
223 instructions. Use DPX/SPX subclas to mark the FPX instructions.
224 * arc-opc.c (RSP): Define instead of SP.
225 (arc_aux_regs): Add the subclass field.
226
227 2016-04-05 Jiong Wang <jiong.wang@arm.com>
228
229 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
230
231 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
232
233 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
234 NPS_R_SRC1.
235
236 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
237
238 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
239 issues. No functional changes.
240
241 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
242
243 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
244 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
245 (RTT): Remove duplicate.
246 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
247 (PCT_CONFIG*): Remove.
248 (D1L, D1H, D2H, D2L): Define.
249
250 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
251
252 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
253
254 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
255
256 * arc-tbl.h (invld07): Remove.
257 * arc-ext-tbl.h: New file.
258 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
259 * arc-opc.c (arc_opcodes): Add ext-tbl include.
260
261 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
262
263 Fix -Wstack-usage warnings.
264 * aarch64-dis.c (print_operands): Substitute size.
265 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
266
267 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
268
269 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
270 to get a proper diagnostic when an invalid ASR register is used.
271
272 2016-03-22 Nick Clifton <nickc@redhat.com>
273
274 * configure: Regenerate.
275
276 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
277
278 * arc-nps400-tbl.h: New file.
279 * arc-opc.c: Add top level comment.
280 (insert_nps_3bit_dst): New function.
281 (extract_nps_3bit_dst): New function.
282 (insert_nps_3bit_src2): New function.
283 (extract_nps_3bit_src2): New function.
284 (insert_nps_bitop_size): New function.
285 (extract_nps_bitop_size): New function.
286 (arc_flag_operands): Add nps400 entries.
287 (arc_flag_classes): Add nps400 entries.
288 (arc_operands): Add nps400 entries.
289 (arc_opcodes): Add nps400 include.
290
291 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
292
293 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
294 the new class enum values.
295
296 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
297
298 * arc-dis.c (print_insn_arc): Handle nps400.
299
300 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
301
302 * arc-opc.c (BASE): Delete.
303
304 2016-03-18 Nick Clifton <nickc@redhat.com>
305
306 PR target/19721
307 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
308 of MOV insn that aliases an ORR insn.
309
310 2016-03-16 Jiong Wang <jiong.wang@arm.com>
311
312 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
313
314 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
315
316 * mcore-opc.h: Add const qualifiers.
317 * microblaze-opc.h (struct op_code_struct): Likewise.
318 * sh-opc.h: Likewise.
319 * tic4x-dis.c (tic4x_print_indirect): Likewise.
320 (tic4x_print_op): Likewise.
321
322 2016-03-02 Alan Modra <amodra@gmail.com>
323
324 * or1k-desc.h: Regenerate.
325 * fr30-ibld.c: Regenerate.
326 * rl78-decode.c: Regenerate.
327
328 2016-03-01 Nick Clifton <nickc@redhat.com>
329
330 PR target/19747
331 * rl78-dis.c (print_insn_rl78_common): Fix typo.
332
333 2016-02-24 Renlin Li <renlin.li@arm.com>
334
335 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
336 (print_insn_coprocessor): Support fp16 instructions.
337
338 2016-02-24 Renlin Li <renlin.li@arm.com>
339
340 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
341 vminnm, vrint(mpna).
342
343 2016-02-24 Renlin Li <renlin.li@arm.com>
344
345 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
346 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
347
348 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
349
350 * i386-dis.c (print_insn): Parenthesize expression to prevent
351 truncated addresses.
352 (OP_J): Likewise.
353
354 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
355 Janek van Oirschot <jvanoirs@synopsys.com>
356
357 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
358 variable.
359
360 2016-02-04 Nick Clifton <nickc@redhat.com>
361
362 PR target/19561
363 * msp430-dis.c (print_insn_msp430): Add a special case for
364 decoding an RRC instruction with the ZC bit set in the extension
365 word.
366
367 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
368
369 * cgen-ibld.in (insert_normal): Rework calculation of shift.
370 * epiphany-ibld.c: Regenerate.
371 * fr30-ibld.c: Regenerate.
372 * frv-ibld.c: Regenerate.
373 * ip2k-ibld.c: Regenerate.
374 * iq2000-ibld.c: Regenerate.
375 * lm32-ibld.c: Regenerate.
376 * m32c-ibld.c: Regenerate.
377 * m32r-ibld.c: Regenerate.
378 * mep-ibld.c: Regenerate.
379 * mt-ibld.c: Regenerate.
380 * or1k-ibld.c: Regenerate.
381 * xc16x-ibld.c: Regenerate.
382 * xstormy16-ibld.c: Regenerate.
383
384 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
385
386 * epiphany-dis.c: Regenerated from latest cpu files.
387
388 2016-02-01 Michael McConville <mmcco@mykolab.com>
389
390 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
391 test bit.
392
393 2016-01-25 Renlin Li <renlin.li@arm.com>
394
395 * arm-dis.c (mapping_symbol_for_insn): New function.
396 (find_ifthen_state): Call mapping_symbol_for_insn().
397
398 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
399
400 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
401 of MSR UAO immediate operand.
402
403 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
404
405 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
406 instruction support.
407
408 2016-01-17 Alan Modra <amodra@gmail.com>
409
410 * configure: Regenerate.
411
412 2016-01-14 Nick Clifton <nickc@redhat.com>
413
414 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
415 instructions that can support stack pointer operations.
416 * rl78-decode.c: Regenerate.
417 * rl78-dis.c: Fix display of stack pointer in MOVW based
418 instructions.
419
420 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
421
422 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
423 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
424 erxtatus_el1 and erxaddr_el1.
425
426 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
427
428 * arm-dis.c (arm_opcodes): Add "esb".
429 (thumb_opcodes): Likewise.
430
431 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
432
433 * ppc-opc.c <xscmpnedp>: Delete.
434 <xvcmpnedp>: Likewise.
435 <xvcmpnedp.>: Likewise.
436 <xvcmpnesp>: Likewise.
437 <xvcmpnesp.>: Likewise.
438
439 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
440
441 PR gas/13050
442 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
443 addition to ISA_A.
444
445 2016-01-01 Alan Modra <amodra@gmail.com>
446
447 Update year range in copyright notice of all files.
448
449 For older changes see ChangeLog-2015
450 \f
451 Copyright (C) 2016 Free Software Foundation, Inc.
452
453 Copying and distribution of this file, with or without modification,
454 are permitted in any medium without royalty provided the copyright
455 notice and this notice are preserved.
456
457 Local Variables:
458 mode: change-log
459 left-margin: 8
460 fill-column: 74
461 version-control: never
462 End: