opcodes/ChangeLog

   1 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
   4         * ia64-gen.c (lookup_specifier): Likewise.
   5
   6         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
   7         * ia64-raw.tbl: Likewise.
   8         * ia64-waw.tbl: Likewise.
   9         * ia64-asmtab.c: Regenerated.
  10
  11 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
  12
  13         * i386-opc.tbl: Correct fidivr operand size.
  14
  15         * i386-tbl.h: Regenerated.
  16
  17 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
  18
  19         * configure.in: Update a number of obsolete autoconf macros.
  20         * aclocal.m4: Regenerate.
  21
  22 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
  23
  24         AVX Programming Reference (August, 2008)
  25         * i386-dis.c (PREFIX_VEX_38DB): New.
  26         (PREFIX_VEX_38DC): Likewise.
  27         (PREFIX_VEX_38DD): Likewise.
  28         (PREFIX_VEX_38DE): Likewise.
  29         (PREFIX_VEX_38DF): Likewise.
  30         (PREFIX_VEX_3ADF): Likewise.
  31         (VEX_LEN_38DB_P_2): Likewise.
  32         (VEX_LEN_38DC_P_2): Likewise.
  33         (VEX_LEN_38DD_P_2): Likewise.
  34         (VEX_LEN_38DE_P_2): Likewise.
  35         (VEX_LEN_38DF_P_2): Likewise.
  36         (VEX_LEN_3ADF_P_2): Likewise.
  37         (PREFIX_VEX_3A04): Updated.
  38         (VEX_LEN_3A06_P_2): Likewise.
  39         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
  40         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
  41         (x86_64_table): Likewise.
  42         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
  43         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
  44         VEX_LEN_3ADF_P_2.
  45
  46         * i386-opc.tbl: Add AES + AVX instructions.
  47         * i386-init.h: Regenerated.
  48         * i386-tbl.h: Likewise.
  49
  50 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  51
  52         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
  53         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
  54
  55 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
  56
  57         PR 6526
  58         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
  59         * Makefile.in: Regenerate.
  60         * aclocal.m4: Regenerate.
  61         * config.in: Regenerate.
  62         * configure: Regenerate.
  63
  64 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  65
  66         PR 6825
  67         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
  68
  69 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
  70
  71         * i386-opc.tbl: Add syscall and sysret for Cpu64.
  72
  73         * i386-tbl.h: Regenerated.
  74
  75 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
  76
  77         * Makefile.am (POTFILES.in): Set LC_ALL=C.
  78         * Makefile.in: Regenerate.
  79         * po/POTFILES.in: Regenerate.
  80
  81 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
  82
  83         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
  84         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
  85         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
  86         * ppc-opc.c (insert_xt6): New static function.
  87         (extract_xt6): Likewise.
  88         (insert_xa6): Likewise.
  89         (extract_xa6: Likewise.
  90         (insert_xb6): Likewise.
  91         (extract_xb6): Likewise.
  92         (insert_xb6s): Likewise.
  93         (extract_xb6s): Likewise.
  94         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
  95         XX3DM_MASK, PPCVSX): New.
  96         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
  97         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
  98
  99 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 100
 101         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 102         * Makefile.in: Regenerate.
 103
 104 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 105
 106         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 107         * i386-tbl.h: Regenerated.
 108
 109 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 110
 111         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 112         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 113         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 114         (powerpc_opcodes): Add Xilinx APU related opcodes.
 115
 116 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 117
 118         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 119
 120 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 121
 122         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 123
 124 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 125
 126         * mips-opc.c (CP): New macro.
 127         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 128         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 129         dmtc2 Octeon instructions.
 130
 131 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 132
 133         * dis-init.c (init_disassemble_info): Init endian_code field.
 134         * arm-dis.c (print_insn): Disassemble code according to
 135         setting of endian_code.
 136         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 137
 138 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 139
 140         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 141         for ELF symbols.
 142
 143 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 144
 145         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 146         (print_ppc_disassembler_options): Likewise.
 147         * ppc-opc.c (PPC464): Define.
 148         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 149
 150 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 151
 152         * configure: Regenerate.
 153
 154 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 155
 156         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 157         ppc_cpu_t typedef.
 158         (struct dis_private): New.
 159         (POWERPC_DIALECT): New define.
 160         (powerpc_dialect): Renamed to...
 161         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 162         struct dis_private.
 163         (print_insn_big_powerpc): Update for using structure in
 164         info->private_data.
 165         (print_insn_little_powerpc): Likewise.
 166         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 167         (skip_optional_operands): Likewise.
 168         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 169         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 170         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 171         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 172         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 173         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 174         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 175         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 176         param to be of type ppc_cpu_t.  Update prototype.
 177
 178 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 179
 180         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 181         +s, +S.
 182         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 183         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 184         syncw, syncws, vm3mulu, vm0 and vmulu.
 185
 186         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 187         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 188         seqi, sne and snei.
 189
 190 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 191
 192         * i386-opc.tbl: Add vmovd with 64bit operand.
 193         * i386-tbl.h: Regenerated.
 194
 195 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 196
 197         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 198
 199 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 200
 201         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 202         * i386-tbl.h: Regenerated.
 203
 204 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 205
 206         PR gas/6517
 207         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 208         into 32bit and 64bit.  Remove Reg64|Qword and add
 209         IgnoreSize|No_qSuf on 32bit version.
 210         * i386-tbl.h: Regenerated.
 211
 212 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 213
 214         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 215         * i386-tbl.h: Regenerated.
 216
 217 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 218
 219         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 220
 221 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 222
 223         * Makefile.am: Run "make dep-am".
 224         * Makefile.in: Regenerate.
 225
 226 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 227
 228         * i386-dis.c (MOVBE_Fixup): New.
 229         (Mo): Likewise.
 230         (PREFIX_0F3880): Likewise.
 231         (PREFIX_0F3881): Likewise.
 232         (PREFIX_0F38F0): Updated.
 233         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 234         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 235         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 236
 237         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 238         CPU_EPT_FLAGS.
 239         (cpu_flags): Add CpuMovbe and CpuEPT.
 240
 241         * i386-opc.h (CpuMovbe): New.
 242         (CpuEPT): Likewise.
 243         (CpuLM): Updated.
 244         (i386_cpu_flags): Add cpumovbe and cpuept.
 245
 246         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 247         * i386-init.h: Regenerated.
 248         * i386-tbl.h: Likewise.
 249
 250 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 251
 252         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 253         the two drem and the two dremu macros.
 254
 255 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 256
 257         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 258         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 259         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 260         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 261
 262 2008-04-25  David S. Miller  <davem@davemloft.net>
 263
 264         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 265         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 266
 267 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 268
 269         * aclocal.m4: Regenerate.
 270         * configure: Regenerate.
 271
 272 2008-04-23  David S. Miller  <davem@davemloft.net>
 273
 274         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 275         extended values.
 276         (prefetch_table): Add missing values.
 277
 278 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 279
 280         * i386-gen.c (opcode_modifiers): Add NoAVX.
 281
 282         * i386-opc.h (NoAVX): New.
 283         (OldGcc): Updated.
 284         (i386_opcode_modifier): Add noavx.
 285
 286         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 287         instructions which don't have AVX equivalent.
 288         * i386-tbl.h: Regenerated.
 289
 290 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 291
 292         * i386-dis.c (OP_VEX_FMA): New.
 293         (OP_EX_VexImmW): Likewise.
 294         (VexFMA): Likewise.
 295         (Vex128FMA): Likewise.
 296         (EXVexImmW): Likewise.
 297         (get_vex_imm8): Likewise.
 298         (OP_EX_VexReg): Likewise.
 299         (vex_i4_done): Renamed to ...
 300         (vex_w_done): This.
 301         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 302         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 303         FMA instructions.
 304         (print_insn): Updated.
 305         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 306         (OP_REG_VexI4): Check invalid high registers.
 307
 308 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 309             Michael Meissner  <michael.meissner@amd.com>
 310
 311         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 312         * i386-tbl.h: Regenerate from i386-opc.tbl.
 313
 314 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 315
 316         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 317         accept Power E500MC instructions.
 318         (print_ppc_disassembler_options): Document -Me500mc.
 319         * ppc-opc.c (DUIS, DUI, T): New.
 320         (XRT, XRTRA): Likewise.
 321         (E500MC): Likewise.
 322         (powerpc_opcodes): Add new Power E500MC instructions.
 323
 324 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 325
 326         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 327         (print_s390_disassembler_options): New function.
 328         * disassemble.c (disassembler_usage): Invoke
 329         print_s390_disassembler_options.
 330
 331 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 332
 333         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 334         of local variables used for mnemonic parsing: prefix, suffix and
 335         number.
 336
 337 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 338
 339         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 340         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 341         (s390_crb_extensions): New extensions table.
 342         (insertExpandedMnemonic): Handle '$' tag.
 343         * s390-opc.txt: Remove conditional jump variants which can now
 344         be expanded automatically.
 345         Replace '*' tag with '$' in the compare and branch instructions.
 346
 347 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 348
 349         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 350         (PREFIX_VEX_3AXX): Likewis.
 351
 352 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 353
 354         * i386-opc.tbl: Remove 4 extra blank lines.
 355
 356 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 357
 358         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 359         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 360         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 361         * i386-opc.tbl: Likewise.
 362
 363         * i386-opc.h (CpuCLMUL): Renamed to ...
 364         (CpuPCLMUL): This.
 365         (CpuFMA): Updated.
 366         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 367
 368         * i386-init.h: Regenerated.
 369
 370 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 371
 372         * i386-dis.c (OP_E_register): New.
 373         (OP_E_memory): Likewise.
 374         (OP_VEX): Likewise.
 375         (OP_EX_Vex): Likewise.
 376         (OP_EX_VexW): Likewise.
 377         (OP_XMM_Vex): Likewise.
 378         (OP_XMM_VexW): Likewise.
 379         (OP_REG_VexI4): Likewise.
 380         (PCLMUL_Fixup): Likewise.
 381         (VEXI4_Fixup): Likewise.
 382         (VZERO_Fixup): Likewise.
 383         (VCMP_Fixup): Likewise.
 384         (VPERMIL2_Fixup): Likewise.
 385         (rex_original): Likewise.
 386         (rex_ignored): Likewise.
 387         (Mxmm): Likewise.
 388         (XMM): Likewise.
 389         (EXxmm): Likewise.
 390         (EXxmmq): Likewise.
 391         (EXymmq): Likewise.
 392         (Vex): Likewise.
 393         (Vex128): Likewise.
 394         (Vex256): Likewise.
 395         (VexI4): Likewise.
 396         (EXdVex): Likewise.
 397         (EXqVex): Likewise.
 398         (EXVexW): Likewise.
 399         (EXdVexW): Likewise.
 400         (EXqVexW): Likewise.
 401         (XMVex): Likewise.
 402         (XMVexW): Likewise.
 403         (XMVexI4): Likewise.
 404         (PCLMUL): Likewise.
 405         (VZERO): Likewise.
 406         (VCMP): Likewise.
 407         (VPERMIL2): Likewise.
 408         (xmm_mode): Likewise.
 409         (xmmq_mode): Likewise.
 410         (ymmq_mode): Likewise.
 411         (vex_mode): Likewise.
 412         (vex128_mode): Likewise.
 413         (vex256_mode): Likewise.
 414         (USE_VEX_C4_TABLE): Likewise.
 415         (USE_VEX_C5_TABLE): Likewise.
 416         (USE_VEX_LEN_TABLE): Likewise.
 417         (VEX_C4_TABLE): Likewise.
 418         (VEX_C5_TABLE): Likewise.
 419         (VEX_LEN_TABLE): Likewise.
 420         (REG_VEX_XX): Likewise.
 421         (MOD_VEX_XXX): Likewise.
 422         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 423         (PREFIX_0F3A44): Likewise.
 424         (PREFIX_0F3ADF): Likewise.
 425         (PREFIX_VEX_XXX): Likewise.
 426         (VEX_OF): Likewise.
 427         (VEX_OF38): Likewise.
 428         (VEX_OF3A): Likewise.
 429         (VEX_LEN_XXX): Likewise.
 430         (vex): Likewise.
 431         (need_vex): Likewise.
 432         (need_vex_reg): Likewise.
 433         (vex_i4_done): Likewise.
 434         (vex_table): Likewise.
 435         (vex_len_table): Likewise.
 436         (OP_REG_VexI4): Likewise.
 437         (vex_cmp_op): Likewise.
 438         (pclmul_op): Likewise.
 439         (vpermil2_op): Likewise.
 440         (m_mode): Updated.
 441         (es_reg): Likewise.
 442         (PREFIX_0F38F0): Likewise.
 443         (PREFIX_0F3A60): Likewise.
 444         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 445         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 446         and PREFIX_VEX_XXX entries.
 447         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 448         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 449         PREFIX_0F3ADF.
 450         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 451         Add MOD_VEX_XXX entries.
 452         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 453         REX byte in rex_original.
 454         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 455         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 456         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 457         calling get_valid_dis386.  Use rex_original and rex_ignored when
 458         printing out REX.
 459         (putop): Handle "XY".
 460         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 461         ymmq_mode.
 462         (OP_E_extended): Updated to use OP_E_register and
 463         OP_E_memory.
 464         (OP_XMM): Handle VEX.
 465         (OP_EX): Likewise.
 466         (XMM_Fixup): Likewise.
 467         (CMP_Fixup): Use ARRAY_SIZE.
 468
 469         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 470         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 471         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 472         OPERAND_TYPE_VEX_IMM4.
 473         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 474         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 475         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 476         VexImmExt and SSE2AVX.
 477         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 478
 479         * i386-opc.h (CpuAVX): New.
 480         (CpuAES): Likewise.
 481         (CpuCLMUL): Likewise.
 482         (CpuFMA): Likewise.
 483         (Vex): Likewise.
 484         (Vex256): Likewise.
 485         (VexNDS): Likewise.
 486         (VexNDD): Likewise.
 487         (VexW0): Likewise.
 488         (VexW1): Likewise.
 489         (Vex0F): Likewise.
 490         (Vex0F38): Likewise.
 491         (Vex0F3A): Likewise.
 492         (Vex3Sources): Likewise.
 493         (VexImmExt): Likewise.
 494         (SSE2AVX): Likewise.
 495         (RegYMM): Likewise.
 496         (Ymmword): Likewise.
 497         (Vex_Imm4): Likewise.
 498         (Implicit1stXmm0): Likewise.
 499         (CpuXsave): Updated.
 500         (CpuLM): Likewise.
 501         (ByteOkIntel): Likewise.
 502         (OldGcc): Likewise.
 503         (Control): Likewise.
 504         (Unspecified): Likewise.
 505         (OTMax): Likewise.
 506         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 507         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 508         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 509         vex3sources, veximmext and sse2avx.
 510         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 511
 512         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 513
 514         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 515
 516         * i386-init.h: Regenerated.
 517         * i386-tbl.h: Likewise.
 518
 519 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 520
 521         From  Robin Getz  <robin.getz@analog.com>
 522         * bfin-dis.c (bu32): Typedef.
 523         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 524         (constant_formats[]): Add uimm32 and huimm16.
 525         (fmtconst_val): New.
 526         (uimm32): Define.
 527         (huimm32): Define.
 528         (imm16_val): Define.
 529         (luimm16_val): Define.
 530         (struct saved_state): Define.
 531         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 532         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 533         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 534         (get_allreg): New.
 535         (decode_LDIMMhalf_0): Print out the whole register value.
 536
 537         From Jie Zhang  <jie.zhang@analog.com>
 538         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 539         multiply and multiply-accumulate to data register instruction.
 540
 541         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 542         c_imm32, c_huimm32e): Define.
 543         (constant_formats): Add flags for printing decimal, leading spaces, and
 544         exact symbols.
 545         (comment, parallel): Add global flags in all disassembly.
 546         (fmtconst): Take advantage of new flags, and print default in hex.
 547         (fmtconst_val): Likewise.
 548         (decode_macfunc): Be consistant with spaces, tabs, comments,
 549         capitalization in disassembly, fix minor coding style issues.
 550         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 551         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 552         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 553         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 554         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 555         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 556         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 557         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 558         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 559         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 560         _print_insn_bfin, print_insn_bfin): Likewise.
 561
 562 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 563
 564         * aclocal.m4: Regenerate.
 565         * configure: Likewise.
 566         * Makefile.in: Likewise.
 567
 568 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 569
 570         * Makefile.am: Run "make dep-am".
 571         * Makefile.in: Regenerate.
 572         * configure: Regenerate.
 573
 574 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 575
 576         * ppc-opc.c (powerpc_opcodes): Order and format.
 577
 578 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 579
 580         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 581         * i386-tbl.h: Regenerated.
 582
 583 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 584
 585         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 586         x86-64.
 587         * i386-tbl.h: Regenerated.
 588
 589 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 590
 591         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 592         and Fword for far indirect jmp. Allow Reg16 and Word for near
 593         indirect jmp on x86-64. Disallow Fword for lcall.
 594         * i386-tbl.h: Re-generate.
 595
 596 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 597
 598         * cr16-opc.c  (cr16_num_optab): Defined
 599
 600 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 601
 602         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 603         * i386-init.h: Regenerated.
 604
 605 2008-02-14  Nick Clifton  <nickc@redhat.com>
 606
 607         PR binutils/5524
 608         * configure.in (SHARED_LIBADD): Select the correct host specific
 609         file extension for shared libraries.
 610         * configure: Regenerate.
 611
 612 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 613
 614         * i386-opc.h (RegFlat): New.
 615         * i386-reg.tbl (flat): Add.
 616         * i386-tbl.h: Re-generate.
 617
 618 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 619
 620         * i386-dis.c (a_mode): New.
 621         (cond_jump_mode): Adjust.
 622         (Ma): Change to a_mode.
 623         (intel_operand_size): Handle a_mode.
 624         * i386-opc.tbl: Allow Dword and Qword for bound.
 625         * i386-tbl.h: Re-generate.
 626
 627 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 628
 629         * i386-gen.c (process_i386_registers): Process new fields.
 630         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 631         unsigned char. Add dw2_regnum and Dw2Inval.
 632         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 633         register names.
 634         * i386-tbl.h: Re-generate.
 635
 636 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 637
 638         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 639         * i386-init.h: Updated.
 640
 641 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 642
 643         * i386-gen.c (cpu_flags): Add CpuXsave.
 644
 645         * i386-opc.h (CpuXsave): New.
 646         (CpuLM): Updated.
 647         (i386_cpu_flags): Add cpuxsave.
 648
 649         * i386-dis.c (MOD_0FAE_REG_4): New.
 650         (RM_0F01_REG_2): Likewise.
 651         (MOD_0FAE_REG_5): Updated.
 652         (RM_0F01_REG_3): Likewise.
 653         (reg_table): Use MOD_0FAE_REG_4.
 654         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 655         for xrstor.
 656         (rm_table): Add RM_0F01_REG_2.
 657
 658         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 659         * i386-init.h: Regenerated.
 660         * i386-tbl.h: Likewise.
 661
 662 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 663
 664         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 665         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 666         * i386-tbl.h: Re-generate.
 667
 668 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 669
 670         PR 5715
 671         * configure: Regenerated.
 672
 673 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 674
 675         * mips-dis.c: Update copyright.
 676         (mips_arch_choices): Add Octeon.
 677         * mips-opc.c: Update copyright.
 678         (IOCT): New macro.
 679         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 680
 681 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 682
 683         * ppc-opc.c: Support optional L form mtmsr.
 684
 685 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 686
 687         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 688
 689 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 690
 691         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 692         * i386-init.h: Regenerated.
 693
 694 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 695
 696         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 697         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 698
 699 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 700
 701         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 702         (cpu_flags): Likewise.
 703
 704         * i386-opc.h (CpuMMX2): Removed.
 705         (CpuSSE): Updated.
 706
 707         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 708         * i386-init.h: Regenerated.
 709         * i386-tbl.h: Likewise.
 710
 711 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 712
 713         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 714         CPU_SMX_FLAGS.
 715         * i386-init.h: Regenerated.
 716
 717 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 718
 719         * i386-opc.tbl: Use Qword on movddup.
 720         * i386-tbl.h: Regenerated.
 721
 722 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 723
 724         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 725         * i386-tbl.h: Regenerated.
 726
 727 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 728
 729         * i386-dis.c (Mx): New.
 730         (PREFIX_0FC3): Likewise.
 731         (PREFIX_0FC7_REG_6): Updated.
 732         (dis386_twobyte): Use PREFIX_0FC3.
 733         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 734         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 735         movntss.
 736
 737 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 738
 739         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 740         (operand_types): Add Mem.
 741
 742         * i386-opc.h (IntelSyntax): New.
 743         * i386-opc.h (Mem): New.
 744         (Byte): Updated.
 745         (Opcode_Modifier_Max): Updated.
 746         (i386_opcode_modifier): Add intelsyntax.
 747         (i386_operand_type): Add mem.
 748
 749         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 750         instructions.
 751
 752         * i386-reg.tbl: Add size for accumulator.
 753
 754         * i386-init.h: Regenerated.
 755         * i386-tbl.h: Likewise.
 756
 757 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 758
 759         * i386-opc.h (Byte): Fix a typo.
 760
 761 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 762
 763         PR gas/5534
 764         * i386-gen.c (operand_type_init): Add Dword to
 765         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 766         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 767         Qword and Xmmword.
 768         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 769         Xmmword, Unspecified and Anysize.
 770         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 771         an alias of Xmmword.
 772
 773         * i386-opc.h (CheckSize): Removed.
 774         (Byte): Updated.
 775         (Word): Likewise.
 776         (Dword): Likewise.
 777         (Qword): Likewise.
 778         (Xmmword): Likewise.
 779         (FWait): Updated.
 780         (OTMax): Likewise.
 781         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 782         qword and xmmword.
 783         (Fword): New.
 784         (TBYTE): Likewise.
 785         (Unspecified): Likewise.
 786         (Anysize): Likewise.
 787         (i386_operand_type): Add byte, word, dword, fword, qword,
 788         tbyte xmmword, unspecified and anysize.
 789
 790         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 791         Tbyte, Xmmword, Unspecified and Anysize.
 792
 793         * i386-reg.tbl: Add size for accumulator.
 794
 795         * i386-init.h: Regenerated.
 796         * i386-tbl.h: Likewise.
 797
 798 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 799
 800         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 801         (REG_0F18): Updated.
 802         (reg_table): Updated.
 803         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 804         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 805
 806 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 807
 808         * i386-gen.c (set_bitfield): Use fail () on error.
 809
 810 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 811
 812         * i386-gen.c (lineno): New.
 813         (filename): Likewise.
 814         (set_bitfield): Report filename and line numer on error.
 815         (process_i386_opcodes): Set filename and update lineno.
 816         (process_i386_registers): Likewise.
 817
 818 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 819
 820         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 821         ATTSyntax.
 822
 823         * i386-opc.h (IntelMnemonic): Renamed to ..
 824         (ATTSyntax): This
 825         (Opcode_Modifier_Max): Updated.
 826         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 827         and intelsyntax.
 828
 829         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 830         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 831         * i386-tbl.h: Regenerated.
 832
 833 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 834
 835         * i386-gen.c: Update copyright to 2008.
 836         * i386-opc.h: Likewise.
 837         * i386-opc.tbl: Likewise.
 838
 839         * i386-init.h: Regenerated.
 840         * i386-tbl.h: Likewise.
 841
 842 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 843
 844         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 845         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 846         * i386-tbl.h: Regenerated.
 847
 848 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 849
 850         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 851         CpuSSE4_2_Or_ABM.
 852         (cpu_flags): Likewise.
 853
 854         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 855         (CpuSSE4_2_Or_ABM): Likewise.
 856         (CpuLM): Updated.
 857         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 858
 859         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 860         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 861         and CpuPadLock, respectively.
 862         * i386-init.h: Regenerated.
 863         * i386-tbl.h: Likewise.
 864
 865 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 866
 867         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 868
 869         * i386-opc.h (No_xSuf): Removed.
 870         (CheckSize): Updated.
 871
 872         * i386-tbl.h: Regenerated.
 873
 874 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 875
 876         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 877         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 878         CPU_SSE5_FLAGS.
 879         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 880
 881         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 882         (CpuLM): Updated.
 883         (i386_cpu_flags): Add cpusse4_2_or_abm.
 884
 885         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 886         CpuABM|CpuSSE4_2 on popcnt.
 887         * i386-init.h: Regenerated.
 888         * i386-tbl.h: Likewise.
 889
 890 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 891
 892         * i386-opc.h: Update comments.
 893
 894 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 895
 896         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 897         * i386-opc.h: Likewise.
 898         * i386-opc.tbl: Likewise.
 899
 900 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 901
 902         PR gas/5534
 903         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 904         Byte, Word, Dword, QWord and Xmmword.
 905
 906         * i386-opc.h (No_xSuf): New.
 907         (CheckSize): Likewise.
 908         (Byte): Likewise.
 909         (Word): Likewise.
 910         (Dword): Likewise.
 911         (QWord): Likewise.
 912         (Xmmword): Likewise.
 913         (FWait): Updated.
 914         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 915         Dword, QWord and Xmmword.
 916
 917         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 918         used.
 919         * i386-tbl.h: Regenerated.
 920
 921 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 922
 923         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 924         From Miod Vallat.
 925
 926 For older changes see ChangeLog-2007
 927 \f
 928 Local Variables:
 929 mode: change-log
 930 left-margin: 8
 931 fill-column: 74
 932 version-control: never
 933 End: