opcodes/ChangeLog

   1 2005-10-27  DJ Delorie  <dj@redhat.com>
   2
   3         * m32c-asm.c: Regenerate.
   4         * m32c-desc.c: Regenerate.
   5         * m32c-desc.h: Regenerate.
   6         * m32c-dis.c: Regenerate.
   7         * m32c-ibld.c: Regenerate.
   8         * m32c-opc.c: Regenerate.
   9         * m32c-opc.h: Regenerate.
  10
  11 2005-10-26  DJ Delorie  <dj@redhat.com>
  12
  13         * m32c-asm.c: Regenerate.
  14         * m32c-desc.c: Regenerate.
  15         * m32c-desc.h: Regenerate.
  16         * m32c-dis.c: Regenerate.
  17         * m32c-ibld.c: Regenerate.
  18         * m32c-opc.c: Regenerate.
  19         * m32c-opc.h: Regenerate.
  20
  21 2005-10-26  Paul Brook  <paul@codesourcery.com>
  22
  23         * arm-dis.c (arm_opcodes): Correct "sel" entry.
  24
  25 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  26
  27         * m32r-asm.c: Regenerate.
  28
  29 2005-10-25  DJ Delorie  <dj@redhat.com>
  30
  31         * m32c-asm.c: Regenerate.
  32         * m32c-desc.c: Regenerate.
  33         * m32c-desc.h: Regenerate.
  34         * m32c-dis.c: Regenerate.
  35         * m32c-ibld.c: Regenerate.
  36         * m32c-opc.c: Regenerate.
  37         * m32c-opc.h: Regenerate.
  38
  39 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
  40
  41         * configure.in: Add target architecture bfd_arch_z80.
  42         * configure: Regenerated.
  43         * disassemble.c (disassembler)<ARCH_z80>: Add case
  44         bfd_arch_z80.
  45         * z80-dis.c: New file.
  46
  47 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
  48
  49         * po/POTFILES.in: Regenerate.
  50         * po/opcodes.pot: Regenerate.
  51
  52 2005-10-24  Jan Beulich  <jbeulich@novell.com>
  53
  54         * ia64-asmtab.c: Regenerate.
  55
  56 2005-10-21  DJ Delorie  <dj@redhat.com>
  57
  58         * m32c-asm.c: Regenerate.
  59         * m32c-desc.c: Regenerate.
  60         * m32c-desc.h: Regenerate.
  61         * m32c-dis.c: Regenerate.
  62         * m32c-ibld.c: Regenerate.
  63         * m32c-opc.c: Regenerate.
  64         * m32c-opc.h: Regenerate.
  65
  66 2005-10-21  Nick Clifton  <nickc@redhat.com>
  67
  68         * bfin-dis.c: Tidy up code, removing redundant constructs.
  69
  70 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  71
  72         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
  73         instructions.
  74
  75 2005-10-18  Nick Clifton  <nickc@redhat.com>
  76
  77         * m32r-asm.c: Regenerate after updating m32r.opc.
  78
  79 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
  80
  81         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
  82         reading instruction from memory.
  83
  84 2005-10-18  Nick Clifton  <nickc@redhat.com>
  85
  86         * m32r-asm.c: Regenerate after updating m32r.opc.
  87
  88 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  89
  90         * m32r-asm.c: Regenerate after updating m32r.opc.
  91
  92 2005-10-08  James Lemke  <jim@wasabisystems.com>
  93
  94         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
  95         operations.
  96
  97 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
  98
  99         * ppc-dis.c (struct dis_private): Remove.
 100         (powerpc_dialect): Avoid aliasing warnings.
 101         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 102
 103 2005-09-30  Nick Clifton  <nickc@redhat.com>
 104
 105         * po/ga.po: New Irish translation.
 106         * configure.in (ALL_LINGUAS): Add "ga".
 107         * configure: Regenerate.
 108
 109 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 110
 111         * Makefile.am: Run "make dep-am".
 112         * Makefile.in: Regenerated.
 113         * aclocal.m4: Likewise.
 114         * configure: Likewise.
 115
 116 2005-09-30  Catherine Moore  <clm@cm00re.com>
 117
 118         * Makefile.am: Bfin support.
 119         * Makefile.in: Regenerated.
 120         * aclocal.m4: Regenerated.
 121         * bfin-dis.c: New file.
 122         * configure.in: Bfin support.
 123         * configure: Regenerated.
 124         * disassemble.c (ARCH_bfin): Define.
 125         (disassembler): Add case for bfd_arch_bfin.
 126
 127 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 128
 129         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 130         (indirEv): Use it.
 131         (stackEv): New.
 132         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 133         (dis386): Document and use new 'V' meta character. Use it for
 134         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 135         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 136         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 137         data prefix as used whenever DFLAG was examined. Handle 'V'.
 138         (intel_operand_size): Use stack_v_mode.
 139         (OP_E): Use stack_v_mode, but handle only the special case of
 140         64-bit mode without operand size override here; fall through to
 141         v_mode case otherwise.
 142         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 143         and no operand size override is present.
 144         (OP_J): Use get32s for obtaining the displacement also when rex64
 145         is present.
 146
 147 2005-09-08  Paul Brook  <paul@codesourcery.com>
 148
 149         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 150
 151 2005-09-06  Chao-ying Fu  <fu@mips.com>
 152
 153         * mips-opc.c (MT32): New define.
 154         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 155         bottom to avoid opcode collision with "mftr" and "mttr".
 156         Add MT instructions.
 157         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 158         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 159         formats.
 160
 161 2005-09-02  Paul Brook  <paul@codesourcery.com>
 162
 163         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 164
 165 2005-09-02  Paul Brook  <paul@codesourcery.com>
 166
 167         * arm-dis.c (coprocessor_opcodes): New.
 168         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 169         (print_insn_coprocessor): New function.
 170         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 171         format characters.
 172         (print_insn_thumb32): Use print_insn_coprocessor.
 173
 174 2005-08-30  Paul Brook  <paul@codesourcery.com>
 175
 176         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 177
 178 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 179
 180         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 181         re-use.
 182         (OP_E): Call intel_operand_size, move call site out of mode
 183         dependent code.
 184         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 185         ATTRIBUTE_UNUSED from parameters.
 186         (OP_OFF64): Likewise.
 187         (OP_ESreg): Call intel_operand_size.
 188         (OP_DSreg): Likewise.
 189         (OP_DIR): Use colon rather than semicolon as separator of far
 190         jump/call operands.
 191
 192 2005-08-25  Chao-ying Fu  <fu@mips.com>
 193
 194         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 195         (mips_builtin_opcodes): Add DSP instructions.
 196         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 197         mips64, mips64r2.
 198         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 199         operand formats.
 200
 201 2005-08-23  David Ung  <davidu@mips.com>
 202
 203         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 204         instructions to the table.
 205
 206 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 207
 208         * a29k-dis.c: Delete.
 209         * Makefile.am: Remove a29k support.
 210         * configure.in: Likewise.
 211         * disassemble.c: Likewise.
 212         * Makefile.in: Regenerate.
 213         * configure: Regenerate.
 214         * po/POTFILES.in: Regenerate.
 215
 216 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 217
 218         * ppc-dis.c (powerpc_dialect): Handle e300.
 219         (print_ppc_disassembler_options): Likewise.
 220         * ppc-opc.c (PPCE300): Define.
 221         (powerpc_opcodes): Mark icbt as available for the e300.
 222
 223 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 224
 225         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 226         Use "rp" instead of "%r2" in "b,l" insns.
 227
 228 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 229
 230         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 231         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 232         (main): Likewise.
 233         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 234         and 4 bit optional masks.
 235         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 236         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 237         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 238         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 239         (s390_opformats): Likewise.
 240         * s390-opc.txt: Add new instructions for cpu type z9-109.
 241
 242 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 243
 244         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 245
 246 2005-07-29  Paul Brook  <paul@codesourcery.com>
 247
 248         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 249
 250 2005-07-29  Paul Brook  <paul@codesourcery.com>
 251
 252         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 253         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 254
 255 2005-07-25  DJ Delorie  <dj@redhat.com>
 256
 257         * m32c-asm.c Regenerate.
 258         * m32c-dis.c Regenerate.
 259
 260 2005-07-20  DJ Delorie  <dj@redhat.com>
 261
 262         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 263         enums, so convert them to bit masks, which attributes are.
 264
 265 2005-07-18  Nick Clifton  <nickc@redhat.com>
 266
 267         * configure.in: Restore alpha ordering to list of arches.
 268         * configure: Regenerate.
 269         * disassemble.c: Restore alpha ordering to list of arches.
 270
 271 2005-07-18  Nick Clifton  <nickc@redhat.com>
 272
 273         * m32c-asm.c: Regenerate.
 274         * m32c-desc.c: Regenerate.
 275         * m32c-desc.h: Regenerate.
 276         * m32c-dis.c: Regenerate.
 277         * m32c-ibld.h: Regenerate.
 278         * m32c-opc.c: Regenerate.
 279         * m32c-opc.h: Regenerate.
 280
 281 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 282
 283         * i386-dis.c (PNI_Fixup): Update comment.
 284         (VMX_Fixup): Properly handle the suffix check.
 285
 286 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 287
 288         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 289         mfctl disassembly.
 290
 291 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 292
 293         * Makefile.am: Run "make dep-am".
 294         (stamp-m32c): Fix cpu dependencies.
 295         * Makefile.in: Regenerate.
 296         * ip2k-dis.c: Regenerate.
 297
 298 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 299
 300         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 301         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 302         (Em): New.
 303         (Gm): New.
 304         (VM): New.
 305         (dis386_twobyte): Updated entries 0x78 and 0x79.
 306         (twobyte_has_modrm): Likewise.
 307         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 308         (OP_G): Handle m_mode.
 309
 310 2005-07-14  Jim Blandy  <jimb@redhat.com>
 311
 312         Add support for the Renesas M32C and M16C.
 313         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 314         * m32c-desc.h, m32c-opc.h: New.
 315         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 316         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 317         m32c-opc.c.
 318         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 319         m32c-ibld.lo, m32c-opc.lo.
 320         (CLEANFILES): List stamp-m32c.
 321         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 322         (CGEN_CPUS): Add m32c.
 323         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 324         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 325         (m32c_opc_h): New variable.
 326         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 327         (m32c-opc.lo): New rules.
 328         * Makefile.in: Regenerated.
 329         * configure.in: Add case for bfd_m32c_arch.
 330         * configure: Regenerated.
 331         * disassemble.c (ARCH_m32c): New.
 332         [ARCH_m32c]: #include "m32c-desc.h".
 333         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 334         (disassemble_init_for_target) [ARCH_m32c]: Same.
 335
 336         * cgen-ops.h, cgen-types.h: New files.
 337         * Makefile.am (HFILES): List them.
 338         * Makefile.in: Regenerated.
 339
 340 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 341
 342         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 343         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 344         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 345         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 346         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 347         v850-dis.c: Fix format bugs.
 348         * ia64-gen.c (fail, warn): Add format attribute.
 349         * or32-opc.c (debug): Likewise.
 350
 351 2005-07-07  Khem Raj  <kraj@mvista.com>
 352
 353         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 354         disassembly pattern.
 355
 356 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 357
 358         * Makefile.am (stamp-m32r): Fix path to cpu files.
 359         (stamp-m32r, stamp-iq2000): Likewise.
 360         * Makefile.in: Regenerate.
 361         * m32r-asm.c: Regenerate.
 362         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 363         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 364
 365 2005-07-05  Nick Clifton  <nickc@redhat.com>
 366
 367         * iq2000-asm.c: Regenerate.
 368         * ms1-asm.c: Regenerate.
 369
 370 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 371
 372         * i386-dis.c (SVME_Fixup): New.
 373         (grps): Use it for the lidt entry.
 374         (PNI_Fixup): Call OP_M rather than OP_E.
 375         (INVLPG_Fixup): Likewise.
 376
 377 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 378
 379         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 380
 381 2005-07-01  Nick Clifton  <nickc@redhat.com>
 382
 383         * a29k-dis.c: Update to ISO C90 style function declarations and
 384         fix formatting.
 385         * alpha-opc.c: Likewise.
 386         * arc-dis.c: Likewise.
 387         * arc-opc.c: Likewise.
 388         * avr-dis.c: Likewise.
 389         * cgen-asm.in: Likewise.
 390         * cgen-dis.in: Likewise.
 391         * cgen-ibld.in: Likewise.
 392         * cgen-opc.c: Likewise.
 393         * cris-dis.c: Likewise.
 394         * d10v-dis.c: Likewise.
 395         * d30v-dis.c: Likewise.
 396         * d30v-opc.c: Likewise.
 397         * dis-buf.c: Likewise.
 398         * dlx-dis.c: Likewise.
 399         * h8300-dis.c: Likewise.
 400         * h8500-dis.c: Likewise.
 401         * hppa-dis.c: Likewise.
 402         * i370-dis.c: Likewise.
 403         * i370-opc.c: Likewise.
 404         * m10200-dis.c: Likewise.
 405         * m10300-dis.c: Likewise.
 406         * m68k-dis.c: Likewise.
 407         * m88k-dis.c: Likewise.
 408         * mips-dis.c: Likewise.
 409         * mmix-dis.c: Likewise.
 410         * msp430-dis.c: Likewise.
 411         * ns32k-dis.c: Likewise.
 412         * or32-dis.c: Likewise.
 413         * or32-opc.c: Likewise.
 414         * pdp11-dis.c: Likewise.
 415         * pj-dis.c: Likewise.
 416         * s390-dis.c: Likewise.
 417         * sh-dis.c: Likewise.
 418         * sh64-dis.c: Likewise.
 419         * sparc-dis.c: Likewise.
 420         * sparc-opc.c: Likewise.
 421         * sysdep.h: Likewise.
 422         * tic30-dis.c: Likewise.
 423         * tic4x-dis.c: Likewise.
 424         * tic80-dis.c: Likewise.
 425         * v850-dis.c: Likewise.
 426         * v850-opc.c: Likewise.
 427         * vax-dis.c: Likewise.
 428         * w65-dis.c: Likewise.
 429         * z8kgen.c: Likewise.
 430
 431         * fr30-*: Regenerate.
 432         * frv-*: Regenerate.
 433         * ip2k-*: Regenerate.
 434         * iq2000-*: Regenerate.
 435         * m32r-*: Regenerate.
 436         * ms1-*: Regenerate.
 437         * openrisc-*: Regenerate.
 438         * xstormy16-*: Regenerate.
 439
 440 2005-06-23  Ben Elliston  <bje@gnu.org>
 441
 442         * m68k-dis.c: Use ISC C90.
 443         * m68k-opc.c: Formatting fixes.
 444
 445 2005-06-16  David Ung  <davidu@mips.com>
 446
 447         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 448         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 449
 450 2005-06-15  Dave Brolley  <brolley@redhat.com>
 451
 452         Contribute Morpho ms1 on behalf of Red Hat
 453         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 454         ms1-opc.h: New files, Morpho ms1 target.
 455
 456         2004-05-14  Stan Cox  <scox@redhat.com>
 457
 458         * disassemble.c (ARCH_ms1): Define.
 459         (disassembler): Handle bfd_arch_ms1
 460
 461         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 462
 463         * Makefile.am, Makefile.in: Add ms1 target.
 464         * configure.in: Ditto.
 465
 466 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 467
 468         * arm-opc.h: Delete; fold contents into ...
 469         * arm-dis.c: ... here.  Move includes of internal COFF headers
 470         next to includes of internal ELF headers.
 471         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 472         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 473         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 474         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 475         (iwmmxt_wwnames, iwmmxt_wwssnames):
 476         Make const.
 477         (regnames): Remove iWMMXt coprocessor register sets.
 478         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 479         (get_arm_regnames): Adjust fourth argument to match above changes.
 480         (set_iwmmxt_regnames): Delete.
 481         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 482         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 483         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 484         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 485         ISO syntax for function pointer calls.
 486
 487 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 488
 489         * arm-dis.c: Split up the comments describing the format codes, so
 490         that the ARM and 16-bit Thumb opcode tables each have comments
 491         preceding them that describe all the codes, and only the codes,
 492         valid in those tables.  (32-bit Thumb table is already like this.)
 493         Reorder the lists in all three comments to match the order in
 494         which the codes are implemented.
 495         Remove all forward declarations of static functions.  Convert all
 496         function definitions to ISO C format.
 497         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 498         Return nothing.
 499         (print_insn_thumb16): Remove unused case 'I'.
 500         (print_insn): Update for changed calling convention of subroutines.
 501
 502 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 503
 504         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 505         hex (but retain it being displayed as signed). Remove redundant
 506         checks. Add handling of displacements for 16-bit addressing in Intel
 507         mode.
 508
 509 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 510
 511         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 512         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 513         masking of 'rm' in 16-bit memory address handling.
 514
 515 2005-05-19  Anton Blanchard  <anton@samba.org>
 516
 517         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 518         (print_ppc_disassembler_options): Document it.
 519         * ppc-opc.c (SVC_LEV): Define.
 520         (LEV): Allow optional operand.
 521         (POWER5): Define.
 522         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 523         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 524
 525 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 526
 527         * Makefile.in:  Regenerate.
 528
 529 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 530
 531         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 532         instructions.  Adjust disassembly of some opcodes to match
 533         unified syntax.
 534         (thumb32_opcodes): New table.
 535         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 536         two-halfword branches here.
 537         (print_insn_thumb32): New function.
 538         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 539         and print_insn_thumb32.  Be consistent about order of
 540         halfwords when printing 32-bit instructions.
 541
 542 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 543
 544         PR 843
 545         * i386-dis.c (branch_v_mode): New.
 546         (indirEv): Use branch_v_mode instead of v_mode.
 547         (OP_E): Handle branch_v_mode.
 548
 549 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 550
 551         * d10v-dis.c (dis_2_short): Support 64bit host.
 552
 553 2005-05-07  Nick Clifton  <nickc@redhat.com>
 554
 555         * po/nl.po: Updated translation.
 556
 557 2005-05-07  Nick Clifton  <nickc@redhat.com>
 558
 559         * Update the address and phone number of the FSF organization in
 560         the GPL notices in the following files:
 561         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 562         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 563         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 564         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 565         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 566         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 567         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 568         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 569         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 570         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 571         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 572         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 573         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 574         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 575         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 576         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 577         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 578         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 579         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 580         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 581         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 582         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 583         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 584         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 585         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 586         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 587         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 588         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 589         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 590         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 591         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 592         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 593         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 594
 595 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 596
 597         * ia64-opc.c: Include sysdep.h before libiberty.h.
 598
 599 2005-05-05  Nick Clifton  <nickc@redhat.com>
 600
 601         * configure.in (ALL_LINGUAS): Add vi.
 602         * configure: Regenerate.
 603         * po/vi.po: New.
 604
 605 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 606
 607         * configure.in: Fix the check for basename declaration.
 608         * configure: Regenerate.
 609
 610 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 611
 612         * ppc-opc.c (RTO): Define.
 613         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 614         entries to suit PPC440.
 615
 616 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 617
 618         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 619         Add xcrypt-ctr.
 620
 621 2005-04-14  Nick Clifton  <nickc@redhat.com>
 622
 623         * po/fi.po: New translation: Finnish.
 624         * configure.in (ALL_LINGUAS): Add fi.
 625         * configure: Regenerate.
 626
 627 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 628
 629         * Makefile.am (NO_WERROR): Define.
 630         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 631         * Makefile.in: Regenerate.
 632         * aclocal.m4: Regenerate.
 633         * configure: Regenerate.
 634
 635 2005-04-04  Nick Clifton  <nickc@redhat.com>
 636
 637         * fr30-asm.c: Regenerate.
 638         * frv-asm.c: Regenerate.
 639         * iq2000-asm.c: Regenerate.
 640         * m32r-asm.c: Regenerate.
 641         * openrisc-asm.c: Regenerate.
 642
 643 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 644
 645         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 646         visible operands in Intel mode. The first operand of monitor is
 647         %rax in 64-bit mode.
 648
 649 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 650
 651         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 652         easier future additions.
 653
 654 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 655
 656         * configure.in: Check for basename.
 657         * configure: Regenerate.
 658         * config.in: Ditto.
 659
 660 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 661
 662         * i386-dis.c (SEG_Fixup): New.
 663         (Sv): New.
 664         (dis386): Use "Sv" for 0x8c and 0x8e.
 665
 666 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 667             Nick Clifton  <nickc@redhat.com>
 668
 669         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 670         function entry mask addresses.
 671         (entry_addr_occupied_slots): New variable: The number of occupied
 672         elements in entry_addr.
 673         (entry_addr_total_slots): New variable: The total number of
 674         elements in entry_addr.
 675         (parse_disassembler_options): New function.  Fills in the entry_addr
 676         array.
 677         (free_entry_array): New function.  Release the memory used by the
 678         entry addr array.  Suppressed because there is no way to call it.
 679         (is_function_entry): Check if a given address is a function's
 680         start address by looking at supplied entry mask addresses and
 681         symbol information, if available.
 682         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 683
 684 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 685
 686         * cris-dis.c (print_with_operands): Use ~31L for long instead
 687         of ~31.
 688
 689 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 690
 691         * mmix-opc.c (O): Revert the last change.
 692         (Z): Likewise.
 693
 694 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 695
 696         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 697         (Z): Likewise.
 698
 699 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 700
 701         * mmix-opc.c (O, Z): Force expression as unsigned long.
 702
 703 2005-03-18  Nick Clifton  <nickc@redhat.com>
 704
 705         * ip2k-asm.c: Regenerate.
 706         * op/opcodes.pot: Regenerate.
 707
 708 2005-03-16  Nick Clifton  <nickc@redhat.com>
 709             Ben Elliston  <bje@au.ibm.com>
 710
 711         * configure.in (werror): New switch: Add -Werror to the
 712         compiler command line.  Enabled by default.  Disable via
 713         --disable-werror.
 714         * configure: Regenerate.
 715
 716 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 717
 718         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 719         BOOKE.
 720
 721 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 722
 723         * po/es.po: Commit new Spanish translation.
 724
 725         * po/fr.po: Commit new French translation.
 726
 727 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 728
 729         * vax-dis.c: Fix spelling error
 730         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 731         of just "Entry mask: < r1 ... >"
 732
 733 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 734
 735         * arm-dis.c (arm_opcodes): Document %E and %V.
 736         Add entries for v6T2 ARM instructions:
 737         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 738         (print_insn_arm): Add support for %E and %V.
 739         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 740
 741 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 742             Alan Modra  <amodra@bigpond.net.au>
 743
 744         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 745         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 746         (SPRG_MASK): Delete.
 747         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 748         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 749         mfsprg4..7 after msprg and consolidate.
 750
 751 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 752
 753         * vax-dis.c (entry_mask_bit): New array.
 754         (print_insn_vax): Decode function entry mask.
 755
 756 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 757
 758         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 759
 760 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 761
 762         * po/opcodes.pot: Regenerate.
 763
 764 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 765
 766         * arc-dis.c (a4_decoding_class): New enum.
 767         (dsmOneArcInst): Use the enum values for the decoding class.
 768         Remove redundant case in the switch for decodingClass value 11.
 769
 770 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 771
 772         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 773         accesses.
 774         (OP_C): Consider lock prefix in non-64-bit modes.
 775
 776 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 777
 778         * cris-dis.c (format_hex): Remove ineffective warning fix.
 779         * crx-dis.c (make_instruction): Warning fix.
 780         * frv-asm.c: Regenerate.
 781
 782 2005-02-23  Nick Clifton  <nickc@redhat.com>
 783
 784         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 785         read_memory.
 786
 787         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 788
 789         * crx-dis.c (make_instruction): Move argument structure into inner
 790         scope and ensure that all of its fields are initialised before
 791         they are used.
 792
 793         * fr30-asm.c: Regenerate.
 794         * fr30-dis.c: Regenerate.
 795         * frv-asm.c: Regenerate.
 796         * frv-dis.c: Regenerate.
 797         * ip2k-asm.c: Regenerate.
 798         * ip2k-dis.c: Regenerate.
 799         * iq2000-asm.c: Regenerate.
 800         * iq2000-dis.c: Regenerate.
 801         * m32r-asm.c: Regenerate.
 802         * m32r-dis.c: Regenerate.
 803         * openrisc-asm.c: Regenerate.
 804         * openrisc-dis.c: Regenerate.
 805         * xstormy16-asm.c: Regenerate.
 806         * xstormy16-dis.c: Regenerate.
 807
 808 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 809
 810         * arc-ext.c: Warning fixes.
 811         * arc-ext.h: Likewise.
 812         * cgen-opc.c: Likewise.
 813         * ia64-gen.c: Likewise.
 814         * maxq-dis.c: Likewise.
 815         * ns32k-dis.c: Likewise.
 816         * w65-dis.c: Likewise.
 817         * ia64-asmtab.c: Regenerate.
 818
 819 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 820
 821         * fr30-desc.c: Regenerate.
 822         * fr30-desc.h: Regenerate.
 823         * fr30-opc.c: Regenerate.
 824         * fr30-opc.h: Regenerate.
 825         * frv-desc.c: Regenerate.
 826         * frv-desc.h: Regenerate.
 827         * frv-opc.c: Regenerate.
 828         * frv-opc.h: Regenerate.
 829         * ip2k-desc.c: Regenerate.
 830         * ip2k-desc.h: Regenerate.
 831         * ip2k-opc.c: Regenerate.
 832         * ip2k-opc.h: Regenerate.
 833         * iq2000-desc.c: Regenerate.
 834         * iq2000-desc.h: Regenerate.
 835         * iq2000-opc.c: Regenerate.
 836         * iq2000-opc.h: Regenerate.
 837         * m32r-desc.c: Regenerate.
 838         * m32r-desc.h: Regenerate.
 839         * m32r-opc.c: Regenerate.
 840         * m32r-opc.h: Regenerate.
 841         * m32r-opinst.c: Regenerate.
 842         * openrisc-desc.c: Regenerate.
 843         * openrisc-desc.h: Regenerate.
 844         * openrisc-opc.c: Regenerate.
 845         * openrisc-opc.h: Regenerate.
 846         * xstormy16-desc.c: Regenerate.
 847         * xstormy16-desc.h: Regenerate.
 848         * xstormy16-opc.c: Regenerate.
 849         * xstormy16-opc.h: Regenerate.
 850
 851 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 852
 853         * Makefile.am: Run "make dep-am"
 854         * Makefile.in: Regenerate.
 855
 856 2005-02-15  Nick Clifton  <nickc@redhat.com>
 857
 858         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 859         compile time warnings.
 860         (print_keyword): Likewise.
 861         (default_print_insn): Likewise.
 862
 863         * fr30-desc.c: Regenerated.
 864         * fr30-desc.h: Regenerated.
 865         * fr30-dis.c: Regenerated.
 866         * fr30-opc.c: Regenerated.
 867         * fr30-opc.h: Regenerated.
 868         * frv-desc.c: Regenerated.
 869         * frv-dis.c: Regenerated.
 870         * frv-opc.c: Regenerated.
 871         * ip2k-asm.c: Regenerated.
 872         * ip2k-desc.c: Regenerated.
 873         * ip2k-desc.h: Regenerated.
 874         * ip2k-dis.c: Regenerated.
 875         * ip2k-opc.c: Regenerated.
 876         * ip2k-opc.h: Regenerated.
 877         * iq2000-desc.c: Regenerated.
 878         * iq2000-dis.c: Regenerated.
 879         * iq2000-opc.c: Regenerated.
 880         * m32r-asm.c: Regenerated.
 881         * m32r-desc.c: Regenerated.
 882         * m32r-desc.h: Regenerated.
 883         * m32r-dis.c: Regenerated.
 884         * m32r-opc.c: Regenerated.
 885         * m32r-opc.h: Regenerated.
 886         * m32r-opinst.c: Regenerated.
 887         * openrisc-desc.c: Regenerated.
 888         * openrisc-desc.h: Regenerated.
 889         * openrisc-dis.c: Regenerated.
 890         * openrisc-opc.c: Regenerated.
 891         * openrisc-opc.h: Regenerated.
 892         * xstormy16-desc.c: Regenerated.
 893         * xstormy16-desc.h: Regenerated.
 894         * xstormy16-dis.c: Regenerated.
 895         * xstormy16-opc.c: Regenerated.
 896         * xstormy16-opc.h: Regenerated.
 897
 898 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 899
 900         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 901         address.
 902
 903 2005-02-11  Nick Clifton  <nickc@redhat.com>
 904
 905         * iq2000-asm.c: Regenerate.
 906
 907         * frv-dis.c: Regenerate.
 908
 909 2005-02-07  Jim Blandy  <jimb@redhat.com>
 910
 911         * Makefile.am (CGEN): Load guile.scm before calling the main
 912         application script.
 913         * Makefile.in: Regenerated.
 914         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 915         Simply pass the cgen-opc.scm path to ${cgen} as its first
 916         argument; ${cgen} itself now contains the '-s', or whatever is
 917         appropriate for the Scheme being used.
 918
 919 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 920
 921         * configure: Regenerate to track ../gettext.m4.
 922
 923 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 924
 925         * ia64-gen.c (NELEMS): Define.
 926         (shrink): Generate alias with missing second predicate register when
 927         opcode has two outputs and these are both predicates.
 928         * ia64-opc-i.c (FULL17): Define.
 929         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 930         here to generate output template.
 931         (TBITCM, TNATCM): Undefine after use.
 932         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 933         first input. Add ld16 aliases without ar.csd as second output. Add
 934         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 935         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 936         ar.ccv as third/fourth inputs. Consolidate through...
 937         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 938         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 939         * ia64-asmtab.c: Regenerate.
 940
 941 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 942
 943         * configure: Regenerate to track ../gettext.m4 change.
 944
 945 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 946
 947         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 948         * frv-asm.c: Rebuilt.
 949         * frv-desc.c: Rebuilt.
 950         * frv-desc.h: Rebuilt.
 951         * frv-dis.c: Rebuilt.
 952         * frv-ibld.c: Rebuilt.
 953         * frv-opc.c: Rebuilt.
 954         * frv-opc.h: Rebuilt.
 955
 956 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 957
 958         * configure: Regenerate, ../gettext.m4 was updated.
 959
 960 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 961
 962         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 963         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 964         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 965         * mips-dis.c: Ditto.
 966
 967 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 968
 969         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 970
 971 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 972
 973         * mips-dis.c (no_aliases): New disassembly option flag.
 974         (set_default_mips_dis_options): Init no_aliases to zero.
 975         (parse_mips_dis_option): Handle no-aliases option.
 976         (print_insn_mips): Ignore table entries that are aliases
 977         if no_aliases is set.
 978         (print_insn_mips16): Ditto.
 979         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 980         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 981         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 982         * mips16-opc.c (mips16_opcodes): Ditto.
 983
 984 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 985
 986         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 987         (inheritance diagram): Add missing edge.
 988         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 989         easier for the testsuite.
 990         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 991         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 992         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 993         arch_sh2a_or_sh4_up child.
 994         (sh_table): Do renaming as above.
 995         Correct comment for ldc.l for gas testsuite to read.
 996         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 997         Correct comments for movy.w and movy.l for gas testsuite to read.
 998         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 999
1000 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1001
1002         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1003
1004 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1005
1006         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1007
1008 2005-01-10  Andreas Schwab  <schwab@suse.de>
1009
1010         * disassemble.c (disassemble_init_for_target) <case
1011         bfd_arch_ia64>: Set skip_zeroes to 16.
1012         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1013
1014 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
1015
1016         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1017
1018 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
1019
1020         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1021         memory references. Convert avr_operand() to C90 formatting.
1022
1023 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1024
1025         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1026
1027 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1028
1029         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1030         (no_op_insn): Initialize array with instructions that have no
1031         operands.
1032         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1033
1034 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1035
1036         * arm-dis.c: Correct top-level comment.
1037
1038 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1039
1040         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1041         architecuture defining the insn.
1042         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1043         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1044         field.
1045         Also include opcode/arm.h.
1046         * Makefile.am (arm-dis.lo): Update dependency list.
1047         * Makefile.in: Regenerate.
1048
1049 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1050
1051         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1052         reflect the change to the short immediate syntax.
1053
1054 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1055
1056         * or32-opc.c (debug): Warning fix.
1057         * po/POTFILES.in: Regenerate.
1058
1059         * maxq-dis.c: Formatting.
1060         (print_insn): Warning fix.
1061
1062 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1063
1064         * arm-dis.c (WORD_ADDRESS): Define.
1065         (print_insn): Use it.  Correct big-endian end-of-section handling.
1066
1067 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1068             Vineet Sharma      <vineets@noida.hcltech.com>
1069
1070         * maxq-dis.c: New file.
1071         * disassemble.c (ARCH_maxq): Define.
1072         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1073         instructions..
1074         * configure.in: Add case for bfd_maxq_arch.
1075         * configure: Regenerate.
1076         * Makefile.am: Add support for maxq-dis.c
1077         * Makefile.in: Regenerate.
1078         * aclocal.m4: Regenerate.
1079
1080 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1081
1082         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1083         mode.
1084         * crx-dis.c: Likewise.
1085
1086 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1087
1088         Generally, handle CRISv32.
1089         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1090         (struct cris_disasm_data): New type.
1091         (format_reg, format_hex, cris_constraint, print_flags)
1092         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1093         callers changed.
1094         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1095         (print_insn_crisv32_without_register_prefix)
1096         (print_insn_crisv10_v32_with_register_prefix)
1097         (print_insn_crisv10_v32_without_register_prefix)
1098         (cris_parse_disassembler_options): New functions.
1099         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1100         parameter.  All callers changed.
1101         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1102         failure.
1103         (cris_constraint) <case 'Y', 'U'>: New cases.
1104         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1105         for constraint 'n'.
1106         (print_with_operands) <case 'Y'>: New case.
1107         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1108         <case 'N', 'Y', 'Q'>: New cases.
1109         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1110         (print_insn_cris_with_register_prefix)
1111         (print_insn_cris_without_register_prefix): Call
1112         cris_parse_disassembler_options.
1113         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1114         for CRISv32 and the size of immediate operands.  New v32-only
1115         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1116         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1117         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1118         Change brp to be v3..v10.
1119         (cris_support_regs): New vector.
1120         (cris_opcodes): Update head comment.  New format characters '[',
1121         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1122         Add new opcodes for v32 and adjust existing opcodes to accommodate
1123         differences to earlier variants.
1124         (cris_cond15s): New vector.
1125
1126 2004-11-04 Jan Beulich <jbeulich@novell.com>
1127
1128         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1129         (indirEb): Remove.
1130         (Mp): Use f_mode rather than none at all.
1131         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1132         replaces what previously was x_mode; x_mode now means 128-bit SSE
1133         operands.
1134         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1135         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1136         pinsrw's second operand is Edqw.
1137         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1138         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1139         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1140         mode when an operand size override is present or always suffixing.
1141         More instructions will need to be added to this group.
1142         (putop): Handle new macro chars 'C' (short/long suffix selector),
1143         'I' (Intel mode override for following macro char), and 'J' (for
1144         adding the 'l' prefix to far branches in AT&T mode). When an
1145         alternative was specified in the template, honor macro character when
1146         specified for Intel mode.
1147         (OP_E): Handle new *_mode values. Correct pointer specifications for
1148         memory operands. Consolidate output of index register.
1149         (OP_G): Handle new *_mode values.
1150         (OP_I): Handle const_1_mode.
1151         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1152         respective opcode prefix bits have been consumed.
1153         (OP_EM, OP_EX): Provide some default handling for generating pointer
1154         specifications.
1155
1156 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1157
1158         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1159         COP_INST macro.
1160
1161 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1162
1163         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1164         (getregliststring): Support HI/LO and user registers.
1165         * crx-opc.c (crx_instruction): Update data structure according to the
1166         rearrangement done in CRX opcode header file.
1167         (crx_regtab):  Likewise.
1168         (crx_optab):  Likewise.
1169         (crx_instruction): Reorder load/stor instructions, remove unsupported
1170         formats.
1171         support new Co-Processor instruction 'cpi'.
1172
1173 2004-10-27  Nick Clifton  <nickc@redhat.com>
1174
1175         * opcodes/iq2000-asm.c: Regenerate.
1176         * opcodes/iq2000-desc.c: Regenerate.
1177         * opcodes/iq2000-desc.h: Regenerate.
1178         * opcodes/iq2000-dis.c: Regenerate.
1179         * opcodes/iq2000-ibld.c: Regenerate.
1180         * opcodes/iq2000-opc.c: Regenerate.
1181         * opcodes/iq2000-opc.h: Regenerate.
1182
1183 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1184
1185         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1186         us4, us5 (respectively).
1187         Remove unsupported 'popa' instruction.
1188         Reverse operands order in store co-processor instructions.
1189
1190 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1191
1192         * Makefile.am: Run "make dep-am"
1193         * Makefile.in: Regenerate.
1194
1195 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1196
1197         * xtensa-dis.c: Use ISO C90 formatting.
1198
1199 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1200
1201         * ppc-opc.c: Revert 2004-09-09 change.
1202
1203 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1204
1205         * xtensa-dis.c (state_names): Delete.
1206         (fetch_data): Use xtensa_isa_maxlength.
1207         (print_xtensa_operand): Replace operand parameter with opcode/operand
1208         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1209         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1210         instruction bundles.  Use xmalloc instead of malloc.
1211
1212 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1213
1214         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1215         initializers.
1216
1217 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1218
1219         * crx-opc.c (crx_instruction): Support Co-processor insns.
1220         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1221         (getregliststring): Change function to use the above enum.
1222         (print_arg): Handle CO-Processor insns.
1223         (crx_cinvs): Add 'b' option to invalidate the branch-target
1224         cache.
1225
1226 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1227
1228         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1229         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1230         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1231         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1232         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1233
1234 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1235
1236         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1237         rather than add it.
1238
1239 2004-09-30  Paul Brook  <paul@codesourcery.com>
1240
1241         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1242         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1243
1244 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1245
1246         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1247         (CONFIG_STATUS_DEPENDENCIES): New.
1248         (Makefile): Removed.
1249         (config.status): Likewise.
1250         * Makefile.in: Regenerated.
1251
1252 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1253
1254         * Makefile.am: Run "make dep-am".
1255         * Makefile.in: Regenerate.
1256         * aclocal.m4: Regenerate.
1257         * configure: Regenerate.
1258         * po/POTFILES.in: Regenerate.
1259         * po/opcodes.pot: Regenerate.
1260
1261 2004-09-11  Andreas Schwab  <schwab@suse.de>
1262
1263         * configure: Rebuild.
1264
1265 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1266
1267         * ppc-opc.c (L): Make this field not optional.
1268
1269 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1270
1271         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1272         Fix parameter to 'm[t|f]csr' insns.
1273
1274 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1275
1276         * configure.in: Autoupdate to autoconf 2.59.
1277         * aclocal.m4: Rebuild with aclocal 1.4p6.
1278         * configure: Rebuild with autoconf 2.59.
1279         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1280         bfd changes for autoconf 2.59 on the way).
1281         * config.in: Rebuild with autoheader 2.59.
1282
1283 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1284
1285         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1286
1287 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1288
1289         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1290         (GRPPADLCK2): New define.
1291         (twobyte_has_modrm): True for 0xA6.
1292         (grps): GRPPADLCK2 for opcode 0xA6.
1293
1294 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1295
1296         Introduce SH2a support.
1297         * sh-opc.h (arch_sh2a_base): Renumber.
1298         (arch_sh2a_nofpu_base): Remove.
1299         (arch_sh_base_mask): Adjust.
1300         (arch_opann_mask): New.
1301         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1302         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1303         (sh_table): Adjust whitespace.
1304         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1305         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1306         instruction list throughout.
1307         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1308         of arch_sh2a in instruction list throughout.
1309         (arch_sh2e_up): Accomodate above changes.
1310         (arch_sh2_up): Ditto.
1311         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1312         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1313         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1314         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1315         * sh-opc.h (arch_sh2a_nofpu): New.
1316         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1317         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1318         instruction.
1319         2004-01-20  DJ Delorie  <dj@redhat.com>
1320         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1321         2003-12-29  DJ Delorie  <dj@redhat.com>
1322         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1323         sh_opcode_info, sh_table): Add sh2a support.
1324         (arch_op32): New, to tag 32-bit opcodes.
1325         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1326         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1327         * sh-opc.h (arch_sh2a): Add.
1328         * sh-dis.c (arch_sh2a): Handle.
1329         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1330
1331 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1332
1333         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1334
1335 2004-07-22  Nick Clifton  <nickc@redhat.com>
1336
1337         PR/280
1338         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1339         insns - this is done by objdump itself.
1340         * h8500-dis.c (print_insn_h8500): Likewise.
1341
1342 2004-07-21  Jan Beulich <jbeulich@novell.com>
1343
1344         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1345         regardless of address size prefix in effect.
1346         (ptr_reg): Size or address registers does not depend on rex64, but
1347         on the presence of an address size override.
1348         (OP_MMX): Use rex.x only for xmm registers.
1349         (OP_EM): Use rex.z only for xmm registers.
1350
1351 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1352
1353         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1354         move/branch operations to the bottom so that VR5400 multimedia
1355         instructions take precedence in disassembly.
1356
1357 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1358
1359         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1360         ISA-specific "break" encoding.
1361
1362 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1363
1364         * arm-opc.h: Fix typo in comment.
1365
1366 2004-07-11  Andreas Schwab  <schwab@suse.de>
1367
1368         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1369
1370 2004-07-09  Andreas Schwab  <schwab@suse.de>
1371
1372         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1373
1374 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1375
1376         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1377         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1378         (crx-dis.lo): New target.
1379         (crx-opc.lo): Likewise.
1380         * Makefile.in: Regenerate.
1381         * configure.in: Handle bfd_crx_arch.
1382         * configure: Regenerate.
1383         * crx-dis.c: New file.
1384         * crx-opc.c: New file.
1385         * disassemble.c (ARCH_crx): Define.
1386         (disassembler): Handle ARCH_crx.
1387
1388 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1389
1390         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1391         * ia64-asmtab.c: Regnerate.
1392
1393 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1394
1395         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1396         (extract_fxm): Don't test dialect.
1397         (XFXFXM_MASK): Include the power4 bit.
1398         (XFXM): Add p4 param.
1399         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1400
1401 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1402
1403         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1404         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1405
1406 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1407
1408         * ppc-opc.c (BH, XLBH_MASK): Define.
1409         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1410
1411 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1412
1413         * i386-dis.c (x_mode): Comment.
1414         (two_source_ops): File scope.
1415         (float_mem): Correct fisttpll and fistpll.
1416         (float_mem_mode): New table.
1417         (dofloat): Use it.
1418         (OP_E): Correct intel mode PTR output.
1419         (ptr_reg): Use open_char and close_char.
1420         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1421         operands.  Set two_source_ops.
1422
1423 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1424
1425         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1426         instead of _raw_size.
1427
1428 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1429
1430         * ia64-gen.c (in_iclass): Handle more postinc st
1431         and ld variants.
1432         * ia64-asmtab.c: Rebuilt.
1433
1434 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1435
1436         * s390-opc.txt: Correct architecture mask for some opcodes.
1437         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1438         in the esa mode as well.
1439
1440 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1441
1442         * sh-dis.c (target_arch): Make unsigned.
1443         (print_insn_sh): Replace (most of) switch with a call to
1444         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1445         * sh-opc.h: Redefine architecture flags values.
1446         Add sh3-nommu architecture.
1447         Reorganise <arch>_up macros so they make more visual sense.
1448         (SH_MERGE_ARCH_SET): Define new macro.
1449         (SH_VALID_BASE_ARCH_SET): Likewise.
1450         (SH_VALID_MMU_ARCH_SET): Likewise.
1451         (SH_VALID_CO_ARCH_SET): Likewise.
1452         (SH_VALID_ARCH_SET): Likewise.
1453         (SH_MERGE_ARCH_SET_VALID): Likewise.
1454         (SH_ARCH_SET_HAS_FPU): Likewise.
1455         (SH_ARCH_SET_HAS_DSP): Likewise.
1456         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1457         (sh_get_arch_from_bfd_mach): Add prototype.
1458         (sh_get_arch_up_from_bfd_mach): Likewise.
1459         (sh_get_bfd_mach_from_arch_set): Likewise.
1460         (sh_merge_bfd_arc): Likewise.
1461
1462 2004-05-24  Peter Barada  <peter@the-baradas.com>
1463
1464         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1465         into new match_insn_m68k function.  Loop over canidate
1466         matches and select first that completely matches.
1467         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1468         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1469         to verify addressing for MAC/EMAC.
1470         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1471         reigster halves since 'fpu' and 'spl' look misleading.
1472         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1473         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1474         first, tighten up match masks.
1475         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1476         'size' from special case code in print_insn_m68k to
1477         determine decode size of insns.
1478
1479 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1480
1481         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1482         well as when -mpower4.
1483
1484 2004-05-13  Nick Clifton  <nickc@redhat.com>
1485
1486         * po/fr.po: Updated French translation.
1487
1488 2004-05-05  Peter Barada  <peter@the-baradas.com>
1489
1490         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1491         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1492         * m68k-op.c: Switch from ColdFire chips to core variants.
1493
1494 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1495
1496         PR 147.
1497         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1498
1499 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1500
1501         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1502         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1503
1504 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1505
1506         * sh-dis.c (print_insn_sh): Print the value in constant pool
1507         as a symbol if it looks like a symbol.
1508
1509 2004-04-22  Peter Barada <peter@the-baradas.com>
1510
1511         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1512         appropriate ColdFire architectures.
1513         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1514         mask addressing.
1515         Add EMAC instructions, fix MAC instructions. Remove
1516         macmw/macml/msacmw/msacml instructions since mask addressing now
1517         supported.
1518
1519 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1520
1521         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1522         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1523         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1524         macro.  Adjust all users.
1525
1526 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1527
1528         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1529         separately.
1530
1531 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1532
1533         * m32r-asm.c: Regenerate.
1534
1535 2004-03-29  Stan Shebs  <shebs@apple.com>
1536
1537         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1538         used.
1539
1540 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1541
1542         * aclocal.m4: Regenerate.
1543         * config.in: Regenerate.
1544         * configure: Regenerate.
1545         * po/POTFILES.in: Regenerate.
1546         * po/opcodes.pot: Regenerate.
1547
1548 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1549
1550         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1551         PPC_OPERANDS_GPR_0.
1552         * ppc-opc.c (RA0): Define.
1553         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1554         (RAOPT): Rename from RAO.  Update all uses.
1555         (powerpc_opcodes): Use RA0 as appropriate.
1556
1557 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1558
1559         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1560
1561 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1562
1563         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1564
1565 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1566
1567         * i386-dis.c (GRPPLOCK): Delete.
1568         (grps): Delete GRPPLOCK entry.
1569
1570 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1571
1572         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1573         (M, Mp): Use OP_M.
1574         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1575         (GRPPADLCK): Define.
1576         (dis386): Use NOP_Fixup on "nop".
1577         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1578         (twobyte_has_modrm): Set for 0xa7.
1579         (padlock_table): Delete.  Move to..
1580         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1581         and clflush.
1582         (print_insn): Revert PADLOCK_SPECIAL code.
1583         (OP_E): Delete sfence, lfence, mfence checks.
1584
1585 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1586
1587         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1588         (INVLPG_Fixup): New function.
1589         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1590
1591 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1592
1593         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1594         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1595         (padlock_table): New struct with PadLock instructions.
1596         (print_insn): Handle PADLOCK_SPECIAL.
1597
1598 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1599
1600         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1601         (OP_E): Twiddle clflush to sfence here.
1602
1603 2004-03-08  Nick Clifton  <nickc@redhat.com>
1604
1605         * po/de.po: Updated German translation.
1606
1607 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1608
1609         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1610         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1611         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1612         accordingly.
1613
1614 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1615
1616         * frv-asm.c: Regenerate.
1617         * frv-desc.c: Regenerate.
1618         * frv-desc.h: Regenerate.
1619         * frv-dis.c: Regenerate.
1620         * frv-ibld.c: Regenerate.
1621         * frv-opc.c: Regenerate.
1622         * frv-opc.h: Regenerate.
1623
1624 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1625
1626         * frv-desc.c, frv-opc.c: Regenerate.
1627
1628 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1629
1630         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1631
1632 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1633
1634         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1635         Also correct mistake in the comment.
1636
1637 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1638
1639         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1640         ensure that double registers have even numbers.
1641         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1642         that reserved instruction 0xfffd does not decode the same
1643         as 0xfdfd (ftrv).
1644         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1645         REG_N refers to a double register.
1646         Add REG_N_B01 nibble type and use it instead of REG_NM
1647         in ftrv.
1648         Adjust the bit patterns in a few comments.
1649
1650 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1651
1652         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1653
1654 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1655
1656         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1657
1658 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1659
1660         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1661
1662 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1663
1664         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1665         mtivor32, mtivor33, mtivor34.
1666
1667 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1668
1669         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1670
1671 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1672
1673         * arm-opc.h Maverick accumulator register opcode fixes.
1674
1675 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1676
1677         * m32r-dis.c: Regenerate.
1678
1679 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1680
1681         * sh-opc.h (sh_table): "fsrra", not "fssra".
1682
1683 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1684
1685         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1686         contraints.
1687
1688 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1689
1690         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1691
1692 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1693
1694         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1695         1.  Don't print scale factor on AT&T mode when index missing.
1696
1697 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1698
1699         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1700         when loaded into XR registers.
1701
1702 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1703
1704         * frv-desc.h: Regenerate.
1705         * frv-desc.c: Regenerate.
1706         * frv-opc.c: Regenerate.
1707
1708 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1709
1710         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1711
1712 2004-01-09  Paul Brook  <paul@codesourcery.com>
1713
1714         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1715         specific opcodes.
1716
1717 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1718
1719         * Makefile.am (libopcodes_la_DEPENDENCIES)
1720         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1721         comment about the problem.
1722         * Makefile.in: Regenerate.
1723
1724 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1725
1726         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1727         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1728         cut&paste errors in shifting/truncating numerical operands.
1729         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1730         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1731         (parse_uslo16): Likewise.
1732         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1733         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1734         (parse_s12): Likewise.
1735         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1736         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1737         (parse_uslo16): Likewise.
1738         (parse_uhi16): Parse gothi and gotfuncdeschi.
1739         (parse_d12): Parse got12 and gotfuncdesc12.
1740         (parse_s12): Likewise.
1741
1742 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1743
1744         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1745         instruction which looks similar to an 'rla' instruction.
1746
1747 For older changes see ChangeLog-0203
1748 \f
1749 Local Variables:
1750 mode: change-log
1751 left-margin: 8
1752 fill-column: 74
1753 version-control: never
1754 End: