opcodes/ChangeLog

   1 2005-03-18  Nick Clifton  <nickc@redhat.com>
   2
   3         * ip2k-asm.c: Regenerate.
   4         * op/opcodes.pot: Regenerate.
   5
   6 2005-03-16  Nick Clifton  <nickc@redhat.com>
   7             Ben Elliston  <bje@au.ibm.com>
   8
   9         * configure.in (werror): New switch: Add -Werror to the
  10         compiler command line.  Enabled by default.  Disable via
  11         --disable-werror.
  12         * configure: Regenerate.
  13
  14 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  15
  16         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  17         BOOKE.
  18
  19 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
  20
  21         * po/es.po: Commit new Spanish translation.
  22
  23         * po/fr.po: Commit new French translation.
  24
  25 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  26
  27         * vax-dis.c: Fix spelling error
  28         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
  29         of just "Entry mask: < r1 ... >"
  30
  31 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
  32
  33         * arm-dis.c (arm_opcodes): Document %E and %V.
  34         Add entries for v6T2 ARM instructions:
  35         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
  36         (print_insn_arm): Add support for %E and %V.
  37         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
  38
  39 2005-03-10  Jeff Baker  <jbaker@qnx.com>
  40             Alan Modra  <amodra@bigpond.net.au>
  41
  42         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
  43         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
  44         (SPRG_MASK): Delete.
  45         (XSPRG_MASK): Mask off extra bits now part of sprg field.
  46         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
  47         mfsprg4..7 after msprg and consolidate.
  48
  49 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  50
  51         * vax-dis.c (entry_mask_bit): New array.
  52         (print_insn_vax): Decode function entry mask.
  53
  54 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
  55
  56         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
  57
  58 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
  59
  60         * po/opcodes.pot: Regenerate.
  61
  62 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
  63
  64         * arc-dis.c (a4_decoding_class): New enum.
  65         (dsmOneArcInst): Use the enum values for the decoding class.
  66         Remove redundant case in the switch for decodingClass value 11.
  67
  68 2005-03-02  Jan Beulich  <jbeulich@novell.com>
  69
  70         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
  71         accesses.
  72         (OP_C): Consider lock prefix in non-64-bit modes.
  73
  74 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
  75
  76         * cris-dis.c (format_hex): Remove ineffective warning fix.
  77         * crx-dis.c (make_instruction): Warning fix.
  78         * frv-asm.c: Regenerate.
  79
  80 2005-02-23  Nick Clifton  <nickc@redhat.com>
  81
  82         * cgen-dis.in: Use bfd_byte for buffers that are passed to
  83         read_memory.
  84
  85         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
  86
  87         * crx-dis.c (make_instruction): Move argument structure into inner
  88         scope and ensure that all of its fields are initialised before
  89         they are used.
  90
  91         * fr30-asm.c: Regenerate.
  92         * fr30-dis.c: Regenerate.
  93         * frv-asm.c: Regenerate.
  94         * frv-dis.c: Regenerate.
  95         * ip2k-asm.c: Regenerate.
  96         * ip2k-dis.c: Regenerate.
  97         * iq2000-asm.c: Regenerate.
  98         * iq2000-dis.c: Regenerate.
  99         * m32r-asm.c: Regenerate.
 100         * m32r-dis.c: Regenerate.
 101         * openrisc-asm.c: Regenerate.
 102         * openrisc-dis.c: Regenerate.
 103         * xstormy16-asm.c: Regenerate.
 104         * xstormy16-dis.c: Regenerate.
 105
 106 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 107
 108         * arc-ext.c: Warning fixes.
 109         * arc-ext.h: Likewise.
 110         * cgen-opc.c: Likewise.
 111         * ia64-gen.c: Likewise.
 112         * maxq-dis.c: Likewise.
 113         * ns32k-dis.c: Likewise.
 114         * w65-dis.c: Likewise.
 115         * ia64-asmtab.c: Regenerate.
 116
 117 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 118
 119         * fr30-desc.c: Regenerate.
 120         * fr30-desc.h: Regenerate.
 121         * fr30-opc.c: Regenerate.
 122         * fr30-opc.h: Regenerate.
 123         * frv-desc.c: Regenerate.
 124         * frv-desc.h: Regenerate.
 125         * frv-opc.c: Regenerate.
 126         * frv-opc.h: Regenerate.
 127         * ip2k-desc.c: Regenerate.
 128         * ip2k-desc.h: Regenerate.
 129         * ip2k-opc.c: Regenerate.
 130         * ip2k-opc.h: Regenerate.
 131         * iq2000-desc.c: Regenerate.
 132         * iq2000-desc.h: Regenerate.
 133         * iq2000-opc.c: Regenerate.
 134         * iq2000-opc.h: Regenerate.
 135         * m32r-desc.c: Regenerate.
 136         * m32r-desc.h: Regenerate.
 137         * m32r-opc.c: Regenerate.
 138         * m32r-opc.h: Regenerate.
 139         * m32r-opinst.c: Regenerate.
 140         * openrisc-desc.c: Regenerate.
 141         * openrisc-desc.h: Regenerate.
 142         * openrisc-opc.c: Regenerate.
 143         * openrisc-opc.h: Regenerate.
 144         * xstormy16-desc.c: Regenerate.
 145         * xstormy16-desc.h: Regenerate.
 146         * xstormy16-opc.c: Regenerate.
 147         * xstormy16-opc.h: Regenerate.
 148
 149 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 150
 151         * Makefile.am: Run "make dep-am"
 152         * Makefile.in: Regenerate.
 153
 154 2005-02-15  Nick Clifton  <nickc@redhat.com>
 155
 156         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 157         compile time warnings.
 158         (print_keyword): Likewise.
 159         (default_print_insn): Likewise.
 160
 161         * fr30-desc.c: Regenerated.
 162         * fr30-desc.h: Regenerated.
 163         * fr30-dis.c: Regenerated.
 164         * fr30-opc.c: Regenerated.
 165         * fr30-opc.h: Regenerated.
 166         * frv-desc.c: Regenerated.
 167         * frv-dis.c: Regenerated.
 168         * frv-opc.c: Regenerated.
 169         * ip2k-asm.c: Regenerated.
 170         * ip2k-desc.c: Regenerated.
 171         * ip2k-desc.h: Regenerated.
 172         * ip2k-dis.c: Regenerated.
 173         * ip2k-opc.c: Regenerated.
 174         * ip2k-opc.h: Regenerated.
 175         * iq2000-desc.c: Regenerated.
 176         * iq2000-dis.c: Regenerated.
 177         * iq2000-opc.c: Regenerated.
 178         * m32r-asm.c: Regenerated.
 179         * m32r-desc.c: Regenerated.
 180         * m32r-desc.h: Regenerated.
 181         * m32r-dis.c: Regenerated.
 182         * m32r-opc.c: Regenerated.
 183         * m32r-opc.h: Regenerated.
 184         * m32r-opinst.c: Regenerated.
 185         * openrisc-desc.c: Regenerated.
 186         * openrisc-desc.h: Regenerated.
 187         * openrisc-dis.c: Regenerated.
 188         * openrisc-opc.c: Regenerated.
 189         * openrisc-opc.h: Regenerated.
 190         * xstormy16-desc.c: Regenerated.
 191         * xstormy16-desc.h: Regenerated.
 192         * xstormy16-dis.c: Regenerated.
 193         * xstormy16-opc.c: Regenerated.
 194         * xstormy16-opc.h: Regenerated.
 195
 196 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 197
 198         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 199         address.
 200
 201 2005-02-11  Nick Clifton  <nickc@redhat.com>
 202
 203         * iq2000-asm.c: Regenerate.
 204
 205         * frv-dis.c: Regenerate.
 206
 207 2005-02-07  Jim Blandy  <jimb@redhat.com>
 208
 209         * Makefile.am (CGEN): Load guile.scm before calling the main
 210         application script.
 211         * Makefile.in: Regenerated.
 212         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 213         Simply pass the cgen-opc.scm path to ${cgen} as its first
 214         argument; ${cgen} itself now contains the '-s', or whatever is
 215         appropriate for the Scheme being used.
 216
 217 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 218
 219         * configure: Regenerate to track ../gettext.m4.
 220
 221 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 222
 223         * ia64-gen.c (NELEMS): Define.
 224         (shrink): Generate alias with missing second predicate register when
 225         opcode has two outputs and these are both predicates.
 226         * ia64-opc-i.c (FULL17): Define.
 227         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 228         here to generate output template.
 229         (TBITCM, TNATCM): Undefine after use.
 230         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 231         first input. Add ld16 aliases without ar.csd as second output. Add
 232         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 233         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 234         ar.ccv as third/fourth inputs. Consolidate through...
 235         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 236         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 237         * ia64-asmtab.c: Regenerate.
 238
 239 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 240
 241         * configure: Regenerate to track ../gettext.m4 change.
 242
 243 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 244
 245         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 246         * frv-asm.c: Rebuilt.
 247         * frv-desc.c: Rebuilt.
 248         * frv-desc.h: Rebuilt.
 249         * frv-dis.c: Rebuilt.
 250         * frv-ibld.c: Rebuilt.
 251         * frv-opc.c: Rebuilt.
 252         * frv-opc.h: Rebuilt.
 253
 254 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 255
 256         * configure: Regenerate, ../gettext.m4 was updated.
 257
 258 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 259
 260         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 261         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 262         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 263         * mips-dis.c: Ditto.
 264
 265 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 266
 267         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 268
 269 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 270
 271         * mips-dis.c (no_aliases): New disassembly option flag.
 272         (set_default_mips_dis_options): Init no_aliases to zero.
 273         (parse_mips_dis_option): Handle no-aliases option.
 274         (print_insn_mips): Ignore table entries that are aliases
 275         if no_aliases is set.
 276         (print_insn_mips16): Ditto.
 277         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 278         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 279         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 280         * mips16-opc.c (mips16_opcodes): Ditto.
 281
 282 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 283
 284         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 285         (inheritance diagram): Add missing edge.
 286         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 287         easier for the testsuite.
 288         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 289         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 290         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 291         arch_sh2a_or_sh4_up child.
 292         (sh_table): Do renaming as above.
 293         Correct comment for ldc.l for gas testsuite to read.
 294         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 295         Correct comments for movy.w and movy.l for gas testsuite to read.
 296         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 297
 298 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 299
 300         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 301
 302 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 303
 304         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 305
 306 2005-01-10  Andreas Schwab  <schwab@suse.de>
 307
 308         * disassemble.c (disassemble_init_for_target) <case
 309         bfd_arch_ia64>: Set skip_zeroes to 16.
 310         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 311
 312 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 313
 314         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 315
 316 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 317
 318         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 319         memory references. Convert avr_operand() to C90 formatting.
 320
 321 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 322
 323         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 324
 325 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 326
 327         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 328         (no_op_insn): Initialize array with instructions that have no
 329         operands.
 330         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 331
 332 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 333
 334         * arm-dis.c: Correct top-level comment.
 335
 336 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 337
 338         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 339         architecuture defining the insn.
 340         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 341         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 342         field.
 343         Also include opcode/arm.h.
 344         * Makefile.am (arm-dis.lo): Update dependency list.
 345         * Makefile.in: Regenerate.
 346
 347 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 348
 349         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 350         reflect the change to the short immediate syntax.
 351
 352 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 353
 354         * or32-opc.c (debug): Warning fix.
 355         * po/POTFILES.in: Regenerate.
 356
 357         * maxq-dis.c: Formatting.
 358         (print_insn): Warning fix.
 359
 360 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 361
 362         * arm-dis.c (WORD_ADDRESS): Define.
 363         (print_insn): Use it.  Correct big-endian end-of-section handling.
 364
 365 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 366             Vineet Sharma      <vineets@noida.hcltech.com>
 367
 368         * maxq-dis.c: New file.
 369         * disassemble.c (ARCH_maxq): Define.
 370         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 371         instructions..
 372         * configure.in: Add case for bfd_maxq_arch.
 373         * configure: Regenerate.
 374         * Makefile.am: Add support for maxq-dis.c
 375         * Makefile.in: Regenerate.
 376         * aclocal.m4: Regenerate.
 377
 378 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 379
 380         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 381         mode.
 382         * crx-dis.c: Likewise.
 383
 384 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 385
 386         Generally, handle CRISv32.
 387         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 388         (struct cris_disasm_data): New type.
 389         (format_reg, format_hex, cris_constraint, print_flags)
 390         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 391         callers changed.
 392         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 393         (print_insn_crisv32_without_register_prefix)
 394         (print_insn_crisv10_v32_with_register_prefix)
 395         (print_insn_crisv10_v32_without_register_prefix)
 396         (cris_parse_disassembler_options): New functions.
 397         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 398         parameter.  All callers changed.
 399         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 400         failure.
 401         (cris_constraint) <case 'Y', 'U'>: New cases.
 402         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 403         for constraint 'n'.
 404         (print_with_operands) <case 'Y'>: New case.
 405         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 406         <case 'N', 'Y', 'Q'>: New cases.
 407         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 408         (print_insn_cris_with_register_prefix)
 409         (print_insn_cris_without_register_prefix): Call
 410         cris_parse_disassembler_options.
 411         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 412         for CRISv32 and the size of immediate operands.  New v32-only
 413         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 414         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 415         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 416         Change brp to be v3..v10.
 417         (cris_support_regs): New vector.
 418         (cris_opcodes): Update head comment.  New format characters '[',
 419         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 420         Add new opcodes for v32 and adjust existing opcodes to accommodate
 421         differences to earlier variants.
 422         (cris_cond15s): New vector.
 423
 424 2004-11-04 Jan Beulich <jbeulich@novell.com>
 425
 426         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 427         (indirEb): Remove.
 428         (Mp): Use f_mode rather than none at all.
 429         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 430         replaces what previously was x_mode; x_mode now means 128-bit SSE
 431         operands.
 432         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 433         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 434         pinsrw's second operand is Edqw.
 435         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 436         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 437         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 438         mode when an operand size override is present or always suffixing.
 439         More instructions will need to be added to this group.
 440         (putop): Handle new macro chars 'C' (short/long suffix selector),
 441         'I' (Intel mode override for following macro char), and 'J' (for
 442         adding the 'l' prefix to far branches in AT&T mode). When an
 443         alternative was specified in the template, honor macro character when
 444         specified for Intel mode.
 445         (OP_E): Handle new *_mode values. Correct pointer specifications for
 446         memory operands. Consolidate output of index register.
 447         (OP_G): Handle new *_mode values.
 448         (OP_I): Handle const_1_mode.
 449         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 450         respective opcode prefix bits have been consumed.
 451         (OP_EM, OP_EX): Provide some default handling for generating pointer
 452         specifications.
 453
 454 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 455
 456         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 457         COP_INST macro.
 458
 459 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 460
 461         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 462         (getregliststring): Support HI/LO and user registers.
 463         * crx-opc.c (crx_instruction): Update data structure according to the
 464         rearrangement done in CRX opcode header file.
 465         (crx_regtab):  Likewise.
 466         (crx_optab):  Likewise.
 467         (crx_instruction): Reorder load/stor instructions, remove unsupported
 468         formats.
 469         support new Co-Processor instruction 'cpi'.
 470
 471 2004-10-27  Nick Clifton  <nickc@redhat.com>
 472
 473         * opcodes/iq2000-asm.c: Regenerate.
 474         * opcodes/iq2000-desc.c: Regenerate.
 475         * opcodes/iq2000-desc.h: Regenerate.
 476         * opcodes/iq2000-dis.c: Regenerate.
 477         * opcodes/iq2000-ibld.c: Regenerate.
 478         * opcodes/iq2000-opc.c: Regenerate.
 479         * opcodes/iq2000-opc.h: Regenerate.
 480
 481 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 482
 483         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 484         us4, us5 (respectively).
 485         Remove unsupported 'popa' instruction.
 486         Reverse operands order in store co-processor instructions.
 487
 488 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 489
 490         * Makefile.am: Run "make dep-am"
 491         * Makefile.in: Regenerate.
 492
 493 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 494
 495         * xtensa-dis.c: Use ISO C90 formatting.
 496
 497 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 498
 499         * ppc-opc.c: Revert 2004-09-09 change.
 500
 501 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 502
 503         * xtensa-dis.c (state_names): Delete.
 504         (fetch_data): Use xtensa_isa_maxlength.
 505         (print_xtensa_operand): Replace operand parameter with opcode/operand
 506         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 507         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 508         instruction bundles.  Use xmalloc instead of malloc.
 509
 510 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 511
 512         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 513         initializers.
 514
 515 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 516
 517         * crx-opc.c (crx_instruction): Support Co-processor insns.
 518         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 519         (getregliststring): Change function to use the above enum.
 520         (print_arg): Handle CO-Processor insns.
 521         (crx_cinvs): Add 'b' option to invalidate the branch-target
 522         cache.
 523
 524 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 525
 526         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 527         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 528         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 529         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 530         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 531
 532 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 533
 534         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 535         rather than add it.
 536
 537 2004-09-30  Paul Brook  <paul@codesourcery.com>
 538
 539         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 540         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 541
 542 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 543
 544         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 545         (CONFIG_STATUS_DEPENDENCIES): New.
 546         (Makefile): Removed.
 547         (config.status): Likewise.
 548         * Makefile.in: Regenerated.
 549
 550 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 551
 552         * Makefile.am: Run "make dep-am".
 553         * Makefile.in: Regenerate.
 554         * aclocal.m4: Regenerate.
 555         * configure: Regenerate.
 556         * po/POTFILES.in: Regenerate.
 557         * po/opcodes.pot: Regenerate.
 558
 559 2004-09-11  Andreas Schwab  <schwab@suse.de>
 560
 561         * configure: Rebuild.
 562
 563 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 564
 565         * ppc-opc.c (L): Make this field not optional.
 566
 567 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 568
 569         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 570         Fix parameter to 'm[t|f]csr' insns.
 571
 572 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 573
 574         * configure.in: Autoupdate to autoconf 2.59.
 575         * aclocal.m4: Rebuild with aclocal 1.4p6.
 576         * configure: Rebuild with autoconf 2.59.
 577         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 578         bfd changes for autoconf 2.59 on the way).
 579         * config.in: Rebuild with autoheader 2.59.
 580
 581 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 582
 583         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 584
 585 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 586
 587         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 588         (GRPPADLCK2): New define.
 589         (twobyte_has_modrm): True for 0xA6.
 590         (grps): GRPPADLCK2 for opcode 0xA6.
 591
 592 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 593
 594         Introduce SH2a support.
 595         * sh-opc.h (arch_sh2a_base): Renumber.
 596         (arch_sh2a_nofpu_base): Remove.
 597         (arch_sh_base_mask): Adjust.
 598         (arch_opann_mask): New.
 599         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 600         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 601         (sh_table): Adjust whitespace.
 602         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 603         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 604         instruction list throughout.
 605         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 606         of arch_sh2a in instruction list throughout.
 607         (arch_sh2e_up): Accomodate above changes.
 608         (arch_sh2_up): Ditto.
 609         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 610         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 611         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 612         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 613         * sh-opc.h (arch_sh2a_nofpu): New.
 614         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 615         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 616         instruction.
 617         2004-01-20  DJ Delorie  <dj@redhat.com>
 618         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 619         2003-12-29  DJ Delorie  <dj@redhat.com>
 620         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 621         sh_opcode_info, sh_table): Add sh2a support.
 622         (arch_op32): New, to tag 32-bit opcodes.
 623         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 624         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 625         * sh-opc.h (arch_sh2a): Add.
 626         * sh-dis.c (arch_sh2a): Handle.
 627         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 628
 629 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 630
 631         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 632
 633 2004-07-22  Nick Clifton  <nickc@redhat.com>
 634
 635         PR/280
 636         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 637         insns - this is done by objdump itself.
 638         * h8500-dis.c (print_insn_h8500): Likewise.
 639
 640 2004-07-21  Jan Beulich <jbeulich@novell.com>
 641
 642         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 643         regardless of address size prefix in effect.
 644         (ptr_reg): Size or address registers does not depend on rex64, but
 645         on the presence of an address size override.
 646         (OP_MMX): Use rex.x only for xmm registers.
 647         (OP_EM): Use rex.z only for xmm registers.
 648
 649 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 650
 651         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 652         move/branch operations to the bottom so that VR5400 multimedia
 653         instructions take precedence in disassembly.
 654
 655 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 656
 657         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 658         ISA-specific "break" encoding.
 659
 660 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 661
 662         * arm-opc.h: Fix typo in comment.
 663
 664 2004-07-11  Andreas Schwab  <schwab@suse.de>
 665
 666         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 667
 668 2004-07-09  Andreas Schwab  <schwab@suse.de>
 669
 670         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 671
 672 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 673
 674         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 675         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 676         (crx-dis.lo): New target.
 677         (crx-opc.lo): Likewise.
 678         * Makefile.in: Regenerate.
 679         * configure.in: Handle bfd_crx_arch.
 680         * configure: Regenerate.
 681         * crx-dis.c: New file.
 682         * crx-opc.c: New file.
 683         * disassemble.c (ARCH_crx): Define.
 684         (disassembler): Handle ARCH_crx.
 685
 686 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 687
 688         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 689         * ia64-asmtab.c: Regnerate.
 690
 691 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 692
 693         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 694         (extract_fxm): Don't test dialect.
 695         (XFXFXM_MASK): Include the power4 bit.
 696         (XFXM): Add p4 param.
 697         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 698
 699 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 700
 701         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 702         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 703
 704 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 705
 706         * ppc-opc.c (BH, XLBH_MASK): Define.
 707         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 708
 709 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 710
 711         * i386-dis.c (x_mode): Comment.
 712         (two_source_ops): File scope.
 713         (float_mem): Correct fisttpll and fistpll.
 714         (float_mem_mode): New table.
 715         (dofloat): Use it.
 716         (OP_E): Correct intel mode PTR output.
 717         (ptr_reg): Use open_char and close_char.
 718         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 719         operands.  Set two_source_ops.
 720
 721 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 722
 723         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 724         instead of _raw_size.
 725
 726 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 727
 728         * ia64-gen.c (in_iclass): Handle more postinc st
 729         and ld variants.
 730         * ia64-asmtab.c: Rebuilt.
 731
 732 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 733
 734         * s390-opc.txt: Correct architecture mask for some opcodes.
 735         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 736         in the esa mode as well.
 737
 738 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 739
 740         * sh-dis.c (target_arch): Make unsigned.
 741         (print_insn_sh): Replace (most of) switch with a call to
 742         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 743         * sh-opc.h: Redefine architecture flags values.
 744         Add sh3-nommu architecture.
 745         Reorganise <arch>_up macros so they make more visual sense.
 746         (SH_MERGE_ARCH_SET): Define new macro.
 747         (SH_VALID_BASE_ARCH_SET): Likewise.
 748         (SH_VALID_MMU_ARCH_SET): Likewise.
 749         (SH_VALID_CO_ARCH_SET): Likewise.
 750         (SH_VALID_ARCH_SET): Likewise.
 751         (SH_MERGE_ARCH_SET_VALID): Likewise.
 752         (SH_ARCH_SET_HAS_FPU): Likewise.
 753         (SH_ARCH_SET_HAS_DSP): Likewise.
 754         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 755         (sh_get_arch_from_bfd_mach): Add prototype.
 756         (sh_get_arch_up_from_bfd_mach): Likewise.
 757         (sh_get_bfd_mach_from_arch_set): Likewise.
 758         (sh_merge_bfd_arc): Likewise.
 759
 760 2004-05-24  Peter Barada  <peter@the-baradas.com>
 761
 762         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 763         into new match_insn_m68k function.  Loop over canidate
 764         matches and select first that completely matches.
 765         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 766         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 767         to verify addressing for MAC/EMAC.
 768         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 769         reigster halves since 'fpu' and 'spl' look misleading.
 770         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 771         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 772         first, tighten up match masks.
 773         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 774         'size' from special case code in print_insn_m68k to
 775         determine decode size of insns.
 776
 777 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 778
 779         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 780         well as when -mpower4.
 781
 782 2004-05-13  Nick Clifton  <nickc@redhat.com>
 783
 784         * po/fr.po: Updated French translation.
 785
 786 2004-05-05  Peter Barada  <peter@the-baradas.com>
 787
 788         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 789         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 790         * m68k-op.c: Switch from ColdFire chips to core variants.
 791
 792 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 793
 794         PR 147.
 795         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 796
 797 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 798
 799         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 800         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 801
 802 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 803
 804         * sh-dis.c (print_insn_sh): Print the value in constant pool
 805         as a symbol if it looks like a symbol.
 806
 807 2004-04-22  Peter Barada <peter@the-baradas.com>
 808
 809         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 810         appropriate ColdFire architectures.
 811         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 812         mask addressing.
 813         Add EMAC instructions, fix MAC instructions. Remove
 814         macmw/macml/msacmw/msacml instructions since mask addressing now
 815         supported.
 816
 817 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 818
 819         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 820         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 821         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 822         macro.  Adjust all users.
 823
 824 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 825
 826         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 827         separately.
 828
 829 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 830
 831         * m32r-asm.c: Regenerate.
 832
 833 2004-03-29  Stan Shebs  <shebs@apple.com>
 834
 835         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 836         used.
 837
 838 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 839
 840         * aclocal.m4: Regenerate.
 841         * config.in: Regenerate.
 842         * configure: Regenerate.
 843         * po/POTFILES.in: Regenerate.
 844         * po/opcodes.pot: Regenerate.
 845
 846 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 847
 848         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 849         PPC_OPERANDS_GPR_0.
 850         * ppc-opc.c (RA0): Define.
 851         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 852         (RAOPT): Rename from RAO.  Update all uses.
 853         (powerpc_opcodes): Use RA0 as appropriate.
 854
 855 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 856
 857         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 858
 859 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 860
 861         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 862
 863 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 864
 865         * i386-dis.c (GRPPLOCK): Delete.
 866         (grps): Delete GRPPLOCK entry.
 867
 868 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 869
 870         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 871         (M, Mp): Use OP_M.
 872         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 873         (GRPPADLCK): Define.
 874         (dis386): Use NOP_Fixup on "nop".
 875         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 876         (twobyte_has_modrm): Set for 0xa7.
 877         (padlock_table): Delete.  Move to..
 878         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 879         and clflush.
 880         (print_insn): Revert PADLOCK_SPECIAL code.
 881         (OP_E): Delete sfence, lfence, mfence checks.
 882
 883 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 884
 885         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 886         (INVLPG_Fixup): New function.
 887         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 888
 889 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 890
 891         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 892         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 893         (padlock_table): New struct with PadLock instructions.
 894         (print_insn): Handle PADLOCK_SPECIAL.
 895
 896 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 897
 898         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 899         (OP_E): Twiddle clflush to sfence here.
 900
 901 2004-03-08  Nick Clifton  <nickc@redhat.com>
 902
 903         * po/de.po: Updated German translation.
 904
 905 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 906
 907         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 908         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 909         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 910         accordingly.
 911
 912 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 913
 914         * frv-asm.c: Regenerate.
 915         * frv-desc.c: Regenerate.
 916         * frv-desc.h: Regenerate.
 917         * frv-dis.c: Regenerate.
 918         * frv-ibld.c: Regenerate.
 919         * frv-opc.c: Regenerate.
 920         * frv-opc.h: Regenerate.
 921
 922 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 923
 924         * frv-desc.c, frv-opc.c: Regenerate.
 925
 926 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 927
 928         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 929
 930 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 931
 932         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 933         Also correct mistake in the comment.
 934
 935 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 936
 937         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 938         ensure that double registers have even numbers.
 939         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 940         that reserved instruction 0xfffd does not decode the same
 941         as 0xfdfd (ftrv).
 942         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 943         REG_N refers to a double register.
 944         Add REG_N_B01 nibble type and use it instead of REG_NM
 945         in ftrv.
 946         Adjust the bit patterns in a few comments.
 947
 948 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 949
 950         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 951
 952 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 953
 954         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 955
 956 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 957
 958         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 959
 960 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 961
 962         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 963         mtivor32, mtivor33, mtivor34.
 964
 965 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 966
 967         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 968
 969 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 970
 971         * arm-opc.h Maverick accumulator register opcode fixes.
 972
 973 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 974
 975         * m32r-dis.c: Regenerate.
 976
 977 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 978
 979         * sh-opc.h (sh_table): "fsrra", not "fssra".
 980
 981 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 982
 983         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 984         contraints.
 985
 986 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 987
 988         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 989
 990 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 991
 992         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 993         1.  Don't print scale factor on AT&T mode when index missing.
 994
 995 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 996
 997         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 998         when loaded into XR registers.
 999
1000 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1001
1002         * frv-desc.h: Regenerate.
1003         * frv-desc.c: Regenerate.
1004         * frv-opc.c: Regenerate.
1005
1006 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1007
1008         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1009
1010 2004-01-09  Paul Brook  <paul@codesourcery.com>
1011
1012         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1013         specific opcodes.
1014
1015 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1016
1017         * Makefile.am (libopcodes_la_DEPENDENCIES)
1018         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1019         comment about the problem.
1020         * Makefile.in: Regenerate.
1021
1022 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1023
1024         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1025         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1026         cut&paste errors in shifting/truncating numerical operands.
1027         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1028         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1029         (parse_uslo16): Likewise.
1030         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1031         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1032         (parse_s12): Likewise.
1033         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1034         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1035         (parse_uslo16): Likewise.
1036         (parse_uhi16): Parse gothi and gotfuncdeschi.
1037         (parse_d12): Parse got12 and gotfuncdesc12.
1038         (parse_s12): Likewise.
1039
1040 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1041
1042         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1043         instruction which looks similar to an 'rla' instruction.
1044
1045 For older changes see ChangeLog-0203
1046 \f
1047 Local Variables:
1048 mode: change-log
1049 left-margin: 8
1050 fill-column: 74
1051 version-control: never
1052 End: