1 2020-08-10 Alan Modra <amodra@gmail.com>
3 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
4 mtvsrd, and similarly for mfvsrd.
6 2020-08-04 Christian Groessler <chris@groessler.org>
7 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
9 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
10 opcodes (special "out" to absolute address).
11 * z8k-opc.h: Regenerate.
13 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
16 * i386-opc.h (Prefix_Disp8): New.
17 (Prefix_Disp16): Likewise.
18 (Prefix_Disp32): Likewise.
19 (Prefix_Load): Likewise.
20 (Prefix_Store): Likewise.
21 (Prefix_VEX): Likewise.
22 (Prefix_VEX3): Likewise.
23 (Prefix_EVEX): Likewise.
24 (Prefix_REX): Likewise.
25 (Prefix_NoOptimize): Likewise.
26 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
27 * i386-tbl.h: Regenerated.
29 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
31 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
32 default case with abort() instead of printing an error message and
33 continuing, to avoid a maybe-uninitialized warning.
35 2020-07-24 Nick Clifton <nickc@redhat.com>
37 * po/de.po: Updated German translation.
39 2020-07-21 Jan Beulich <jbeulich@suse.com>
41 * i386-dis.c (OP_E_memory): Revert previous change.
43 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
46 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
47 without base nor index registers.
49 2020-07-15 Jan Beulich <jbeulich@suse.com>
51 * i386-dis.c (putop): Move 'V' and 'W' handling.
53 2020-07-15 Jan Beulich <jbeulich@suse.com>
55 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
56 construct for push/pop of register.
57 (putop): Honor cond when handling 'P'. Drop handling of plain
60 2020-07-15 Jan Beulich <jbeulich@suse.com>
62 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
63 description. Drop '&' description. Use P for push of immediate,
64 pushf/popf, enter, and leave. Use %LP for lret/retf.
65 (dis386_twobyte): Use P for push/pop of fs/gs.
66 (reg_table): Use P for push/pop. Use @ for near call/jmp.
67 (x86_64_table): Use P for far call/jmp.
68 (putop): Drop handling of 'U' and '&'. Move and adjust handling
69 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
71 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
72 and dqw_mode (unconditional).
74 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
77 * i386-dis.c (OP_E_memory): Without base nor index registers,
78 32-bit displacement to 64 bits.
80 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
82 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
83 faulty double register pair is detected.
85 2020-07-14 Jan Beulich <jbeulich@suse.com>
87 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
89 2020-07-14 Jan Beulich <jbeulich@suse.com>
91 * i386-dis.c (OP_R, Rm): Delete.
92 (MOD_0F24, MOD_0F26): Rename to ...
93 (X86_64_0F24, X86_64_0F26): ... respectively.
94 (dis386): Update 'L' and 'Z' comments.
95 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
97 (mod_table): Move opcode 0F24 and 0F26 entries ...
98 (x86_64_table): ... here.
99 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
102 2020-07-14 Jan Beulich <jbeulich@suse.com>
104 * i386-dis.c (Rd, Rdq, MaskR): Delete.
105 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
106 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
107 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
108 MOD_EVEX_0F387C): New enumerators.
109 (reg_table): Use Edq for rdssp.
110 (prefix_table): Use Edq for incssp.
111 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
112 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
113 ktest*, and kshift*. Use Edq / MaskE for kmov*.
114 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
115 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
116 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
117 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
118 0F3828_P_1 and 0F3838_P_1.
119 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
120 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
122 2020-07-14 Jan Beulich <jbeulich@suse.com>
124 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
125 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
126 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
127 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
128 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
129 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
130 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
131 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
132 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
133 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
134 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
135 (reg_table, prefix_table, three_byte_table, vex_table,
136 vex_len_table, mod_table, rm_table): Replace / remove respective
138 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
139 of PREFIX_DATA in used_prefixes.
141 2020-07-14 Jan Beulich <jbeulich@suse.com>
143 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
144 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
145 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
146 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
147 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
148 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
149 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
150 VEX_W_0F3A33_L_0): Delete.
151 (dis386): Adjust "BW" description.
152 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
153 0F3A31, 0F3A32, and 0F3A33.
154 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
156 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
159 2020-07-14 Jan Beulich <jbeulich@suse.com>
161 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
162 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
163 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
164 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
165 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
166 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
167 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
168 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
169 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
170 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
171 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
172 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
173 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
174 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
175 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
176 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
177 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
178 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
179 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
180 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
181 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
182 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
183 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
184 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
185 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
186 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
187 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
188 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
189 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
190 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
191 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
192 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
193 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
194 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
195 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
196 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
197 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
198 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
199 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
200 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
201 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
202 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
203 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
204 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
205 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
206 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
207 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
208 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
209 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
210 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
211 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
212 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
213 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
214 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
215 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
216 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
217 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
218 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
219 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
220 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
221 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
222 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
223 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
224 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
225 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
226 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
227 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
228 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
229 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
230 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
231 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
232 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
233 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
234 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
235 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
236 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
237 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
238 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
239 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
240 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
241 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
242 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
243 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
244 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
245 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
246 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
247 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
248 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
249 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
250 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
251 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
252 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
253 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
254 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
255 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
256 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
257 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
258 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
259 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
260 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
261 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
262 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
263 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
264 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
265 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
266 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
267 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
268 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
269 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
270 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
271 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
272 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
273 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
274 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
275 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
276 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
277 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
278 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
279 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
280 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
281 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
282 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
283 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
284 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
285 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
286 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
287 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
288 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
289 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
290 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
291 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
292 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
293 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
294 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
295 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
296 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
297 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
298 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
299 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
300 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
301 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
302 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
303 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
304 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
305 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
306 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
307 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
308 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
309 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
310 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
311 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
312 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
313 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
314 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
315 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
316 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
317 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
318 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
319 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
320 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
321 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
322 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
323 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
324 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
325 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
326 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
327 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
328 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
329 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
330 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
331 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
332 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
333 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
334 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
335 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
336 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
337 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
338 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
339 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
340 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
341 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
342 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
343 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
344 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
345 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
346 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
347 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
348 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
349 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
350 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
351 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
352 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
353 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
354 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
355 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
356 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
357 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
358 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
359 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
360 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
361 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
362 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
363 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
364 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
365 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
366 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
367 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
368 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
369 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
370 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
371 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
372 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
373 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
374 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
375 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
376 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
377 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
378 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
379 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
380 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
381 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
382 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
383 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
384 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
385 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
386 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
387 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
388 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
389 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
390 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
391 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
392 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
393 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
394 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
395 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
396 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
397 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
398 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
399 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
400 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
401 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
402 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
403 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
404 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
405 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
406 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
407 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
408 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
409 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
410 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
411 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
412 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
413 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
414 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
415 EVEX_W_0F3A72_P_2): Rename to ...
416 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
417 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
418 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
419 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
420 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
421 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
422 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
423 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
424 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
425 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
426 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
427 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
428 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
429 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
430 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
431 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
432 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
433 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
434 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
435 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
436 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
437 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
438 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
439 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
440 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
441 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
442 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
443 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
444 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
445 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
446 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
447 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
448 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
449 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
450 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
451 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
452 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
453 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
454 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
455 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
456 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
457 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
458 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
459 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
460 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
461 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
462 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
463 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
464 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
465 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
466 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
467 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
468 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
469 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
470 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
471 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
472 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
473 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
474 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
475 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
476 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
477 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
478 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
479 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
480 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
481 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
482 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
483 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
484 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
485 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
486 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
487 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
489 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
490 vex_w_table, mod_table): Replace / remove respective entries.
491 (print_insn): Move up dp->prefix_requirement handling. Handle
493 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
494 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
495 Replace / remove respective entries.
497 2020-07-14 Jan Beulich <jbeulich@suse.com>
499 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
500 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
501 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
502 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
503 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
505 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
506 0F2C, 0F2D, 0F2E, and 0F2F.
507 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
510 2020-07-14 Jan Beulich <jbeulich@suse.com>
512 * i386-dis.c (OP_VexR, VexScalarR): New.
513 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
514 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
515 need_vex_reg): Delete.
516 (prefix_table): Replace VexScalar by VexScalarR and
517 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
518 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
519 (vex_len_table): Replace EXqVexScalarS by EXqS.
520 (get_valid_dis386): Don't set need_vex_reg.
521 (print_insn): Don't initialize need_vex_reg.
522 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
523 q_scalar_swap_mode cases.
524 (OP_EX): Don't check for d_scalar_swap_mode and
526 (OP_VEX): Done check need_vex_reg.
527 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
528 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
529 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
531 2020-07-14 Jan Beulich <jbeulich@suse.com>
533 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
534 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
535 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
536 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
537 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
538 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
539 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
540 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
541 (vex_table): Replace Vex128 by Vex.
542 (vex_len_table): Likewise. Adjust referenced enum names.
543 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
544 referenced enum names.
545 (OP_VEX): Drop vex128_mode and vex256_mode cases.
546 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
548 2020-07-14 Jan Beulich <jbeulich@suse.com>
550 * i386-dis.c (dis386): "LW" description now applies to "DQ".
551 (putop): Handle "DQ". Don't handle "LW" anymore.
552 (prefix_table, mod_table): Replace %LW by %DQ.
553 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
555 2020-07-14 Jan Beulich <jbeulich@suse.com>
557 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
558 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
559 d_scalar_swap_mode case handling. Move shift adjsutment into
560 the case its applicable to.
562 2020-07-14 Jan Beulich <jbeulich@suse.com>
564 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
565 (EXbScalar, EXwScalar): Fold to ...
566 (EXbwUnit): ... this.
567 (b_scalar_mode, w_scalar_mode): Fold to ...
568 (bw_unit_mode): ... this.
569 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
570 w_scalar_mode handling by bw_unit_mode one.
571 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
573 * i386-dis-evex-prefix.h: ... here.
575 2020-07-14 Jan Beulich <jbeulich@suse.com>
577 * i386-dis.c (PCMPESTR_Fixup): Delete.
578 (dis386): Adjust "LQ" description.
579 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
580 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
581 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
582 vpcmpestrm, and vpcmpestri.
583 (putop): Honor "cond" when handling LQ.
584 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
585 vcvtsi2ss and vcvtusi2ss.
586 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
587 vcvtsi2sd and vcvtusi2sd.
589 2020-07-14 Jan Beulich <jbeulich@suse.com>
591 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
592 (simd_cmp_op): Add const.
593 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
594 (CMP_Fixup): Handle VEX case.
595 (prefix_table): Replace VCMP by CMP.
596 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
598 2020-07-14 Jan Beulich <jbeulich@suse.com>
600 * i386-dis.c (MOVBE_Fixup): Delete.
602 (prefix_table): Use Mv for movbe entries.
604 2020-07-14 Jan Beulich <jbeulich@suse.com>
606 * i386-dis.c (CRC32_Fixup): Delete.
607 (prefix_table): Use Eb/Ev for crc32 entries.
609 2020-07-14 Jan Beulich <jbeulich@suse.com>
611 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
612 Conditionalize invocations of "USED_REX (0)".
614 2020-07-14 Jan Beulich <jbeulich@suse.com>
616 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
617 CH, DH, BH, AX, DX): Delete.
618 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
619 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
620 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
622 2020-07-10 Lili Cui <lili.cui@intel.com>
624 * i386-dis.c (TMM): New.
627 (MVexSIBMEM): Likewise.
628 (tmm_mode): Likewise.
629 (vex_sibmem_mode): Likewise.
630 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
631 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
632 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
633 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
634 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
635 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
636 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
637 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
638 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
639 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
640 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
641 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
642 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
643 (PREFIX_VEX_0F3849_X86_64): Likewise.
644 (PREFIX_VEX_0F384B_X86_64): Likewise.
645 (PREFIX_VEX_0F385C_X86_64): Likewise.
646 (PREFIX_VEX_0F385E_X86_64): Likewise.
647 (X86_64_VEX_0F3849): Likewise.
648 (X86_64_VEX_0F384B): Likewise.
649 (X86_64_VEX_0F385C): Likewise.
650 (X86_64_VEX_0F385E): Likewise.
651 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
652 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
653 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
654 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
655 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
656 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
657 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
658 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
659 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
660 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
661 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
662 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
663 (VEX_W_0F3849_X86_64_P_0): Likewise.
664 (VEX_W_0F3849_X86_64_P_2): Likewise.
665 (VEX_W_0F3849_X86_64_P_3): Likewise.
666 (VEX_W_0F384B_X86_64_P_1): Likewise.
667 (VEX_W_0F384B_X86_64_P_2): Likewise.
668 (VEX_W_0F384B_X86_64_P_3): Likewise.
669 (VEX_W_0F385C_X86_64_P_1): Likewise.
670 (VEX_W_0F385E_X86_64_P_0): Likewise.
671 (VEX_W_0F385E_X86_64_P_1): Likewise.
672 (VEX_W_0F385E_X86_64_P_2): Likewise.
673 (VEX_W_0F385E_X86_64_P_3): Likewise.
674 (names_tmm): Likewise.
675 (att_names_tmm): Likewise.
676 (intel_operand_size): Handle void_mode.
677 (OP_XMM): Handle tmm_mode.
680 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
681 CpuAMX_BF16 and CpuAMX_TILE.
682 (operand_type_shorthands): Add RegTMM.
683 (operand_type_init): Likewise.
684 (operand_types): Add Tmmword.
685 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
686 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
687 * i386-opc.h (CpuAMX_INT8): New.
688 (CpuAMX_BF16): Likewise.
689 (CpuAMX_TILE): Likewise.
692 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
693 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
694 (i386_operand_type): Add tmmword.
695 * i386-opc.tbl: Add AMX instructions.
696 * i386-reg.tbl: Add AMX registers.
697 * i386-init.h: Regenerated.
698 * i386-tbl.h: Likewise.
700 2020-07-08 Jan Beulich <jbeulich@suse.com>
702 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
703 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
705 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
706 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
708 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
709 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
710 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
711 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
712 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
713 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
714 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
715 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
716 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
717 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
718 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
719 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
720 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
721 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
722 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
723 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
724 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
725 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
726 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
727 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
728 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
729 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
730 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
731 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
732 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
733 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
734 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
735 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
736 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
737 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
738 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
739 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
740 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
741 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
742 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
743 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
744 (reg_table): Re-order XOP entries. Adjust their operands.
745 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
746 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
747 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
748 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
749 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
750 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
751 entries by references ...
752 (vex_len_table): ... to resepctive new entries here. For several
753 new and existing entries reference ...
754 (vex_w_table): ... new entries here.
755 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
757 2020-07-08 Jan Beulich <jbeulich@suse.com>
759 * i386-dis.c (XMVexScalarI4): Define.
760 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
761 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
762 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
763 (vex_len_table): Move scalar FMA4 entries ...
764 (prefix_table): ... here.
765 (OP_REG_VexI4): Handle scalar_mode.
766 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
767 * i386-tbl.h: Re-generate.
769 2020-07-08 Jan Beulich <jbeulich@suse.com>
771 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
773 (OP_VexW, VexW): New.
774 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
775 for shifts and rotates by register.
777 2020-07-08 Jan Beulich <jbeulich@suse.com>
779 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
780 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
781 OP_EX_VexReg): Delete.
782 (OP_VexI4, VexI4): New.
783 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
784 (prefix_table): ... here.
785 (print_insn): Drop setting of vex_w_done.
787 2020-07-08 Jan Beulich <jbeulich@suse.com>
789 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
790 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
791 (xop_table): Replace operands of 4-operand insns.
792 (OP_REG_VexI4): Move VEX.W based operand swaping here.
794 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
796 * arc-opc.c (insert_rbd): New function.
799 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
802 2020-07-07 Jan Beulich <jbeulich@suse.com>
804 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
805 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
806 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
807 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
809 (putop): Handle "BW".
810 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
811 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
813 * i386-dis-evex-prefix.h: ... here.
815 2020-07-06 Jan Beulich <jbeulich@suse.com>
817 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
818 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
819 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
820 VEX_W_0FXOP_09_83): New enumerators.
821 (xop_table): Reference the above.
822 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
823 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
824 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
825 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
827 2020-07-06 Jan Beulich <jbeulich@suse.com>
829 * i386-dis.c (EVEX_W_0F3838_P_1,
830 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
831 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
832 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
833 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
834 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
835 (putop): Centralize management of last[]. Delete SAVE_LAST.
836 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
837 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
838 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
839 * i386-dis-evex-prefix.h: here.
841 2020-07-06 Jan Beulich <jbeulich@suse.com>
843 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
844 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
845 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
846 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
848 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
849 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
850 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
851 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
852 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
853 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
854 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
855 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
857 * i386-dis-evex-len.h: Adjust comments.
858 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
859 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
860 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
861 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
862 MOD_EVEX_0F385B_P_2_W_1 table entries.
863 * i386-dis-evex-w.h: Reference mod_table[] for
864 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
867 2020-07-06 Jan Beulich <jbeulich@suse.com>
869 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
870 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
872 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
873 Likewise. Mark 256-bit entries invalid.
875 2020-07-06 Jan Beulich <jbeulich@suse.com>
877 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
878 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
879 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
880 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
881 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
882 PREFIX_EVEX_0F382B): Delete.
883 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
884 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
885 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
886 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
887 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
889 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
890 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
891 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
892 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
894 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
895 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
896 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
897 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
898 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
899 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
900 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
901 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
902 PREFIX_EVEX_0F382B): Remove table entries.
903 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
904 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
905 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
907 2020-07-06 Jan Beulich <jbeulich@suse.com>
909 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
910 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
912 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
913 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
914 EVEX_LEN_0F3A01_P_2_W_1 table entries.
915 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
918 2020-07-06 Jan Beulich <jbeulich@suse.com>
920 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
921 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
922 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
923 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
924 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
925 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
926 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
927 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
928 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
931 2020-07-06 Jan Beulich <jbeulich@suse.com>
933 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
934 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
935 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
937 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
939 * i386-dis-evex.h (evex_table): Reference VEX table entry for
941 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
943 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
945 2020-07-06 Jan Beulich <jbeulich@suse.com>
947 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
948 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
949 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
950 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
951 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
952 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
953 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
954 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
955 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
956 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
957 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
958 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
959 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
960 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
961 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
962 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
963 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
964 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
965 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
966 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
967 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
968 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
969 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
970 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
971 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
972 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
973 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
974 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
975 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
976 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
977 (prefix_table): Add EXxEVexR to FMA table entries.
978 (OP_Rounding): Move abort() invocation.
979 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
980 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
981 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
982 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
983 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
984 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
985 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
986 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
987 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
988 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
990 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
991 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
992 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
993 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
994 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
995 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
996 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
997 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
998 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
999 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1000 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1001 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1002 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1003 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1004 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1005 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1006 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1007 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1008 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1009 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1010 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1011 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1012 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1013 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1014 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1015 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1016 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1017 Delete table entries.
1018 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1019 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1020 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1023 2020-07-06 Jan Beulich <jbeulich@suse.com>
1025 * i386-dis.c (EXqScalarS): Delete.
1026 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1027 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1029 2020-07-06 Jan Beulich <jbeulich@suse.com>
1031 * i386-dis.c (safe-ctype.h): Include.
1032 (EXdScalar, EXqScalar): Delete.
1033 (d_scalar_mode, q_scalar_mode): Delete.
1034 (prefix_table, vex_len_table): Use EXxmm_md in place of
1035 EXdScalar and EXxmm_mq in place of EXqScalar.
1036 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1037 d_scalar_mode and q_scalar_mode.
1038 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1039 (vmovsd): Use EXxmm_mq.
1041 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1044 * arc-dis.c: Fix spelling mistake.
1045 * po/opcodes.pot: Regenerate.
1047 2020-07-06 Nick Clifton <nickc@redhat.com>
1049 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1050 * po/uk.po: Updated Ukranian translation.
1052 2020-07-04 Nick Clifton <nickc@redhat.com>
1054 * configure: Regenerate.
1055 * po/opcodes.pot: Regenerate.
1057 2020-07-04 Nick Clifton <nickc@redhat.com>
1059 Binutils 2.35 branch created.
1061 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1063 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1064 * i386-opc.h (VexSwapSources): New.
1065 (i386_opcode_modifier): Add vexswapsources.
1066 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1067 with two source operands swapped.
1068 * i386-tbl.h: Regenerated.
1070 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1072 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1073 unprivileged CSR can also be initialized.
1075 2020-06-29 Alan Modra <amodra@gmail.com>
1077 * arm-dis.c: Use C style comments.
1078 * cr16-opc.c: Likewise.
1079 * ft32-dis.c: Likewise.
1080 * moxie-opc.c: Likewise.
1081 * tic54x-dis.c: Likewise.
1082 * s12z-opc.c: Remove useless comment.
1083 * xgate-dis.c: Likewise.
1085 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1087 * i386-opc.tbl: Add a blank line.
1089 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1091 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1092 (VecSIB128): Renamed to ...
1094 (VecSIB256): Renamed to ...
1096 (VecSIB512): Renamed to ...
1098 (VecSIB): Renamed to ...
1100 (i386_opcode_modifier): Replace vecsib with sib.
1101 * i386-opc.tbl (VecSIB128): New.
1102 (VecSIB256): Likewise.
1103 (VecSIB512): Likewise.
1104 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1105 and VecSIB512, respectively.
1107 2020-06-26 Jan Beulich <jbeulich@suse.com>
1109 * i386-dis.c: Adjust description of I macro.
1110 (x86_64_table): Drop use of I.
1111 (float_mem): Replace use of I.
1112 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1114 2020-06-26 Jan Beulich <jbeulich@suse.com>
1116 * i386-dis.c: (print_insn): Avoid straight assignment to
1117 priv.orig_sizeflag when processing -M sub-options.
1119 2020-06-25 Jan Beulich <jbeulich@suse.com>
1121 * i386-dis.c: Adjust description of J macro.
1122 (dis386, x86_64_table, mod_table): Replace J.
1123 (putop): Remove handling of J.
1125 2020-06-25 Jan Beulich <jbeulich@suse.com>
1127 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1129 2020-06-25 Jan Beulich <jbeulich@suse.com>
1131 * i386-dis.c: Adjust description of "LQ" macro.
1132 (dis386_twobyte): Use LQ for sysret.
1133 (putop): Adjust handling of LQ.
1135 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1137 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1138 * riscv-dis.c: Include elfxx-riscv.h.
1140 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1142 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1144 2020-06-17 Lili Cui <lili.cui@intel.com>
1146 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1148 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1151 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1152 * i386-opc.tbl: Likewise.
1153 * i386-tbl.h: Regenerated.
1155 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1157 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1159 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1161 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1162 (SR_CORE): Likewise.
1163 (SR_FEAT): Likewise.
1165 (SR_V8_1): Likewise.
1166 (SR_V8_2): Likewise.
1167 (SR_V8_3): Likewise.
1168 (SR_V8_4): Likewise.
1171 (SR_SSBS): Likewise.
1173 (SR_ID_PFR2): Likewise.
1174 (SR_PROFILE): Likewise.
1175 (SR_MEMTAG): Likewise.
1176 (SR_SCXTNUM): Likewise.
1177 (aarch64_sys_regs): Refactor to store feature information in the table.
1178 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1179 that now describe their own features.
1180 (aarch64_pstatefield_supported_p): Likewise.
1182 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1184 * i386-dis.c (prefix_table): Fix a typo in comments.
1186 2020-06-09 Jan Beulich <jbeulich@suse.com>
1188 * i386-dis.c (rex_ignored): Delete.
1189 (ckprefix): Drop rex_ignored initialization.
1190 (get_valid_dis386): Drop setting of rex_ignored.
1191 (print_insn): Drop checking of rex_ignored. Don't record data
1192 size prefix as used with VEX-and-alike encodings.
1194 2020-06-09 Jan Beulich <jbeulich@suse.com>
1196 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1197 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1198 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1199 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1200 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1201 VEX_0F12, and VEX_0F16.
1202 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1203 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1204 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1205 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1206 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1207 MOD_VEX_0F16_PREFIX_2 entries.
1209 2020-06-09 Jan Beulich <jbeulich@suse.com>
1211 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1212 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1213 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1214 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1215 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1216 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1217 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1218 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1219 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1220 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1221 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1222 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1223 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1224 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1225 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1226 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1227 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1228 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1229 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1230 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1231 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1232 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1233 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1234 EVEX_W_0FC6_P_2): Delete.
1235 (print_insn): Add EVEX.W vs embedded prefix consistency check
1236 to prefix validation.
1237 * i386-dis-evex.h (evex_table): Don't further descend for
1238 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1239 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1241 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1242 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1243 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1244 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1245 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1246 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1247 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1248 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1249 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1250 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1251 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1252 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1253 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1254 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1255 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1256 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1257 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1258 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1259 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1260 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1261 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1262 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1263 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1264 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1265 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1266 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1267 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1269 2020-06-09 Jan Beulich <jbeulich@suse.com>
1271 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1272 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1273 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1275 (print_insn): Drop pointless check against bad_opcode. Split
1276 prefix validation into legacy and VEX-and-alike parts.
1277 (putop): Re-work 'X' macro handling.
1279 2020-06-09 Jan Beulich <jbeulich@suse.com>
1281 * i386-dis.c (MOD_0F51): Rename to ...
1282 (MOD_0F50): ... this.
1284 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1286 * arm-dis.c (arm_opcodes): Add dfb.
1287 (thumb32_opcodes): Add dfb.
1289 2020-06-08 Jan Beulich <jbeulich@suse.com>
1291 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1293 2020-06-06 Alan Modra <amodra@gmail.com>
1295 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1297 2020-06-05 Alan Modra <amodra@gmail.com>
1299 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1300 size is large enough.
1302 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1304 * disassemble.c (disassemble_init_for_target): Set endian_code for
1306 * bpf-desc.c: Regenerate.
1307 * bpf-opc.c: Likewise.
1308 * bpf-dis.c: Likewise.
1310 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1312 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1313 (cgen_put_insn_value): Likewise.
1314 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1315 * cgen-dis.in (print_insn): Likewise.
1316 * cgen-ibld.in (insert_1): Likewise.
1317 (insert_1): Likewise.
1318 (insert_insn_normal): Likewise.
1319 (extract_1): Likewise.
1320 * bpf-dis.c: Regenerate.
1321 * bpf-ibld.c: Likewise.
1322 * bpf-ibld.c: Likewise.
1323 * cgen-dis.in: Likewise.
1324 * cgen-ibld.in: Likewise.
1325 * cgen-opc.c: Likewise.
1326 * epiphany-dis.c: Likewise.
1327 * epiphany-ibld.c: Likewise.
1328 * fr30-dis.c: Likewise.
1329 * fr30-ibld.c: Likewise.
1330 * frv-dis.c: Likewise.
1331 * frv-ibld.c: Likewise.
1332 * ip2k-dis.c: Likewise.
1333 * ip2k-ibld.c: Likewise.
1334 * iq2000-dis.c: Likewise.
1335 * iq2000-ibld.c: Likewise.
1336 * lm32-dis.c: Likewise.
1337 * lm32-ibld.c: Likewise.
1338 * m32c-dis.c: Likewise.
1339 * m32c-ibld.c: Likewise.
1340 * m32r-dis.c: Likewise.
1341 * m32r-ibld.c: Likewise.
1342 * mep-dis.c: Likewise.
1343 * mep-ibld.c: Likewise.
1344 * mt-dis.c: Likewise.
1345 * mt-ibld.c: Likewise.
1346 * or1k-dis.c: Likewise.
1347 * or1k-ibld.c: Likewise.
1348 * xc16x-dis.c: Likewise.
1349 * xc16x-ibld.c: Likewise.
1350 * xstormy16-dis.c: Likewise.
1351 * xstormy16-ibld.c: Likewise.
1353 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1355 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1356 (print_insn_): Handle instruction endian.
1357 * bpf-dis.c: Regenerate.
1358 * bpf-desc.c: Regenerate.
1359 * epiphany-dis.c: Likewise.
1360 * epiphany-desc.c: Likewise.
1361 * fr30-dis.c: Likewise.
1362 * fr30-desc.c: Likewise.
1363 * frv-dis.c: Likewise.
1364 * frv-desc.c: Likewise.
1365 * ip2k-dis.c: Likewise.
1366 * ip2k-desc.c: Likewise.
1367 * iq2000-dis.c: Likewise.
1368 * iq2000-desc.c: Likewise.
1369 * lm32-dis.c: Likewise.
1370 * lm32-desc.c: Likewise.
1371 * m32c-dis.c: Likewise.
1372 * m32c-desc.c: Likewise.
1373 * m32r-dis.c: Likewise.
1374 * m32r-desc.c: Likewise.
1375 * mep-dis.c: Likewise.
1376 * mep-desc.c: Likewise.
1377 * mt-dis.c: Likewise.
1378 * mt-desc.c: Likewise.
1379 * or1k-dis.c: Likewise.
1380 * or1k-desc.c: Likewise.
1381 * xc16x-dis.c: Likewise.
1382 * xc16x-desc.c: Likewise.
1383 * xstormy16-dis.c: Likewise.
1384 * xstormy16-desc.c: Likewise.
1386 2020-06-03 Nick Clifton <nickc@redhat.com>
1388 * po/sr.po: Updated Serbian translation.
1390 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1392 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1393 (riscv_get_priv_spec_class): Likewise.
1395 2020-06-01 Alan Modra <amodra@gmail.com>
1397 * bpf-desc.c: Regenerate.
1399 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1400 David Faust <david.faust@oracle.com>
1402 * bpf-desc.c: Regenerate.
1403 * bpf-opc.h: Likewise.
1404 * bpf-opc.c: Likewise.
1405 * bpf-dis.c: Likewise.
1407 2020-05-28 Alan Modra <amodra@gmail.com>
1409 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1412 2020-05-28 Alan Modra <amodra@gmail.com>
1414 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1416 (print_insn_ns32k): Revert last change.
1418 2020-05-28 Nick Clifton <nickc@redhat.com>
1420 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1423 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1425 Fix extraction of signed constants in nios2 disassembler (again).
1427 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1428 extractions of signed fields.
1430 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1432 * s390-opc.txt: Relocate vector load/store instructions with
1433 additional alignment parameter and change architecture level
1434 constraint from z14 to z13.
1436 2020-05-21 Alan Modra <amodra@gmail.com>
1438 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1439 * sparc-dis.c: Likewise.
1440 * tic4x-dis.c: Likewise.
1441 * xtensa-dis.c: Likewise.
1442 * bpf-desc.c: Regenerate.
1443 * epiphany-desc.c: Regenerate.
1444 * fr30-desc.c: Regenerate.
1445 * frv-desc.c: Regenerate.
1446 * ip2k-desc.c: Regenerate.
1447 * iq2000-desc.c: Regenerate.
1448 * lm32-desc.c: Regenerate.
1449 * m32c-desc.c: Regenerate.
1450 * m32r-desc.c: Regenerate.
1451 * mep-asm.c: Regenerate.
1452 * mep-desc.c: Regenerate.
1453 * mt-desc.c: Regenerate.
1454 * or1k-desc.c: Regenerate.
1455 * xc16x-desc.c: Regenerate.
1456 * xstormy16-desc.c: Regenerate.
1458 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1460 * riscv-opc.c (riscv_ext_version_table): The table used to store
1461 all information about the supported spec and the corresponding ISA
1462 versions. Currently, only Zicsr is supported to verify the
1463 correctness of Z sub extension settings. Others will be supported
1464 in the future patches.
1465 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1466 classes and the corresponding strings.
1467 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1468 spec class by giving a ISA spec string.
1469 * riscv-opc.c (struct priv_spec_t): New structure.
1470 (struct priv_spec_t priv_specs): List for all supported privilege spec
1471 classes and the corresponding strings.
1472 (riscv_get_priv_spec_class): New function. Get the corresponding
1473 privilege spec class by giving a spec string.
1474 (riscv_get_priv_spec_name): New function. Get the corresponding
1475 privilege spec string by giving a CSR version class.
1476 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1477 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1478 according to the chosen version. Build a hash table riscv_csr_hash to
1479 store the valid CSR for the chosen pirv verison. Dump the direct
1480 CSR address rather than it's name if it is invalid.
1481 (parse_riscv_dis_option_without_args): New function. Parse the options
1483 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1484 parse the options without arguments first, and then handle the options
1485 with arguments. Add the new option -Mpriv-spec, which has argument.
1486 * riscv-dis.c (print_riscv_disassembler_options): Add description
1487 about the new OBJDUMP option.
1489 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1491 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1492 WC values on POWER10 sync, dcbf and wait instructions.
1493 (insert_pl, extract_pl): New functions.
1494 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1495 (LS3): New , 3-bit L for sync.
1496 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1497 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1498 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1499 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1500 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1501 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1502 <wait>: Enable PL operand on POWER10.
1503 <dcbf>: Enable L3OPT operand on POWER10.
1504 <sync>: Enable SC2 operand on POWER10.
1506 2020-05-19 Stafford Horne <shorne@gmail.com>
1509 * or1k-asm.c: Regenerate.
1510 * or1k-desc.c: Regenerate.
1511 * or1k-desc.h: Regenerate.
1512 * or1k-dis.c: Regenerate.
1513 * or1k-ibld.c: Regenerate.
1514 * or1k-opc.c: Regenerate.
1515 * or1k-opc.h: Regenerate.
1516 * or1k-opinst.c: Regenerate.
1518 2020-05-11 Alan Modra <amodra@gmail.com>
1520 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1523 2020-05-11 Alan Modra <amodra@gmail.com>
1525 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1526 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1528 2020-05-11 Alan Modra <amodra@gmail.com>
1530 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1532 2020-05-11 Alan Modra <amodra@gmail.com>
1534 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1535 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1537 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1539 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1542 2020-05-11 Alan Modra <amodra@gmail.com>
1544 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1545 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1546 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1547 (prefix_opcodes): Add xxeval.
1549 2020-05-11 Alan Modra <amodra@gmail.com>
1551 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1552 xxgenpcvwm, xxgenpcvdm.
1554 2020-05-11 Alan Modra <amodra@gmail.com>
1556 * ppc-opc.c (MP, VXVAM_MASK): Define.
1557 (VXVAPS_MASK): Use VXVA_MASK.
1558 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1559 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1560 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1561 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1563 2020-05-11 Alan Modra <amodra@gmail.com>
1564 Peter Bergner <bergner@linux.ibm.com>
1566 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1568 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1569 YMSK2, XA6a, XA6ap, XB6a entries.
1570 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1571 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1573 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1574 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1575 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1576 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1577 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1578 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1579 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1580 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1581 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1582 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1583 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1584 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1585 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1586 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1588 2020-05-11 Alan Modra <amodra@gmail.com>
1590 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1591 (insert_xts, extract_xts): New functions.
1592 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1593 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1594 (VXRC_MASK, VXSH_MASK): Define.
1595 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1596 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1597 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1598 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1599 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1600 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1601 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1603 2020-05-11 Alan Modra <amodra@gmail.com>
1605 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1606 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1607 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1608 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1609 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1611 2020-05-11 Alan Modra <amodra@gmail.com>
1613 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1614 (XTP, DQXP, DQXP_MASK): Define.
1615 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1616 (prefix_opcodes): Add plxvp and pstxvp.
1618 2020-05-11 Alan Modra <amodra@gmail.com>
1620 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1621 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1622 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1624 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1626 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1628 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1630 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1632 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1634 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1636 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1638 2020-05-11 Alan Modra <amodra@gmail.com>
1640 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1642 2020-05-11 Alan Modra <amodra@gmail.com>
1644 * ppc-dis.c (ppc_opts): Add "power10" entry.
1645 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1646 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1648 2020-05-11 Nick Clifton <nickc@redhat.com>
1650 * po/fr.po: Updated French translation.
1652 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1654 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1655 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1656 (operand_general_constraint_met_p): validate
1657 AARCH64_OPND_UNDEFINED.
1658 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1660 * aarch64-asm-2.c: Regenerated.
1661 * aarch64-dis-2.c: Regenerated.
1662 * aarch64-opc-2.c: Regenerated.
1664 2020-04-29 Nick Clifton <nickc@redhat.com>
1667 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1670 2020-04-29 Nick Clifton <nickc@redhat.com>
1672 * po/sv.po: Updated Swedish translation.
1674 2020-04-29 Nick Clifton <nickc@redhat.com>
1677 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1678 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1679 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1682 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1685 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1686 cmpi only on m68020up and cpu32.
1688 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1690 * aarch64-asm.c (aarch64_ins_none): New.
1691 * aarch64-asm.h (ins_none): New declaration.
1692 * aarch64-dis.c (aarch64_ext_none): New.
1693 * aarch64-dis.h (ext_none): New declaration.
1694 * aarch64-opc.c (aarch64_print_operand): Update case for
1695 AARCH64_OPND_BARRIER_PSB.
1696 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1697 (AARCH64_OPERANDS): Update inserter/extracter for
1698 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1699 * aarch64-asm-2.c: Regenerated.
1700 * aarch64-dis-2.c: Regenerated.
1701 * aarch64-opc-2.c: Regenerated.
1703 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1705 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1706 (aarch64_feature_ras, RAS): Likewise.
1707 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1708 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1709 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1710 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1711 * aarch64-asm-2.c: Regenerated.
1712 * aarch64-dis-2.c: Regenerated.
1713 * aarch64-opc-2.c: Regenerated.
1715 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1717 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1718 (print_insn_neon): Support disassembly of conditional
1721 2020-02-16 David Faust <david.faust@oracle.com>
1723 * bpf-desc.c: Regenerate.
1724 * bpf-desc.h: Likewise.
1725 * bpf-opc.c: Regenerate.
1726 * bpf-opc.h: Likewise.
1728 2020-04-07 Lili Cui <lili.cui@intel.com>
1730 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1731 (prefix_table): New instructions (see prefixes above).
1732 (rm_table): Likewise
1733 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1734 CPU_ANY_TSXLDTRK_FLAGS.
1735 (cpu_flags): Add CpuTSXLDTRK.
1736 * i386-opc.h (enum): Add CpuTSXLDTRK.
1737 (i386_cpu_flags): Add cputsxldtrk.
1738 * i386-opc.tbl: Add XSUSPLDTRK insns.
1739 * i386-init.h: Regenerate.
1740 * i386-tbl.h: Likewise.
1742 2020-04-02 Lili Cui <lili.cui@intel.com>
1744 * i386-dis.c (prefix_table): New instructions serialize.
1745 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1746 CPU_ANY_SERIALIZE_FLAGS.
1747 (cpu_flags): Add CpuSERIALIZE.
1748 * i386-opc.h (enum): Add CpuSERIALIZE.
1749 (i386_cpu_flags): Add cpuserialize.
1750 * i386-opc.tbl: Add SERIALIZE insns.
1751 * i386-init.h: Regenerate.
1752 * i386-tbl.h: Likewise.
1754 2020-03-26 Alan Modra <amodra@gmail.com>
1756 * disassemble.h (opcodes_assert): Declare.
1757 (OPCODES_ASSERT): Define.
1758 * disassemble.c: Don't include assert.h. Include opintl.h.
1759 (opcodes_assert): New function.
1760 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1761 (bfd_h8_disassemble): Reduce size of data array. Correctly
1762 calculate maxlen. Omit insn decoding when insn length exceeds
1763 maxlen. Exit from nibble loop when looking for E, before
1764 accessing next data byte. Move processing of E outside loop.
1765 Replace tests of maxlen in loop with assertions.
1767 2020-03-26 Alan Modra <amodra@gmail.com>
1769 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1771 2020-03-25 Alan Modra <amodra@gmail.com>
1773 * z80-dis.c (suffix): Init mybuf.
1775 2020-03-22 Alan Modra <amodra@gmail.com>
1777 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1778 successflly read from section.
1780 2020-03-22 Alan Modra <amodra@gmail.com>
1782 * arc-dis.c (find_format): Use ISO C string concatenation rather
1783 than line continuation within a string. Don't access needs_limm
1784 before testing opcode != NULL.
1786 2020-03-22 Alan Modra <amodra@gmail.com>
1788 * ns32k-dis.c (print_insn_arg): Update comment.
1789 (print_insn_ns32k): Reduce size of index_offset array, and
1790 initialize, passing -1 to print_insn_arg for args that are not
1791 an index. Don't exit arg loop early. Abort on bad arg number.
1793 2020-03-22 Alan Modra <amodra@gmail.com>
1795 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1796 * s12z-opc.c: Formatting.
1797 (operands_f): Return an int.
1798 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1799 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1800 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1801 (exg_sex_discrim): Likewise.
1802 (create_immediate_operand, create_bitfield_operand),
1803 (create_register_operand_with_size, create_register_all_operand),
1804 (create_register_all16_operand, create_simple_memory_operand),
1805 (create_memory_operand, create_memory_auto_operand): Don't
1806 segfault on malloc failure.
1807 (z_ext24_decode): Return an int status, negative on fail, zero
1809 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1810 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1811 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1812 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1813 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1814 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1815 (loop_primitive_decode, shift_decode, psh_pul_decode),
1816 (bit_field_decode): Similarly.
1817 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1818 to return value, update callers.
1819 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1820 Don't segfault on NULL operand.
1821 (decode_operation): Return OP_INVALID on first fail.
1822 (decode_s12z): Check all reads, returning -1 on fail.
1824 2020-03-20 Alan Modra <amodra@gmail.com>
1826 * metag-dis.c (print_insn_metag): Don't ignore status from
1829 2020-03-20 Alan Modra <amodra@gmail.com>
1831 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1832 Initialize parts of buffer not written when handling a possible
1833 2-byte insn at end of section. Don't attempt decoding of such
1834 an insn by the 4-byte machinery.
1836 2020-03-20 Alan Modra <amodra@gmail.com>
1838 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1839 partially filled buffer. Prevent lookup of 4-byte insns when
1840 only VLE 2-byte insns are possible due to section size. Print
1841 ".word" rather than ".long" for 2-byte leftovers.
1843 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1846 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1848 2020-03-13 Jan Beulich <jbeulich@suse.com>
1850 * i386-dis.c (X86_64_0D): Rename to ...
1851 (X86_64_0E): ... this.
1853 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1855 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1856 * Makefile.in: Regenerated.
1858 2020-03-09 Jan Beulich <jbeulich@suse.com>
1860 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1862 * i386-tbl.h: Re-generate.
1864 2020-03-09 Jan Beulich <jbeulich@suse.com>
1866 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1867 vprot*, vpsha*, and vpshl*.
1868 * i386-tbl.h: Re-generate.
1870 2020-03-09 Jan Beulich <jbeulich@suse.com>
1872 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1873 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1874 * i386-tbl.h: Re-generate.
1876 2020-03-09 Jan Beulich <jbeulich@suse.com>
1878 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1879 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1880 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1881 * i386-tbl.h: Re-generate.
1883 2020-03-09 Jan Beulich <jbeulich@suse.com>
1885 * i386-gen.c (struct template_arg, struct template_instance,
1886 struct template_param, struct template, templates,
1887 parse_template, expand_templates): New.
1888 (process_i386_opcodes): Various local variables moved to
1889 expand_templates. Call parse_template and expand_templates.
1890 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1891 * i386-tbl.h: Re-generate.
1893 2020-03-06 Jan Beulich <jbeulich@suse.com>
1895 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1896 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1897 register and memory source templates. Replace VexW= by VexW*
1899 * i386-tbl.h: Re-generate.
1901 2020-03-06 Jan Beulich <jbeulich@suse.com>
1903 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1904 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1905 * i386-tbl.h: Re-generate.
1907 2020-03-06 Jan Beulich <jbeulich@suse.com>
1909 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1910 * i386-tbl.h: Re-generate.
1912 2020-03-06 Jan Beulich <jbeulich@suse.com>
1914 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1915 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1916 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1917 VexW0 on SSE2AVX variants.
1918 (vmovq): Drop NoRex64 from XMM/XMM variants.
1919 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1920 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1921 applicable use VexW0.
1922 * i386-tbl.h: Re-generate.
1924 2020-03-06 Jan Beulich <jbeulich@suse.com>
1926 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1927 * i386-opc.h (Rex64): Delete.
1928 (struct i386_opcode_modifier): Remove rex64 field.
1929 * i386-opc.tbl (crc32): Drop Rex64.
1930 Replace Rex64 with Size64 everywhere else.
1931 * i386-tbl.h: Re-generate.
1933 2020-03-06 Jan Beulich <jbeulich@suse.com>
1935 * i386-dis.c (OP_E_memory): Exclude recording of used address
1936 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1937 addressed memory operands for MPX insns.
1939 2020-03-06 Jan Beulich <jbeulich@suse.com>
1941 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
1942 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
1943 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
1944 (ptwrite): Split into non-64-bit and 64-bit forms.
1945 * i386-tbl.h: Re-generate.
1947 2020-03-06 Jan Beulich <jbeulich@suse.com>
1949 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
1951 * i386-tbl.h: Re-generate.
1953 2020-03-04 Jan Beulich <jbeulich@suse.com>
1955 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
1956 (prefix_table): Move vmmcall here. Add vmgexit.
1957 (rm_table): Replace vmmcall entry by prefix_table[] escape.
1958 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
1959 (cpu_flags): Add CpuSEV_ES entry.
1960 * i386-opc.h (CpuSEV_ES): New.
1961 (union i386_cpu_flags): Add cpusev_es field.
1962 * i386-opc.tbl (vmgexit): New.
1963 * i386-init.h, i386-tbl.h: Re-generate.
1965 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1967 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
1969 * i386-opc.h (IGNORESIZE): New.
1970 (DEFAULTSIZE): Likewise.
1971 (IgnoreSize): Removed.
1972 (DefaultSize): Likewise.
1973 (MnemonicSize): New.
1974 (i386_opcode_modifier): Replace ignoresize/defaultsize with
1976 * i386-opc.tbl (IgnoreSize): New.
1977 (DefaultSize): Likewise.
1978 * i386-tbl.h: Regenerated.
1980 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1983 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
1986 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1989 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
1990 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
1991 * i386-tbl.h: Regenerated.
1993 2020-02-26 Alan Modra <amodra@gmail.com>
1995 * aarch64-asm.c: Indent labels correctly.
1996 * aarch64-dis.c: Likewise.
1997 * aarch64-gen.c: Likewise.
1998 * aarch64-opc.c: Likewise.
1999 * alpha-dis.c: Likewise.
2000 * i386-dis.c: Likewise.
2001 * nds32-asm.c: Likewise.
2002 * nfp-dis.c: Likewise.
2003 * visium-dis.c: Likewise.
2005 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2007 * arc-regs.h (int_vector_base): Make it available for all ARC
2010 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2012 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2015 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2017 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2018 c.mv/c.li if rs1 is zero.
2020 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2022 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2023 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2025 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2026 * i386-opc.h (CpuABM): Removed.
2028 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2029 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2030 popcnt. Remove CpuABM from lzcnt.
2031 * i386-init.h: Regenerated.
2032 * i386-tbl.h: Likewise.
2034 2020-02-17 Jan Beulich <jbeulich@suse.com>
2036 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2037 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2038 VexW1 instead of open-coding them.
2039 * i386-tbl.h: Re-generate.
2041 2020-02-17 Jan Beulich <jbeulich@suse.com>
2043 * i386-opc.tbl (AddrPrefixOpReg): Define.
2044 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2045 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2046 templates. Drop NoRex64.
2047 * i386-tbl.h: Re-generate.
2049 2020-02-17 Jan Beulich <jbeulich@suse.com>
2052 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2053 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2054 into Intel syntax instance (with Unpsecified) and AT&T one
2056 (vcvtneps2bf16): Likewise, along with folding the two so far
2058 * i386-tbl.h: Re-generate.
2060 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2062 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2063 CPU_ANY_SSE4A_FLAGS.
2065 2020-02-17 Alan Modra <amodra@gmail.com>
2067 * i386-gen.c (cpu_flag_init): Correct last change.
2069 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2071 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2074 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2076 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2079 2020-02-14 Jan Beulich <jbeulich@suse.com>
2082 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2083 destination for Cpu64-only variant.
2084 (movzx): Fold patterns.
2085 * i386-tbl.h: Re-generate.
2087 2020-02-13 Jan Beulich <jbeulich@suse.com>
2089 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2090 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2091 CPU_ANY_SSE4_FLAGS entry.
2092 * i386-init.h: Re-generate.
2094 2020-02-12 Jan Beulich <jbeulich@suse.com>
2096 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2097 with Unspecified, making the present one AT&T syntax only.
2098 * i386-tbl.h: Re-generate.
2100 2020-02-12 Jan Beulich <jbeulich@suse.com>
2102 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2103 * i386-tbl.h: Re-generate.
2105 2020-02-12 Jan Beulich <jbeulich@suse.com>
2108 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2109 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2110 Amd64 and Intel64 templates.
2111 (call, jmp): Likewise for far indirect variants. Dro
2113 * i386-tbl.h: Re-generate.
2115 2020-02-11 Jan Beulich <jbeulich@suse.com>
2117 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2118 * i386-opc.h (ShortForm): Delete.
2119 (struct i386_opcode_modifier): Remove shortform field.
2120 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2121 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2122 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2123 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2125 * i386-tbl.h: Re-generate.
2127 2020-02-11 Jan Beulich <jbeulich@suse.com>
2129 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2130 fucompi): Drop ShortForm from operand-less templates.
2131 * i386-tbl.h: Re-generate.
2133 2020-02-11 Alan Modra <amodra@gmail.com>
2135 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2136 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2137 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2138 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2139 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2141 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2143 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2144 (cde_opcodes): Add VCX* instructions.
2146 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2147 Matthew Malcomson <matthew.malcomson@arm.com>
2149 * arm-dis.c (struct cdeopcode32): New.
2150 (CDE_OPCODE): New macro.
2151 (cde_opcodes): New disassembly table.
2152 (regnames): New option to table.
2153 (cde_coprocs): New global variable.
2154 (print_insn_cde): New
2155 (print_insn_thumb32): Use print_insn_cde.
2156 (parse_arm_disassembler_options): Parse coprocN args.
2158 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2161 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2163 * i386-opc.h (AMD64): Removed.
2164 (Intel64): Likewose.
2166 (INTEL64): Likewise.
2167 (INTEL64ONLY): Likewise.
2168 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2169 * i386-opc.tbl (Amd64): New.
2170 (Intel64): Likewise.
2171 (Intel64Only): Likewise.
2172 Replace AMD64 with Amd64. Update sysenter/sysenter with
2173 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2174 * i386-tbl.h: Regenerated.
2176 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2179 * z80-dis.c: Add support for GBZ80 opcodes.
2181 2020-02-04 Alan Modra <amodra@gmail.com>
2183 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2185 2020-02-03 Alan Modra <amodra@gmail.com>
2187 * m32c-ibld.c: Regenerate.
2189 2020-02-01 Alan Modra <amodra@gmail.com>
2191 * frv-ibld.c: Regenerate.
2193 2020-01-31 Jan Beulich <jbeulich@suse.com>
2195 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2196 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2197 (OP_E_memory): Replace xmm_mdq_mode case label by
2198 vex_scalar_w_dq_mode one.
2199 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2201 2020-01-31 Jan Beulich <jbeulich@suse.com>
2203 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2204 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2205 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2206 (intel_operand_size): Drop vex_w_dq_mode case label.
2208 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2210 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2211 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2213 2020-01-30 Alan Modra <amodra@gmail.com>
2215 * m32c-ibld.c: Regenerate.
2217 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2219 * bpf-opc.c: Regenerate.
2221 2020-01-30 Jan Beulich <jbeulich@suse.com>
2223 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2224 (dis386): Use them to replace C2/C3 table entries.
2225 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2226 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2227 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2228 * i386-tbl.h: Re-generate.
2230 2020-01-30 Jan Beulich <jbeulich@suse.com>
2232 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2234 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2236 * i386-tbl.h: Re-generate.
2238 2020-01-30 Alan Modra <amodra@gmail.com>
2240 * tic4x-dis.c (tic4x_dp): Make unsigned.
2242 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2243 Jan Beulich <jbeulich@suse.com>
2246 * i386-dis.c (MOVSXD_Fixup): New function.
2247 (movsxd_mode): New enum.
2248 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2249 (intel_operand_size): Handle movsxd_mode.
2250 (OP_E_register): Likewise.
2252 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2253 register on movsxd. Add movsxd with 16-bit destination register
2254 for AMD64 and Intel64 ISAs.
2255 * i386-tbl.h: Regenerated.
2257 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2260 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2261 * aarch64-asm-2.c: Regenerate
2262 * aarch64-dis-2.c: Likewise.
2263 * aarch64-opc-2.c: Likewise.
2265 2020-01-21 Jan Beulich <jbeulich@suse.com>
2267 * i386-opc.tbl (sysret): Drop DefaultSize.
2268 * i386-tbl.h: Re-generate.
2270 2020-01-21 Jan Beulich <jbeulich@suse.com>
2272 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2274 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2275 * i386-tbl.h: Re-generate.
2277 2020-01-20 Nick Clifton <nickc@redhat.com>
2279 * po/de.po: Updated German translation.
2280 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2281 * po/uk.po: Updated Ukranian translation.
2283 2020-01-20 Alan Modra <amodra@gmail.com>
2285 * hppa-dis.c (fput_const): Remove useless cast.
2287 2020-01-20 Alan Modra <amodra@gmail.com>
2289 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2291 2020-01-18 Nick Clifton <nickc@redhat.com>
2293 * configure: Regenerate.
2294 * po/opcodes.pot: Regenerate.
2296 2020-01-18 Nick Clifton <nickc@redhat.com>
2298 Binutils 2.34 branch created.
2300 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2302 * opintl.h: Fix spelling error (seperate).
2304 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2306 * i386-opc.tbl: Add {vex} pseudo prefix.
2307 * i386-tbl.h: Regenerated.
2309 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2312 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2313 (neon_opcodes): Likewise.
2314 (select_arm_features): Make sure we enable MVE bits when selecting
2315 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2318 2020-01-16 Jan Beulich <jbeulich@suse.com>
2320 * i386-opc.tbl: Drop stale comment from XOP section.
2322 2020-01-16 Jan Beulich <jbeulich@suse.com>
2324 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2325 (extractps): Add VexWIG to SSE2AVX forms.
2326 * i386-tbl.h: Re-generate.
2328 2020-01-16 Jan Beulich <jbeulich@suse.com>
2330 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2331 Size64 from and use VexW1 on SSE2AVX forms.
2332 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2333 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2334 * i386-tbl.h: Re-generate.
2336 2020-01-15 Alan Modra <amodra@gmail.com>
2338 * tic4x-dis.c (tic4x_version): Make unsigned long.
2339 (optab, optab_special, registernames): New file scope vars.
2340 (tic4x_print_register): Set up registernames rather than
2341 malloc'd registertable.
2342 (tic4x_disassemble): Delete optable and optable_special. Use
2343 optab and optab_special instead. Throw away old optab,
2344 optab_special and registernames when info->mach changes.
2346 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2349 * z80-dis.c (suffix): Use .db instruction to generate double
2352 2020-01-14 Alan Modra <amodra@gmail.com>
2354 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2355 values to unsigned before shifting.
2357 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2359 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2361 (print_insn_thumb16, print_insn_thumb32): Likewise.
2362 (print_insn): Initialize the insn info.
2363 * i386-dis.c (print_insn): Initialize the insn info fields, and
2366 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2368 * arc-opc.c (C_NE): Make it required.
2370 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2372 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2373 reserved register name.
2375 2020-01-13 Alan Modra <amodra@gmail.com>
2377 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2378 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2380 2020-01-13 Alan Modra <amodra@gmail.com>
2382 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2383 result of wasm_read_leb128 in a uint64_t and check that bits
2384 are not lost when copying to other locals. Use uint32_t for
2385 most locals. Use PRId64 when printing int64_t.
2387 2020-01-13 Alan Modra <amodra@gmail.com>
2389 * score-dis.c: Formatting.
2390 * score7-dis.c: Formatting.
2392 2020-01-13 Alan Modra <amodra@gmail.com>
2394 * score-dis.c (print_insn_score48): Use unsigned variables for
2395 unsigned values. Don't left shift negative values.
2396 (print_insn_score32): Likewise.
2397 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2399 2020-01-13 Alan Modra <amodra@gmail.com>
2401 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2403 2020-01-13 Alan Modra <amodra@gmail.com>
2405 * fr30-ibld.c: Regenerate.
2407 2020-01-13 Alan Modra <amodra@gmail.com>
2409 * xgate-dis.c (print_insn): Don't left shift signed value.
2410 (ripBits): Formatting, use 1u.
2412 2020-01-10 Alan Modra <amodra@gmail.com>
2414 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2415 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2417 2020-01-10 Alan Modra <amodra@gmail.com>
2419 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2420 and XRREG value earlier to avoid a shift with negative exponent.
2421 * m10200-dis.c (disassemble): Similarly.
2423 2020-01-09 Nick Clifton <nickc@redhat.com>
2426 * z80-dis.c (ld_ii_ii): Use correct cast.
2428 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2431 * z80-dis.c (ld_ii_ii): Use character constant when checking
2434 2020-01-09 Jan Beulich <jbeulich@suse.com>
2436 * i386-dis.c (SEP_Fixup): New.
2438 (dis386_twobyte): Use it for sysenter/sysexit.
2439 (enum x86_64_isa): Change amd64 enumerator to value 1.
2440 (OP_J): Compare isa64 against intel64 instead of amd64.
2441 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2443 * i386-tbl.h: Re-generate.
2445 2020-01-08 Alan Modra <amodra@gmail.com>
2447 * z8k-dis.c: Include libiberty.h
2448 (instr_data_s): Make max_fetched unsigned.
2449 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2450 Don't exceed byte_info bounds.
2451 (output_instr): Make num_bytes unsigned.
2452 (unpack_instr): Likewise for nibl_count and loop.
2453 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2455 * z8k-opc.h: Regenerate.
2457 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2459 * arc-tbl.h (llock): Use 'LLOCK' as class.
2461 (scond): Use 'SCOND' as class.
2463 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2466 2020-01-06 Alan Modra <amodra@gmail.com>
2468 * m32c-ibld.c: Regenerate.
2470 2020-01-06 Alan Modra <amodra@gmail.com>
2473 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2474 Peek at next byte to prevent recursion on repeated prefix bytes.
2475 Ensure uninitialised "mybuf" is not accessed.
2476 (print_insn_z80): Don't zero n_fetch and n_used here,..
2477 (print_insn_z80_buf): ..do it here instead.
2479 2020-01-04 Alan Modra <amodra@gmail.com>
2481 * m32r-ibld.c: Regenerate.
2483 2020-01-04 Alan Modra <amodra@gmail.com>
2485 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2487 2020-01-04 Alan Modra <amodra@gmail.com>
2489 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2491 2020-01-04 Alan Modra <amodra@gmail.com>
2493 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2495 2020-01-03 Jan Beulich <jbeulich@suse.com>
2497 * aarch64-tbl.h (aarch64_opcode_table): Use
2498 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2500 2020-01-03 Jan Beulich <jbeulich@suse.com>
2502 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2503 forms of SUDOT and USDOT.
2505 2020-01-03 Jan Beulich <jbeulich@suse.com>
2507 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2509 * opcodes/aarch64-dis-2.c: Re-generate.
2511 2020-01-03 Jan Beulich <jbeulich@suse.com>
2513 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2515 * opcodes/aarch64-dis-2.c: Re-generate.
2517 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2519 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2521 2020-01-01 Alan Modra <amodra@gmail.com>
2523 Update year range in copyright notice of all files.
2525 For older changes see ChangeLog-2019
2527 Copyright (C) 2020 Free Software Foundation, Inc.
2529 Copying and distribution of this file, with or without modification,
2530 are permitted in any medium without royalty provided the copyright
2531 notice and this notice are preserved.
2537 version-control: never
projects / thirdparty / binutils-gdb.git / blob