opcodes/ChangeLog

   1 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
   2
   3         * po/Make-in: Add html target.
   4
   5 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
   6
   7         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
   8         Intel Merom New Instructions.
   9         (THREE_BYTE_0): Likewise.
  10         (THREE_BYTE_1): Likewise.
  11         (three_byte_table): Likewise.
  12         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
  13         THREE_BYTE_1 for entry 0x3a.
  14         (twobyte_has_modrm): Updated.
  15         (twobyte_uses_SSE_prefix): Likewise.
  16         (print_insn): Handle 3-byte opcodes used by Intel Merom New
  17         Instructions.
  18
  19 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
  20
  21         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
  22         (v9_hpriv_reg_names): New table.
  23         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
  24         New cases '$' and '%' for read/write hyperprivileged register.
  25         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
  26         window handling and rdhpr/wrhpr instructions.
  27
  28 2006-02-24  DJ Delorie  <dj@redhat.com>
  29
  30         * m32c-desc.c: Regenerate with linker relaxation attributes.
  31         * m32c-desc.h: Likewise.
  32         * m32c-dis.c: Likewise.
  33         * m32c-opc.c: Likewise.
  34
  35 2006-02-24  Paul Brook  <paul@codesourcery.com>
  36
  37         * arm-dis.c (arm_opcodes): Add V7 instructions.
  38         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
  39         (print_arm_address): New function.
  40         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
  41         (psr_name): New function.
  42         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
  43
  44 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
  45
  46         * ia64-opc-i.c (bXc): New.
  47         (mXc): Likewise.
  48         (OpX2TaTbYaXcC): Likewise.
  49         (TF). Likewise.
  50         (TFCM). Likewise.
  51         (ia64_opcodes_i): Add instructions for tf.
  52
  53         * ia64-opc.h (IMMU5b): New.
  54
  55         * ia64-asmtab.c: Regenerated.
  56
  57 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
  58
  59         * ia64-gen.c: Update copyright years.
  60         * ia64-opc-b.c: Likewise.
  61
  62 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
  63
  64         * ia64-gen.c (lookup_regindex): Handle ".vm".
  65         (print_dependency_table): Handle '\"'.
  66
  67         * ia64-ic.tbl: Updated from SDM 2.2.
  68         * ia64-raw.tbl: Likewise.
  69         * ia64-waw.tbl: Likewise.
  70         * ia64-asmtab.c: Regenerated.
  71
  72         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
  73
  74 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
  75             Anil Paranjape   <anilp1@kpitcummins.com>
  76             Shilin Shakti    <shilins@kpitcummins.com>
  77
  78         * xc16x-desc.h: New file
  79         * xc16x-desc.c: New file
  80         * xc16x-opc.h: New file
  81         * xc16x-opc.c: New file
  82         * xc16x-ibld.c: New file
  83         * xc16x-asm.c: New file
  84         * xc16x-dis.c: New file
  85         * Makefile.am: Entries for xc16x
  86         * Makefile.in: Regenerate
  87         * cofigure.in: Add xc16x target information.
  88         * configure: Regenerate.
  89         * disassemble.c: Add xc16x target information.
  90
  91 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
  92
  93         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
  94         moves.
  95
  96 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         * i386-dis.c ('Z'): Add a new macro.
  99         (dis386_twobyte): Use "movZ" for control register moves.
 100
 101 2006-02-10  Nick Clifton  <nickc@redhat.com>
 102
 103         * iq2000-asm.c: Regenerate.
 104
 105 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 106
 107         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 108
 109 2006-01-26  David Ung  <davidu@mips.com>
 110
 111         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 112         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 113         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 114         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 115         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 116
 117 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 118
 119         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 120         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 121         disassembled.
 122         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 123         buffer overflows when disassembling instructions like
 124         ld (ix+123),0x23
 125         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 126         operand, if the offset is negative.
 127
 128 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 129
 130         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 131         unsigned char to hold data to be disassembled.
 132
 133 2006-01-17  Andreas Schwab  <schwab@suse.de>
 134
 135         PR binutils/1486
 136         * disassemble.c (disassemble_init_for_target): Set
 137         disassembler_needs_relocs for bfd_arch_arm.
 138
 139 2006-01-16  Paul Brook  <paul@codesourcery.com>
 140
 141         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 142         f?add?, and f?sub? instructions.
 143
 144 2006-01-16  Nick Clifton  <nickc@redhat.com>
 145
 146         * po/zh_CN.po: New Chinese (simplified) translation.
 147         * configure.in (ALL_LINGUAS): Add "zh_CH".
 148         * configure: Regenerate.
 149
 150 2006-01-05  Paul Brook  <paul@codesourcery.com>
 151
 152         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 153
 154 2006-01-06  DJ Delorie  <dj@redhat.com>
 155
 156         * m32c-desc.c: Regenerate.
 157         * m32c-opc.c: Regenerate.
 158         * m32c-opc.h: Regenerate.
 159
 160 2006-01-03  DJ Delorie  <dj@redhat.com>
 161
 162         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 163         * m32c-ibld.c: Regenerated.
 164
 165 For older changes see ChangeLog-2005
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