opcodes/ChangeLog

   1 2020-08-29  Alan Modra  <amodra@gmail.com>
   2
   3         PR 26446
   4         * csky-opc.h (MAX_OPRND_NUM): Define to 5.
   5         (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
   6
   7 2020-08-28  Alan Modra  <amodra@gmail.com>
   8
   9         PR 26449
  10         PR 26450
  11         * cgen-ibld.in (insert_1): Use 1UL in forming mask.
  12         (extract_normal): Likewise.
  13         (insert_normal): Likewise, and move past zero length test.
  14         (put_insn_int_value): Handle mask for zero length, use 1UL.
  15         * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
  16         * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
  17         * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
  18         * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
  19
  20 2020-08-28  Cooper Qu  <cooper.qu@linux.alibaba.com>
  21
  22         * csky-dis.c (CSKY_DEFAULT_ISA): Define.
  23         (csky_dis_info): Add member isa.
  24         (csky_find_inst_info): Skip instructions that do not belong to
  25         current CPU.
  26         (csky_get_disassembler): Get infomation from attribute section.
  27         (print_insn_csky): Set defualt ISA flag.
  28         * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
  29         * csky-opc.h (struct csky_opcode): Change isa_flag16 and
  30         isa_flag32'type to unsigned 64 bits.
  31
  32 2020-08-26  Jose E. Marchesi  <jemarch@gnu.org>
  33
  34         * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
  35
  36 2020-08-26  David Faust  <david.faust@oracle.com>
  37
  38         * bpf-desc.c: Regenerate.
  39         * bpf-desc.h: Likewise.
  40         * bpf-opc.c: Likewise.
  41         * bpf-opc.h: Likewise.
  42         * disassemble.c (disassemble_init_for_target): Set bits for xBPF
  43         ISA when appropriate.
  44
  45 2020-08-25  Alan Modra  <amodra@gmail.com>
  46
  47         PR 26504
  48         * vax-dis.c (parse_disassembler_options): Always add at least one
  49         to entry_addr_total_slots.
  50
  51 2020-08-24  Cooper Qu  <cooper.qu@linux.alibaba.com>
  52
  53         * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
  54         in other CPUs to speed up disassembling.
  55         * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
  56         Change plsli.u16 to plsli.16, change sync's operand format.
  57
  58 2020-08-21  Cooper Qu  <cooper.qu@linux.alibaba.com>
  59
  60         * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
  61
  62 2020-08-21  Nick Clifton  <nickc@redhat.com>
  63
  64         * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
  65         symbols.
  66
  67 2020-08-21  Cooper Qu  <cooper.qu@linux.alibaba.com>
  68
  69         * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
  70
  71 2020-08-19  Alan Modra  <amodra@gmail.com>
  72
  73         * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
  74         vcmpuq and xvtlsbb.
  75
  76 2020-08-18  Peter Bergner  <bergner@linux.ibm.com>
  77
  78         * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
  79         <xvcvbf16spn>: ...to this.
  80
  81 2020-08-12  Alex Coplan  <alex.coplan@arm.com>
  82
  83         * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
  84
  85 2020-08-12  Nick Clifton  <nickc@redhat.com>
  86
  87         * po/sr.po: Updated Serbian translation.
  88
  89 2020-08-11  Alan Modra  <amodra@gmail.com>
  90
  91         * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
  92
  93 2020-08-10  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
  94
  95         * aarch64-opc.c (aarch64_print_operand):
  96         (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
  97         (aarch64_sys_reg_supported_p): Function removed.
  98         (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
  99         (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
 100         into this function.
 101
 102 2020-08-10  Alan Modra  <amodra@gmail.com>
 103
 104         * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
 105         instructions.
 106
 107 2020-08-10  Alan Modra  <amodra@gmail.com>
 108
 109         * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
 110         Enable icbt for power5, miso for power8.
 111
 112 2020-08-10  Alan Modra  <amodra@gmail.com>
 113
 114         * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
 115         mtvsrd, and similarly for mfvsrd.
 116
 117 2020-08-04  Christian Groessler  <chris@groessler.org>
 118             Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
 119
 120         * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
 121         opcodes (special "out" to absolute address).
 122         * z8k-opc.h: Regenerate.
 123
 124 2020-07-30  H.J. Lu  <hongjiu.lu@intel.com>
 125
 126         PR gas/26305
 127         * i386-opc.h (Prefix_Disp8): New.
 128         (Prefix_Disp16): Likewise.
 129         (Prefix_Disp32): Likewise.
 130         (Prefix_Load): Likewise.
 131         (Prefix_Store): Likewise.
 132         (Prefix_VEX): Likewise.
 133         (Prefix_VEX3): Likewise.
 134         (Prefix_EVEX): Likewise.
 135         (Prefix_REX): Likewise.
 136         (Prefix_NoOptimize): Likewise.
 137         * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes.  Add {disp16}.
 138         * i386-tbl.h: Regenerated.
 139
 140 2020-07-29  Andreas Arnez  <arnez@linux.ibm.com>
 141
 142         * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
 143         default case with abort() instead of printing an error message and
 144         continuing, to avoid a maybe-uninitialized warning.
 145
 146 2020-07-24  Nick Clifton  <nickc@redhat.com>
 147
 148         * po/de.po: Updated German translation.
 149
 150 2020-07-21  Jan Beulich  <jbeulich@suse.com>
 151
 152         * i386-dis.c (OP_E_memory): Revert previous change.
 153
 154 2020-07-15  H.J. Lu  <hongjiu.lu@intel.com>
 155
 156         PR gas/26237
 157         * i386-dis.c (OP_E_memory): Don't display eiz with no scale
 158         without base nor index registers.
 159
 160 2020-07-15  Jan Beulich  <jbeulich@suse.com>
 161
 162         * i386-dis.c (putop): Move 'V' and 'W' handling.
 163
 164 2020-07-15  Jan Beulich  <jbeulich@suse.com>
 165
 166         * i386-dis.c (dis386): Adjust 'V' description. Use P-based
 167         construct for push/pop of register.
 168         (putop): Honor cond when handling 'P'. Drop handling of plain
 169         'V'.
 170
 171 2020-07-15  Jan Beulich  <jbeulich@suse.com>
 172
 173         * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
 174         description. Drop '&' description. Use P for push of immediate,
 175         pushf/popf, enter, and leave. Use %LP for lret/retf.
 176         (dis386_twobyte): Use P for push/pop of fs/gs.
 177         (reg_table): Use P for push/pop. Use @ for near call/jmp.
 178         (x86_64_table): Use P for far call/jmp.
 179         (putop): Drop handling of 'U' and '&'. Move and adjust handling
 180         of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
 181         labels.
 182         (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
 183         and dqw_mode (unconditional).
 184
 185 2020-07-14  H.J. Lu  <hongjiu.lu@intel.com>
 186
 187         PR gas/26237
 188         * i386-dis.c (OP_E_memory): Without base nor index registers,
 189         32-bit displacement to 64 bits.
 190
 191 2020-07-14  Claudiu Zissulescu  <claziss@gmail.com>
 192
 193         * arc-dis.c (print_insn_arc): Detect and emit a warning when a
 194         faulty double register pair is detected.
 195
 196 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 197
 198         * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
 199
 200 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 201
 202         * i386-dis.c (OP_R, Rm): Delete.
 203         (MOD_0F24, MOD_0F26): Rename to ...
 204         (X86_64_0F24, X86_64_0F26): ... respectively.
 205         (dis386): Update 'L' and 'Z' comments.
 206         (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
 207         table references.
 208         (mod_table): Move opcode 0F24 and 0F26 entries ...
 209         (x86_64_table): ... here.
 210         (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
 211         'Z' case block.
 212
 213 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 214
 215         * i386-dis.c (Rd, Rdq, MaskR): Delete.
 216         (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
 217         MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
 218         MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
 219         MOD_EVEX_0F387C): New enumerators.
 220         (reg_table): Use Edq for rdssp.
 221         (prefix_table): Use Edq for incssp.
 222         (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
 223         kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
 224         ktest*, and kshift*. Use Edq / MaskE for kmov*.
 225         * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
 226         * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
 227         0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
 228         * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
 229         0F3828_P_1 and 0F3838_P_1.
 230         * i386-dis-evex-w.h: Reference mod_table[] for opcodes
 231         0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
 232
 233 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 234
 235         * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
 236         PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
 237         PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
 238         PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
 239         PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
 240         PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
 241         (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
 242         VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
 243         VEX_LEN_0F38F3_R_3_P_0): Rename to ...
 244         (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
 245         VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
 246         (reg_table, prefix_table, three_byte_table, vex_table,
 247         vex_len_table, mod_table, rm_table): Replace / remove respective
 248         entries.
 249         (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
 250         of PREFIX_DATA in used_prefixes.
 251
 252 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 253
 254         * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
 255         MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
 256         MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
 257         MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
 258         (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
 259         MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
 260         (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
 261         VEX_W_0F3A33_L_0): Delete.
 262         (dis386): Adjust "BW" description.
 263         (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
 264         0F3A31, 0F3A32, and 0F3A33.
 265         (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
 266         entries.
 267         (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
 268         entries.
 269
 270 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 271
 272         * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
 273         PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
 274         PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
 275         PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
 276         PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
 277         PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
 278         PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
 279         PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
 280         PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
 281         PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
 282         PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
 283         PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
 284         PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
 285         PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
 286         PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
 287         PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
 288         PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
 289         PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
 290         PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
 291         PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
 292         PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
 293         PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
 294         PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
 295         PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
 296         PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
 297         PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
 298         PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
 299         PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
 300         PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
 301         PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
 302         PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
 303         PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
 304         PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
 305         PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
 306         PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
 307         PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
 308         PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
 309         PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
 310         PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
 311         PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
 312         PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
 313         PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
 314         PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
 315         PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
 316         PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
 317         PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
 318         PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
 319         PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
 320         PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
 321         PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
 322         PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
 323         PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
 324         PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
 325         PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
 326         PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
 327         PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
 328         PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
 329         PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
 330         PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
 331         PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
 332         PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
 333         PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
 334         PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
 335         PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
 336         PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
 337         PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
 338         PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
 339         PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
 340         PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
 341         PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
 342         PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
 343         PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
 344         PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
 345         PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
 346         PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
 347         PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
 348         PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
 349         PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
 350         PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
 351         PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
 352         PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
 353         PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
 354         PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
 355         PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
 356         PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
 357         PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
 358         PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
 359         PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
 360         PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
 361         PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
 362         PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
 363         PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
 364         PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
 365         PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
 366         PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
 367         PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
 368         PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
 369         PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
 370         PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
 371         PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
 372         PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
 373         PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
 374         PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
 375         PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
 376         PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
 377         PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
 378         PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
 379         PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
 380         PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
 381         PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
 382         PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
 383         PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
 384         PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
 385         PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
 386         PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
 387         PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
 388         PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
 389         PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
 390         PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
 391         PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
 392         PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
 393         PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
 394         PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
 395         PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
 396         PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
 397         PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
 398         PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
 399         PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
 400         PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
 401         PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
 402         PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
 403         PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
 404         PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
 405         PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
 406         PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
 407         PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
 408         PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
 409         PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
 410         PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
 411         PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
 412         PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
 413         PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
 414         PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
 415         PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
 416         PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
 417         PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
 418         PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
 419         PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
 420         PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
 421         PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
 422         PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
 423         PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
 424         PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
 425         PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
 426         PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
 427         PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
 428         PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
 429         (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
 430         MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
 431         MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
 432         MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
 433         MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
 434         MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
 435         MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
 436         MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
 437         MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
 438         MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
 439         MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
 440         MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
 441         MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
 442         MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
 443         MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
 444         VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
 445         VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
 446         VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
 447         VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
 448         VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
 449         VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
 450         VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
 451         VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
 452         VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
 453         VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
 454         VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
 455         VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
 456         VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
 457         EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
 458         EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
 459         EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
 460         EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
 461         EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
 462         EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
 463         EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
 464         EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
 465         EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
 466         EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
 467         EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
 468         EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
 469         EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
 470         EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
 471         EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
 472         EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
 473         EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
 474         EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
 475         EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
 476         EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
 477         EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
 478         EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
 479         EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
 480         EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
 481         EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
 482         EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
 483         EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
 484         VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
 485         VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
 486         VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
 487         VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
 488         VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
 489         VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
 490         VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
 491         VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
 492         VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
 493         VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
 494         VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
 495         VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
 496         VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
 497         VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
 498         VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
 499         VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
 500         VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
 501         VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
 502         EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
 503         EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
 504         EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
 505         EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
 506         EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
 507         EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
 508         EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
 509         EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
 510         EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
 511         EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
 512         EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
 513         EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
 514         EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
 515         EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
 516         EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
 517         EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
 518         EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
 519         EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
 520         EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
 521         EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
 522         EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
 523         EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
 524         EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
 525         EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
 526         EVEX_W_0F3A72_P_2): Rename to ...
 527         (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
 528         MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
 529         MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
 530         MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
 531         MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
 532         MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
 533         MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
 534         MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
 535         MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
 536         MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
 537         MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
 538         VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
 539         VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
 540         VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
 541         VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
 542         VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
 543         VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
 544         VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
 545         VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
 546         VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
 547         EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
 548         EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
 549         EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
 550         EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
 551         EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
 552         EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
 553         EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
 554         EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
 555         EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
 556         EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
 557         EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
 558         EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
 559         EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
 560         EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
 561         EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
 562         EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
 563         EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
 564         EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
 565         EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
 566         EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
 567         EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
 568         EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
 569         EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
 570         EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
 571         EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
 572         VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
 573         VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
 574         VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
 575         VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
 576         VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
 577         VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
 578         VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
 579         VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
 580         VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
 581         VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
 582         VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
 583         VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
 584         VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
 585         EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
 586         EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
 587         EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
 588         EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
 589         EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
 590         EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
 591         EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
 592         EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
 593         EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
 594         EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
 595         EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
 596         EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
 597         EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
 598         EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
 599         respectively.
 600         (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
 601         vex_w_table, mod_table): Replace / remove respective entries.
 602         (print_insn): Move up dp->prefix_requirement handling. Handle
 603         PREFIX_DATA.
 604         * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
 605         i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
 606         Replace / remove respective entries.
 607
 608 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 609
 610         * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
 611         PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
 612         (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
 613         vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
 614         Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
 615         the latter two.
 616         * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
 617         0F2C, 0F2D, 0F2E, and 0F2F.
 618         * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
 619         0F2F table entries.
 620
 621 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 622
 623         * i386-dis.c (OP_VexR, VexScalarR): New.
 624         (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
 625         XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
 626         need_vex_reg): Delete.
 627         (prefix_table): Replace VexScalar by VexScalarR and
 628         XMVexScalar by XMScalar for vmovss and vmovsd. Replace
 629         EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
 630         (vex_len_table): Replace EXqVexScalarS by EXqS.
 631         (get_valid_dis386): Don't set need_vex_reg.
 632         (print_insn): Don't initialize need_vex_reg.
 633         (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
 634         q_scalar_swap_mode cases.
 635         (OP_EX): Don't check for d_scalar_swap_mode and
 636         q_scalar_swap_mode.
 637         (OP_VEX): Done check need_vex_reg.
 638         * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
 639         XMVexScalar by XMScalar for vmovss and vmovsd. Replace
 640         EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
 641
 642 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 643
 644         * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
 645         (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
 646         VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
 647         VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
 648         (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
 649         VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
 650         VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
 651         VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
 652         (vex_table): Replace Vex128 by Vex.
 653         (vex_len_table): Likewise. Adjust referenced enum names.
 654         (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
 655         referenced enum names.
 656         (OP_VEX): Drop vex128_mode and vex256_mode cases.
 657         * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
 658
 659 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 660
 661         * i386-dis.c (dis386): "LW" description now applies to "DQ".
 662         (putop): Handle "DQ". Don't handle "LW" anymore.
 663         (prefix_table, mod_table): Replace %LW by %DQ.
 664         * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
 665
 666 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 667
 668         * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
 669         dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
 670         d_scalar_swap_mode case handling. Move shift adjsutment into
 671         the case its applicable to.
 672
 673 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 674
 675         * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
 676         (EXbScalar, EXwScalar): Fold to ...
 677         (EXbwUnit): ... this.
 678         (b_scalar_mode, w_scalar_mode): Fold to ...
 679         (bw_unit_mode): ... this.
 680         (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
 681         w_scalar_mode handling by bw_unit_mode one.
 682         * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
 683         ...
 684         * i386-dis-evex-prefix.h: ... here.
 685
 686 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 687
 688         * i386-dis.c (PCMPESTR_Fixup): Delete.
 689         (dis386): Adjust "LQ" description.
 690         (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
 691         cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
 692         PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
 693         vpcmpestrm, and vpcmpestri.
 694         (putop): Honor "cond" when handling LQ.
 695         * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
 696         vcvtsi2ss and vcvtusi2ss.
 697         * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
 698         vcvtsi2sd and vcvtusi2sd.
 699
 700 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 701
 702         * i386-dis.c (VCMP_Fixup, VCMP): Delete.
 703         (simd_cmp_op): Add const.
 704         (vex_cmp_op): Move up and drop initial 8 entries. Add const.
 705         (CMP_Fixup): Handle VEX case.
 706         (prefix_table): Replace VCMP by CMP.
 707         * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
 708
 709 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 710
 711         * i386-dis.c (MOVBE_Fixup): Delete.
 712         (Mv): Define.
 713         (prefix_table): Use Mv for movbe entries.
 714
 715 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 716
 717         * i386-dis.c (CRC32_Fixup): Delete.
 718         (prefix_table): Use Eb/Ev for crc32 entries.
 719
 720 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 721
 722         * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
 723         Conditionalize invocations of "USED_REX (0)".
 724
 725 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 726
 727         * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
 728         CH, DH, BH, AX, DX): Delete.
 729         (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
 730         eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
 731         dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
 732
 733 2020-07-10  Lili Cui  <lili.cui@intel.com>
 734
 735         * i386-dis.c (TMM): New.
 736         (EXtmm): Likewise.
 737         (VexTmm): Likewise.
 738         (MVexSIBMEM): Likewise.
 739         (tmm_mode): Likewise.
 740         (vex_sibmem_mode): Likewise.
 741         (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
 742         (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
 743         (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
 744         (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
 745         (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
 746         (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
 747         (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
 748         (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
 749         (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
 750         (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
 751         (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
 752         (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
 753         (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
 754         (PREFIX_VEX_0F3849_X86_64): Likewise.
 755         (PREFIX_VEX_0F384B_X86_64): Likewise.
 756         (PREFIX_VEX_0F385C_X86_64): Likewise.
 757         (PREFIX_VEX_0F385E_X86_64): Likewise.
 758         (X86_64_VEX_0F3849): Likewise.
 759         (X86_64_VEX_0F384B): Likewise.
 760         (X86_64_VEX_0F385C): Likewise.
 761         (X86_64_VEX_0F385E): Likewise.
 762         (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
 763         (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
 764         (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
 765         (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
 766         (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
 767         (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
 768         (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
 769         (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
 770         (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
 771         (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
 772         (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
 773         (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
 774         (VEX_W_0F3849_X86_64_P_0): Likewise.
 775         (VEX_W_0F3849_X86_64_P_2): Likewise.
 776         (VEX_W_0F3849_X86_64_P_3): Likewise.
 777         (VEX_W_0F384B_X86_64_P_1): Likewise.
 778         (VEX_W_0F384B_X86_64_P_2): Likewise.
 779         (VEX_W_0F384B_X86_64_P_3): Likewise.
 780         (VEX_W_0F385C_X86_64_P_1): Likewise.
 781         (VEX_W_0F385E_X86_64_P_0): Likewise.
 782         (VEX_W_0F385E_X86_64_P_1): Likewise.
 783         (VEX_W_0F385E_X86_64_P_2): Likewise.
 784         (VEX_W_0F385E_X86_64_P_3): Likewise.
 785         (names_tmm): Likewise.
 786         (att_names_tmm): Likewise.
 787         (intel_operand_size): Handle void_mode.
 788         (OP_XMM): Handle tmm_mode.
 789         (OP_EX): Likewise.
 790         (OP_VEX): Likewise.
 791         * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
 792         CpuAMX_BF16 and CpuAMX_TILE.
 793         (operand_type_shorthands): Add RegTMM.
 794         (operand_type_init): Likewise.
 795         (operand_types): Add Tmmword.
 796         (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
 797         (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
 798         * i386-opc.h (CpuAMX_INT8): New.
 799         (CpuAMX_BF16): Likewise.
 800         (CpuAMX_TILE): Likewise.
 801         (SIBMEM): Likewise.
 802         (Tmmword): Likewise.
 803         (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
 804         (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
 805         (i386_operand_type): Add tmmword.
 806         * i386-opc.tbl: Add AMX instructions.
 807         * i386-reg.tbl: Add AMX registers.
 808         * i386-init.h: Regenerated.
 809         * i386-tbl.h: Likewise.
 810
 811 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 812
 813         * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
 814         (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
 815         Rename to ...
 816         (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
 817         REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
 818         respectively.
 819         (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
 820         VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
 821         VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
 822         VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
 823         VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
 824         VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
 825         VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
 826         VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
 827         VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
 828         VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
 829         VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
 830         VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
 831         VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
 832         VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
 833         VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
 834         VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
 835         VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
 836         VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
 837         VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
 838         VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
 839         VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
 840         VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
 841         VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
 842         VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
 843         VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
 844         VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
 845         VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
 846         VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
 847         VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
 848         VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
 849         VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
 850         VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
 851         VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
 852         VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
 853         VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
 854         VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
 855         (reg_table): Re-order XOP entries. Adjust their operands.
 856         (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
 857         08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
 858         08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
 859         09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
 860         09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
 861         09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
 862         entries by references ...
 863         (vex_len_table): ... to resepctive new entries here. For several
 864         new and existing entries reference ...
 865         (vex_w_table): ... new entries here.
 866         (mod_table): New MOD_VEX_0FXOP_09_12 entry.
 867
 868 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 869
 870         * i386-dis.c (XMVexScalarI4): Define.
 871         (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
 872         VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
 873         VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
 874         (vex_len_table): Move scalar FMA4 entries ...
 875         (prefix_table): ... here.
 876         (OP_REG_VexI4): Handle scalar_mode.
 877         * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
 878         * i386-tbl.h: Re-generate.
 879
 880 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 881
 882         * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
 883         Vex_2src_2): Delete.
 884         (OP_VexW, VexW): New.
 885         (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
 886         for shifts and rotates by register.
 887
 888 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 889
 890         * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
 891         VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
 892         OP_EX_VexReg): Delete.
 893         (OP_VexI4, VexI4): New.
 894         (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
 895         (prefix_table): ... here.
 896         (print_insn): Drop setting of vex_w_done.
 897
 898 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 899
 900         * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
 901         (prefix_table, vex_len_table): Replace operands for FMA4 insns.
 902         (xop_table): Replace operands of 4-operand insns.
 903         (OP_REG_VexI4): Move VEX.W based operand swaping here.
 904
 905 2020-07-07  Claudiu Zissulescu  <claziss@synopsys.com>
 906
 907         * arc-opc.c (insert_rbd): New function.
 908         (RBD): Define.
 909         (RBDdup): Likewise.
 910         * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
 911         instructions.
 912
 913 2020-07-07  Jan Beulich  <jbeulich@suse.com>
 914
 915         * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
 916         EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
 917         EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
 918         EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
 919         Delete.
 920         (putop): Handle "BW".
 921         * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
 922         0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
 923         and 0F3A3F ...
 924         * i386-dis-evex-prefix.h: ... here.
 925
 926 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 927
 928         * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
 929         (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
 930         VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
 931         VEX_W_0FXOP_09_83): New enumerators.
 932         (xop_table): Reference the above.
 933         (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
 934         (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
 935         VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
 936         (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
 937
 938 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 939
 940         * i386-dis.c (EVEX_W_0F3838_P_1,
 941         EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
 942         EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
 943         EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
 944         EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
 945         EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
 946         (putop): Centralize management of last[]. Delete SAVE_LAST.
 947         * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
 948         0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
 949         0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
 950         * i386-dis-evex-prefix.h: here.
 951
 952 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 953
 954         * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
 955         MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
 956         MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
 957         MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
 958         enumerators.
 959         (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
 960         EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
 961         EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
 962         EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
 963         (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
 964         EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
 965         EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
 966         EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
 967         these, respectively.
 968         * i386-dis-evex-len.h: Adjust comments.
 969         * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
 970         MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
 971         MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
 972         MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
 973         MOD_EVEX_0F385B_P_2_W_1 table entries.
 974         * i386-dis-evex-w.h: Reference mod_table[] for
 975         EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
 976         EVEX_W_0F385B_P_2.
 977
 978 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 979
 980         * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
 981         vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
 982         EXymm.
 983         (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
 984         Likewise. Mark 256-bit entries invalid.
 985
 986 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 987
 988         * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
 989         PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
 990         PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
 991         PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
 992         PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
 993         PREFIX_EVEX_0F382B): Delete.
 994         (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
 995         EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
 996         EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
 997         EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
 998         EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
 999         to ...
1000         (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1001         EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1002         EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1003         EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1004         respectively.
1005         * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1006         for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1007         0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1008         * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1009         PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1010         PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1011         PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1012         PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1013         PREFIX_EVEX_0F382B): Remove table entries.
1014         * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1015         0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1016         0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1017
1018 2020-07-06  Jan Beulich  <jbeulich@suse.com>
1019
1020         * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1021         EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1022         enumerators.
1023         * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1024         EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1025         EVEX_LEN_0F3A01_P_2_W_1 table entries.
1026         * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1027         entries.
1028
1029 2020-07-06  Jan Beulich  <jbeulich@suse.com>
1030
1031         * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1032         EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1033         EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1034         EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1035         * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1036         EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1037         EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1038         EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1039         * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1040         entries.
1041
1042 2020-07-06  Jan Beulich  <jbeulich@suse.com>
1043
1044         * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1045         (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1046         (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1047         respectively.
1048         (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1049         entries.
1050         * i386-dis-evex.h (evex_table): Reference VEX table entry for
1051         opcode 0F3A1D.
1052         * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1053         entry.
1054         * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1055
1056 2020-07-06  Jan Beulich  <jbeulich@suse.com>
1057
1058         * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1059         PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1060         PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1061         PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1062         PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1063         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1064         PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1065         PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1066         PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1067         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1068         PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1069         PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1070         PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1071         PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1072         PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1073         PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1074         PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1075         PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1076         PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1077         PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1078         PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1079         PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1080         PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1081         PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1082         PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1083         PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1084         PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1085         EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1086         EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1087         EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1088         (prefix_table): Add EXxEVexR to FMA table entries.
1089         (OP_Rounding): Move abort() invocation.
1090         * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1091         0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1092         0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1093         0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1094         0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1095         0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1096         0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1097         0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1098         0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1099         0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1100         0F3ACE, 0F3ACF.
1101         * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1102         PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1103         PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1104         PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1105         PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1106         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1107         PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1108         PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1109         PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1110         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1111         PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1112         PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1113         PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1114         PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1115         PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1116         PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1117         PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1118         PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1119         PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1120         PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1121         PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1122         PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1123         PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1124         PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1125         PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1126         PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1127         PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1128         Delete table entries.
1129         * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1130         EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1131         EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1132         Likewise.
1133
1134 2020-07-06  Jan Beulich  <jbeulich@suse.com>
1135
1136         * i386-dis.c (EXqScalarS): Delete.
1137         (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1138         * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1139
1140 2020-07-06  Jan Beulich  <jbeulich@suse.com>
1141
1142         * i386-dis.c (safe-ctype.h): Include.
1143         (EXdScalar, EXqScalar): Delete.
1144         (d_scalar_mode, q_scalar_mode): Delete.
1145         (prefix_table, vex_len_table): Use EXxmm_md in place of
1146         EXdScalar and EXxmm_mq in place of EXqScalar.
1147         (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1148         d_scalar_mode and q_scalar_mode.
1149         * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1150         (vmovsd): Use EXxmm_mq.
1151
1152 2020-07-06  Yuri Chornoivan  <yurchor@ukr.net>
1153
1154         PR 26204
1155         * arc-dis.c: Fix spelling mistake.
1156         * po/opcodes.pot: Regenerate.
1157
1158 2020-07-06  Nick Clifton  <nickc@redhat.com>
1159
1160         * po/pt_BR.po: Updated Brazilian Portugugese translation.
1161         * po/uk.po: Updated Ukranian translation.
1162
1163 2020-07-04  Nick Clifton  <nickc@redhat.com>
1164
1165         * configure: Regenerate.
1166         * po/opcodes.pot: Regenerate.
1167
1168 2020-07-04  Nick Clifton  <nickc@redhat.com>
1169
1170         Binutils 2.35 branch created.
1171
1172 2020-07-02  H.J. Lu  <hongjiu.lu@intel.com>
1173
1174         * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1175         * i386-opc.h (VexSwapSources): New.
1176         (i386_opcode_modifier): Add vexswapsources.
1177         * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1178         with two source operands swapped.
1179         * i386-tbl.h: Regenerated.
1180
1181 2020-06-30  Nelson Chu  <nelson.chu@sifive.com>
1182
1183         * riscv-dis.c (print_insn_args, case 'E'): Updated.  Let the
1184         unprivileged CSR can also be initialized.
1185
1186 2020-06-29  Alan Modra  <amodra@gmail.com>
1187
1188         * arm-dis.c: Use C style comments.
1189         * cr16-opc.c: Likewise.
1190         * ft32-dis.c: Likewise.
1191         * moxie-opc.c: Likewise.
1192         * tic54x-dis.c: Likewise.
1193         * s12z-opc.c: Remove useless comment.
1194         * xgate-dis.c: Likewise.
1195
1196 2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>
1197
1198         * i386-opc.tbl: Add a blank line.
1199
1200 2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>
1201
1202         * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1203         (VecSIB128): Renamed to ...
1204         (VECSIB128): This.
1205         (VecSIB256): Renamed to ...
1206         (VECSIB256): This.
1207         (VecSIB512): Renamed to ...
1208         (VECSIB512): This.
1209         (VecSIB): Renamed to ...
1210         (SIB): This.
1211         (i386_opcode_modifier): Replace vecsib with sib.
1212         * i386-opc.tbl (VecSIB128): New.
1213         (VecSIB256): Likewise.
1214         (VecSIB512): Likewise.
1215         Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1216         and VecSIB512, respectively.
1217
1218 2020-06-26  Jan Beulich  <jbeulich@suse.com>
1219
1220         * i386-dis.c: Adjust description of I macro.
1221         (x86_64_table): Drop use of I.
1222         (float_mem): Replace use of I.
1223         (putop): Remove handling of I. Adjust setting/clearing of "alt".
1224
1225 2020-06-26  Jan Beulich  <jbeulich@suse.com>
1226
1227         * i386-dis.c: (print_insn): Avoid straight assignment to
1228         priv.orig_sizeflag when processing -M sub-options.
1229
1230 2020-06-25  Jan Beulich  <jbeulich@suse.com>
1231
1232         * i386-dis.c: Adjust description of J macro.
1233         (dis386, x86_64_table, mod_table): Replace J.
1234         (putop): Remove handling of J.
1235
1236 2020-06-25  Jan Beulich  <jbeulich@suse.com>
1237
1238         * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1239
1240 2020-06-25  Jan Beulich  <jbeulich@suse.com>
1241
1242         * i386-dis.c: Adjust description of "LQ" macro.
1243         (dis386_twobyte): Use LQ for sysret.
1244         (putop): Adjust handling of LQ.
1245
1246 2020-06-22  Nelson Chu  <nelson.chu@sifive.com>
1247
1248         * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1249         * riscv-dis.c: Include elfxx-riscv.h.
1250
1251 2020-06-18  H.J. Lu  <hongjiu.lu@intel.com>
1252
1253         * i386-dis.c (prefix_table): Revert the last vmgexit change.
1254
1255 2020-06-17  Lili Cui  <lili.cui@intel.com>
1256
1257         * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1258
1259 2020-06-14  H.J. Lu  <hongjiu.lu@intel.com>
1260
1261         PR gas/26115
1262         * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1263         * i386-opc.tbl: Likewise.
1264         * i386-tbl.h: Regenerated.
1265
1266 2020-06-12  Nelson Chu  <nelson.chu@sifive.com>
1267
1268         * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1269
1270 2020-06-11  Alex Coplan  <alex.coplan@arm.com>
1271
1272         * aarch64-opc.c (SYSREG): New macro for describing system registers.
1273         (SR_CORE): Likewise.
1274         (SR_FEAT): Likewise.
1275         (SR_RNG): Likewise.
1276         (SR_V8_1): Likewise.
1277         (SR_V8_2): Likewise.
1278         (SR_V8_3): Likewise.
1279         (SR_V8_4): Likewise.
1280         (SR_PAN): Likewise.
1281         (SR_RAS): Likewise.
1282         (SR_SSBS): Likewise.
1283         (SR_SVE): Likewise.
1284         (SR_ID_PFR2): Likewise.
1285         (SR_PROFILE): Likewise.
1286         (SR_MEMTAG): Likewise.
1287         (SR_SCXTNUM): Likewise.
1288         (aarch64_sys_regs): Refactor to store feature information in the table.
1289         (aarch64_sys_reg_supported_p): Collapse logic for system registers
1290         that now describe their own features.
1291         (aarch64_pstatefield_supported_p): Likewise.
1292
1293 2020-06-09  H.J. Lu  <hongjiu.lu@intel.com>
1294
1295         * i386-dis.c (prefix_table): Fix a typo in comments.
1296
1297 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1298
1299         * i386-dis.c (rex_ignored): Delete.
1300         (ckprefix): Drop rex_ignored initialization.
1301         (get_valid_dis386): Drop setting of rex_ignored.
1302         (print_insn): Drop checking of rex_ignored. Don't record data
1303         size prefix as used with VEX-and-alike encodings.
1304
1305 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1306
1307         * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1308         MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1309         (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1310         (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1311         (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1312         VEX_0F12, and VEX_0F16.
1313         (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1314         VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1315         (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1316         from movlps and movhlps. New MOD_0F12_PREFIX_2,
1317         MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1318         MOD_VEX_0F16_PREFIX_2 entries.
1319
1320 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1321
1322         * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1323         MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1324         (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1325         PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1326         PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1327         PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1328         EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1329         EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1330         EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1331         EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1332         EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1333         EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1334         EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1335         EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1336         EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1337         EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1338         EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1339         EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1340         EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1341         EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1342         EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1343         EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1344         EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1345         EVEX_W_0FC6_P_2): Delete.
1346         (print_insn): Add EVEX.W vs embedded prefix consistency check
1347         to prefix validation.
1348         * i386-dis-evex.h (evex_table): Don't further descend for
1349         vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1350         and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1351         and 0F2B.
1352         * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1353         * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1354         vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1355         vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1356         2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1357         Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1358         PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1359         PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1360         PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1361         * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1362         EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1363         EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1364         EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1365         EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1366         EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1367         EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1368         EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1369         EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1370         EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1371         EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1372         EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1373         EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1374         EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1375         EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1376         EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1377         EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1378         EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1379
1380 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1381
1382         * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1383         vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1384         (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1385         vmovmskpX.
1386         (print_insn): Drop pointless check against bad_opcode. Split
1387         prefix validation into legacy and VEX-and-alike parts.
1388         (putop): Re-work 'X' macro handling.
1389
1390 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1391
1392         * i386-dis.c (MOD_0F51): Rename to ...
1393         (MOD_0F50): ... this.
1394
1395 2020-06-08  Alex Coplan  <alex.coplan@arm.com>
1396
1397         * arm-dis.c (arm_opcodes): Add dfb.
1398         (thumb32_opcodes): Add dfb.
1399
1400 2020-06-08  Jan Beulich  <jbeulich@suse.com>
1401
1402         * i386-opc.h (reg_entry): Const-qualify reg_name field.
1403
1404 2020-06-06  Alan Modra  <amodra@gmail.com>
1405
1406         * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1407
1408 2020-06-05  Alan Modra  <amodra@gmail.com>
1409
1410         * cgen-dis.c (hash_insn_array): Increase size of buf.  Assert
1411         size is large enough.
1412
1413 2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
1414
1415         * disassemble.c (disassemble_init_for_target): Set endian_code for
1416         bpf targets.
1417         * bpf-desc.c: Regenerate.
1418         * bpf-opc.c: Likewise.
1419         * bpf-dis.c: Likewise.
1420
1421 2020-06-03  Jose E. Marchesi  <jose.marchesi@oracle.com>
1422
1423         * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1424         (cgen_put_insn_value): Likewise.
1425         (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1426         * cgen-dis.in (print_insn): Likewise.
1427         * cgen-ibld.in (insert_1): Likewise.
1428         (insert_1): Likewise.
1429         (insert_insn_normal): Likewise.
1430         (extract_1): Likewise.
1431         * bpf-dis.c: Regenerate.
1432         * bpf-ibld.c: Likewise.
1433         * bpf-ibld.c: Likewise.
1434         * cgen-dis.in: Likewise.
1435         * cgen-ibld.in: Likewise.
1436         * cgen-opc.c: Likewise.
1437         * epiphany-dis.c: Likewise.
1438         * epiphany-ibld.c: Likewise.
1439         * fr30-dis.c: Likewise.
1440         * fr30-ibld.c: Likewise.
1441         * frv-dis.c: Likewise.
1442         * frv-ibld.c: Likewise.
1443         * ip2k-dis.c: Likewise.
1444         * ip2k-ibld.c: Likewise.
1445         * iq2000-dis.c: Likewise.
1446         * iq2000-ibld.c: Likewise.
1447         * lm32-dis.c: Likewise.
1448         * lm32-ibld.c: Likewise.
1449         * m32c-dis.c: Likewise.
1450         * m32c-ibld.c: Likewise.
1451         * m32r-dis.c: Likewise.
1452         * m32r-ibld.c: Likewise.
1453         * mep-dis.c: Likewise.
1454         * mep-ibld.c: Likewise.
1455         * mt-dis.c: Likewise.
1456         * mt-ibld.c: Likewise.
1457         * or1k-dis.c: Likewise.
1458         * or1k-ibld.c: Likewise.
1459         * xc16x-dis.c: Likewise.
1460         * xc16x-ibld.c: Likewise.
1461         * xstormy16-dis.c: Likewise.
1462         * xstormy16-ibld.c: Likewise.
1463
1464 2020-06-04  Jose E. Marchesi  <jemarch@gnu.org>
1465
1466         * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1467         (print_insn_): Handle instruction endian.
1468         * bpf-dis.c: Regenerate.
1469         * bpf-desc.c: Regenerate.
1470         * epiphany-dis.c: Likewise.
1471         * epiphany-desc.c: Likewise.
1472         * fr30-dis.c: Likewise.
1473         * fr30-desc.c: Likewise.
1474         * frv-dis.c: Likewise.
1475         * frv-desc.c: Likewise.
1476         * ip2k-dis.c: Likewise.
1477         * ip2k-desc.c: Likewise.
1478         * iq2000-dis.c: Likewise.
1479         * iq2000-desc.c: Likewise.
1480         * lm32-dis.c: Likewise.
1481         * lm32-desc.c: Likewise.
1482         * m32c-dis.c: Likewise.
1483         * m32c-desc.c: Likewise.
1484         * m32r-dis.c: Likewise.
1485         * m32r-desc.c: Likewise.
1486         * mep-dis.c: Likewise.
1487         * mep-desc.c: Likewise.
1488         * mt-dis.c: Likewise.
1489         * mt-desc.c: Likewise.
1490         * or1k-dis.c: Likewise.
1491         * or1k-desc.c: Likewise.
1492         * xc16x-dis.c: Likewise.
1493         * xc16x-desc.c: Likewise.
1494         * xstormy16-dis.c: Likewise.
1495         * xstormy16-desc.c: Likewise.
1496
1497 2020-06-03  Nick Clifton  <nickc@redhat.com>
1498
1499         * po/sr.po: Updated Serbian translation.
1500
1501 2020-06-03  Nelson Chu  <nelson.chu@sifive.com>
1502
1503         * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1504         (riscv_get_priv_spec_class): Likewise.
1505
1506 2020-06-01  Alan Modra  <amodra@gmail.com>
1507
1508         * bpf-desc.c: Regenerate.
1509
1510 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
1511             David Faust <david.faust@oracle.com>
1512
1513         * bpf-desc.c: Regenerate.
1514         * bpf-opc.h: Likewise.
1515         * bpf-opc.c: Likewise.
1516         * bpf-dis.c: Likewise.
1517
1518 2020-05-28  Alan Modra  <amodra@gmail.com>
1519
1520         * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1521         values.
1522
1523 2020-05-28  Alan Modra  <amodra@gmail.com>
1524
1525         * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1526         immediates.
1527         (print_insn_ns32k): Revert last change.
1528
1529 2020-05-28  Nick Clifton  <nickc@redhat.com>
1530
1531         * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1532         static.
1533
1534 2020-05-26  Sandra Loosemore  <sandra@codesourcery.com>
1535
1536         Fix extraction of signed constants in nios2 disassembler (again).
1537
1538         * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1539         extractions of signed fields.
1540
1541 2020-05-26  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
1542
1543         * s390-opc.txt: Relocate vector load/store instructions with
1544         additional alignment parameter and change architecture level
1545         constraint from z14 to z13.
1546
1547 2020-05-21  Alan Modra  <amodra@gmail.com>
1548
1549         * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1550         * sparc-dis.c: Likewise.
1551         * tic4x-dis.c: Likewise.
1552         * xtensa-dis.c: Likewise.
1553         * bpf-desc.c: Regenerate.
1554         * epiphany-desc.c: Regenerate.
1555         * fr30-desc.c: Regenerate.
1556         * frv-desc.c: Regenerate.
1557         * ip2k-desc.c: Regenerate.
1558         * iq2000-desc.c: Regenerate.
1559         * lm32-desc.c: Regenerate.
1560         * m32c-desc.c: Regenerate.
1561         * m32r-desc.c: Regenerate.
1562         * mep-asm.c: Regenerate.
1563         * mep-desc.c: Regenerate.
1564         * mt-desc.c: Regenerate.
1565         * or1k-desc.c: Regenerate.
1566         * xc16x-desc.c: Regenerate.
1567         * xstormy16-desc.c: Regenerate.
1568
1569 2020-05-20  Nelson Chu  <nelson.chu@sifive.com>
1570
1571         * riscv-opc.c (riscv_ext_version_table): The table used to store
1572         all information about the supported spec and the corresponding ISA
1573         versions.  Currently, only Zicsr is supported to verify the
1574         correctness of Z sub extension settings.  Others will be supported
1575         in the future patches.
1576         (struct isa_spec_t, isa_specs): List for all supported ISA spec
1577         classes and the corresponding strings.
1578         (riscv_get_isa_spec_class): New function.  Get the corresponding ISA
1579         spec class by giving a ISA spec string.
1580         * riscv-opc.c (struct priv_spec_t): New structure.
1581         (struct priv_spec_t priv_specs): List for all supported privilege spec
1582         classes and the corresponding strings.
1583         (riscv_get_priv_spec_class): New function.  Get the corresponding
1584         privilege spec class by giving a spec string.
1585         (riscv_get_priv_spec_name): New function.  Get the corresponding
1586         privilege spec string by giving a CSR version class.
1587         * riscv-dis.c: Updated since DECLARE_CSR is changed.
1588         * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1589         according to the chosen version.  Build a hash table riscv_csr_hash to
1590         store the valid CSR for the chosen pirv verison.  Dump the direct
1591         CSR address rather than it's name if it is invalid.
1592         (parse_riscv_dis_option_without_args): New function.  Parse the options
1593         without arguments.
1594         (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1595         parse the options without arguments first, and then handle the options
1596         with arguments.  Add the new option -Mpriv-spec, which has argument.
1597         * riscv-dis.c (print_riscv_disassembler_options): Add description
1598         about the new OBJDUMP option.
1599
1600 2020-05-19  Peter Bergner  <bergner@linux.ibm.com>
1601
1602         * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1603         WC values on POWER10 sync, dcbf  and wait instructions.
1604         (insert_pl, extract_pl): New functions.
1605         (L2OPT, LS, WC): Use insert_ls and extract_ls.
1606         (LS3): New , 3-bit L for sync.
1607         (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1608         (SC2, PL): New, 2-bit SC and PL for sync and wait.
1609         (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1610         (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1611         (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1612         plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1613         <wait>: Enable PL operand on POWER10.
1614         <dcbf>: Enable L3OPT operand on POWER10.
1615         <sync>: Enable SC2 operand on POWER10.
1616
1617 2020-05-19  Stafford Horne  <shorne@gmail.com>
1618
1619         PR 25184
1620         * or1k-asm.c: Regenerate.
1621         * or1k-desc.c: Regenerate.
1622         * or1k-desc.h: Regenerate.
1623         * or1k-dis.c: Regenerate.
1624         * or1k-ibld.c: Regenerate.
1625         * or1k-opc.c: Regenerate.
1626         * or1k-opc.h: Regenerate.
1627         * or1k-opinst.c: Regenerate.
1628
1629 2020-05-11  Alan Modra  <amodra@gmail.com>
1630
1631         * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1632         xsmaxcqp, xsmincqp.
1633
1634 2020-05-11  Alan Modra  <amodra@gmail.com>
1635
1636         * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1637         stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1638
1639 2020-05-11  Alan Modra  <amodra@gmail.com>
1640
1641         * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1642
1643 2020-05-11  Alan Modra  <amodra@gmail.com>
1644
1645         * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1646         vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1647
1648 2020-05-11  Peter Bergner  <bergner@linux.ibm.com>
1649
1650         * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1651         mnemonics.
1652
1653 2020-05-11  Alan Modra  <amodra@gmail.com>
1654
1655         * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1656         (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1657         vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1658         (prefix_opcodes): Add xxeval.
1659
1660 2020-05-11  Alan Modra  <amodra@gmail.com>
1661
1662         * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1663         xxgenpcvwm, xxgenpcvdm.
1664
1665 2020-05-11  Alan Modra  <amodra@gmail.com>
1666
1667         * ppc-opc.c (MP, VXVAM_MASK): Define.
1668         (VXVAPS_MASK): Use VXVA_MASK.
1669         (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1670         vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1671         vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1672         vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1673
1674 2020-05-11  Alan Modra  <amodra@gmail.com>
1675             Peter Bergner  <bergner@linux.ibm.com>
1676
1677         * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1678         New functions.
1679         (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1680         YMSK2, XA6a, XA6ap, XB6a entries.
1681         (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1682         (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1683         (PPCVSX4): Define.
1684         (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1685         xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1686         xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1687         xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1688         xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1689         xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1690         xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1691         (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1692         pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1693         pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1694         pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1695         pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1696         pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1697         pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1698
1699 2020-05-11  Alan Modra  <amodra@gmail.com>
1700
1701         * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1702         (insert_xts, extract_xts): New functions.
1703         (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1704         (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1705         (VXRC_MASK, VXSH_MASK): Define.
1706         (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1707         vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1708         vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1709         vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1710         vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1711         (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1712         xxblendvh, xxblendvw, xxblendvd, xxpermx.
1713
1714 2020-05-11  Alan Modra  <amodra@gmail.com>
1715
1716         * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1717         vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1718         vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1719         vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1720         xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1721
1722 2020-05-11  Alan Modra  <amodra@gmail.com>
1723
1724         * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1725         (XTP, DQXP, DQXP_MASK): Define.
1726         (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1727         (prefix_opcodes): Add plxvp and pstxvp.
1728
1729 2020-05-11  Alan Modra  <amodra@gmail.com>
1730
1731         * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1732         vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1733         vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1734
1735 2020-05-11  Peter Bergner  <bergner@linux.ibm.com>
1736
1737         * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1738
1739 2020-05-11  Peter Bergner  <bergner@linux.ibm.com>
1740
1741         * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1742         (L1OPT): Define.
1743         (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1744
1745 2020-05-11  Peter Bergner  <bergner@linux.ibm.com>
1746
1747         * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1748
1749 2020-05-11  Alan Modra  <amodra@gmail.com>
1750
1751         * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1752
1753 2020-05-11  Alan Modra  <amodra@gmail.com>
1754
1755         * ppc-dis.c (ppc_opts): Add "power10" entry.
1756         (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1757         * ppc-opc.c (POWER10): Rename from POWERXX.  Update all uses.
1758
1759 2020-05-11  Nick Clifton  <nickc@redhat.com>
1760
1761         * po/fr.po: Updated French translation.
1762
1763 2020-04-30  Alex Coplan  <alex.coplan@arm.com>
1764
1765         * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1766         * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1767         (operand_general_constraint_met_p): validate
1768         AARCH64_OPND_UNDEFINED.
1769         * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1770         for FLD_imm16_2.
1771         * aarch64-asm-2.c: Regenerated.
1772         * aarch64-dis-2.c: Regenerated.
1773         * aarch64-opc-2.c: Regenerated.
1774
1775 2020-04-29  Nick Clifton  <nickc@redhat.com>
1776
1777         PR 22699
1778         * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1779         and SETRC insns.
1780
1781 2020-04-29  Nick Clifton  <nickc@redhat.com>
1782
1783         * po/sv.po: Updated Swedish translation.
1784
1785 2020-04-29  Nick Clifton  <nickc@redhat.com>
1786
1787         PR 22699
1788         * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U.  Use
1789         IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1790         * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1791         IMM0_8U case.
1792
1793 2020-04-21  Andreas Schwab  <schwab@linux-m68k.org>
1794
1795         PR 25848
1796         * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1797         cmpi only on m68020up and cpu32.
1798
1799 2020-04-20  Sudakshina Das  <sudi.das@arm.com>
1800
1801         * aarch64-asm.c (aarch64_ins_none): New.
1802         * aarch64-asm.h (ins_none): New declaration.
1803         * aarch64-dis.c (aarch64_ext_none): New.
1804         * aarch64-dis.h (ext_none): New declaration.
1805         * aarch64-opc.c (aarch64_print_operand): Update case for
1806         AARCH64_OPND_BARRIER_PSB.
1807         * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1808         (AARCH64_OPERANDS): Update inserter/extracter for
1809         AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1810         * aarch64-asm-2.c: Regenerated.
1811         * aarch64-dis-2.c: Regenerated.
1812         * aarch64-opc-2.c: Regenerated.
1813
1814 2020-04-20  Sudakshina Das  <sudi.das@arm.com>
1815
1816         * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1817         (aarch64_feature_ras, RAS): Likewise.
1818         (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1819         (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1820         autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1821         autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1822         * aarch64-asm-2.c: Regenerated.
1823         * aarch64-dis-2.c: Regenerated.
1824         * aarch64-opc-2.c: Regenerated.
1825
1826 2020-04-17  Fredrik Strupe  <fredrik@strupe.net>
1827
1828         * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1829         (print_insn_neon): Support disassembly of conditional
1830         instructions.
1831
1832 2020-02-16  David Faust  <david.faust@oracle.com>
1833
1834         * bpf-desc.c: Regenerate.
1835         * bpf-desc.h: Likewise.
1836         * bpf-opc.c: Regenerate.
1837         * bpf-opc.h: Likewise.
1838
1839 2020-04-07  Lili Cui  <lili.cui@intel.com>
1840
1841         * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1842         (prefix_table): New instructions (see prefixes above).
1843         (rm_table): Likewise
1844         * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1845         CPU_ANY_TSXLDTRK_FLAGS.
1846         (cpu_flags): Add CpuTSXLDTRK.
1847         * i386-opc.h (enum): Add CpuTSXLDTRK.
1848         (i386_cpu_flags): Add cputsxldtrk.
1849         * i386-opc.tbl: Add XSUSPLDTRK insns.
1850         * i386-init.h: Regenerate.
1851         * i386-tbl.h: Likewise.
1852
1853 2020-04-02  Lili Cui  <lili.cui@intel.com>
1854
1855         * i386-dis.c (prefix_table): New instructions serialize.
1856         * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1857         CPU_ANY_SERIALIZE_FLAGS.
1858         (cpu_flags): Add CpuSERIALIZE.
1859         * i386-opc.h (enum): Add CpuSERIALIZE.
1860         (i386_cpu_flags): Add cpuserialize.
1861         * i386-opc.tbl: Add SERIALIZE insns.
1862         * i386-init.h: Regenerate.
1863         * i386-tbl.h: Likewise.
1864
1865 2020-03-26  Alan Modra  <amodra@gmail.com>
1866
1867         * disassemble.h (opcodes_assert): Declare.
1868         (OPCODES_ASSERT): Define.
1869         * disassemble.c: Don't include assert.h.  Include opintl.h.
1870         (opcodes_assert): New function.
1871         * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1872         (bfd_h8_disassemble): Reduce size of data array.  Correctly
1873         calculate maxlen.  Omit insn decoding when insn length exceeds
1874         maxlen.  Exit from nibble loop when looking for E, before
1875         accessing next data byte.  Move processing of E outside loop.
1876         Replace tests of maxlen in loop with assertions.
1877
1878 2020-03-26  Alan Modra  <amodra@gmail.com>
1879
1880         * arc-dis.c (find_format): Init needs_limm.  Simplify use of limm.
1881
1882 2020-03-25  Alan Modra  <amodra@gmail.com>
1883
1884         * z80-dis.c (suffix): Init mybuf.
1885
1886 2020-03-22  Alan Modra  <amodra@gmail.com>
1887
1888         * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1889         successflly read from section.
1890
1891 2020-03-22  Alan Modra  <amodra@gmail.com>
1892
1893         * arc-dis.c (find_format): Use ISO C string concatenation rather
1894         than line continuation within a string.  Don't access needs_limm
1895         before testing opcode != NULL.
1896
1897 2020-03-22  Alan Modra  <amodra@gmail.com>
1898
1899         * ns32k-dis.c (print_insn_arg): Update comment.
1900         (print_insn_ns32k): Reduce size of index_offset array, and
1901         initialize, passing -1 to print_insn_arg for args that are not
1902         an index.  Don't exit arg loop early.  Abort on bad arg number.
1903
1904 2020-03-22  Alan Modra  <amodra@gmail.com>
1905
1906         * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1907         * s12z-opc.c: Formatting.
1908         (operands_f): Return an int.
1909         (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1910         (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1911         (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1912         (exg_sex_discrim): Likewise.
1913         (create_immediate_operand, create_bitfield_operand),
1914         (create_register_operand_with_size, create_register_all_operand),
1915         (create_register_all16_operand, create_simple_memory_operand),
1916         (create_memory_operand, create_memory_auto_operand): Don't
1917         segfault on malloc failure.
1918         (z_ext24_decode): Return an int status, negative on fail, zero
1919         on success.
1920         (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1921         (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1922         (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1923         (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1924         (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1925         (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1926         (loop_primitive_decode, shift_decode, psh_pul_decode),
1927         (bit_field_decode): Similarly.
1928         (z_decode_signed_value, decode_signed_value): Similarly.  Add arg
1929         to return value, update callers.
1930         (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1931         Don't segfault on NULL operand.
1932         (decode_operation): Return OP_INVALID on first fail.
1933         (decode_s12z): Check all reads, returning -1 on fail.
1934
1935 2020-03-20  Alan Modra  <amodra@gmail.com>
1936
1937         * metag-dis.c (print_insn_metag): Don't ignore status from
1938         read_memory_func.
1939
1940 2020-03-20  Alan Modra  <amodra@gmail.com>
1941
1942         * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1943         Initialize parts of buffer not written when handling a possible
1944         2-byte insn at end of section.  Don't attempt decoding of such
1945         an insn by the 4-byte machinery.
1946
1947 2020-03-20  Alan Modra  <amodra@gmail.com>
1948
1949         * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1950         partially filled buffer.  Prevent lookup of 4-byte insns when
1951         only VLE 2-byte insns are possible due to section size.  Print
1952         ".word" rather than ".long" for 2-byte leftovers.
1953
1954 2020-03-17  Sergey Belyashov  <sergey.belyashov@gmail.com>
1955
1956         PR 25641
1957         * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1958
1959 2020-03-13  Jan Beulich  <jbeulich@suse.com>
1960
1961         * i386-dis.c (X86_64_0D): Rename to ...
1962         (X86_64_0E): ... this.
1963
1964 2020-03-09  H.J. Lu  <hongjiu.lu@intel.com>
1965
1966         * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1967         * Makefile.in: Regenerated.
1968
1969 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1970
1971         * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1972         3-operand pseudos.
1973         * i386-tbl.h: Re-generate.
1974
1975 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1976
1977         * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1978         vprot*, vpsha*, and vpshl*.
1979         * i386-tbl.h: Re-generate.
1980
1981 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1982
1983         * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1984         vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1985         * i386-tbl.h: Re-generate.
1986
1987 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1988
1989         * i386-gen.c (set_bitfield): Ignore zero-length field names.
1990         * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1991         cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1992         * i386-tbl.h: Re-generate.
1993
1994 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1995
1996         * i386-gen.c (struct template_arg, struct template_instance,
1997         struct template_param, struct template, templates,
1998         parse_template, expand_templates): New.
1999         (process_i386_opcodes): Various local variables moved to
2000         expand_templates. Call parse_template and expand_templates.
2001         * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2002         * i386-tbl.h: Re-generate.
2003
2004 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2005
2006         * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2007         vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2008         register and memory source templates. Replace VexW= by VexW*
2009         where applicable.
2010         * i386-tbl.h: Re-generate.
2011
2012 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2013
2014         * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2015         VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2016         * i386-tbl.h: Re-generate.
2017
2018 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2019
2020         * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2021         * i386-tbl.h: Re-generate.
2022
2023 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2024
2025         * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2026         (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2027         pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2028         VexW0 on SSE2AVX variants.
2029         (vmovq): Drop NoRex64 from XMM/XMM variants.
2030         (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2031         vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2032         applicable use VexW0.
2033         * i386-tbl.h: Re-generate.
2034
2035 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2036
2037         * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2038         * i386-opc.h (Rex64): Delete.
2039         (struct i386_opcode_modifier): Remove rex64 field.
2040         * i386-opc.tbl (crc32): Drop Rex64.
2041         Replace Rex64 with Size64 everywhere else.
2042         * i386-tbl.h: Re-generate.
2043
2044 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2045
2046         * i386-dis.c (OP_E_memory): Exclude recording of used address
2047         prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2048         addressed memory operands for MPX insns.
2049
2050 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2051
2052         * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2053         invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2054         adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2055         (ptwrite): Split into non-64-bit and 64-bit forms.
2056         * i386-tbl.h: Re-generate.
2057
2058 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2059
2060         * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2061         template.
2062         * i386-tbl.h: Re-generate.
2063
2064 2020-03-04  Jan Beulich  <jbeulich@suse.com>
2065
2066         * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2067         (prefix_table): Move vmmcall here. Add vmgexit.
2068         (rm_table): Replace vmmcall entry by prefix_table[] escape.
2069         * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2070         (cpu_flags): Add CpuSEV_ES entry.
2071         * i386-opc.h (CpuSEV_ES): New.
2072         (union i386_cpu_flags): Add cpusev_es field.
2073         * i386-opc.tbl (vmgexit): New.
2074         * i386-init.h, i386-tbl.h: Re-generate.
2075
2076 2020-03-03  H.J. Lu  <hongjiu.lu@intel.com>
2077
2078         * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2079         with MnemonicSize.
2080         * i386-opc.h (IGNORESIZE): New.
2081         (DEFAULTSIZE): Likewise.
2082         (IgnoreSize): Removed.
2083         (DefaultSize): Likewise.
2084         (MnemonicSize): New.
2085         (i386_opcode_modifier): Replace ignoresize/defaultsize with
2086         mnemonicsize.
2087         * i386-opc.tbl (IgnoreSize): New.
2088         (DefaultSize): Likewise.
2089         * i386-tbl.h: Regenerated.
2090
2091 2020-03-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
2092
2093         PR 25627
2094         * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2095         instructions.
2096
2097 2020-03-03  H.J. Lu  <hongjiu.lu@intel.com>
2098
2099         PR gas/25622
2100         * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2101         vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2102         * i386-tbl.h: Regenerated.
2103
2104 2020-02-26  Alan Modra  <amodra@gmail.com>
2105
2106         * aarch64-asm.c: Indent labels correctly.
2107         * aarch64-dis.c: Likewise.
2108         * aarch64-gen.c: Likewise.
2109         * aarch64-opc.c: Likewise.
2110         * alpha-dis.c: Likewise.
2111         * i386-dis.c: Likewise.
2112         * nds32-asm.c: Likewise.
2113         * nfp-dis.c: Likewise.
2114         * visium-dis.c: Likewise.
2115
2116 2020-02-25  Claudiu Zissulescu <claziss@gmail.com>
2117
2118         * arc-regs.h (int_vector_base): Make it available for all ARC
2119         CPUs.
2120
2121 2020-02-20  Nelson Chu  <nelson.chu@sifive.com>
2122
2123         * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2124         changed.
2125
2126 2020-02-19  Nelson Chu  <nelson.chu@sifive.com>
2127
2128         * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2129         c.mv/c.li if rs1 is zero.
2130
2131 2020-02-17  H.J. Lu  <hongjiu.lu@intel.com>
2132
2133         * i386-gen.c (cpu_flag_init): Replace CpuABM with
2134         CpuLZCNT|CpuPOPCNT.  Add CpuPOPCNT to CPU_SSE4_2_FLAGS.  Add
2135         CPU_POPCNT_FLAGS.
2136         (cpu_flags): Remove CpuABM.  Add CpuPOPCNT.
2137         * i386-opc.h (CpuABM): Removed.
2138         (CpuPOPCNT): New.
2139         (i386_cpu_flags): Remove cpuabm.  Add cpupopcnt.
2140         * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2141         popcnt.  Remove CpuABM from lzcnt.
2142         * i386-init.h: Regenerated.
2143         * i386-tbl.h: Likewise.
2144
2145 2020-02-17  Jan Beulich  <jbeulich@suse.com>
2146
2147         * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2148         Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2149         VexW1 instead of open-coding them.
2150         * i386-tbl.h: Re-generate.
2151
2152 2020-02-17  Jan Beulich  <jbeulich@suse.com>
2153
2154         * i386-opc.tbl (AddrPrefixOpReg): Define.
2155         (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2156         umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2157         templates. Drop NoRex64.
2158         * i386-tbl.h: Re-generate.
2159
2160 2020-02-17  Jan Beulich  <jbeulich@suse.com>
2161
2162         PR gas/6518
2163         * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2164         vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2165         into Intel syntax instance (with Unpsecified) and AT&T one
2166         (without).
2167         (vcvtneps2bf16): Likewise, along with folding the two so far
2168         separate ones.
2169         * i386-tbl.h: Re-generate.
2170
2171 2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>
2172
2173         * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2174         CPU_ANY_SSE4A_FLAGS.
2175
2176 2020-02-17  Alan Modra  <amodra@gmail.com>
2177
2178         * i386-gen.c (cpu_flag_init): Correct last change.
2179
2180 2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>
2181
2182         * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS.  Remove
2183         CPU_ANY_SSE4_FLAGS.
2184
2185 2020-02-14  H.J. Lu  <hongjiu.lu@intel.com>
2186
2187         * i386-opc.tbl (movsx): Remove Intel syntax comments.
2188         (movzx): Likewise.
2189
2190 2020-02-14  Jan Beulich  <jbeulich@suse.com>
2191
2192         PR gas/25438
2193         * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2194         destination for Cpu64-only variant.
2195         (movzx): Fold patterns.
2196         * i386-tbl.h: Re-generate.
2197
2198 2020-02-13  Jan Beulich  <jbeulich@suse.com>
2199
2200         * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2201         CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2202         CPU_ANY_SSE4_FLAGS entry.
2203         * i386-init.h: Re-generate.
2204
2205 2020-02-12  Jan Beulich  <jbeulich@suse.com>
2206
2207         * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2208         with Unspecified, making the present one AT&T syntax only.
2209         * i386-tbl.h: Re-generate.
2210
2211 2020-02-12  Jan Beulich  <jbeulich@suse.com>
2212
2213         * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2214         * i386-tbl.h: Re-generate.
2215
2216 2020-02-12  Jan Beulich  <jbeulich@suse.com>
2217
2218         PR gas/24546
2219         * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2220         * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2221         Amd64 and Intel64 templates.
2222         (call, jmp): Likewise for far indirect variants. Dro
2223         Unspecified.
2224         * i386-tbl.h: Re-generate.
2225
2226 2020-02-11  Jan Beulich  <jbeulich@suse.com>
2227
2228         * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2229         * i386-opc.h (ShortForm): Delete.
2230         (struct i386_opcode_modifier): Remove shortform field.
2231         * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2232         fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2233         fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2234         ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2235         Drop ShortForm.
2236         * i386-tbl.h: Re-generate.
2237
2238 2020-02-11  Jan Beulich  <jbeulich@suse.com>
2239
2240         * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2241         fucompi): Drop ShortForm from operand-less templates.
2242         * i386-tbl.h: Re-generate.
2243
2244 2020-02-11  Alan Modra  <amodra@gmail.com>
2245
2246         * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2247         * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2248         * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2249         * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2250         * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2251
2252 2020-02-10  Matthew Malcomson  <matthew.malcomson@arm.com>
2253
2254         * arm-dis.c (print_insn_cde): Define 'V' parse character.
2255         (cde_opcodes): Add VCX* instructions.
2256
2257 2020-02-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
2258             Matthew Malcomson  <matthew.malcomson@arm.com>
2259
2260         * arm-dis.c (struct cdeopcode32): New.
2261         (CDE_OPCODE): New macro.
2262         (cde_opcodes): New disassembly table.
2263         (regnames): New option to table.
2264         (cde_coprocs): New global variable.
2265         (print_insn_cde): New
2266         (print_insn_thumb32): Use print_insn_cde.
2267         (parse_arm_disassembler_options): Parse coprocN args.
2268
2269 2020-02-10  H.J. Lu  <hongjiu.lu@intel.com>
2270
2271         PR gas/25516
2272         * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2273         with ISA64.
2274         * i386-opc.h (AMD64): Removed.
2275         (Intel64): Likewose.
2276         (AMD64): New.
2277         (INTEL64): Likewise.
2278         (INTEL64ONLY): Likewise.
2279         (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2280         * i386-opc.tbl (Amd64): New.
2281         (Intel64): Likewise.
2282         (Intel64Only): Likewise.
2283         Replace AMD64 with Amd64.  Update sysenter/sysenter with
2284         Cpu64 and Intel64Only.  Remove AMD64 from sysenter/sysenter.
2285         * i386-tbl.h: Regenerated.
2286
2287 2020-02-07  Sergey Belyashov  <sergey.belyashov@gmail.com>
2288
2289         PR 25469
2290         * z80-dis.c: Add support for GBZ80 opcodes.
2291
2292 2020-02-04  Alan Modra  <amodra@gmail.com>
2293
2294         * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2295
2296 2020-02-03  Alan Modra  <amodra@gmail.com>
2297
2298         * m32c-ibld.c: Regenerate.
2299
2300 2020-02-01  Alan Modra  <amodra@gmail.com>
2301
2302         * frv-ibld.c: Regenerate.
2303
2304 2020-01-31  Jan Beulich  <jbeulich@suse.com>
2305
2306         * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2307         (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2308         (OP_E_memory): Replace xmm_mdq_mode case label by
2309         vex_scalar_w_dq_mode one.
2310         * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2311
2312 2020-01-31  Jan Beulich  <jbeulich@suse.com>
2313
2314         * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2315         (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2316         vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2317         (intel_operand_size): Drop vex_w_dq_mode case label.
2318
2319 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
2320
2321         * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2322         Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2323
2324 2020-01-30  Alan Modra  <amodra@gmail.com>
2325
2326         * m32c-ibld.c: Regenerate.
2327
2328 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
2329
2330         * bpf-opc.c: Regenerate.
2331
2332 2020-01-30  Jan Beulich  <jbeulich@suse.com>
2333
2334         * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2335         (dis386): Use them to replace C2/C3 table entries.
2336         (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2337         * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2338         ones. Use Size64 instead of DefaultSize on Intel64 ones.
2339         * i386-tbl.h: Re-generate.
2340
2341 2020-01-30  Jan Beulich  <jbeulich@suse.com>
2342
2343         * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2344         forms.
2345         (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2346         DefaultSize.
2347         * i386-tbl.h: Re-generate.
2348
2349 2020-01-30  Alan Modra  <amodra@gmail.com>
2350
2351         * tic4x-dis.c (tic4x_dp): Make unsigned.
2352
2353 2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
2354             Jan Beulich  <jbeulich@suse.com>
2355
2356         PR binutils/25445
2357         * i386-dis.c (MOVSXD_Fixup): New function.
2358         (movsxd_mode): New enum.
2359         (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2360         (intel_operand_size): Handle movsxd_mode.
2361         (OP_E_register): Likewise.
2362         (OP_G): Likewise.
2363         * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2364         register on movsxd.  Add movsxd with 16-bit destination register
2365         for AMD64 and Intel64 ISAs.
2366         * i386-tbl.h: Regenerated.
2367
2368 2020-01-27  Tamar Christina  <tamar.christina@arm.com>
2369
2370         PR 25403
2371         * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2372         * aarch64-asm-2.c: Regenerate
2373         * aarch64-dis-2.c: Likewise.
2374         * aarch64-opc-2.c: Likewise.
2375
2376 2020-01-21  Jan Beulich  <jbeulich@suse.com>
2377
2378         * i386-opc.tbl (sysret): Drop DefaultSize.
2379         * i386-tbl.h: Re-generate.
2380
2381 2020-01-21  Jan Beulich  <jbeulich@suse.com>
2382
2383         * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2384         Dword.
2385         (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2386         * i386-tbl.h: Re-generate.
2387
2388 2020-01-20  Nick Clifton  <nickc@redhat.com>
2389
2390         * po/de.po: Updated German translation.
2391         * po/pt_BR.po: Updated Brazilian Portuguese translation.
2392         * po/uk.po: Updated Ukranian translation.
2393
2394 2020-01-20  Alan Modra  <amodra@gmail.com>
2395
2396         * hppa-dis.c (fput_const): Remove useless cast.
2397
2398 2020-01-20  Alan Modra  <amodra@gmail.com>
2399
2400         * arm-dis.c (print_insn_arm): Wrap 'T' value.
2401
2402 2020-01-18  Nick Clifton  <nickc@redhat.com>
2403
2404         * configure: Regenerate.
2405         * po/opcodes.pot: Regenerate.
2406
2407 2020-01-18  Nick Clifton  <nickc@redhat.com>
2408
2409         Binutils 2.34 branch created.
2410
2411 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
2412
2413         * opintl.h: Fix spelling error (seperate).
2414
2415 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
2416
2417         * i386-opc.tbl: Add {vex} pseudo prefix.
2418         * i386-tbl.h: Regenerated.
2419
2420 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
2421
2422         PR 25376
2423         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2424         (neon_opcodes): Likewise.
2425         (select_arm_features): Make sure we enable MVE bits when selecting
2426         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
2427         any architecture.
2428
2429 2020-01-16  Jan Beulich  <jbeulich@suse.com>
2430
2431         * i386-opc.tbl: Drop stale comment from XOP section.
2432
2433 2020-01-16  Jan Beulich  <jbeulich@suse.com>
2434
2435         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2436         (extractps): Add VexWIG to SSE2AVX forms.
2437         * i386-tbl.h: Re-generate.
2438
2439 2020-01-16  Jan Beulich  <jbeulich@suse.com>
2440
2441         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2442         Size64 from and use VexW1 on SSE2AVX forms.
2443         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2444         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2445         * i386-tbl.h: Re-generate.
2446
2447 2020-01-15  Alan Modra  <amodra@gmail.com>
2448
2449         * tic4x-dis.c (tic4x_version): Make unsigned long.
2450         (optab, optab_special, registernames): New file scope vars.
2451         (tic4x_print_register): Set up registernames rather than
2452         malloc'd registertable.
2453         (tic4x_disassemble): Delete optable and optable_special.  Use
2454         optab and optab_special instead.  Throw away old optab,
2455         optab_special and registernames when info->mach changes.
2456
2457 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
2458
2459         PR 25377
2460         * z80-dis.c (suffix): Use .db instruction to generate double
2461         prefix.
2462
2463 2020-01-14  Alan Modra  <amodra@gmail.com>
2464
2465         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
2466         values to unsigned before shifting.
2467
2468 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
2469
2470         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2471         flow instructions.
2472         (print_insn_thumb16, print_insn_thumb32): Likewise.
2473         (print_insn): Initialize the insn info.
2474         * i386-dis.c (print_insn): Initialize the insn info fields, and
2475         detect jumps.
2476
2477 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
2478
2479         * arc-opc.c (C_NE): Make it required.
2480
2481 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
2482
2483         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2484         reserved register name.
2485
2486 2020-01-13  Alan Modra  <amodra@gmail.com>
2487
2488         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2489         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2490
2491 2020-01-13  Alan Modra  <amodra@gmail.com>
2492
2493         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
2494         result of wasm_read_leb128 in a uint64_t and check that bits
2495         are not lost when copying to other locals.  Use uint32_t for
2496         most locals.  Use PRId64 when printing int64_t.
2497
2498 2020-01-13  Alan Modra  <amodra@gmail.com>
2499
2500         * score-dis.c: Formatting.
2501         * score7-dis.c: Formatting.
2502
2503 2020-01-13  Alan Modra  <amodra@gmail.com>
2504
2505         * score-dis.c (print_insn_score48): Use unsigned variables for
2506         unsigned values.  Don't left shift negative values.
2507         (print_insn_score32): Likewise.
2508         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2509
2510 2020-01-13  Alan Modra  <amodra@gmail.com>
2511
2512         * tic4x-dis.c (tic4x_print_register): Remove dead code.
2513
2514 2020-01-13  Alan Modra  <amodra@gmail.com>
2515
2516         * fr30-ibld.c: Regenerate.
2517
2518 2020-01-13  Alan Modra  <amodra@gmail.com>
2519
2520         * xgate-dis.c (print_insn): Don't left shift signed value.
2521         (ripBits): Formatting, use 1u.
2522
2523 2020-01-10  Alan Modra  <amodra@gmail.com>
2524
2525         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2526         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
2527
2528 2020-01-10  Alan Modra  <amodra@gmail.com>
2529
2530         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2531         and XRREG value earlier to avoid a shift with negative exponent.
2532         * m10200-dis.c (disassemble): Similarly.
2533
2534 2020-01-09  Nick Clifton  <nickc@redhat.com>
2535
2536         PR 25224
2537         * z80-dis.c (ld_ii_ii): Use correct cast.
2538
2539 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
2540
2541         PR 25224
2542         * z80-dis.c (ld_ii_ii): Use character constant when checking
2543         opcode byte value.
2544
2545 2020-01-09  Jan Beulich  <jbeulich@suse.com>
2546
2547         * i386-dis.c (SEP_Fixup): New.
2548         (SEP): Define.
2549         (dis386_twobyte): Use it for sysenter/sysexit.
2550         (enum x86_64_isa): Change amd64 enumerator to value 1.
2551         (OP_J): Compare isa64 against intel64 instead of amd64.
2552         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2553         forms.
2554         * i386-tbl.h: Re-generate.
2555
2556 2020-01-08  Alan Modra  <amodra@gmail.com>
2557
2558         * z8k-dis.c: Include libiberty.h
2559         (instr_data_s): Make max_fetched unsigned.
2560         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2561         Don't exceed byte_info bounds.
2562         (output_instr): Make num_bytes unsigned.
2563         (unpack_instr): Likewise for nibl_count and loop.
2564         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2565         idx unsigned.
2566         * z8k-opc.h: Regenerate.
2567
2568 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
2569
2570         * arc-tbl.h (llock): Use 'LLOCK' as class.
2571         (llockd): Likewise.
2572         (scond): Use 'SCOND' as class.
2573         (scondd): Likewise.
2574         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2575         (scondd): Likewise.
2576
2577 2020-01-06  Alan Modra  <amodra@gmail.com>
2578
2579         * m32c-ibld.c: Regenerate.
2580
2581 2020-01-06  Alan Modra  <amodra@gmail.com>
2582
2583         PR 25344
2584         * z80-dis.c (suffix): Don't use a local struct buffer copy.
2585         Peek at next byte to prevent recursion on repeated prefix bytes.
2586         Ensure uninitialised "mybuf" is not accessed.
2587         (print_insn_z80): Don't zero n_fetch and n_used here,..
2588         (print_insn_z80_buf): ..do it here instead.
2589
2590 2020-01-04  Alan Modra  <amodra@gmail.com>
2591
2592         * m32r-ibld.c: Regenerate.
2593
2594 2020-01-04  Alan Modra  <amodra@gmail.com>
2595
2596         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2597
2598 2020-01-04  Alan Modra  <amodra@gmail.com>
2599
2600         * crx-dis.c (match_opcode): Avoid shift left of signed value.
2601
2602 2020-01-04  Alan Modra  <amodra@gmail.com>
2603
2604         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2605
2606 2020-01-03  Jan Beulich  <jbeulich@suse.com>
2607
2608         * aarch64-tbl.h (aarch64_opcode_table): Use
2609         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2610
2611 2020-01-03  Jan Beulich  <jbeulich@suse.com>
2612
2613         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2614         forms of SUDOT and USDOT.
2615
2616 2020-01-03  Jan Beulich  <jbeulich@suse.com>
2617
2618         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2619         uzip{1,2}.
2620         * opcodes/aarch64-dis-2.c: Re-generate.
2621
2622 2020-01-03  Jan Beulich  <jbeulich@suse.com>
2623
2624         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2625         FMMLA encoding.
2626         * opcodes/aarch64-dis-2.c: Re-generate.
2627
2628 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
2629
2630         * z80-dis.c: Add support for eZ80 and Z80 instructions.
2631
2632 2020-01-01  Alan Modra  <amodra@gmail.com>
2633
2634         Update year range in copyright notice of all files.
2635
2636 For older changes see ChangeLog-2019
2637 \f
2638 Copyright (C) 2020 Free Software Foundation, Inc.
2639
2640 Copying and distribution of this file, with or without modification,
2641 are permitted in any medium without royalty provided the copyright
2642 notice and this notice are preserved.
2643
2644 Local Variables:
2645 mode: change-log
2646 left-margin: 8
2647 fill-column: 74
2648 version-control: never
2649 End: