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Refactor disassembler selection
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1 /* Select disassembly routine for specified architecture.
2 Copyright (C) 1994-2017 Free Software Foundation, Inc.
3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "dis-asm.h"
23 #include "safe-ctype.h"
24 #include <assert.h>
25
26 #ifdef ARCH_all
27 #define ARCH_aarch64
28 #define ARCH_alpha
29 #define ARCH_arc
30 #define ARCH_arm
31 #define ARCH_avr
32 #define ARCH_bfin
33 #define ARCH_cr16
34 #define ARCH_cris
35 #define ARCH_crx
36 #define ARCH_d10v
37 #define ARCH_d30v
38 #define ARCH_dlx
39 #define ARCH_epiphany
40 #define ARCH_fr30
41 #define ARCH_frv
42 #define ARCH_ft32
43 #define ARCH_h8300
44 #define ARCH_h8500
45 #define ARCH_hppa
46 #define ARCH_i370
47 #define ARCH_i386
48 #define ARCH_i860
49 #define ARCH_i960
50 #define ARCH_ia64
51 #define ARCH_ip2k
52 #define ARCH_iq2000
53 #define ARCH_lm32
54 #define ARCH_m32c
55 #define ARCH_m32r
56 #define ARCH_m68hc11
57 #define ARCH_m68hc12
58 #define ARCH_m68k
59 #define ARCH_m88k
60 #define ARCH_mcore
61 #define ARCH_mep
62 #define ARCH_metag
63 #define ARCH_microblaze
64 #define ARCH_mips
65 #define ARCH_mmix
66 #define ARCH_mn10200
67 #define ARCH_mn10300
68 #define ARCH_moxie
69 #define ARCH_mt
70 #define ARCH_msp430
71 #define ARCH_nds32
72 #define ARCH_nios2
73 #define ARCH_ns32k
74 #define ARCH_or1k
75 #define ARCH_pdp11
76 #define ARCH_pj
77 #define ARCH_powerpc
78 #define ARCH_pru
79 #define ARCH_rs6000
80 #define ARCH_rl78
81 #define ARCH_rx
82 #define ARCH_s390
83 #define ARCH_score
84 #define ARCH_sh
85 #define ARCH_sparc
86 #define ARCH_spu
87 #define ARCH_tic30
88 #define ARCH_tic4x
89 #define ARCH_tic54x
90 #define ARCH_tic6x
91 #define ARCH_tic80
92 #define ARCH_tilegx
93 #define ARCH_tilepro
94 #define ARCH_v850
95 #define ARCH_vax
96 #define ARCH_visium
97 #define ARCH_w65
98 #define ARCH_wasm32
99 #define ARCH_xstormy16
100 #define ARCH_xc16x
101 #define ARCH_xgate
102 #define ARCH_xtensa
103 #define ARCH_z80
104 #define ARCH_z8k
105 #define INCLUDE_SHMEDIA
106 #endif
107
108 #ifdef ARCH_m32c
109 #include "m32c-desc.h"
110 #endif
111
112 disassembler_ftype
113 disassembler (enum bfd_architecture a, bfd_boolean big, unsigned long mach,
114 bfd *abfd)
115 {
116 disassembler_ftype disassemble;
117
118 if (abfd != NULL)
119 {
120 /* Do some asserts that the first three parameters should equal
121 to what we can get from ABFD. On the other hand, these
122 asserts help removing some compiler errors on unused
123 parameter. */
124 assert (a == bfd_get_arch (abfd));
125 assert (big == bfd_big_endian (abfd));
126 assert (mach == bfd_get_mach (abfd));
127 }
128
129 switch (a)
130 {
131 /* If you add a case to this table, also add it to the
132 ARCH_all definition right above this function. */
133 #ifdef ARCH_aarch64
134 case bfd_arch_aarch64:
135 disassemble = print_insn_aarch64;
136 break;
137 #endif
138 #ifdef ARCH_alpha
139 case bfd_arch_alpha:
140 disassemble = print_insn_alpha;
141 break;
142 #endif
143 #ifdef ARCH_arc
144 case bfd_arch_arc:
145 disassemble = arc_get_disassembler (abfd);
146 break;
147 #endif
148 #ifdef ARCH_arm
149 case bfd_arch_arm:
150 if (big)
151 disassemble = print_insn_big_arm;
152 else
153 disassemble = print_insn_little_arm;
154 break;
155 #endif
156 #ifdef ARCH_avr
157 case bfd_arch_avr:
158 disassemble = print_insn_avr;
159 break;
160 #endif
161 #ifdef ARCH_bfin
162 case bfd_arch_bfin:
163 disassemble = print_insn_bfin;
164 break;
165 #endif
166 #ifdef ARCH_cr16
167 case bfd_arch_cr16:
168 disassemble = print_insn_cr16;
169 break;
170 #endif
171 #ifdef ARCH_cris
172 case bfd_arch_cris:
173 disassemble = cris_get_disassembler (abfd);
174 break;
175 #endif
176 #ifdef ARCH_crx
177 case bfd_arch_crx:
178 disassemble = print_insn_crx;
179 break;
180 #endif
181 #ifdef ARCH_d10v
182 case bfd_arch_d10v:
183 disassemble = print_insn_d10v;
184 break;
185 #endif
186 #ifdef ARCH_d30v
187 case bfd_arch_d30v:
188 disassemble = print_insn_d30v;
189 break;
190 #endif
191 #ifdef ARCH_dlx
192 case bfd_arch_dlx:
193 /* As far as I know we only handle big-endian DLX objects. */
194 disassemble = print_insn_dlx;
195 break;
196 #endif
197 #ifdef ARCH_h8300
198 case bfd_arch_h8300:
199 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
200 disassemble = print_insn_h8300h;
201 else if (mach == bfd_mach_h8300s
202 || mach == bfd_mach_h8300sn
203 || mach == bfd_mach_h8300sx
204 || mach == bfd_mach_h8300sxn)
205 disassemble = print_insn_h8300s;
206 else
207 disassemble = print_insn_h8300;
208 break;
209 #endif
210 #ifdef ARCH_h8500
211 case bfd_arch_h8500:
212 disassemble = print_insn_h8500;
213 break;
214 #endif
215 #ifdef ARCH_hppa
216 case bfd_arch_hppa:
217 disassemble = print_insn_hppa;
218 break;
219 #endif
220 #ifdef ARCH_i370
221 case bfd_arch_i370:
222 disassemble = print_insn_i370;
223 break;
224 #endif
225 #ifdef ARCH_i386
226 case bfd_arch_i386:
227 case bfd_arch_iamcu:
228 case bfd_arch_l1om:
229 case bfd_arch_k1om:
230 disassemble = print_insn_i386;
231 break;
232 #endif
233 #ifdef ARCH_i860
234 case bfd_arch_i860:
235 disassemble = print_insn_i860;
236 break;
237 #endif
238 #ifdef ARCH_i960
239 case bfd_arch_i960:
240 disassemble = print_insn_i960;
241 break;
242 #endif
243 #ifdef ARCH_ia64
244 case bfd_arch_ia64:
245 disassemble = print_insn_ia64;
246 break;
247 #endif
248 #ifdef ARCH_ip2k
249 case bfd_arch_ip2k:
250 disassemble = print_insn_ip2k;
251 break;
252 #endif
253 #ifdef ARCH_epiphany
254 case bfd_arch_epiphany:
255 disassemble = print_insn_epiphany;
256 break;
257 #endif
258 #ifdef ARCH_fr30
259 case bfd_arch_fr30:
260 disassemble = print_insn_fr30;
261 break;
262 #endif
263 #ifdef ARCH_lm32
264 case bfd_arch_lm32:
265 disassemble = print_insn_lm32;
266 break;
267 #endif
268 #ifdef ARCH_m32r
269 case bfd_arch_m32r:
270 disassemble = print_insn_m32r;
271 break;
272 #endif
273 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
274 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
275 case bfd_arch_m68hc11:
276 disassemble = print_insn_m68hc11;
277 break;
278 case bfd_arch_m68hc12:
279 disassemble = print_insn_m68hc12;
280 break;
281 case bfd_arch_m9s12x:
282 disassemble = print_insn_m9s12x;
283 break;
284 case bfd_arch_m9s12xg:
285 disassemble = print_insn_m9s12xg;
286 break;
287 #endif
288 #ifdef ARCH_m68k
289 case bfd_arch_m68k:
290 disassemble = print_insn_m68k;
291 break;
292 #endif
293 #ifdef ARCH_m88k
294 case bfd_arch_m88k:
295 disassemble = print_insn_m88k;
296 break;
297 #endif
298 #ifdef ARCH_mt
299 case bfd_arch_mt:
300 disassemble = print_insn_mt;
301 break;
302 #endif
303 #ifdef ARCH_microblaze
304 case bfd_arch_microblaze:
305 disassemble = print_insn_microblaze;
306 break;
307 #endif
308 #ifdef ARCH_msp430
309 case bfd_arch_msp430:
310 disassemble = print_insn_msp430;
311 break;
312 #endif
313 #ifdef ARCH_nds32
314 case bfd_arch_nds32:
315 disassemble = print_insn_nds32;
316 break;
317 #endif
318 #ifdef ARCH_ns32k
319 case bfd_arch_ns32k:
320 disassemble = print_insn_ns32k;
321 break;
322 #endif
323 #ifdef ARCH_mcore
324 case bfd_arch_mcore:
325 disassemble = print_insn_mcore;
326 break;
327 #endif
328 #ifdef ARCH_mep
329 case bfd_arch_mep:
330 disassemble = print_insn_mep;
331 break;
332 #endif
333 #ifdef ARCH_metag
334 case bfd_arch_metag:
335 disassemble = print_insn_metag;
336 break;
337 #endif
338 #ifdef ARCH_mips
339 case bfd_arch_mips:
340 if (big)
341 disassemble = print_insn_big_mips;
342 else
343 disassemble = print_insn_little_mips;
344 break;
345 #endif
346 #ifdef ARCH_mmix
347 case bfd_arch_mmix:
348 disassemble = print_insn_mmix;
349 break;
350 #endif
351 #ifdef ARCH_mn10200
352 case bfd_arch_mn10200:
353 disassemble = print_insn_mn10200;
354 break;
355 #endif
356 #ifdef ARCH_mn10300
357 case bfd_arch_mn10300:
358 disassemble = print_insn_mn10300;
359 break;
360 #endif
361 #ifdef ARCH_nios2
362 case bfd_arch_nios2:
363 if (big)
364 disassemble = print_insn_big_nios2;
365 else
366 disassemble = print_insn_little_nios2;
367 break;
368 #endif
369 #ifdef ARCH_or1k
370 case bfd_arch_or1k:
371 disassemble = print_insn_or1k;
372 break;
373 #endif
374 #ifdef ARCH_pdp11
375 case bfd_arch_pdp11:
376 disassemble = print_insn_pdp11;
377 break;
378 #endif
379 #ifdef ARCH_pj
380 case bfd_arch_pj:
381 disassemble = print_insn_pj;
382 break;
383 #endif
384 #ifdef ARCH_powerpc
385 case bfd_arch_powerpc:
386 if (big)
387 disassemble = print_insn_big_powerpc;
388 else
389 disassemble = print_insn_little_powerpc;
390 break;
391 #endif
392 #ifdef ARCH_pru
393 case bfd_arch_pru:
394 disassemble = print_insn_pru;
395 break;
396 #endif
397 #ifdef ARCH_riscv
398 case bfd_arch_riscv:
399 disassemble = print_insn_riscv;
400 break;
401 #endif
402 #ifdef ARCH_rs6000
403 case bfd_arch_rs6000:
404 if (mach == bfd_mach_ppc_620)
405 disassemble = print_insn_big_powerpc;
406 else
407 disassemble = print_insn_rs6000;
408 break;
409 #endif
410 #ifdef ARCH_rl78
411 case bfd_arch_rl78:
412 disassemble = rl78_get_disassembler (abfd);
413 break;
414 #endif
415 #ifdef ARCH_rx
416 case bfd_arch_rx:
417 disassemble = print_insn_rx;
418 break;
419 #endif
420 #ifdef ARCH_s390
421 case bfd_arch_s390:
422 disassemble = print_insn_s390;
423 break;
424 #endif
425 #ifdef ARCH_score
426 case bfd_arch_score:
427 if (big)
428 disassemble = print_insn_big_score;
429 else
430 disassemble = print_insn_little_score;
431 break;
432 #endif
433 #ifdef ARCH_sh
434 case bfd_arch_sh:
435 disassemble = print_insn_sh;
436 break;
437 #endif
438 #ifdef ARCH_sparc
439 case bfd_arch_sparc:
440 disassemble = print_insn_sparc;
441 break;
442 #endif
443 #ifdef ARCH_spu
444 case bfd_arch_spu:
445 disassemble = print_insn_spu;
446 break;
447 #endif
448 #ifdef ARCH_tic30
449 case bfd_arch_tic30:
450 disassemble = print_insn_tic30;
451 break;
452 #endif
453 #ifdef ARCH_tic4x
454 case bfd_arch_tic4x:
455 disassemble = print_insn_tic4x;
456 break;
457 #endif
458 #ifdef ARCH_tic54x
459 case bfd_arch_tic54x:
460 disassemble = print_insn_tic54x;
461 break;
462 #endif
463 #ifdef ARCH_tic6x
464 case bfd_arch_tic6x:
465 disassemble = print_insn_tic6x;
466 break;
467 #endif
468 #ifdef ARCH_tic80
469 case bfd_arch_tic80:
470 disassemble = print_insn_tic80;
471 break;
472 #endif
473 #ifdef ARCH_ft32
474 case bfd_arch_ft32:
475 disassemble = print_insn_ft32;
476 break;
477 #endif
478 #ifdef ARCH_v850
479 case bfd_arch_v850:
480 case bfd_arch_v850_rh850:
481 disassemble = print_insn_v850;
482 break;
483 #endif
484 #ifdef ARCH_w65
485 case bfd_arch_w65:
486 disassemble = print_insn_w65;
487 break;
488 #endif
489 #ifdef ARCH_wasm32
490 case bfd_arch_wasm32:
491 disassemble = print_insn_wasm32;
492 break;
493 #endif
494 #ifdef ARCH_xgate
495 case bfd_arch_xgate:
496 disassemble = print_insn_xgate;
497 break;
498 #endif
499 #ifdef ARCH_xstormy16
500 case bfd_arch_xstormy16:
501 disassemble = print_insn_xstormy16;
502 break;
503 #endif
504 #ifdef ARCH_xc16x
505 case bfd_arch_xc16x:
506 disassemble = print_insn_xc16x;
507 break;
508 #endif
509 #ifdef ARCH_xtensa
510 case bfd_arch_xtensa:
511 disassemble = print_insn_xtensa;
512 break;
513 #endif
514 #ifdef ARCH_z80
515 case bfd_arch_z80:
516 disassemble = print_insn_z80;
517 break;
518 #endif
519 #ifdef ARCH_z8k
520 case bfd_arch_z8k:
521 if (mach == bfd_mach_z8001)
522 disassemble = print_insn_z8001;
523 else
524 disassemble = print_insn_z8002;
525 break;
526 #endif
527 #ifdef ARCH_vax
528 case bfd_arch_vax:
529 disassemble = print_insn_vax;
530 break;
531 #endif
532 #ifdef ARCH_visium
533 case bfd_arch_visium:
534 disassemble = print_insn_visium;
535 break;
536 #endif
537 #ifdef ARCH_frv
538 case bfd_arch_frv:
539 disassemble = print_insn_frv;
540 break;
541 #endif
542 #ifdef ARCH_moxie
543 case bfd_arch_moxie:
544 disassemble = print_insn_moxie;
545 break;
546 #endif
547 #ifdef ARCH_iq2000
548 case bfd_arch_iq2000:
549 disassemble = print_insn_iq2000;
550 break;
551 #endif
552 #ifdef ARCH_m32c
553 case bfd_arch_m32c:
554 disassemble = print_insn_m32c;
555 break;
556 #endif
557 #ifdef ARCH_tilegx
558 case bfd_arch_tilegx:
559 disassemble = print_insn_tilegx;
560 break;
561 #endif
562 #ifdef ARCH_tilepro
563 case bfd_arch_tilepro:
564 disassemble = print_insn_tilepro;
565 break;
566 #endif
567 default:
568 return 0;
569 }
570 return disassemble;
571 }
572
573 void
574 disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
575 {
576 #ifdef ARCH_aarch64
577 print_aarch64_disassembler_options (stream);
578 #endif
579 #ifdef ARCH_arc
580 print_arc_disassembler_options (stream);
581 #endif
582 #ifdef ARCH_arm
583 print_arm_disassembler_options (stream);
584 #endif
585 #ifdef ARCH_mips
586 print_mips_disassembler_options (stream);
587 #endif
588 #ifdef ARCH_powerpc
589 print_ppc_disassembler_options (stream);
590 #endif
591 #ifdef ARCH_riscv
592 print_riscv_disassembler_options (stream);
593 #endif
594 #ifdef ARCH_i386
595 print_i386_disassembler_options (stream);
596 #endif
597 #ifdef ARCH_s390
598 print_s390_disassembler_options (stream);
599 #endif
600 #ifdef ARCH_wasm32
601 print_wasm32_disassembler_options (stream);
602 #endif
603
604 return;
605 }
606
607 void
608 disassemble_init_for_target (struct disassemble_info * info)
609 {
610 if (info == NULL)
611 return;
612
613 switch (info->arch)
614 {
615 #ifdef ARCH_aarch64
616 case bfd_arch_aarch64:
617 info->symbol_is_valid = aarch64_symbol_is_valid;
618 info->disassembler_needs_relocs = TRUE;
619 break;
620 #endif
621 #ifdef ARCH_arm
622 case bfd_arch_arm:
623 info->symbol_is_valid = arm_symbol_is_valid;
624 info->disassembler_needs_relocs = TRUE;
625 break;
626 #endif
627 #ifdef ARCH_ia64
628 case bfd_arch_ia64:
629 info->skip_zeroes = 16;
630 break;
631 #endif
632 #ifdef ARCH_tic4x
633 case bfd_arch_tic4x:
634 info->skip_zeroes = 32;
635 break;
636 #endif
637 #ifdef ARCH_mep
638 case bfd_arch_mep:
639 info->skip_zeroes = 256;
640 info->skip_zeroes_at_end = 0;
641 break;
642 #endif
643 #ifdef ARCH_metag
644 case bfd_arch_metag:
645 info->disassembler_needs_relocs = TRUE;
646 break;
647 #endif
648 #ifdef ARCH_m32c
649 case bfd_arch_m32c:
650 /* This processor in fact is little endian. The value set here
651 reflects the way opcodes are written in the cgen description. */
652 info->endian = BFD_ENDIAN_BIG;
653 if (! info->insn_sets)
654 {
655 info->insn_sets = cgen_bitset_create (ISA_MAX);
656 if (info->mach == bfd_mach_m16c)
657 cgen_bitset_set (info->insn_sets, ISA_M16C);
658 else
659 cgen_bitset_set (info->insn_sets, ISA_M32C);
660 }
661 break;
662 #endif
663 #ifdef ARCH_powerpc
664 case bfd_arch_powerpc:
665 #endif
666 #ifdef ARCH_rs6000
667 case bfd_arch_rs6000:
668 #endif
669 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
670 disassemble_init_powerpc (info);
671 break;
672 #endif
673 #ifdef ARCH_wasm32
674 case bfd_arch_wasm32:
675 disassemble_init_wasm32 (info);
676 break;
677 #endif
678 #ifdef ARCH_s390
679 case bfd_arch_s390:
680 disassemble_init_s390 (info);
681 break;
682 #endif
683 default:
684 break;
685 }
686 }
687
688 /* Remove whitespace and consecutive commas from OPTIONS. */
689
690 char *
691 remove_whitespace_and_extra_commas (char *options)
692 {
693 char *str;
694 size_t i, len;
695
696 if (options == NULL)
697 return NULL;
698
699 /* Strip off all trailing whitespace and commas. */
700 for (len = strlen (options); len > 0; len--)
701 {
702 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
703 break;
704 options[len - 1] = '\0';
705 }
706
707 /* Convert all remaining whitespace to commas. */
708 for (i = 0; options[i] != '\0'; i++)
709 if (ISSPACE (options[i]))
710 options[i] = ',';
711
712 /* Remove consecutive commas. */
713 for (str = options; *str != '\0'; str++)
714 if (*str == ',' && (*(str + 1) == ',' || str == options))
715 {
716 char *next = str + 1;
717 while (*next == ',')
718 next++;
719 len = strlen (next);
720 if (str != options)
721 str++;
722 memmove (str, next, len);
723 next[len - (size_t)(next - str)] = '\0';
724 }
725 return (strlen (options) != 0) ? options : NULL;
726 }
727
728 /* Like STRCMP, but treat ',' the same as '\0' so that we match
729 strings like "foobar" against "foobar,xxyyzz,...". */
730
731 int
732 disassembler_options_cmp (const char *s1, const char *s2)
733 {
734 unsigned char c1, c2;
735
736 do
737 {
738 c1 = (unsigned char) *s1++;
739 if (c1 == ',')
740 c1 = '\0';
741 c2 = (unsigned char) *s2++;
742 if (c2 == ',')
743 c2 = '\0';
744 if (c1 == '\0')
745 return c1 - c2;
746 }
747 while (c1 == c2);
748
749 return c1 - c2;
750 }