opcodes/fr30-asm.c

   1 /* Assembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4 THIS FILE IS USED TO GENERATE fr30-asm.c.
   5
   6 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   7
   8 This file is part of the GNU Binutils and GDB, the GNU debugger.
   9
  10 This program is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 2, or (at your option)
  13 any later version.
  14
  15 This program is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with this program; if not, write to the Free Software Foundation, Inc.,
  22 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  23
  24 #include "sysdep.h"
  25 #include <ctype.h>
  26 #include <stdio.h>
  27 #include "ansidecl.h"
  28 #include "bfd.h"
  29 #include "symcat.h"
  30 #include "fr30-opc.h"
  31 #include "opintl.h"
  32
  33 #undef min
  34 #define min(a,b) ((a) < (b) ? (a) : (b))
  35 #undef max
  36 #define max(a,b) ((a) > (b) ? (a) : (b))
  37
  38 #undef INLINE
  39 #ifdef __GNUC__
  40 #define INLINE __inline__
  41 #else
  42 #define INLINE
  43 #endif
  44
  45 static const char * insert_normal
  46      PARAMS ((CGEN_OPCODE_DESC, long, unsigned int, int, int, int,
  47               CGEN_INSN_BYTES_PTR));
  48 static const char * parse_insn_normal
  49      PARAMS ((CGEN_OPCODE_DESC, const CGEN_INSN *,
  50               const char **, CGEN_FIELDS *));
  51 static const char * insert_insn_normal
  52      PARAMS ((CGEN_OPCODE_DESC, const CGEN_INSN *,
  53               CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma));
  54 \f
  55 /* -- assembler routines inserted here */
  56 /* -- asm.c */
  57 /* Handle register lists for LDMx and STMx  */
  58
  59 static const char *
  60 parse_low_register_list (od, strp, opindex, valuep)
  61      CGEN_OPCODE_DESC od;
  62      const char **strp;
  63      int opindex;
  64      unsigned long *valuep;
  65 {
  66   *valuep = 0;
  67   while (**strp && **strp != ')')
  68     {
  69       ++*strp;
  70     }
  71
  72   if (!*strp)
  73     return "Register list is not valid";
  74
  75   return NULL;
  76 }
  77
  78 static const char *
  79 parse_hi_register_list (od, strp, opindex, valuep)
  80      CGEN_OPCODE_DESC od;
  81      const char **strp;
  82      int opindex;
  83      unsigned long *valuep;
  84 {
  85   return parse_low_register_list (od, strp, opindex, valuep);
  86 }
  87
  88 /* -- */
  89
  90 /* Main entry point for operand parsing.
  91
  92    This function is basically just a big switch statement.  Earlier versions
  93    used tables to look up the function to use, but
  94    - if the table contains both assembler and disassembler functions then
  95      the disassembler contains much of the assembler and vice-versa,
  96    - there's a lot of inlining possibilities as things grow,
  97    - using a switch statement avoids the function call overhead.
  98
  99    This function could be moved into `parse_insn_normal', but keeping it
 100    separate makes clear the interface between `parse_insn_normal' and each of
 101    the handlers.
 102 */
 103
 104 const char *
 105 fr30_cgen_parse_operand (od, opindex, strp, fields)
 106      CGEN_OPCODE_DESC od;
 107      int opindex;
 108      const char ** strp;
 109      CGEN_FIELDS * fields;
 110 {
 111   const char * errmsg;
 112
 113   switch (opindex)
 114     {
 115     case FR30_OPERAND_RI :
 116       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_gr, & fields->f_Ri);
 117       break;
 118     case FR30_OPERAND_RJ :
 119       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_gr, & fields->f_Rj);
 120       break;
 121     case FR30_OPERAND_RIC :
 122       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_gr, & fields->f_Ric);
 123       break;
 124     case FR30_OPERAND_RJC :
 125       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_gr, & fields->f_Rjc);
 126       break;
 127     case FR30_OPERAND_CRI :
 128       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_cr, & fields->f_CRi);
 129       break;
 130     case FR30_OPERAND_CRJ :
 131       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_cr, & fields->f_CRj);
 132       break;
 133     case FR30_OPERAND_RS1 :
 134       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_dr, & fields->f_Rs1);
 135       break;
 136     case FR30_OPERAND_RS2 :
 137       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_dr, & fields->f_Rs2);
 138       break;
 139     case FR30_OPERAND_R13 :
 140       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_r13, & fields->f_nil);
 141       break;
 142     case FR30_OPERAND_R14 :
 143       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_r14, & fields->f_nil);
 144       break;
 145     case FR30_OPERAND_R15 :
 146       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_r15, & fields->f_nil);
 147       break;
 148     case FR30_OPERAND_PS :
 149       errmsg = cgen_parse_keyword (od, strp, & fr30_cgen_opval_h_ps, & fields->f_nil);
 150       break;
 151     case FR30_OPERAND_U4 :
 152       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_U4, &fields->f_u4);
 153       break;
 154     case FR30_OPERAND_U4C :
 155       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_U4C, &fields->f_u4c);
 156       break;
 157     case FR30_OPERAND_M4 :
 158       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_M4, &fields->f_m4);
 159       break;
 160     case FR30_OPERAND_U8 :
 161       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_U8, &fields->f_u8);
 162       break;
 163     case FR30_OPERAND_I8 :
 164       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_I8, &fields->f_i8);
 165       break;
 166     case FR30_OPERAND_UDISP6 :
 167       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_UDISP6, &fields->f_udisp6);
 168       break;
 169     case FR30_OPERAND_DISP8 :
 170       errmsg = cgen_parse_signed_integer (od, strp, FR30_OPERAND_DISP8, &fields->f_disp8);
 171       break;
 172     case FR30_OPERAND_DISP9 :
 173       errmsg = cgen_parse_signed_integer (od, strp, FR30_OPERAND_DISP9, &fields->f_disp9);
 174       break;
 175     case FR30_OPERAND_DISP10 :
 176       errmsg = cgen_parse_signed_integer (od, strp, FR30_OPERAND_DISP10, &fields->f_disp10);
 177       break;
 178     case FR30_OPERAND_S10 :
 179       errmsg = cgen_parse_signed_integer (od, strp, FR30_OPERAND_S10, &fields->f_s10);
 180       break;
 181     case FR30_OPERAND_U10 :
 182       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_U10, &fields->f_u10);
 183       break;
 184     case FR30_OPERAND_I32 :
 185       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_I32, &fields->f_i32);
 186       break;
 187     case FR30_OPERAND_DIR8 :
 188       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_DIR8, &fields->f_dir8);
 189       break;
 190     case FR30_OPERAND_DIR9 :
 191       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_DIR9, &fields->f_dir9);
 192       break;
 193     case FR30_OPERAND_DIR10 :
 194       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_DIR10, &fields->f_dir10);
 195       break;
 196     case FR30_OPERAND_LABEL9 :
 197       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_LABEL9, &fields->f_rel9);
 198       break;
 199     case FR30_OPERAND_LABEL12 :
 200       errmsg = cgen_parse_signed_integer (od, strp, FR30_OPERAND_LABEL12, &fields->f_rel12);
 201       break;
 202     case FR30_OPERAND_REGLIST_LOW :
 203       errmsg = parse_low_register_list (od, strp, FR30_OPERAND_REGLIST_LOW, &fields->f_reglist_low);
 204       break;
 205     case FR30_OPERAND_REGLIST_HI :
 206       errmsg = parse_hi_register_list (od, strp, FR30_OPERAND_REGLIST_HI, &fields->f_reglist_hi);
 207       break;
 208     case FR30_OPERAND_CC :
 209       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_CC, &fields->f_cc);
 210       break;
 211     case FR30_OPERAND_CCC :
 212       errmsg = cgen_parse_unsigned_integer (od, strp, FR30_OPERAND_CCC, &fields->f_ccc);
 213       break;
 214
 215     default :
 216       /* xgettext:c-format */
 217       fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
 218       abort ();
 219   }
 220
 221   return errmsg;
 222 }
 223
 224 /* Main entry point for operand insertion.
 225
 226    This function is basically just a big switch statement.  Earlier versions
 227    used tables to look up the function to use, but
 228    - if the table contains both assembler and disassembler functions then
 229      the disassembler contains much of the assembler and vice-versa,
 230    - there's a lot of inlining possibilities as things grow,
 231    - using a switch statement avoids the function call overhead.
 232
 233    This function could be moved into `parse_insn_normal', but keeping it
 234    separate makes clear the interface between `parse_insn_normal' and each of
 235    the handlers.  It's also needed by GAS to insert operands that couldn't be
 236    resolved during parsing.
 237 */
 238
 239 const char *
 240 fr30_cgen_insert_operand (od, opindex, fields, buffer, pc)
 241      CGEN_OPCODE_DESC od;
 242      int opindex;
 243      CGEN_FIELDS * fields;
 244      CGEN_INSN_BYTES_PTR buffer;
 245      bfd_vma pc;
 246 {
 247   const char * errmsg;
 248
 249   switch (opindex)
 250     {
 251     case FR30_OPERAND_RI :
 252       errmsg = insert_normal (od, fields->f_Ri, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 253       break;
 254     case FR30_OPERAND_RJ :
 255       errmsg = insert_normal (od, fields->f_Rj, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 256       break;
 257     case FR30_OPERAND_RIC :
 258       errmsg = insert_normal (od, fields->f_Ric, 0|(1<<CGEN_OPERAND_UNSIGNED), 28, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 259       break;
 260     case FR30_OPERAND_RJC :
 261       errmsg = insert_normal (od, fields->f_Rjc, 0|(1<<CGEN_OPERAND_UNSIGNED), 24, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 262       break;
 263     case FR30_OPERAND_CRI :
 264       errmsg = insert_normal (od, fields->f_CRi, 0|(1<<CGEN_OPERAND_UNSIGNED), 28, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 265       break;
 266     case FR30_OPERAND_CRJ :
 267       errmsg = insert_normal (od, fields->f_CRj, 0|(1<<CGEN_OPERAND_UNSIGNED), 24, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 268       break;
 269     case FR30_OPERAND_RS1 :
 270       errmsg = insert_normal (od, fields->f_Rs1, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 271       break;
 272     case FR30_OPERAND_RS2 :
 273       errmsg = insert_normal (od, fields->f_Rs2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 274       break;
 275     case FR30_OPERAND_R13 :
 276       errmsg = insert_normal (od, fields->f_nil, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
 277       break;
 278     case FR30_OPERAND_R14 :
 279       errmsg = insert_normal (od, fields->f_nil, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
 280       break;
 281     case FR30_OPERAND_R15 :
 282       errmsg = insert_normal (od, fields->f_nil, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
 283       break;
 284     case FR30_OPERAND_PS :
 285       errmsg = insert_normal (od, fields->f_nil, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
 286       break;
 287     case FR30_OPERAND_U4 :
 288       errmsg = insert_normal (od, fields->f_u4, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 8, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 289       break;
 290     case FR30_OPERAND_U4C :
 291       errmsg = insert_normal (od, fields->f_u4c, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 292       break;
 293     case FR30_OPERAND_M4 :
 294       {
 295         long value = fields->f_m4;
 296         value = ((value) & (15));
 297         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 8, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 298       }
 299       break;
 300     case FR30_OPERAND_U8 :
 301       errmsg = insert_normal (od, fields->f_u8, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 302       break;
 303     case FR30_OPERAND_I8 :
 304       errmsg = insert_normal (od, fields->f_i8, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 4, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 305       break;
 306     case FR30_OPERAND_UDISP6 :
 307       {
 308         long value = fields->f_udisp6;
 309         value = ((unsigned int) (value) >> (2));
 310         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 8, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 311       }
 312       break;
 313     case FR30_OPERAND_DISP8 :
 314       errmsg = insert_normal (od, fields->f_disp8, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGNED), 4, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 315       break;
 316     case FR30_OPERAND_DISP9 :
 317       {
 318         long value = fields->f_disp9;
 319         value = ((int) (value) >> (1));
 320         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGNED), 4, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 321       }
 322       break;
 323     case FR30_OPERAND_DISP10 :
 324       {
 325         long value = fields->f_disp10;
 326         value = ((int) (value) >> (2));
 327         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGNED), 4, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 328       }
 329       break;
 330     case FR30_OPERAND_S10 :
 331       {
 332         long value = fields->f_s10;
 333         value = ((int) (value) >> (2));
 334         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGNED), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 335       }
 336       break;
 337     case FR30_OPERAND_U10 :
 338       {
 339         long value = fields->f_u10;
 340         value = ((unsigned int) (value) >> (2));
 341         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 342       }
 343       break;
 344     case FR30_OPERAND_I32 :
 345       errmsg = insert_normal (od, fields->f_i32, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), 16, 32, CGEN_FIELDS_BITSIZE (fields), buffer);
 346       break;
 347     case FR30_OPERAND_DIR8 :
 348       errmsg = insert_normal (od, fields->f_dir8, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 349       break;
 350     case FR30_OPERAND_DIR9 :
 351       {
 352         long value = fields->f_dir9;
 353         value = ((unsigned int) (value) >> (1));
 354         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 355       }
 356       break;
 357     case FR30_OPERAND_DIR10 :
 358       {
 359         long value = fields->f_dir10;
 360         value = ((unsigned int) (value) >> (2));
 361         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 362       }
 363       break;
 364     case FR30_OPERAND_LABEL9 :
 365       {
 366         long value = fields->f_rel9;
 367         value = ((int) (((value) - (((pc) + (2))))) >> (1));
 368         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_SIGNED), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 369       }
 370       break;
 371     case FR30_OPERAND_LABEL12 :
 372       {
 373         long value = fields->f_rel12;
 374         value = ((int) (((value) - (((pc) & (-2))))) >> (1));
 375         errmsg = insert_normal (od, value, 0|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_SIGNED), 5, 11, CGEN_FIELDS_BITSIZE (fields), buffer);
 376       }
 377       break;
 378     case FR30_OPERAND_REGLIST_LOW :
 379       errmsg = insert_normal (od, fields->f_reglist_low, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 380       break;
 381     case FR30_OPERAND_REGLIST_HI :
 382       errmsg = insert_normal (od, fields->f_reglist_hi, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 383       break;
 384     case FR30_OPERAND_CC :
 385       errmsg = insert_normal (od, fields->f_cc, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
 386       break;
 387     case FR30_OPERAND_CCC :
 388       errmsg = insert_normal (od, fields->f_ccc, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 16, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
 389       break;
 390
 391     default :
 392       /* xgettext:c-format */
 393       fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
 394                opindex);
 395       abort ();
 396   }
 397
 398   return errmsg;
 399 }
 400
 401 cgen_parse_fn * const fr30_cgen_parse_handlers[] =
 402 {
 403   0, /* default */
 404   parse_insn_normal,
 405 };
 406
 407 cgen_insert_fn * const fr30_cgen_insert_handlers[] =
 408 {
 409   0, /* default */
 410   insert_insn_normal,
 411 };
 412
 413 void
 414 fr30_cgen_init_asm (od)
 415      CGEN_OPCODE_DESC od;
 416 {
 417 }
 418
 419 \f
 420 #if ! CGEN_INT_INSN_P
 421
 422 /* Subroutine of insert_normal.  */
 423
 424 static INLINE void
 425 insert_1 (od, value, start, length, word_length, bufp)
 426      CGEN_OPCODE_DESC od;
 427      unsigned long value;
 428      int start,length,word_length;
 429      unsigned char *bufp;
 430 {
 431   unsigned long x,mask;
 432   int shift;
 433   int big_p = CGEN_OPCODE_INSN_ENDIAN (od) == CGEN_ENDIAN_BIG;
 434
 435   switch (word_length)
 436     {
 437     case 8:
 438       x = *bufp;
 439       break;
 440     case 16:
 441       if (big_p)
 442         x = bfd_getb16 (bufp);
 443       else
 444         x = bfd_getl16 (bufp);
 445       break;
 446     case 24:
 447       /* ??? This may need reworking as these cases don't necessarily
 448          want the first byte and the last two bytes handled like this.  */
 449       if (big_p)
 450         x = (bufp[0] << 16) | bfd_getb16 (bufp + 1);
 451       else
 452         x = bfd_getl16 (bufp) | (bufp[2] << 16);
 453       break;
 454     case 32:
 455       if (big_p)
 456         x = bfd_getb32 (bufp);
 457       else
 458         x = bfd_getl32 (bufp);
 459       break;
 460     default :
 461       abort ();
 462     }
 463
 464   /* Written this way to avoid undefined behaviour.  */
 465   mask = (((1L << (length - 1)) - 1) << 1) | 1;
 466   if (CGEN_INSN_LSB0_P)
 467     shift = start;
 468   else
 469     shift = (word_length - (start + length));
 470   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 471
 472   switch (word_length)
 473     {
 474     case 8:
 475       *bufp = x;
 476       break;
 477     case 16:
 478       if (big_p)
 479         bfd_putb16 (x, bufp);
 480       else
 481         bfd_putl16 (x, bufp);
 482       break;
 483     case 24:
 484       /* ??? This may need reworking as these cases don't necessarily
 485          want the first byte and the last two bytes handled like this.  */
 486       if (big_p)
 487         {
 488           bufp[0] = x >> 16;
 489           bfd_putb16 (x, bufp + 1);
 490         }
 491       else
 492         {
 493           bfd_putl16 (x, bufp);
 494           bufp[2] = x >> 16;
 495         }
 496       break;
 497     case 32:
 498       if (big_p)
 499         bfd_putb32 (x, bufp);
 500       else
 501         bfd_putl32 (x, bufp);
 502       break;
 503     default :
 504       abort ();
 505     }
 506 }
 507
 508 #endif /* ! CGEN_INT_INSN_P */
 509
 510 /* Default insertion routine.
 511
 512    ATTRS is a mask of the boolean attributes.
 513    START is the starting bit number, architecture origin.
 514    LENGTH is the length of VALUE in bits.
 515    TOTAL_LENGTH is the total length of the insn.
 516
 517    The result is an error message or NULL if success.  */
 518
 519 /* ??? This duplicates functionality with bfd's howto table and
 520    bfd_install_relocation.  */
 521 /* ??? For architectures where insns can be representable as ints,
 522    store insn in `field' struct and add registers, etc. while parsing?  */
 523 /* ??? This doesn't handle bfd_vma's.  Create another function when
 524    necessary.  */
 525
 526 static const char *
 527 insert_normal (od, value, attrs, start, length, total_length, buffer)
 528      CGEN_OPCODE_DESC od;
 529      long value;
 530      unsigned int attrs;
 531      int start;
 532      int length;
 533      int total_length;
 534      CGEN_INSN_BYTES_PTR buffer;
 535 {
 536   static char errbuf[100];
 537   /* Written this way to avoid undefined behaviour.  */
 538   unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
 539
 540   /* If LENGTH is zero, this operand doesn't contribute to the value.  */
 541   if (length == 0)
 542     return NULL;
 543
 544   /* Ensure VALUE will fit.  */
 545   if ((attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED)) != 0)
 546     {
 547       unsigned long maxval = mask;
 548       if ((unsigned long) value > maxval)
 549         {
 550           /* xgettext:c-format */
 551           sprintf (errbuf,
 552                    _("operand out of range (%lu not between 0 and %lu)"),
 553                    value, maxval);
 554           return errbuf;
 555         }
 556     }
 557   else
 558     {
 559       long minval = - (1L << (length - 1));
 560       long maxval = (1L << (length - 1)) - 1;
 561       if (value < minval || value > maxval)
 562         {
 563           sprintf
 564             /* xgettext:c-format */
 565             (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
 566              value, minval, maxval);
 567           return errbuf;
 568         }
 569     }
 570
 571 #if CGEN_INT_INSN_P
 572
 573   if (total_length > 32) /* 32 bits in a portable host int */
 574     abort ();
 575   {
 576     int shift;
 577
 578     if (CGEN_INSN_LSB0_P)
 579       shift = start;
 580     else
 581       shift = total_length - (start + length);
 582     *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
 583   }
 584
 585 #else
 586
 587   /* FIXME: unfinished and untested */
 588
 589   /* The hard case is probably too slow for the normal cases.
 590      It's certainly more difficult to understand than the normal case.
 591      Thus this is split into two.  The hard case is defined
 592      to be when a field straddles a (loosely defined) word boundary
 593      (??? which may require target specific help to determine).  */
 594
 595 #if 0 /*wip*/
 596
 597 #define HARD_CASE_P 0 /* FIXME:wip */
 598
 599   if (HARD_CASE_P)
 600     {
 601       unsigned char *bufp = (unsigned char *) buffer;
 602       int insn_length_left = total_length;
 603
 604       if (CGEN_INSN_LSB0_P)
 605         {
 606           int word_offset = (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG
 607                              ? ...
 608                              : start / CGEN_BASE_INSN_BITSIZE);
 609           bufp += word_offset * (CGEN_BASE_INSN_BITSIZE / 8);
 610           if (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG)
 611           else
 612             start -= word_offset * CGEN_BASE_INSN_BITSIZE;
 613         }
 614       else
 615         {
 616           int word_offset = (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG
 617                              ? start / CGEN_BASE_INSN_BITSIZE
 618                              : ...);
 619           bufp += word_offset * (CGEN_BASE_INSN_BITSIZE / 8);
 620           if (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG)
 621             start -= word_offset * CGEN_BASE_INSN_BITSIZE;
 622           else
 623         }
 624
 625       /* Loop so we handle a field straddling an insn word boundary
 626          (remember, "insn word boundary" is loosely defined here).  */
 627
 628       while (length > 0)
 629         {
 630           int this_pass_length = length;
 631           int this_pass_start = start;
 632           int this_pass_word_length = min (insn_length_left,
 633                                            (CGEN_BASE_INSN_BITSIZE == 8
 634                                             ? 32
 635                                             : CGEN_BASE_INSN_BITSIZE));
 636
 637           insert_1 (od, value, attrs,
 638                     this_pass_start, this_pass_length, this_pass_word_length,
 639                     bufp);
 640
 641           length -= this_pass_length;
 642           insn_length_left -= this_pass_word_length;
 643           if (???)
 644             {
 645               value >>= ???;
 646               start += ???;
 647             }
 648           else
 649             {
 650               value >>= ???;
 651               start += ???;
 652             }
 653           bufp += this_pass_word_length / 8;
 654         }
 655     }
 656   else
 657 #endif /* 0 */
 658     {
 659       unsigned char *bufp = (unsigned char *) buffer;
 660
 661       if (length > 32)
 662         abort ();
 663
 664       /* Adjust start,total_length,bufp to point to the pseudo-word that holds
 665          the value.  For example in a 48 bit insn where the value to insert
 666          (say an immediate value) is the last 16 bits then fetch_length here
 667          would be 16.  To handle a 24 bit insn with an 18 bit immediate,
 668          insert_1 handles 24 bits.  */
 669
 670       if (total_length > 32)
 671         {
 672           int needed_width = start % 8 + length;
 673           int fetch_length = (needed_width <= 8 ? 8
 674                               : needed_width <= 16 ? 16
 675                               : 32);
 676
 677           if (CGEN_INSN_LSB0_P)
 678             {
 679               if (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG)
 680                 {
 681                   abort (); /* wip */
 682                 }
 683               else
 684                 {
 685                   int offset = start & ~7;
 686
 687                   bufp += offset / 8;
 688                   start -= offset;
 689                   total_length = fetch_length;
 690                 }
 691             }
 692           else
 693             {
 694               if (CGEN_INSN_WORD_ENDIAN (od) == CGEN_ENDIAN_BIG)
 695                 {
 696                   int offset = start & ~7;
 697
 698                   bufp += offset / 8;
 699                   start -= offset;
 700                   total_length = fetch_length;
 701                 }
 702               else
 703                 {
 704                   abort (); /* wip */
 705                 }
 706             }
 707         }
 708
 709       insert_1 (od, value, start, length, total_length, bufp);
 710     }
 711
 712 #endif /* ! CGEN_INT_INSN_P */
 713
 714   return NULL;
 715 }
 716 \f
 717 /* Default insn parser.
 718
 719    The syntax string is scanned and operands are parsed and stored in FIELDS.
 720    Relocs are queued as we go via other callbacks.
 721
 722    ??? Note that this is currently an all-or-nothing parser.  If we fail to
 723    parse the instruction, we return 0 and the caller will start over from
 724    the beginning.  Backtracking will be necessary in parsing subexpressions,
 725    but that can be handled there.  Not handling backtracking here may get
 726    expensive in the case of the m68k.  Deal with later.
 727
 728    Returns NULL for success, an error message for failure.
 729 */
 730
 731 static const char *
 732 parse_insn_normal (od, insn, strp, fields)
 733      CGEN_OPCODE_DESC od;
 734      const CGEN_INSN * insn;
 735      const char ** strp;
 736      CGEN_FIELDS * fields;
 737 {
 738   const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
 739   const char * str = *strp;
 740   const char * errmsg;
 741   const char * p;
 742   const unsigned char * syn;
 743 #ifdef CGEN_MNEMONIC_OPERANDS
 744   /* FIXME: wip */
 745   int past_opcode_p;
 746 #endif
 747
 748   /* For now we assume the mnemonic is first (there are no leading operands).
 749      We can parse it without needing to set up operand parsing.
 750      GAS's input scrubber will ensure mnemonics are lowercase, but we may
 751      not be called from GAS.  */
 752   p = CGEN_INSN_MNEMONIC (insn);
 753   while (*p && tolower (*p) == tolower (*str))
 754     ++p, ++str;
 755
 756   if (* p || (* str && !isspace (* str)))
 757     return _("unrecognized instruction");
 758
 759   CGEN_INIT_PARSE (od);
 760   cgen_init_parse_operand (od);
 761 #ifdef CGEN_MNEMONIC_OPERANDS
 762   past_opcode_p = 0;
 763 #endif
 764
 765   /* We don't check for (*str != '\0') here because we want to parse
 766      any trailing fake arguments in the syntax string.  */
 767   syn = CGEN_SYNTAX_STRING (syntax);
 768
 769   /* Mnemonics come first for now, ensure valid string.  */
 770   if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
 771     abort ();
 772
 773   ++syn;
 774
 775   while (* syn != 0)
 776     {
 777       /* Non operand chars must match exactly.  */
 778       if (CGEN_SYNTAX_CHAR_P (* syn))
 779         {
 780           if (*str == CGEN_SYNTAX_CHAR (* syn))
 781             {
 782 #ifdef CGEN_MNEMONIC_OPERANDS
 783               if (* syn == ' ')
 784                 past_opcode_p = 1;
 785 #endif
 786               ++ syn;
 787               ++ str;
 788             }
 789           else
 790             {
 791               /* Syntax char didn't match.  Can't be this insn.  */
 792               /* FIXME: would like to return something like
 793                  "expected char `c'" */
 794               return _("syntax error");
 795             }
 796           continue;
 797         }
 798
 799       /* We have an operand of some sort.  */
 800       errmsg = fr30_cgen_parse_operand (od, CGEN_SYNTAX_FIELD (*syn),
 801                                           &str, fields);
 802       if (errmsg)
 803         return errmsg;
 804
 805       /* Done with this operand, continue with next one.  */
 806       ++ syn;
 807     }
 808
 809   /* If we're at the end of the syntax string, we're done.  */
 810   if (* syn == '\0')
 811     {
 812       /* FIXME: For the moment we assume a valid `str' can only contain
 813          blanks now.  IE: We needn't try again with a longer version of
 814          the insn and it is assumed that longer versions of insns appear
 815          before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3).  */
 816       while (isspace (* str))
 817         ++ str;
 818
 819       if (* str != '\0')
 820         return _("junk at end of line"); /* FIXME: would like to include `str' */
 821
 822       return NULL;
 823     }
 824
 825   /* We couldn't parse it.  */
 826   return _("unrecognized instruction");
 827 }
 828
 829 /* Default insn builder (insert handler).
 830    The instruction is recorded in CGEN_INT_INSN_P byte order
 831    (meaning that if CGEN_INT_INSN_P BUFFER is an int * and thus the value is
 832    recorded in host byte order, otherwise BUFFER is an array of bytes and the
 833    value is recorded in target byte order).
 834    The result is an error message or NULL if success.  */
 835
 836 static const char *
 837 insert_insn_normal (od, insn, fields, buffer, pc)
 838      CGEN_OPCODE_DESC od;
 839      const CGEN_INSN * insn;
 840      CGEN_FIELDS * fields;
 841      CGEN_INSN_BYTES_PTR buffer;
 842      bfd_vma pc;
 843 {
 844   const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
 845   unsigned long value;
 846   const unsigned char * syn;
 847
 848   CGEN_INIT_INSERT (od);
 849   value = CGEN_INSN_VALUE (insn);
 850
 851   /* If we're recording insns as numbers (rather than a string of bytes),
 852      target byte order handling is deferred until later.  */
 853
 854 #if CGEN_INT_INSN_P
 855
 856   *buffer = value;
 857
 858 #else
 859
 860   cgen_put_insn_value (od, buffer, min (CGEN_BASE_INSN_BITSIZE,
 861                                         CGEN_FIELDS_BITSIZE (fields)),
 862                        value);
 863
 864 #endif /* ! CGEN_INT_INSN_P */
 865
 866   /* ??? Rather than scanning the syntax string again, we could store
 867      in `fields' a null terminated list of the fields that are present.  */
 868
 869   for (syn = CGEN_SYNTAX_STRING (syntax); * syn != '\0'; ++ syn)
 870     {
 871       const char *errmsg;
 872
 873       if (CGEN_SYNTAX_CHAR_P (* syn))
 874         continue;
 875
 876       errmsg = fr30_cgen_insert_operand (od, CGEN_SYNTAX_FIELD (*syn),
 877                                            fields, buffer, pc);
 878       if (errmsg)
 879         return errmsg;
 880     }
 881
 882   return NULL;
 883 }
 884 \f
 885 /* Main entry point.
 886    This routine is called for each instruction to be assembled.
 887    STR points to the insn to be assembled.
 888    We assume all necessary tables have been initialized.
 889    The assembled instruction, less any fixups, is stored in BUF.
 890    Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
 891    still needs to be converted to target byte order, otherwise BUF is an array
 892    of bytes in target byte order.
 893    The result is a pointer to the insn's entry in the opcode table,
 894    or NULL if an error occured (an error message will have already been
 895    printed).
 896
 897    Note that when processing (non-alias) macro-insns,
 898    this function recurses.  */
 899
 900 const CGEN_INSN *
 901 fr30_cgen_assemble_insn (od, str, fields, buf, errmsg)
 902      CGEN_OPCODE_DESC od;
 903      const char * str;
 904      CGEN_FIELDS * fields;
 905      CGEN_INSN_BYTES_PTR buf;
 906      char ** errmsg;
 907 {
 908   const char * start;
 909   CGEN_INSN_LIST * ilist;
 910
 911   /* Skip leading white space.  */
 912   while (isspace (* str))
 913     ++ str;
 914
 915   /* The instructions are stored in hashed lists.
 916      Get the first in the list.  */
 917   ilist = CGEN_ASM_LOOKUP_INSN (od, str);
 918
 919   /* Keep looking until we find a match.  */
 920
 921   start = str;
 922   for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
 923     {
 924       const CGEN_INSN *insn = ilist->insn;
 925
 926 #if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */
 927       /* Is this insn supported by the selected cpu?  */
 928       if (! fr30_cgen_insn_supported (od, insn))
 929         continue;
 930 #endif
 931
 932       /* If the RELAX attribute is set, this is an insn that shouldn't be
 933          chosen immediately.  Instead, it is used during assembler/linker
 934          relaxation if possible.  */
 935       if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0)
 936         continue;
 937
 938       str = start;
 939
 940       /* Record a default length for the insn.  This will get set to the
 941          correct value while parsing.  */
 942       /* FIXME: wip */
 943       CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
 944
 945       if (! CGEN_PARSE_FN (insn) (od, insn, & str, fields))
 946         {
 947           /* ??? 0 is passed for `pc' */
 948           if (CGEN_INSERT_FN (insn) (od, insn, fields, buf, (bfd_vma) 0) != NULL)
 949             continue;
 950           /* It is up to the caller to actually output the insn and any
 951              queued relocs.  */
 952           return insn;
 953         }
 954
 955       /* Try the next entry.  */
 956     }
 957
 958   /* FIXME: We can return a better error message than this.
 959      Need to track why it failed and pick the right one.  */
 960   {
 961     static char errbuf[100];
 962     if (strlen (start) > 50)
 963       /* xgettext:c-format */
 964       sprintf (errbuf, _("bad instruction `%.50s...'"), start);
 965     else
 966       /* xgettext:c-format */
 967       sprintf (errbuf, _("bad instruction `%.50s'"), start);
 968
 969     *errmsg = errbuf;
 970     return NULL;
 971   }
 972 }
 973 \f
 974 #if 0 /* This calls back to GAS which we can't do without care.  */
 975
 976 /* Record each member of OPVALS in the assembler's symbol table.
 977    This lets GAS parse registers for us.
 978    ??? Interesting idea but not currently used.  */
 979
 980 /* Record each member of OPVALS in the assembler's symbol table.
 981    FIXME: Not currently used.  */
 982
 983 void
 984 fr30_cgen_asm_hash_keywords (od, opvals)
 985      CGEN_OPCODE_DESC od;
 986      CGEN_KEYWORD * opvals;
 987 {
 988   CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
 989   const CGEN_KEYWORD_ENTRY * ke;
 990
 991   while ((ke = cgen_keyword_search_next (& search)) != NULL)
 992     {
 993 #if 0 /* Unnecessary, should be done in the search routine.  */
 994       if (! fr30_cgen_opval_supported (ke))
 995         continue;
 996 #endif
 997       cgen_asm_record_register (od, ke->name, ke->value);
 998     }
 999 }
1000
1001 #endif /* 0 */