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1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for m32c. -*- C -*-
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
6
7 Copyright (C) 1996-2017 Free Software Foundation, Inc.
8
9 This file is part of libopcodes.
10
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
14 any later version.
15
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "cgen/basic-modes.h"
37 #include "opintl.h"
38 #include "safe-ctype.h"
39
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
44
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
47
48 static const char * insert_normal
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54 static int extract_normal
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61 #if CGEN_INT_INSN_P
62 static void put_insn_int_value
63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64 #endif
65 #if ! CGEN_INT_INSN_P
66 static CGEN_INLINE void insert_1
67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE int fill_cache
69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
70 static CGEN_INLINE long extract_1
71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72 #endif
73 \f
74 /* Operand insertion. */
75
76 #if ! CGEN_INT_INSN_P
77
78 /* Subroutine of insert_normal. */
79
80 static CGEN_INLINE void
81 insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
87 {
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102 }
103
104 #endif /* ! CGEN_INT_INSN_P */
105
106 /* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122 static const char *
123 insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
132 {
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
158
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
196
197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208 #if CGEN_INT_INSN_P
209
210 {
211 int shift_within_word, shift_to_word, shift;
212
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
215
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P)
218 shift_within_word = start + 1 - length;
219 else
220 shift_within_word = word_length - start - length;
221
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
225 }
226
227 #else /* ! CGEN_INT_INSN_P */
228
229 {
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
231
232 insert_1 (cd, value, start, length, word_length, bufp);
233 }
234
235 #endif /* ! CGEN_INT_INSN_P */
236
237 return NULL;
238 }
239
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
246
247 static const char *
248 insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
252 bfd_vma pc)
253 {
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
255 unsigned long value;
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
257
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
260
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
263
264 #if CGEN_INT_INSN_P
265
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
268
269 #else
270
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
273 value);
274
275 #endif /* ! CGEN_INT_INSN_P */
276
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
281
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
283 {
284 const char *errmsg;
285
286 if (CGEN_SYNTAX_CHAR_P (* syn))
287 continue;
288
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
290 fields, buffer, pc);
291 if (errmsg)
292 return errmsg;
293 }
294
295 return NULL;
296 }
297
298 #if CGEN_INT_INSN_P
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
301
302 static void
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
305 int length,
306 int insn_length,
307 CGEN_INSN_INT value)
308 {
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
312 *buf = value;
313 else
314 {
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
318
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
320 }
321 }
322 #endif
323 \f
324 /* Operand extraction. */
325
326 #if ! CGEN_INT_INSN_P
327
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
333
334 static CGEN_INLINE int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
337 int offset,
338 int bytes,
339 bfd_vma pc)
340 {
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
343 unsigned int mask;
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
345
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
349 return 1;
350
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
354 break;
355
356 if (bytes)
357 {
358 int status;
359
360 pc += offset;
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
363
364 if (status != 0)
365 {
366 (*info->memory_error_func) (status, pc, info);
367 return 0;
368 }
369
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
371 }
372
373 return 1;
374 }
375
376 /* Subroutine of extract_normal. */
377
378 static CGEN_INLINE long
379 extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
381 int start,
382 int length,
383 int word_length,
384 unsigned char *bufp,
385 bfd_vma pc ATTRIBUTE_UNUSED)
386 {
387 unsigned long x;
388 int shift;
389
390 x = cgen_get_insn_value (cd, bufp, word_length);
391
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
394 else
395 shift = (word_length - (start + length));
396 return x >> shift;
397 }
398
399 #endif /* ! CGEN_INT_INSN_P */
400
401 /* Default extraction routine.
402
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
413
414 Returns 1 for success, 0 for failure. */
415
416 /* ??? The return code isn't properly used. wip. */
417
418 /* ??? This doesn't handle bfd_vma's. Create another function when
419 necessary. */
420
421 static int
422 extract_normal (CGEN_CPU_DESC cd,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO *ex_info,
425 #else
426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
427 #endif
428 CGEN_INSN_INT insn_value,
429 unsigned int attrs,
430 unsigned int word_offset,
431 unsigned int start,
432 unsigned int length,
433 unsigned int word_length,
434 unsigned int total_length,
435 #if ! CGEN_INT_INSN_P
436 bfd_vma pc,
437 #else
438 bfd_vma pc ATTRIBUTE_UNUSED,
439 #endif
440 long *valuep)
441 {
442 long value, mask;
443
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
446 if (length == 0)
447 {
448 *valuep = 0;
449 return 1;
450 }
451
452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
453 abort ();
454
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
458 {
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
461 }
462
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
464
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
466 {
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
469 else
470 value = insn_value >> (total_length - ( word_offset + start + length));
471 }
472
473 #if ! CGEN_INT_INSN_P
474
475 else
476 {
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
478
479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
480 abort ();
481
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
483 return 0;
484
485 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
486 }
487
488 #endif /* ! CGEN_INT_INSN_P */
489
490 /* Written this way to avoid undefined behaviour. */
491 mask = (((1L << (length - 1)) - 1) << 1) | 1;
492
493 value &= mask;
494 /* sign extend? */
495 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
496 && (value & (1L << (length - 1))))
497 value |= ~mask;
498
499 *valuep = value;
500
501 return 1;
502 }
503
504 /* Default insn extractor.
505
506 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
507 The extracted fields are stored in FIELDS.
508 EX_INFO is used to handle reading variable length insns.
509 Return the length of the insn in bits, or 0 if no match,
510 or -1 if an error occurs fetching data (memory_error_func will have
511 been called). */
512
513 static int
514 extract_insn_normal (CGEN_CPU_DESC cd,
515 const CGEN_INSN *insn,
516 CGEN_EXTRACT_INFO *ex_info,
517 CGEN_INSN_INT insn_value,
518 CGEN_FIELDS *fields,
519 bfd_vma pc)
520 {
521 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
522 const CGEN_SYNTAX_CHAR_TYPE *syn;
523
524 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
525
526 CGEN_INIT_EXTRACT (cd);
527
528 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
529 {
530 int length;
531
532 if (CGEN_SYNTAX_CHAR_P (*syn))
533 continue;
534
535 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
536 ex_info, insn_value, fields, pc);
537 if (length <= 0)
538 return length;
539 }
540
541 /* We recognized and successfully extracted this insn. */
542 return CGEN_INSN_BITSIZE (insn);
543 }
544 \f
545 /* Machine generated code added here. */
546
547 const char * m32c_cgen_insert_operand
548 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
549
550 /* Main entry point for operand insertion.
551
552 This function is basically just a big switch statement. Earlier versions
553 used tables to look up the function to use, but
554 - if the table contains both assembler and disassembler functions then
555 the disassembler contains much of the assembler and vice-versa,
556 - there's a lot of inlining possibilities as things grow,
557 - using a switch statement avoids the function call overhead.
558
559 This function could be moved into `parse_insn_normal', but keeping it
560 separate makes clear the interface between `parse_insn_normal' and each of
561 the handlers. It's also needed by GAS to insert operands that couldn't be
562 resolved during parsing. */
563
564 const char *
565 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
566 int opindex,
567 CGEN_FIELDS * fields,
568 CGEN_INSN_BYTES_PTR buffer,
569 bfd_vma pc ATTRIBUTE_UNUSED)
570 {
571 const char * errmsg = NULL;
572 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
573
574 switch (opindex)
575 {
576 case M32C_OPERAND_A0 :
577 break;
578 case M32C_OPERAND_A1 :
579 break;
580 case M32C_OPERAND_AN16_PUSH_S :
581 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
582 break;
583 case M32C_OPERAND_BIT16AN :
584 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
585 break;
586 case M32C_OPERAND_BIT16RN :
587 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
588 break;
589 case M32C_OPERAND_BIT3_S :
590 {
591 {
592 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
593 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
594 }
595 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
596 if (errmsg)
597 break;
598 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
599 if (errmsg)
600 break;
601 }
602 break;
603 case M32C_OPERAND_BIT32ANPREFIXED :
604 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
605 break;
606 case M32C_OPERAND_BIT32ANUNPREFIXED :
607 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
608 break;
609 case M32C_OPERAND_BIT32RNPREFIXED :
610 {
611 long value = fields->f_dst32_rn_prefixed_QI;
612 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
613 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
614 }
615 break;
616 case M32C_OPERAND_BIT32RNUNPREFIXED :
617 {
618 long value = fields->f_dst32_rn_unprefixed_QI;
619 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
620 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
621 }
622 break;
623 case M32C_OPERAND_BITBASE16_16_S8 :
624 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
625 break;
626 case M32C_OPERAND_BITBASE16_16_U16 :
627 {
628 long value = fields->f_dsp_16_u16;
629 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
630 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
631 }
632 break;
633 case M32C_OPERAND_BITBASE16_16_U8 :
634 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
635 break;
636 case M32C_OPERAND_BITBASE16_8_U11_S :
637 {
638 {
639 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
640 FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
641 }
642 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
643 if (errmsg)
644 break;
645 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
646 if (errmsg)
647 break;
648 }
649 break;
650 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
651 {
652 {
653 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
654 FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
655 }
656 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
657 if (errmsg)
658 break;
659 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
660 if (errmsg)
661 break;
662 }
663 break;
664 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
665 {
666 {
667 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
668 FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
669 }
670 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
671 if (errmsg)
672 break;
673 {
674 long value = fields->f_dsp_16_s16;
675 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
676 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
677 }
678 if (errmsg)
679 break;
680 }
681 break;
682 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
683 {
684 {
685 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
686 FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
687 }
688 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
689 if (errmsg)
690 break;
691 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
692 if (errmsg)
693 break;
694 }
695 break;
696 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
697 {
698 {
699 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
700 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
701 }
702 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
703 if (errmsg)
704 break;
705 {
706 long value = fields->f_dsp_16_u16;
707 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
708 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
709 }
710 if (errmsg)
711 break;
712 }
713 break;
714 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
715 {
716 {
717 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
718 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
719 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
720 }
721 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
722 if (errmsg)
723 break;
724 {
725 long value = fields->f_dsp_16_u16;
726 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
727 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
728 }
729 if (errmsg)
730 break;
731 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
732 if (errmsg)
733 break;
734 }
735 break;
736 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
737 {
738 {
739 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
740 FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
741 }
742 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
743 if (errmsg)
744 break;
745 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
746 if (errmsg)
747 break;
748 }
749 break;
750 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
751 {
752 {
753 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
754 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
755 FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
756 }
757 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
758 if (errmsg)
759 break;
760 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
761 if (errmsg)
762 break;
763 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
764 if (errmsg)
765 break;
766 }
767 break;
768 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
769 {
770 {
771 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
772 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
773 }
774 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
775 if (errmsg)
776 break;
777 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
778 if (errmsg)
779 break;
780 }
781 break;
782 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
783 {
784 {
785 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
786 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
787 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
788 }
789 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
790 if (errmsg)
791 break;
792 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
793 if (errmsg)
794 break;
795 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
796 if (errmsg)
797 break;
798 }
799 break;
800 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
801 {
802 {
803 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
804 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
805 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
806 }
807 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
808 if (errmsg)
809 break;
810 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
811 if (errmsg)
812 break;
813 {
814 long value = fields->f_dsp_32_u16;
815 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
816 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
817 }
818 if (errmsg)
819 break;
820 }
821 break;
822 case M32C_OPERAND_BITNO16R :
823 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
824 break;
825 case M32C_OPERAND_BITNO32PREFIXED :
826 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
827 break;
828 case M32C_OPERAND_BITNO32UNPREFIXED :
829 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
830 break;
831 case M32C_OPERAND_DSP_10_U6 :
832 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
833 break;
834 case M32C_OPERAND_DSP_16_S16 :
835 {
836 long value = fields->f_dsp_16_s16;
837 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
838 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
839 }
840 break;
841 case M32C_OPERAND_DSP_16_S8 :
842 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
843 break;
844 case M32C_OPERAND_DSP_16_U16 :
845 {
846 long value = fields->f_dsp_16_u16;
847 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
848 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
849 }
850 break;
851 case M32C_OPERAND_DSP_16_U20 :
852 {
853 {
854 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
855 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
856 }
857 {
858 long value = fields->f_dsp_16_u16;
859 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
860 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
861 }
862 if (errmsg)
863 break;
864 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
865 if (errmsg)
866 break;
867 }
868 break;
869 case M32C_OPERAND_DSP_16_U24 :
870 {
871 {
872 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
873 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
874 }
875 {
876 long value = fields->f_dsp_16_u16;
877 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
878 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
879 }
880 if (errmsg)
881 break;
882 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
883 if (errmsg)
884 break;
885 }
886 break;
887 case M32C_OPERAND_DSP_16_U8 :
888 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
889 break;
890 case M32C_OPERAND_DSP_24_S16 :
891 {
892 {
893 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
894 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
895 }
896 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
897 if (errmsg)
898 break;
899 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
900 if (errmsg)
901 break;
902 }
903 break;
904 case M32C_OPERAND_DSP_24_S8 :
905 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
906 break;
907 case M32C_OPERAND_DSP_24_U16 :
908 {
909 {
910 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
911 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255));
912 }
913 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
914 if (errmsg)
915 break;
916 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
917 if (errmsg)
918 break;
919 }
920 break;
921 case M32C_OPERAND_DSP_24_U20 :
922 {
923 {
924 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
925 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
926 }
927 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
928 if (errmsg)
929 break;
930 {
931 long value = fields->f_dsp_32_u16;
932 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
933 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
934 }
935 if (errmsg)
936 break;
937 }
938 break;
939 case M32C_OPERAND_DSP_24_U24 :
940 {
941 {
942 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
943 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
944 }
945 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
946 if (errmsg)
947 break;
948 {
949 long value = fields->f_dsp_32_u16;
950 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
951 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
952 }
953 if (errmsg)
954 break;
955 }
956 break;
957 case M32C_OPERAND_DSP_24_U8 :
958 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
959 break;
960 case M32C_OPERAND_DSP_32_S16 :
961 {
962 long value = fields->f_dsp_32_s16;
963 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
964 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
965 }
966 break;
967 case M32C_OPERAND_DSP_32_S8 :
968 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
969 break;
970 case M32C_OPERAND_DSP_32_U16 :
971 {
972 long value = fields->f_dsp_32_u16;
973 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
974 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
975 }
976 break;
977 case M32C_OPERAND_DSP_32_U20 :
978 {
979 long value = fields->f_dsp_32_u24;
980 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
981 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
982 }
983 break;
984 case M32C_OPERAND_DSP_32_U24 :
985 {
986 long value = fields->f_dsp_32_u24;
987 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
988 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
989 }
990 break;
991 case M32C_OPERAND_DSP_32_U8 :
992 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
993 break;
994 case M32C_OPERAND_DSP_40_S16 :
995 {
996 long value = fields->f_dsp_40_s16;
997 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
998 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
999 }
1000 break;
1001 case M32C_OPERAND_DSP_40_S8 :
1002 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1003 break;
1004 case M32C_OPERAND_DSP_40_U16 :
1005 {
1006 long value = fields->f_dsp_40_u16;
1007 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1008 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
1009 }
1010 break;
1011 case M32C_OPERAND_DSP_40_U20 :
1012 {
1013 long value = fields->f_dsp_40_u20;
1014 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
1015 errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer);
1016 }
1017 break;
1018 case M32C_OPERAND_DSP_40_U24 :
1019 {
1020 long value = fields->f_dsp_40_u24;
1021 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1022 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1023 }
1024 break;
1025 case M32C_OPERAND_DSP_40_U8 :
1026 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1027 break;
1028 case M32C_OPERAND_DSP_48_S16 :
1029 {
1030 long value = fields->f_dsp_48_s16;
1031 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1032 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1033 }
1034 break;
1035 case M32C_OPERAND_DSP_48_S8 :
1036 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1037 break;
1038 case M32C_OPERAND_DSP_48_U16 :
1039 {
1040 long value = fields->f_dsp_48_u16;
1041 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1042 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1043 }
1044 break;
1045 case M32C_OPERAND_DSP_48_U20 :
1046 {
1047 {
1048 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15));
1049 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535));
1050 }
1051 {
1052 long value = fields->f_dsp_48_u16;
1053 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1054 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1055 }
1056 if (errmsg)
1057 break;
1058 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1059 if (errmsg)
1060 break;
1061 }
1062 break;
1063 case M32C_OPERAND_DSP_48_U24 :
1064 {
1065 {
1066 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1067 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1068 }
1069 {
1070 long value = fields->f_dsp_48_u16;
1071 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1072 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1073 }
1074 if (errmsg)
1075 break;
1076 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1077 if (errmsg)
1078 break;
1079 }
1080 break;
1081 case M32C_OPERAND_DSP_48_U8 :
1082 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1083 break;
1084 case M32C_OPERAND_DSP_8_S24 :
1085 {
1086 long value = fields->f_dsp_8_s24;
1087 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
1088 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1089 }
1090 break;
1091 case M32C_OPERAND_DSP_8_S8 :
1092 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1093 break;
1094 case M32C_OPERAND_DSP_8_U16 :
1095 {
1096 long value = fields->f_dsp_8_u16;
1097 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1098 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1099 }
1100 break;
1101 case M32C_OPERAND_DSP_8_U24 :
1102 {
1103 long value = fields->f_dsp_8_u24;
1104 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1105 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1106 }
1107 break;
1108 case M32C_OPERAND_DSP_8_U6 :
1109 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1110 break;
1111 case M32C_OPERAND_DSP_8_U8 :
1112 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1113 break;
1114 case M32C_OPERAND_DST16AN :
1115 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1116 break;
1117 case M32C_OPERAND_DST16AN_S :
1118 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1119 break;
1120 case M32C_OPERAND_DST16ANHI :
1121 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1122 break;
1123 case M32C_OPERAND_DST16ANQI :
1124 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1125 break;
1126 case M32C_OPERAND_DST16ANQI_S :
1127 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1128 break;
1129 case M32C_OPERAND_DST16ANSI :
1130 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1131 break;
1132 case M32C_OPERAND_DST16RNEXTQI :
1133 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1134 break;
1135 case M32C_OPERAND_DST16RNHI :
1136 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1137 break;
1138 case M32C_OPERAND_DST16RNQI :
1139 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1140 break;
1141 case M32C_OPERAND_DST16RNQI_S :
1142 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1143 break;
1144 case M32C_OPERAND_DST16RNSI :
1145 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1146 break;
1147 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1148 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1149 break;
1150 case M32C_OPERAND_DST32ANPREFIXED :
1151 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1152 break;
1153 case M32C_OPERAND_DST32ANPREFIXEDHI :
1154 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1155 break;
1156 case M32C_OPERAND_DST32ANPREFIXEDQI :
1157 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1158 break;
1159 case M32C_OPERAND_DST32ANPREFIXEDSI :
1160 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1161 break;
1162 case M32C_OPERAND_DST32ANUNPREFIXED :
1163 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1164 break;
1165 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1166 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1167 break;
1168 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1169 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1170 break;
1171 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1172 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1173 break;
1174 case M32C_OPERAND_DST32R0HI_S :
1175 break;
1176 case M32C_OPERAND_DST32R0QI_S :
1177 break;
1178 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1179 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1180 break;
1181 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1182 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1183 break;
1184 case M32C_OPERAND_DST32RNPREFIXEDHI :
1185 {
1186 long value = fields->f_dst32_rn_prefixed_HI;
1187 value = ((((value) + (2))) % (4));
1188 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1189 }
1190 break;
1191 case M32C_OPERAND_DST32RNPREFIXEDQI :
1192 {
1193 long value = fields->f_dst32_rn_prefixed_QI;
1194 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1195 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1196 }
1197 break;
1198 case M32C_OPERAND_DST32RNPREFIXEDSI :
1199 {
1200 long value = fields->f_dst32_rn_prefixed_SI;
1201 value = ((value) + (2));
1202 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1203 }
1204 break;
1205 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1206 {
1207 long value = fields->f_dst32_rn_unprefixed_HI;
1208 value = ((((value) + (2))) % (4));
1209 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1210 }
1211 break;
1212 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1213 {
1214 long value = fields->f_dst32_rn_unprefixed_QI;
1215 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1216 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1217 }
1218 break;
1219 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1220 {
1221 long value = fields->f_dst32_rn_unprefixed_SI;
1222 value = ((value) + (2));
1223 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1224 }
1225 break;
1226 case M32C_OPERAND_G :
1227 break;
1228 case M32C_OPERAND_IMM_12_S4 :
1229 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1230 break;
1231 case M32C_OPERAND_IMM_12_S4N :
1232 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1233 break;
1234 case M32C_OPERAND_IMM_13_U3 :
1235 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1236 break;
1237 case M32C_OPERAND_IMM_16_HI :
1238 {
1239 long value = fields->f_dsp_16_s16;
1240 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1241 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1242 }
1243 break;
1244 case M32C_OPERAND_IMM_16_QI :
1245 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1246 break;
1247 case M32C_OPERAND_IMM_16_SI :
1248 {
1249 {
1250 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1251 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1252 }
1253 {
1254 long value = fields->f_dsp_16_u16;
1255 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1256 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1257 }
1258 if (errmsg)
1259 break;
1260 {
1261 long value = fields->f_dsp_32_u16;
1262 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1263 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1264 }
1265 if (errmsg)
1266 break;
1267 }
1268 break;
1269 case M32C_OPERAND_IMM_20_S4 :
1270 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1271 break;
1272 case M32C_OPERAND_IMM_24_HI :
1273 {
1274 {
1275 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1276 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1277 }
1278 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1279 if (errmsg)
1280 break;
1281 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1282 if (errmsg)
1283 break;
1284 }
1285 break;
1286 case M32C_OPERAND_IMM_24_QI :
1287 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1288 break;
1289 case M32C_OPERAND_IMM_24_SI :
1290 {
1291 {
1292 FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1293 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1294 }
1295 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1296 if (errmsg)
1297 break;
1298 {
1299 long value = fields->f_dsp_32_u24;
1300 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1301 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1302 }
1303 if (errmsg)
1304 break;
1305 }
1306 break;
1307 case M32C_OPERAND_IMM_32_HI :
1308 {
1309 long value = fields->f_dsp_32_s16;
1310 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1311 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1312 }
1313 break;
1314 case M32C_OPERAND_IMM_32_QI :
1315 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1316 break;
1317 case M32C_OPERAND_IMM_32_SI :
1318 {
1319 long value = fields->f_dsp_32_s32;
1320 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1321 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1322 }
1323 break;
1324 case M32C_OPERAND_IMM_40_HI :
1325 {
1326 long value = fields->f_dsp_40_s16;
1327 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1328 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1329 }
1330 break;
1331 case M32C_OPERAND_IMM_40_QI :
1332 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1333 break;
1334 case M32C_OPERAND_IMM_40_SI :
1335 {
1336 {
1337 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1338 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1339 }
1340 {
1341 long value = fields->f_dsp_40_u24;
1342 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1343 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1344 }
1345 if (errmsg)
1346 break;
1347 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1348 if (errmsg)
1349 break;
1350 }
1351 break;
1352 case M32C_OPERAND_IMM_48_HI :
1353 {
1354 long value = fields->f_dsp_48_s16;
1355 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1356 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1357 }
1358 break;
1359 case M32C_OPERAND_IMM_48_QI :
1360 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1361 break;
1362 case M32C_OPERAND_IMM_48_SI :
1363 {
1364 {
1365 FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1366 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1367 }
1368 {
1369 long value = fields->f_dsp_48_u16;
1370 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1371 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1372 }
1373 if (errmsg)
1374 break;
1375 {
1376 long value = fields->f_dsp_64_u16;
1377 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1378 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1379 }
1380 if (errmsg)
1381 break;
1382 }
1383 break;
1384 case M32C_OPERAND_IMM_56_HI :
1385 {
1386 {
1387 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1388 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1389 }
1390 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1391 if (errmsg)
1392 break;
1393 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1394 if (errmsg)
1395 break;
1396 }
1397 break;
1398 case M32C_OPERAND_IMM_56_QI :
1399 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1400 break;
1401 case M32C_OPERAND_IMM_64_HI :
1402 {
1403 long value = fields->f_dsp_64_s16;
1404 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1405 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1406 }
1407 break;
1408 case M32C_OPERAND_IMM_8_HI :
1409 {
1410 long value = fields->f_dsp_8_s16;
1411 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1412 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1413 }
1414 break;
1415 case M32C_OPERAND_IMM_8_QI :
1416 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1417 break;
1418 case M32C_OPERAND_IMM_8_S4 :
1419 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1420 break;
1421 case M32C_OPERAND_IMM_8_S4N :
1422 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1423 break;
1424 case M32C_OPERAND_IMM_SH_12_S4 :
1425 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1426 break;
1427 case M32C_OPERAND_IMM_SH_20_S4 :
1428 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1429 break;
1430 case M32C_OPERAND_IMM_SH_8_S4 :
1431 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1432 break;
1433 case M32C_OPERAND_IMM1_S :
1434 {
1435 long value = fields->f_imm1_S;
1436 value = ((value) - (1));
1437 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1438 }
1439 break;
1440 case M32C_OPERAND_IMM3_S :
1441 {
1442 {
1443 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1444 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1445 }
1446 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1447 if (errmsg)
1448 break;
1449 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1450 if (errmsg)
1451 break;
1452 }
1453 break;
1454 case M32C_OPERAND_LAB_16_8 :
1455 {
1456 long value = fields->f_lab_16_8;
1457 value = ((value) - (((pc) + (2))));
1458 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1459 }
1460 break;
1461 case M32C_OPERAND_LAB_24_8 :
1462 {
1463 long value = fields->f_lab_24_8;
1464 value = ((value) - (((pc) + (2))));
1465 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1466 }
1467 break;
1468 case M32C_OPERAND_LAB_32_8 :
1469 {
1470 long value = fields->f_lab_32_8;
1471 value = ((value) - (((pc) + (2))));
1472 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1473 }
1474 break;
1475 case M32C_OPERAND_LAB_40_8 :
1476 {
1477 long value = fields->f_lab_40_8;
1478 value = ((value) - (((pc) + (2))));
1479 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1480 }
1481 break;
1482 case M32C_OPERAND_LAB_5_3 :
1483 {
1484 long value = fields->f_lab_5_3;
1485 value = ((value) - (((pc) + (2))));
1486 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1487 }
1488 break;
1489 case M32C_OPERAND_LAB_8_16 :
1490 {
1491 long value = fields->f_lab_8_16;
1492 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1493 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1494 }
1495 break;
1496 case M32C_OPERAND_LAB_8_24 :
1497 {
1498 long value = fields->f_lab_8_24;
1499 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1500 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1501 }
1502 break;
1503 case M32C_OPERAND_LAB_8_8 :
1504 {
1505 long value = fields->f_lab_8_8;
1506 value = ((value) - (((pc) + (1))));
1507 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1508 }
1509 break;
1510 case M32C_OPERAND_LAB32_JMP_S :
1511 {
1512 {
1513 SI tmp_val;
1514 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1515 FLD (f_7_1) = ((tmp_val) & (1));
1516 FLD (f_2_2) = ((USI) (tmp_val) >> (1));
1517 }
1518 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1519 if (errmsg)
1520 break;
1521 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1522 if (errmsg)
1523 break;
1524 }
1525 break;
1526 case M32C_OPERAND_Q :
1527 break;
1528 case M32C_OPERAND_R0 :
1529 break;
1530 case M32C_OPERAND_R0H :
1531 break;
1532 case M32C_OPERAND_R0L :
1533 break;
1534 case M32C_OPERAND_R1 :
1535 break;
1536 case M32C_OPERAND_R1R2R0 :
1537 break;
1538 case M32C_OPERAND_R2 :
1539 break;
1540 case M32C_OPERAND_R2R0 :
1541 break;
1542 case M32C_OPERAND_R3 :
1543 break;
1544 case M32C_OPERAND_R3R1 :
1545 break;
1546 case M32C_OPERAND_REGSETPOP :
1547 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1548 break;
1549 case M32C_OPERAND_REGSETPUSH :
1550 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1551 break;
1552 case M32C_OPERAND_RN16_PUSH_S :
1553 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1554 break;
1555 case M32C_OPERAND_S :
1556 break;
1557 case M32C_OPERAND_SRC16AN :
1558 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1559 break;
1560 case M32C_OPERAND_SRC16ANHI :
1561 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1562 break;
1563 case M32C_OPERAND_SRC16ANQI :
1564 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1565 break;
1566 case M32C_OPERAND_SRC16RNHI :
1567 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1568 break;
1569 case M32C_OPERAND_SRC16RNQI :
1570 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1571 break;
1572 case M32C_OPERAND_SRC32ANPREFIXED :
1573 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1574 break;
1575 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1576 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1577 break;
1578 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1579 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1580 break;
1581 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1582 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1583 break;
1584 case M32C_OPERAND_SRC32ANUNPREFIXED :
1585 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1586 break;
1587 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1588 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1589 break;
1590 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1591 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1592 break;
1593 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1594 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1595 break;
1596 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1597 {
1598 long value = fields->f_src32_rn_prefixed_HI;
1599 value = ((((value) + (2))) % (4));
1600 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1601 }
1602 break;
1603 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1604 {
1605 long value = fields->f_src32_rn_prefixed_QI;
1606 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1607 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1608 }
1609 break;
1610 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1611 {
1612 long value = fields->f_src32_rn_prefixed_SI;
1613 value = ((value) + (2));
1614 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1615 }
1616 break;
1617 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1618 {
1619 long value = fields->f_src32_rn_unprefixed_HI;
1620 value = ((((value) + (2))) % (4));
1621 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1622 }
1623 break;
1624 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1625 {
1626 long value = fields->f_src32_rn_unprefixed_QI;
1627 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1628 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1629 }
1630 break;
1631 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1632 {
1633 long value = fields->f_src32_rn_unprefixed_SI;
1634 value = ((value) + (2));
1635 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1636 }
1637 break;
1638 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1639 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1640 break;
1641 case M32C_OPERAND_X :
1642 break;
1643 case M32C_OPERAND_Z :
1644 break;
1645 case M32C_OPERAND_COND16_16 :
1646 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1647 break;
1648 case M32C_OPERAND_COND16_24 :
1649 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1650 break;
1651 case M32C_OPERAND_COND16_32 :
1652 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1653 break;
1654 case M32C_OPERAND_COND16C :
1655 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1656 break;
1657 case M32C_OPERAND_COND16J :
1658 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1659 break;
1660 case M32C_OPERAND_COND16J5 :
1661 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1662 break;
1663 case M32C_OPERAND_COND32 :
1664 {
1665 {
1666 FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1));
1667 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1668 }
1669 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1670 if (errmsg)
1671 break;
1672 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1673 if (errmsg)
1674 break;
1675 }
1676 break;
1677 case M32C_OPERAND_COND32_16 :
1678 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1679 break;
1680 case M32C_OPERAND_COND32_24 :
1681 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1682 break;
1683 case M32C_OPERAND_COND32_32 :
1684 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1685 break;
1686 case M32C_OPERAND_COND32_40 :
1687 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1688 break;
1689 case M32C_OPERAND_COND32J :
1690 {
1691 {
1692 FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7));
1693 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1694 }
1695 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1696 if (errmsg)
1697 break;
1698 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1699 if (errmsg)
1700 break;
1701 }
1702 break;
1703 case M32C_OPERAND_CR1_PREFIXED_32 :
1704 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1705 break;
1706 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1707 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1708 break;
1709 case M32C_OPERAND_CR16 :
1710 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1711 break;
1712 case M32C_OPERAND_CR2_32 :
1713 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1714 break;
1715 case M32C_OPERAND_CR3_PREFIXED_32 :
1716 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1717 break;
1718 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1719 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1720 break;
1721 case M32C_OPERAND_FLAGS16 :
1722 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1723 break;
1724 case M32C_OPERAND_FLAGS32 :
1725 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1726 break;
1727 case M32C_OPERAND_SCCOND32 :
1728 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1729 break;
1730 case M32C_OPERAND_SIZE :
1731 break;
1732
1733 default :
1734 /* xgettext:c-format */
1735 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1736 opindex);
1737 abort ();
1738 }
1739
1740 return errmsg;
1741 }
1742
1743 int m32c_cgen_extract_operand
1744 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1745
1746 /* Main entry point for operand extraction.
1747 The result is <= 0 for error, >0 for success.
1748 ??? Actual values aren't well defined right now.
1749
1750 This function is basically just a big switch statement. Earlier versions
1751 used tables to look up the function to use, but
1752 - if the table contains both assembler and disassembler functions then
1753 the disassembler contains much of the assembler and vice-versa,
1754 - there's a lot of inlining possibilities as things grow,
1755 - using a switch statement avoids the function call overhead.
1756
1757 This function could be moved into `print_insn_normal', but keeping it
1758 separate makes clear the interface between `print_insn_normal' and each of
1759 the handlers. */
1760
1761 int
1762 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1763 int opindex,
1764 CGEN_EXTRACT_INFO *ex_info,
1765 CGEN_INSN_INT insn_value,
1766 CGEN_FIELDS * fields,
1767 bfd_vma pc)
1768 {
1769 /* Assume success (for those operands that are nops). */
1770 int length = 1;
1771 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1772
1773 switch (opindex)
1774 {
1775 case M32C_OPERAND_A0 :
1776 break;
1777 case M32C_OPERAND_A1 :
1778 break;
1779 case M32C_OPERAND_AN16_PUSH_S :
1780 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1781 break;
1782 case M32C_OPERAND_BIT16AN :
1783 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1784 break;
1785 case M32C_OPERAND_BIT16RN :
1786 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1787 break;
1788 case M32C_OPERAND_BIT3_S :
1789 {
1790 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
1791 if (length <= 0) break;
1792 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
1793 if (length <= 0) break;
1794 {
1795 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
1796 }
1797 }
1798 break;
1799 case M32C_OPERAND_BIT32ANPREFIXED :
1800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1801 break;
1802 case M32C_OPERAND_BIT32ANUNPREFIXED :
1803 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1804 break;
1805 case M32C_OPERAND_BIT32RNPREFIXED :
1806 {
1807 long value;
1808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1809 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1810 fields->f_dst32_rn_prefixed_QI = value;
1811 }
1812 break;
1813 case M32C_OPERAND_BIT32RNUNPREFIXED :
1814 {
1815 long value;
1816 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1817 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1818 fields->f_dst32_rn_unprefixed_QI = value;
1819 }
1820 break;
1821 case M32C_OPERAND_BITBASE16_16_S8 :
1822 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1823 break;
1824 case M32C_OPERAND_BITBASE16_16_U16 :
1825 {
1826 long value;
1827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1828 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1829 fields->f_dsp_16_u16 = value;
1830 }
1831 break;
1832 case M32C_OPERAND_BITBASE16_16_U8 :
1833 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1834 break;
1835 case M32C_OPERAND_BITBASE16_8_U11_S :
1836 {
1837 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1838 if (length <= 0) break;
1839 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1840 if (length <= 0) break;
1841 {
1842 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1843 }
1844 }
1845 break;
1846 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1847 {
1848 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1849 if (length <= 0) break;
1850 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1851 if (length <= 0) break;
1852 {
1853 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1854 }
1855 }
1856 break;
1857 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1858 {
1859 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1860 if (length <= 0) break;
1861 {
1862 long value;
1863 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1864 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1865 fields->f_dsp_16_s16 = value;
1866 }
1867 if (length <= 0) break;
1868 {
1869 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1870 }
1871 }
1872 break;
1873 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1874 {
1875 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1876 if (length <= 0) break;
1877 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1878 if (length <= 0) break;
1879 {
1880 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1881 }
1882 }
1883 break;
1884 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1885 {
1886 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1887 if (length <= 0) break;
1888 {
1889 long value;
1890 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1891 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1892 fields->f_dsp_16_u16 = value;
1893 }
1894 if (length <= 0) break;
1895 {
1896 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1897 }
1898 }
1899 break;
1900 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1901 {
1902 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1903 if (length <= 0) break;
1904 {
1905 long value;
1906 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1907 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1908 fields->f_dsp_16_u16 = value;
1909 }
1910 if (length <= 0) break;
1911 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1912 if (length <= 0) break;
1913 {
1914 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1915 }
1916 }
1917 break;
1918 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1919 {
1920 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1921 if (length <= 0) break;
1922 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1923 if (length <= 0) break;
1924 {
1925 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1926 }
1927 }
1928 break;
1929 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1930 {
1931 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1932 if (length <= 0) break;
1933 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1934 if (length <= 0) break;
1935 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1936 if (length <= 0) break;
1937 {
1938 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1939 }
1940 }
1941 break;
1942 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1943 {
1944 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1945 if (length <= 0) break;
1946 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1947 if (length <= 0) break;
1948 {
1949 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1950 }
1951 }
1952 break;
1953 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1954 {
1955 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1956 if (length <= 0) break;
1957 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1958 if (length <= 0) break;
1959 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1960 if (length <= 0) break;
1961 {
1962 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1963 }
1964 }
1965 break;
1966 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1967 {
1968 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1969 if (length <= 0) break;
1970 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1971 if (length <= 0) break;
1972 {
1973 long value;
1974 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1975 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1976 fields->f_dsp_32_u16 = value;
1977 }
1978 if (length <= 0) break;
1979 {
1980 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1981 }
1982 }
1983 break;
1984 case M32C_OPERAND_BITNO16R :
1985 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1986 break;
1987 case M32C_OPERAND_BITNO32PREFIXED :
1988 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1989 break;
1990 case M32C_OPERAND_BITNO32UNPREFIXED :
1991 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1992 break;
1993 case M32C_OPERAND_DSP_10_U6 :
1994 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1995 break;
1996 case M32C_OPERAND_DSP_16_S16 :
1997 {
1998 long value;
1999 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2000 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2001 fields->f_dsp_16_s16 = value;
2002 }
2003 break;
2004 case M32C_OPERAND_DSP_16_S8 :
2005 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2006 break;
2007 case M32C_OPERAND_DSP_16_U16 :
2008 {
2009 long value;
2010 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2011 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2012 fields->f_dsp_16_u16 = value;
2013 }
2014 break;
2015 case M32C_OPERAND_DSP_16_U20 :
2016 {
2017 {
2018 long value;
2019 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2020 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2021 fields->f_dsp_16_u16 = value;
2022 }
2023 if (length <= 0) break;
2024 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2025 if (length <= 0) break;
2026 {
2027 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2028 }
2029 }
2030 break;
2031 case M32C_OPERAND_DSP_16_U24 :
2032 {
2033 {
2034 long value;
2035 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2036 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2037 fields->f_dsp_16_u16 = value;
2038 }
2039 if (length <= 0) break;
2040 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2041 if (length <= 0) break;
2042 {
2043 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2044 }
2045 }
2046 break;
2047 case M32C_OPERAND_DSP_16_U8 :
2048 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2049 break;
2050 case M32C_OPERAND_DSP_24_S16 :
2051 {
2052 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2053 if (length <= 0) break;
2054 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2055 if (length <= 0) break;
2056 {
2057 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2058 }
2059 }
2060 break;
2061 case M32C_OPERAND_DSP_24_S8 :
2062 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2063 break;
2064 case M32C_OPERAND_DSP_24_U16 :
2065 {
2066 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2067 if (length <= 0) break;
2068 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2069 if (length <= 0) break;
2070 {
2071 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2072 }
2073 }
2074 break;
2075 case M32C_OPERAND_DSP_24_U20 :
2076 {
2077 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2078 if (length <= 0) break;
2079 {
2080 long value;
2081 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2082 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2083 fields->f_dsp_32_u16 = value;
2084 }
2085 if (length <= 0) break;
2086 {
2087 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2088 }
2089 }
2090 break;
2091 case M32C_OPERAND_DSP_24_U24 :
2092 {
2093 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2094 if (length <= 0) break;
2095 {
2096 long value;
2097 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2098 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2099 fields->f_dsp_32_u16 = value;
2100 }
2101 if (length <= 0) break;
2102 {
2103 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2104 }
2105 }
2106 break;
2107 case M32C_OPERAND_DSP_24_U8 :
2108 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2109 break;
2110 case M32C_OPERAND_DSP_32_S16 :
2111 {
2112 long value;
2113 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2114 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2115 fields->f_dsp_32_s16 = value;
2116 }
2117 break;
2118 case M32C_OPERAND_DSP_32_S8 :
2119 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2120 break;
2121 case M32C_OPERAND_DSP_32_U16 :
2122 {
2123 long value;
2124 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2125 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2126 fields->f_dsp_32_u16 = value;
2127 }
2128 break;
2129 case M32C_OPERAND_DSP_32_U20 :
2130 {
2131 long value;
2132 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2133 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2134 fields->f_dsp_32_u24 = value;
2135 }
2136 break;
2137 case M32C_OPERAND_DSP_32_U24 :
2138 {
2139 long value;
2140 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2141 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2142 fields->f_dsp_32_u24 = value;
2143 }
2144 break;
2145 case M32C_OPERAND_DSP_32_U8 :
2146 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2147 break;
2148 case M32C_OPERAND_DSP_40_S16 :
2149 {
2150 long value;
2151 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2152 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2153 fields->f_dsp_40_s16 = value;
2154 }
2155 break;
2156 case M32C_OPERAND_DSP_40_S8 :
2157 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2158 break;
2159 case M32C_OPERAND_DSP_40_U16 :
2160 {
2161 long value;
2162 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2163 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2164 fields->f_dsp_40_u16 = value;
2165 }
2166 break;
2167 case M32C_OPERAND_DSP_40_U20 :
2168 {
2169 long value;
2170 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
2171 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
2172 fields->f_dsp_40_u20 = value;
2173 }
2174 break;
2175 case M32C_OPERAND_DSP_40_U24 :
2176 {
2177 long value;
2178 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2179 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2180 fields->f_dsp_40_u24 = value;
2181 }
2182 break;
2183 case M32C_OPERAND_DSP_40_U8 :
2184 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2185 break;
2186 case M32C_OPERAND_DSP_48_S16 :
2187 {
2188 long value;
2189 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2190 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2191 fields->f_dsp_48_s16 = value;
2192 }
2193 break;
2194 case M32C_OPERAND_DSP_48_S8 :
2195 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2196 break;
2197 case M32C_OPERAND_DSP_48_U16 :
2198 {
2199 long value;
2200 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2201 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2202 fields->f_dsp_48_u16 = value;
2203 }
2204 break;
2205 case M32C_OPERAND_DSP_48_U20 :
2206 {
2207 {
2208 long value;
2209 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2210 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2211 fields->f_dsp_48_u16 = value;
2212 }
2213 if (length <= 0) break;
2214 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2215 if (length <= 0) break;
2216 {
2217 FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040))));
2218 }
2219 }
2220 break;
2221 case M32C_OPERAND_DSP_48_U24 :
2222 {
2223 {
2224 long value;
2225 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2226 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2227 fields->f_dsp_48_u16 = value;
2228 }
2229 if (length <= 0) break;
2230 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2231 if (length <= 0) break;
2232 {
2233 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2234 }
2235 }
2236 break;
2237 case M32C_OPERAND_DSP_48_U8 :
2238 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2239 break;
2240 case M32C_OPERAND_DSP_8_S24 :
2241 {
2242 long value;
2243 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2244 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
2245 fields->f_dsp_8_s24 = value;
2246 }
2247 break;
2248 case M32C_OPERAND_DSP_8_S8 :
2249 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2250 break;
2251 case M32C_OPERAND_DSP_8_U16 :
2252 {
2253 long value;
2254 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2255 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2256 fields->f_dsp_8_u16 = value;
2257 }
2258 break;
2259 case M32C_OPERAND_DSP_8_U24 :
2260 {
2261 long value;
2262 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2263 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2264 fields->f_dsp_8_u24 = value;
2265 }
2266 break;
2267 case M32C_OPERAND_DSP_8_U6 :
2268 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2269 break;
2270 case M32C_OPERAND_DSP_8_U8 :
2271 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2272 break;
2273 case M32C_OPERAND_DST16AN :
2274 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2275 break;
2276 case M32C_OPERAND_DST16AN_S :
2277 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2278 break;
2279 case M32C_OPERAND_DST16ANHI :
2280 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2281 break;
2282 case M32C_OPERAND_DST16ANQI :
2283 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2284 break;
2285 case M32C_OPERAND_DST16ANQI_S :
2286 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2287 break;
2288 case M32C_OPERAND_DST16ANSI :
2289 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2290 break;
2291 case M32C_OPERAND_DST16RNEXTQI :
2292 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2293 break;
2294 case M32C_OPERAND_DST16RNHI :
2295 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2296 break;
2297 case M32C_OPERAND_DST16RNQI :
2298 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2299 break;
2300 case M32C_OPERAND_DST16RNQI_S :
2301 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2302 break;
2303 case M32C_OPERAND_DST16RNSI :
2304 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2305 break;
2306 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2307 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2308 break;
2309 case M32C_OPERAND_DST32ANPREFIXED :
2310 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2311 break;
2312 case M32C_OPERAND_DST32ANPREFIXEDHI :
2313 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2314 break;
2315 case M32C_OPERAND_DST32ANPREFIXEDQI :
2316 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2317 break;
2318 case M32C_OPERAND_DST32ANPREFIXEDSI :
2319 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2320 break;
2321 case M32C_OPERAND_DST32ANUNPREFIXED :
2322 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2323 break;
2324 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2325 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2326 break;
2327 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2328 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2329 break;
2330 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2331 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2332 break;
2333 case M32C_OPERAND_DST32R0HI_S :
2334 break;
2335 case M32C_OPERAND_DST32R0QI_S :
2336 break;
2337 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2338 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2339 break;
2340 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2341 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2342 break;
2343 case M32C_OPERAND_DST32RNPREFIXEDHI :
2344 {
2345 long value;
2346 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2347 value = ((((value) + (2))) % (4));
2348 fields->f_dst32_rn_prefixed_HI = value;
2349 }
2350 break;
2351 case M32C_OPERAND_DST32RNPREFIXEDQI :
2352 {
2353 long value;
2354 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2355 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2356 fields->f_dst32_rn_prefixed_QI = value;
2357 }
2358 break;
2359 case M32C_OPERAND_DST32RNPREFIXEDSI :
2360 {
2361 long value;
2362 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2363 value = ((value) - (2));
2364 fields->f_dst32_rn_prefixed_SI = value;
2365 }
2366 break;
2367 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2368 {
2369 long value;
2370 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2371 value = ((((value) + (2))) % (4));
2372 fields->f_dst32_rn_unprefixed_HI = value;
2373 }
2374 break;
2375 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2376 {
2377 long value;
2378 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2379 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2380 fields->f_dst32_rn_unprefixed_QI = value;
2381 }
2382 break;
2383 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2384 {
2385 long value;
2386 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2387 value = ((value) - (2));
2388 fields->f_dst32_rn_unprefixed_SI = value;
2389 }
2390 break;
2391 case M32C_OPERAND_G :
2392 break;
2393 case M32C_OPERAND_IMM_12_S4 :
2394 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2395 break;
2396 case M32C_OPERAND_IMM_12_S4N :
2397 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2398 break;
2399 case M32C_OPERAND_IMM_13_U3 :
2400 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2401 break;
2402 case M32C_OPERAND_IMM_16_HI :
2403 {
2404 long value;
2405 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2406 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2407 fields->f_dsp_16_s16 = value;
2408 }
2409 break;
2410 case M32C_OPERAND_IMM_16_QI :
2411 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2412 break;
2413 case M32C_OPERAND_IMM_16_SI :
2414 {
2415 {
2416 long value;
2417 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2418 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2419 fields->f_dsp_16_u16 = value;
2420 }
2421 if (length <= 0) break;
2422 {
2423 long value;
2424 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2425 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2426 fields->f_dsp_32_u16 = value;
2427 }
2428 if (length <= 0) break;
2429 {
2430 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2431 }
2432 }
2433 break;
2434 case M32C_OPERAND_IMM_20_S4 :
2435 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2436 break;
2437 case M32C_OPERAND_IMM_24_HI :
2438 {
2439 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2440 if (length <= 0) break;
2441 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2442 if (length <= 0) break;
2443 {
2444 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2445 }
2446 }
2447 break;
2448 case M32C_OPERAND_IMM_24_QI :
2449 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2450 break;
2451 case M32C_OPERAND_IMM_24_SI :
2452 {
2453 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2454 if (length <= 0) break;
2455 {
2456 long value;
2457 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2458 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2459 fields->f_dsp_32_u24 = value;
2460 }
2461 if (length <= 0) break;
2462 {
2463 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2464 }
2465 }
2466 break;
2467 case M32C_OPERAND_IMM_32_HI :
2468 {
2469 long value;
2470 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2471 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2472 fields->f_dsp_32_s16 = value;
2473 }
2474 break;
2475 case M32C_OPERAND_IMM_32_QI :
2476 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2477 break;
2478 case M32C_OPERAND_IMM_32_SI :
2479 {
2480 long value;
2481 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2482 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2483 fields->f_dsp_32_s32 = value;
2484 }
2485 break;
2486 case M32C_OPERAND_IMM_40_HI :
2487 {
2488 long value;
2489 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2490 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2491 fields->f_dsp_40_s16 = value;
2492 }
2493 break;
2494 case M32C_OPERAND_IMM_40_QI :
2495 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2496 break;
2497 case M32C_OPERAND_IMM_40_SI :
2498 {
2499 {
2500 long value;
2501 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2502 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2503 fields->f_dsp_40_u24 = value;
2504 }
2505 if (length <= 0) break;
2506 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2507 if (length <= 0) break;
2508 {
2509 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2510 }
2511 }
2512 break;
2513 case M32C_OPERAND_IMM_48_HI :
2514 {
2515 long value;
2516 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2517 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2518 fields->f_dsp_48_s16 = value;
2519 }
2520 break;
2521 case M32C_OPERAND_IMM_48_QI :
2522 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2523 break;
2524 case M32C_OPERAND_IMM_48_SI :
2525 {
2526 {
2527 long value;
2528 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2529 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2530 fields->f_dsp_48_u16 = value;
2531 }
2532 if (length <= 0) break;
2533 {
2534 long value;
2535 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2536 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2537 fields->f_dsp_64_u16 = value;
2538 }
2539 if (length <= 0) break;
2540 {
2541 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2542 }
2543 }
2544 break;
2545 case M32C_OPERAND_IMM_56_HI :
2546 {
2547 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2548 if (length <= 0) break;
2549 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2550 if (length <= 0) break;
2551 {
2552 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2553 }
2554 }
2555 break;
2556 case M32C_OPERAND_IMM_56_QI :
2557 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2558 break;
2559 case M32C_OPERAND_IMM_64_HI :
2560 {
2561 long value;
2562 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2563 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2564 fields->f_dsp_64_s16 = value;
2565 }
2566 break;
2567 case M32C_OPERAND_IMM_8_HI :
2568 {
2569 long value;
2570 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2571 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2572 fields->f_dsp_8_s16 = value;
2573 }
2574 break;
2575 case M32C_OPERAND_IMM_8_QI :
2576 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2577 break;
2578 case M32C_OPERAND_IMM_8_S4 :
2579 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2580 break;
2581 case M32C_OPERAND_IMM_8_S4N :
2582 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2583 break;
2584 case M32C_OPERAND_IMM_SH_12_S4 :
2585 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2586 break;
2587 case M32C_OPERAND_IMM_SH_20_S4 :
2588 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2589 break;
2590 case M32C_OPERAND_IMM_SH_8_S4 :
2591 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2592 break;
2593 case M32C_OPERAND_IMM1_S :
2594 {
2595 long value;
2596 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2597 value = ((value) + (1));
2598 fields->f_imm1_S = value;
2599 }
2600 break;
2601 case M32C_OPERAND_IMM3_S :
2602 {
2603 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2604 if (length <= 0) break;
2605 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2606 if (length <= 0) break;
2607 {
2608 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2609 }
2610 }
2611 break;
2612 case M32C_OPERAND_LAB_16_8 :
2613 {
2614 long value;
2615 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2616 value = ((value) + (((pc) + (2))));
2617 fields->f_lab_16_8 = value;
2618 }
2619 break;
2620 case M32C_OPERAND_LAB_24_8 :
2621 {
2622 long value;
2623 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2624 value = ((value) + (((pc) + (2))));
2625 fields->f_lab_24_8 = value;
2626 }
2627 break;
2628 case M32C_OPERAND_LAB_32_8 :
2629 {
2630 long value;
2631 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2632 value = ((value) + (((pc) + (2))));
2633 fields->f_lab_32_8 = value;
2634 }
2635 break;
2636 case M32C_OPERAND_LAB_40_8 :
2637 {
2638 long value;
2639 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2640 value = ((value) + (((pc) + (2))));
2641 fields->f_lab_40_8 = value;
2642 }
2643 break;
2644 case M32C_OPERAND_LAB_5_3 :
2645 {
2646 long value;
2647 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2648 value = ((value) + (((pc) + (2))));
2649 fields->f_lab_5_3 = value;
2650 }
2651 break;
2652 case M32C_OPERAND_LAB_8_16 :
2653 {
2654 long value;
2655 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2656 value = ((((((USI) (((value) & (65535))) >> (8))) | (((SI) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2657 fields->f_lab_8_16 = value;
2658 }
2659 break;
2660 case M32C_OPERAND_LAB_8_24 :
2661 {
2662 long value;
2663 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2664 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2665 fields->f_lab_8_24 = value;
2666 }
2667 break;
2668 case M32C_OPERAND_LAB_8_8 :
2669 {
2670 long value;
2671 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2672 value = ((value) + (((pc) + (1))));
2673 fields->f_lab_8_8 = value;
2674 }
2675 break;
2676 case M32C_OPERAND_LAB32_JMP_S :
2677 {
2678 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2679 if (length <= 0) break;
2680 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2681 if (length <= 0) break;
2682 {
2683 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2684 }
2685 }
2686 break;
2687 case M32C_OPERAND_Q :
2688 break;
2689 case M32C_OPERAND_R0 :
2690 break;
2691 case M32C_OPERAND_R0H :
2692 break;
2693 case M32C_OPERAND_R0L :
2694 break;
2695 case M32C_OPERAND_R1 :
2696 break;
2697 case M32C_OPERAND_R1R2R0 :
2698 break;
2699 case M32C_OPERAND_R2 :
2700 break;
2701 case M32C_OPERAND_R2R0 :
2702 break;
2703 case M32C_OPERAND_R3 :
2704 break;
2705 case M32C_OPERAND_R3R1 :
2706 break;
2707 case M32C_OPERAND_REGSETPOP :
2708 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2709 break;
2710 case M32C_OPERAND_REGSETPUSH :
2711 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2712 break;
2713 case M32C_OPERAND_RN16_PUSH_S :
2714 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2715 break;
2716 case M32C_OPERAND_S :
2717 break;
2718 case M32C_OPERAND_SRC16AN :
2719 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2720 break;
2721 case M32C_OPERAND_SRC16ANHI :
2722 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2723 break;
2724 case M32C_OPERAND_SRC16ANQI :
2725 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2726 break;
2727 case M32C_OPERAND_SRC16RNHI :
2728 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2729 break;
2730 case M32C_OPERAND_SRC16RNQI :
2731 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2732 break;
2733 case M32C_OPERAND_SRC32ANPREFIXED :
2734 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2735 break;
2736 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2737 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2738 break;
2739 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2740 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2741 break;
2742 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2743 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2744 break;
2745 case M32C_OPERAND_SRC32ANUNPREFIXED :
2746 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2747 break;
2748 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2749 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2750 break;
2751 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2752 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2753 break;
2754 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2755 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2756 break;
2757 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2758 {
2759 long value;
2760 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2761 value = ((((value) + (2))) % (4));
2762 fields->f_src32_rn_prefixed_HI = value;
2763 }
2764 break;
2765 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2766 {
2767 long value;
2768 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2769 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2770 fields->f_src32_rn_prefixed_QI = value;
2771 }
2772 break;
2773 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2774 {
2775 long value;
2776 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2777 value = ((value) - (2));
2778 fields->f_src32_rn_prefixed_SI = value;
2779 }
2780 break;
2781 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2782 {
2783 long value;
2784 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2785 value = ((((value) + (2))) % (4));
2786 fields->f_src32_rn_unprefixed_HI = value;
2787 }
2788 break;
2789 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2790 {
2791 long value;
2792 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2793 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2794 fields->f_src32_rn_unprefixed_QI = value;
2795 }
2796 break;
2797 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2798 {
2799 long value;
2800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2801 value = ((value) - (2));
2802 fields->f_src32_rn_unprefixed_SI = value;
2803 }
2804 break;
2805 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2806 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2807 break;
2808 case M32C_OPERAND_X :
2809 break;
2810 case M32C_OPERAND_Z :
2811 break;
2812 case M32C_OPERAND_COND16_16 :
2813 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2814 break;
2815 case M32C_OPERAND_COND16_24 :
2816 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2817 break;
2818 case M32C_OPERAND_COND16_32 :
2819 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2820 break;
2821 case M32C_OPERAND_COND16C :
2822 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2823 break;
2824 case M32C_OPERAND_COND16J :
2825 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2826 break;
2827 case M32C_OPERAND_COND16J5 :
2828 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2829 break;
2830 case M32C_OPERAND_COND32 :
2831 {
2832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2833 if (length <= 0) break;
2834 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2835 if (length <= 0) break;
2836 {
2837 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2838 }
2839 }
2840 break;
2841 case M32C_OPERAND_COND32_16 :
2842 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2843 break;
2844 case M32C_OPERAND_COND32_24 :
2845 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2846 break;
2847 case M32C_OPERAND_COND32_32 :
2848 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2849 break;
2850 case M32C_OPERAND_COND32_40 :
2851 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2852 break;
2853 case M32C_OPERAND_COND32J :
2854 {
2855 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2856 if (length <= 0) break;
2857 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2858 if (length <= 0) break;
2859 {
2860 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2861 }
2862 }
2863 break;
2864 case M32C_OPERAND_CR1_PREFIXED_32 :
2865 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2866 break;
2867 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2868 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2869 break;
2870 case M32C_OPERAND_CR16 :
2871 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2872 break;
2873 case M32C_OPERAND_CR2_32 :
2874 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2875 break;
2876 case M32C_OPERAND_CR3_PREFIXED_32 :
2877 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2878 break;
2879 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2880 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2881 break;
2882 case M32C_OPERAND_FLAGS16 :
2883 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2884 break;
2885 case M32C_OPERAND_FLAGS32 :
2886 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2887 break;
2888 case M32C_OPERAND_SCCOND32 :
2889 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2890 break;
2891 case M32C_OPERAND_SIZE :
2892 break;
2893
2894 default :
2895 /* xgettext:c-format */
2896 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2897 opindex);
2898 abort ();
2899 }
2900
2901 return length;
2902 }
2903
2904 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2905 {
2906 insert_insn_normal,
2907 };
2908
2909 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2910 {
2911 extract_insn_normal,
2912 };
2913
2914 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2915 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2916
2917 /* Getting values from cgen_fields is handled by a collection of functions.
2918 They are distinguished by the type of the VALUE argument they return.
2919 TODO: floating point, inlining support, remove cases where result type
2920 not appropriate. */
2921
2922 int
2923 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2924 int opindex,
2925 const CGEN_FIELDS * fields)
2926 {
2927 int value;
2928
2929 switch (opindex)
2930 {
2931 case M32C_OPERAND_A0 :
2932 value = 0;
2933 break;
2934 case M32C_OPERAND_A1 :
2935 value = 0;
2936 break;
2937 case M32C_OPERAND_AN16_PUSH_S :
2938 value = fields->f_4_1;
2939 break;
2940 case M32C_OPERAND_BIT16AN :
2941 value = fields->f_dst16_an;
2942 break;
2943 case M32C_OPERAND_BIT16RN :
2944 value = fields->f_dst16_rn;
2945 break;
2946 case M32C_OPERAND_BIT3_S :
2947 value = fields->f_imm3_S;
2948 break;
2949 case M32C_OPERAND_BIT32ANPREFIXED :
2950 value = fields->f_dst32_an_prefixed;
2951 break;
2952 case M32C_OPERAND_BIT32ANUNPREFIXED :
2953 value = fields->f_dst32_an_unprefixed;
2954 break;
2955 case M32C_OPERAND_BIT32RNPREFIXED :
2956 value = fields->f_dst32_rn_prefixed_QI;
2957 break;
2958 case M32C_OPERAND_BIT32RNUNPREFIXED :
2959 value = fields->f_dst32_rn_unprefixed_QI;
2960 break;
2961 case M32C_OPERAND_BITBASE16_16_S8 :
2962 value = fields->f_dsp_16_s8;
2963 break;
2964 case M32C_OPERAND_BITBASE16_16_U16 :
2965 value = fields->f_dsp_16_u16;
2966 break;
2967 case M32C_OPERAND_BITBASE16_16_U8 :
2968 value = fields->f_dsp_16_u8;
2969 break;
2970 case M32C_OPERAND_BITBASE16_8_U11_S :
2971 value = fields->f_bitbase16_u11_S;
2972 break;
2973 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2974 value = fields->f_bitbase32_16_s11_unprefixed;
2975 break;
2976 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2977 value = fields->f_bitbase32_16_s19_unprefixed;
2978 break;
2979 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2980 value = fields->f_bitbase32_16_u11_unprefixed;
2981 break;
2982 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2983 value = fields->f_bitbase32_16_u19_unprefixed;
2984 break;
2985 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2986 value = fields->f_bitbase32_16_u27_unprefixed;
2987 break;
2988 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2989 value = fields->f_bitbase32_24_s11_prefixed;
2990 break;
2991 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2992 value = fields->f_bitbase32_24_s19_prefixed;
2993 break;
2994 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2995 value = fields->f_bitbase32_24_u11_prefixed;
2996 break;
2997 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2998 value = fields->f_bitbase32_24_u19_prefixed;
2999 break;
3000 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3001 value = fields->f_bitbase32_24_u27_prefixed;
3002 break;
3003 case M32C_OPERAND_BITNO16R :
3004 value = fields->f_dsp_16_u8;
3005 break;
3006 case M32C_OPERAND_BITNO32PREFIXED :
3007 value = fields->f_bitno32_prefixed;
3008 break;
3009 case M32C_OPERAND_BITNO32UNPREFIXED :
3010 value = fields->f_bitno32_unprefixed;
3011 break;
3012 case M32C_OPERAND_DSP_10_U6 :
3013 value = fields->f_dsp_10_u6;
3014 break;
3015 case M32C_OPERAND_DSP_16_S16 :
3016 value = fields->f_dsp_16_s16;
3017 break;
3018 case M32C_OPERAND_DSP_16_S8 :
3019 value = fields->f_dsp_16_s8;
3020 break;
3021 case M32C_OPERAND_DSP_16_U16 :
3022 value = fields->f_dsp_16_u16;
3023 break;
3024 case M32C_OPERAND_DSP_16_U20 :
3025 value = fields->f_dsp_16_u24;
3026 break;
3027 case M32C_OPERAND_DSP_16_U24 :
3028 value = fields->f_dsp_16_u24;
3029 break;
3030 case M32C_OPERAND_DSP_16_U8 :
3031 value = fields->f_dsp_16_u8;
3032 break;
3033 case M32C_OPERAND_DSP_24_S16 :
3034 value = fields->f_dsp_24_s16;
3035 break;
3036 case M32C_OPERAND_DSP_24_S8 :
3037 value = fields->f_dsp_24_s8;
3038 break;
3039 case M32C_OPERAND_DSP_24_U16 :
3040 value = fields->f_dsp_24_u16;
3041 break;
3042 case M32C_OPERAND_DSP_24_U20 :
3043 value = fields->f_dsp_24_u24;
3044 break;
3045 case M32C_OPERAND_DSP_24_U24 :
3046 value = fields->f_dsp_24_u24;
3047 break;
3048 case M32C_OPERAND_DSP_24_U8 :
3049 value = fields->f_dsp_24_u8;
3050 break;
3051 case M32C_OPERAND_DSP_32_S16 :
3052 value = fields->f_dsp_32_s16;
3053 break;
3054 case M32C_OPERAND_DSP_32_S8 :
3055 value = fields->f_dsp_32_s8;
3056 break;
3057 case M32C_OPERAND_DSP_32_U16 :
3058 value = fields->f_dsp_32_u16;
3059 break;
3060 case M32C_OPERAND_DSP_32_U20 :
3061 value = fields->f_dsp_32_u24;
3062 break;
3063 case M32C_OPERAND_DSP_32_U24 :
3064 value = fields->f_dsp_32_u24;
3065 break;
3066 case M32C_OPERAND_DSP_32_U8 :
3067 value = fields->f_dsp_32_u8;
3068 break;
3069 case M32C_OPERAND_DSP_40_S16 :
3070 value = fields->f_dsp_40_s16;
3071 break;
3072 case M32C_OPERAND_DSP_40_S8 :
3073 value = fields->f_dsp_40_s8;
3074 break;
3075 case M32C_OPERAND_DSP_40_U16 :
3076 value = fields->f_dsp_40_u16;
3077 break;
3078 case M32C_OPERAND_DSP_40_U20 :
3079 value = fields->f_dsp_40_u20;
3080 break;
3081 case M32C_OPERAND_DSP_40_U24 :
3082 value = fields->f_dsp_40_u24;
3083 break;
3084 case M32C_OPERAND_DSP_40_U8 :
3085 value = fields->f_dsp_40_u8;
3086 break;
3087 case M32C_OPERAND_DSP_48_S16 :
3088 value = fields->f_dsp_48_s16;
3089 break;
3090 case M32C_OPERAND_DSP_48_S8 :
3091 value = fields->f_dsp_48_s8;
3092 break;
3093 case M32C_OPERAND_DSP_48_U16 :
3094 value = fields->f_dsp_48_u16;
3095 break;
3096 case M32C_OPERAND_DSP_48_U20 :
3097 value = fields->f_dsp_48_u20;
3098 break;
3099 case M32C_OPERAND_DSP_48_U24 :
3100 value = fields->f_dsp_48_u24;
3101 break;
3102 case M32C_OPERAND_DSP_48_U8 :
3103 value = fields->f_dsp_48_u8;
3104 break;
3105 case M32C_OPERAND_DSP_8_S24 :
3106 value = fields->f_dsp_8_s24;
3107 break;
3108 case M32C_OPERAND_DSP_8_S8 :
3109 value = fields->f_dsp_8_s8;
3110 break;
3111 case M32C_OPERAND_DSP_8_U16 :
3112 value = fields->f_dsp_8_u16;
3113 break;
3114 case M32C_OPERAND_DSP_8_U24 :
3115 value = fields->f_dsp_8_u24;
3116 break;
3117 case M32C_OPERAND_DSP_8_U6 :
3118 value = fields->f_dsp_8_u6;
3119 break;
3120 case M32C_OPERAND_DSP_8_U8 :
3121 value = fields->f_dsp_8_u8;
3122 break;
3123 case M32C_OPERAND_DST16AN :
3124 value = fields->f_dst16_an;
3125 break;
3126 case M32C_OPERAND_DST16AN_S :
3127 value = fields->f_dst16_an_s;
3128 break;
3129 case M32C_OPERAND_DST16ANHI :
3130 value = fields->f_dst16_an;
3131 break;
3132 case M32C_OPERAND_DST16ANQI :
3133 value = fields->f_dst16_an;
3134 break;
3135 case M32C_OPERAND_DST16ANQI_S :
3136 value = fields->f_dst16_rn_QI_s;
3137 break;
3138 case M32C_OPERAND_DST16ANSI :
3139 value = fields->f_dst16_an;
3140 break;
3141 case M32C_OPERAND_DST16RNEXTQI :
3142 value = fields->f_dst16_rn_ext;
3143 break;
3144 case M32C_OPERAND_DST16RNHI :
3145 value = fields->f_dst16_rn;
3146 break;
3147 case M32C_OPERAND_DST16RNQI :
3148 value = fields->f_dst16_rn;
3149 break;
3150 case M32C_OPERAND_DST16RNQI_S :
3151 value = fields->f_dst16_rn_QI_s;
3152 break;
3153 case M32C_OPERAND_DST16RNSI :
3154 value = fields->f_dst16_rn;
3155 break;
3156 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3157 value = fields->f_dst32_an_unprefixed;
3158 break;
3159 case M32C_OPERAND_DST32ANPREFIXED :
3160 value = fields->f_dst32_an_prefixed;
3161 break;
3162 case M32C_OPERAND_DST32ANPREFIXEDHI :
3163 value = fields->f_dst32_an_prefixed;
3164 break;
3165 case M32C_OPERAND_DST32ANPREFIXEDQI :
3166 value = fields->f_dst32_an_prefixed;
3167 break;
3168 case M32C_OPERAND_DST32ANPREFIXEDSI :
3169 value = fields->f_dst32_an_prefixed;
3170 break;
3171 case M32C_OPERAND_DST32ANUNPREFIXED :
3172 value = fields->f_dst32_an_unprefixed;
3173 break;
3174 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3175 value = fields->f_dst32_an_unprefixed;
3176 break;
3177 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3178 value = fields->f_dst32_an_unprefixed;
3179 break;
3180 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3181 value = fields->f_dst32_an_unprefixed;
3182 break;
3183 case M32C_OPERAND_DST32R0HI_S :
3184 value = 0;
3185 break;
3186 case M32C_OPERAND_DST32R0QI_S :
3187 value = 0;
3188 break;
3189 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3190 value = fields->f_dst32_rn_ext_unprefixed;
3191 break;
3192 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3193 value = fields->f_dst32_rn_ext_unprefixed;
3194 break;
3195 case M32C_OPERAND_DST32RNPREFIXEDHI :
3196 value = fields->f_dst32_rn_prefixed_HI;
3197 break;
3198 case M32C_OPERAND_DST32RNPREFIXEDQI :
3199 value = fields->f_dst32_rn_prefixed_QI;
3200 break;
3201 case M32C_OPERAND_DST32RNPREFIXEDSI :
3202 value = fields->f_dst32_rn_prefixed_SI;
3203 break;
3204 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3205 value = fields->f_dst32_rn_unprefixed_HI;
3206 break;
3207 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3208 value = fields->f_dst32_rn_unprefixed_QI;
3209 break;
3210 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3211 value = fields->f_dst32_rn_unprefixed_SI;
3212 break;
3213 case M32C_OPERAND_G :
3214 value = 0;
3215 break;
3216 case M32C_OPERAND_IMM_12_S4 :
3217 value = fields->f_imm_12_s4;
3218 break;
3219 case M32C_OPERAND_IMM_12_S4N :
3220 value = fields->f_imm_12_s4;
3221 break;
3222 case M32C_OPERAND_IMM_13_U3 :
3223 value = fields->f_imm_13_u3;
3224 break;
3225 case M32C_OPERAND_IMM_16_HI :
3226 value = fields->f_dsp_16_s16;
3227 break;
3228 case M32C_OPERAND_IMM_16_QI :
3229 value = fields->f_dsp_16_s8;
3230 break;
3231 case M32C_OPERAND_IMM_16_SI :
3232 value = fields->f_dsp_16_s32;
3233 break;
3234 case M32C_OPERAND_IMM_20_S4 :
3235 value = fields->f_imm_20_s4;
3236 break;
3237 case M32C_OPERAND_IMM_24_HI :
3238 value = fields->f_dsp_24_s16;
3239 break;
3240 case M32C_OPERAND_IMM_24_QI :
3241 value = fields->f_dsp_24_s8;
3242 break;
3243 case M32C_OPERAND_IMM_24_SI :
3244 value = fields->f_dsp_24_s32;
3245 break;
3246 case M32C_OPERAND_IMM_32_HI :
3247 value = fields->f_dsp_32_s16;
3248 break;
3249 case M32C_OPERAND_IMM_32_QI :
3250 value = fields->f_dsp_32_s8;
3251 break;
3252 case M32C_OPERAND_IMM_32_SI :
3253 value = fields->f_dsp_32_s32;
3254 break;
3255 case M32C_OPERAND_IMM_40_HI :
3256 value = fields->f_dsp_40_s16;
3257 break;
3258 case M32C_OPERAND_IMM_40_QI :
3259 value = fields->f_dsp_40_s8;
3260 break;
3261 case M32C_OPERAND_IMM_40_SI :
3262 value = fields->f_dsp_40_s32;
3263 break;
3264 case M32C_OPERAND_IMM_48_HI :
3265 value = fields->f_dsp_48_s16;
3266 break;
3267 case M32C_OPERAND_IMM_48_QI :
3268 value = fields->f_dsp_48_s8;
3269 break;
3270 case M32C_OPERAND_IMM_48_SI :
3271 value = fields->f_dsp_48_s32;
3272 break;
3273 case M32C_OPERAND_IMM_56_HI :
3274 value = fields->f_dsp_56_s16;
3275 break;
3276 case M32C_OPERAND_IMM_56_QI :
3277 value = fields->f_dsp_56_s8;
3278 break;
3279 case M32C_OPERAND_IMM_64_HI :
3280 value = fields->f_dsp_64_s16;
3281 break;
3282 case M32C_OPERAND_IMM_8_HI :
3283 value = fields->f_dsp_8_s16;
3284 break;
3285 case M32C_OPERAND_IMM_8_QI :
3286 value = fields->f_dsp_8_s8;
3287 break;
3288 case M32C_OPERAND_IMM_8_S4 :
3289 value = fields->f_imm_8_s4;
3290 break;
3291 case M32C_OPERAND_IMM_8_S4N :
3292 value = fields->f_imm_8_s4;
3293 break;
3294 case M32C_OPERAND_IMM_SH_12_S4 :
3295 value = fields->f_imm_12_s4;
3296 break;
3297 case M32C_OPERAND_IMM_SH_20_S4 :
3298 value = fields->f_imm_20_s4;
3299 break;
3300 case M32C_OPERAND_IMM_SH_8_S4 :
3301 value = fields->f_imm_8_s4;
3302 break;
3303 case M32C_OPERAND_IMM1_S :
3304 value = fields->f_imm1_S;
3305 break;
3306 case M32C_OPERAND_IMM3_S :
3307 value = fields->f_imm3_S;
3308 break;
3309 case M32C_OPERAND_LAB_16_8 :
3310 value = fields->f_lab_16_8;
3311 break;
3312 case M32C_OPERAND_LAB_24_8 :
3313 value = fields->f_lab_24_8;
3314 break;
3315 case M32C_OPERAND_LAB_32_8 :
3316 value = fields->f_lab_32_8;
3317 break;
3318 case M32C_OPERAND_LAB_40_8 :
3319 value = fields->f_lab_40_8;
3320 break;
3321 case M32C_OPERAND_LAB_5_3 :
3322 value = fields->f_lab_5_3;
3323 break;
3324 case M32C_OPERAND_LAB_8_16 :
3325 value = fields->f_lab_8_16;
3326 break;
3327 case M32C_OPERAND_LAB_8_24 :
3328 value = fields->f_lab_8_24;
3329 break;
3330 case M32C_OPERAND_LAB_8_8 :
3331 value = fields->f_lab_8_8;
3332 break;
3333 case M32C_OPERAND_LAB32_JMP_S :
3334 value = fields->f_lab32_jmp_s;
3335 break;
3336 case M32C_OPERAND_Q :
3337 value = 0;
3338 break;
3339 case M32C_OPERAND_R0 :
3340 value = 0;
3341 break;
3342 case M32C_OPERAND_R0H :
3343 value = 0;
3344 break;
3345 case M32C_OPERAND_R0L :
3346 value = 0;
3347 break;
3348 case M32C_OPERAND_R1 :
3349 value = 0;
3350 break;
3351 case M32C_OPERAND_R1R2R0 :
3352 value = 0;
3353 break;
3354 case M32C_OPERAND_R2 :
3355 value = 0;
3356 break;
3357 case M32C_OPERAND_R2R0 :
3358 value = 0;
3359 break;
3360 case M32C_OPERAND_R3 :
3361 value = 0;
3362 break;
3363 case M32C_OPERAND_R3R1 :
3364 value = 0;
3365 break;
3366 case M32C_OPERAND_REGSETPOP :
3367 value = fields->f_8_8;
3368 break;
3369 case M32C_OPERAND_REGSETPUSH :
3370 value = fields->f_8_8;
3371 break;
3372 case M32C_OPERAND_RN16_PUSH_S :
3373 value = fields->f_4_1;
3374 break;
3375 case M32C_OPERAND_S :
3376 value = 0;
3377 break;
3378 case M32C_OPERAND_SRC16AN :
3379 value = fields->f_src16_an;
3380 break;
3381 case M32C_OPERAND_SRC16ANHI :
3382 value = fields->f_src16_an;
3383 break;
3384 case M32C_OPERAND_SRC16ANQI :
3385 value = fields->f_src16_an;
3386 break;
3387 case M32C_OPERAND_SRC16RNHI :
3388 value = fields->f_src16_rn;
3389 break;
3390 case M32C_OPERAND_SRC16RNQI :
3391 value = fields->f_src16_rn;
3392 break;
3393 case M32C_OPERAND_SRC32ANPREFIXED :
3394 value = fields->f_src32_an_prefixed;
3395 break;
3396 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3397 value = fields->f_src32_an_prefixed;
3398 break;
3399 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3400 value = fields->f_src32_an_prefixed;
3401 break;
3402 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3403 value = fields->f_src32_an_prefixed;
3404 break;
3405 case M32C_OPERAND_SRC32ANUNPREFIXED :
3406 value = fields->f_src32_an_unprefixed;
3407 break;
3408 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3409 value = fields->f_src32_an_unprefixed;
3410 break;
3411 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3412 value = fields->f_src32_an_unprefixed;
3413 break;
3414 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3415 value = fields->f_src32_an_unprefixed;
3416 break;
3417 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3418 value = fields->f_src32_rn_prefixed_HI;
3419 break;
3420 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3421 value = fields->f_src32_rn_prefixed_QI;
3422 break;
3423 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3424 value = fields->f_src32_rn_prefixed_SI;
3425 break;
3426 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3427 value = fields->f_src32_rn_unprefixed_HI;
3428 break;
3429 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3430 value = fields->f_src32_rn_unprefixed_QI;
3431 break;
3432 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3433 value = fields->f_src32_rn_unprefixed_SI;
3434 break;
3435 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3436 value = fields->f_5_1;
3437 break;
3438 case M32C_OPERAND_X :
3439 value = 0;
3440 break;
3441 case M32C_OPERAND_Z :
3442 value = 0;
3443 break;
3444 case M32C_OPERAND_COND16_16 :
3445 value = fields->f_dsp_16_u8;
3446 break;
3447 case M32C_OPERAND_COND16_24 :
3448 value = fields->f_dsp_24_u8;
3449 break;
3450 case M32C_OPERAND_COND16_32 :
3451 value = fields->f_dsp_32_u8;
3452 break;
3453 case M32C_OPERAND_COND16C :
3454 value = fields->f_cond16;
3455 break;
3456 case M32C_OPERAND_COND16J :
3457 value = fields->f_cond16;
3458 break;
3459 case M32C_OPERAND_COND16J5 :
3460 value = fields->f_cond16j_5;
3461 break;
3462 case M32C_OPERAND_COND32 :
3463 value = fields->f_cond32;
3464 break;
3465 case M32C_OPERAND_COND32_16 :
3466 value = fields->f_dsp_16_u8;
3467 break;
3468 case M32C_OPERAND_COND32_24 :
3469 value = fields->f_dsp_24_u8;
3470 break;
3471 case M32C_OPERAND_COND32_32 :
3472 value = fields->f_dsp_32_u8;
3473 break;
3474 case M32C_OPERAND_COND32_40 :
3475 value = fields->f_dsp_40_u8;
3476 break;
3477 case M32C_OPERAND_COND32J :
3478 value = fields->f_cond32j;
3479 break;
3480 case M32C_OPERAND_CR1_PREFIXED_32 :
3481 value = fields->f_21_3;
3482 break;
3483 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3484 value = fields->f_13_3;
3485 break;
3486 case M32C_OPERAND_CR16 :
3487 value = fields->f_9_3;
3488 break;
3489 case M32C_OPERAND_CR2_32 :
3490 value = fields->f_13_3;
3491 break;
3492 case M32C_OPERAND_CR3_PREFIXED_32 :
3493 value = fields->f_21_3;
3494 break;
3495 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3496 value = fields->f_13_3;
3497 break;
3498 case M32C_OPERAND_FLAGS16 :
3499 value = fields->f_9_3;
3500 break;
3501 case M32C_OPERAND_FLAGS32 :
3502 value = fields->f_13_3;
3503 break;
3504 case M32C_OPERAND_SCCOND32 :
3505 value = fields->f_cond16;
3506 break;
3507 case M32C_OPERAND_SIZE :
3508 value = 0;
3509 break;
3510
3511 default :
3512 /* xgettext:c-format */
3513 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3514 opindex);
3515 abort ();
3516 }
3517
3518 return value;
3519 }
3520
3521 bfd_vma
3522 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3523 int opindex,
3524 const CGEN_FIELDS * fields)
3525 {
3526 bfd_vma value;
3527
3528 switch (opindex)
3529 {
3530 case M32C_OPERAND_A0 :
3531 value = 0;
3532 break;
3533 case M32C_OPERAND_A1 :
3534 value = 0;
3535 break;
3536 case M32C_OPERAND_AN16_PUSH_S :
3537 value = fields->f_4_1;
3538 break;
3539 case M32C_OPERAND_BIT16AN :
3540 value = fields->f_dst16_an;
3541 break;
3542 case M32C_OPERAND_BIT16RN :
3543 value = fields->f_dst16_rn;
3544 break;
3545 case M32C_OPERAND_BIT3_S :
3546 value = fields->f_imm3_S;
3547 break;
3548 case M32C_OPERAND_BIT32ANPREFIXED :
3549 value = fields->f_dst32_an_prefixed;
3550 break;
3551 case M32C_OPERAND_BIT32ANUNPREFIXED :
3552 value = fields->f_dst32_an_unprefixed;
3553 break;
3554 case M32C_OPERAND_BIT32RNPREFIXED :
3555 value = fields->f_dst32_rn_prefixed_QI;
3556 break;
3557 case M32C_OPERAND_BIT32RNUNPREFIXED :
3558 value = fields->f_dst32_rn_unprefixed_QI;
3559 break;
3560 case M32C_OPERAND_BITBASE16_16_S8 :
3561 value = fields->f_dsp_16_s8;
3562 break;
3563 case M32C_OPERAND_BITBASE16_16_U16 :
3564 value = fields->f_dsp_16_u16;
3565 break;
3566 case M32C_OPERAND_BITBASE16_16_U8 :
3567 value = fields->f_dsp_16_u8;
3568 break;
3569 case M32C_OPERAND_BITBASE16_8_U11_S :
3570 value = fields->f_bitbase16_u11_S;
3571 break;
3572 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3573 value = fields->f_bitbase32_16_s11_unprefixed;
3574 break;
3575 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3576 value = fields->f_bitbase32_16_s19_unprefixed;
3577 break;
3578 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3579 value = fields->f_bitbase32_16_u11_unprefixed;
3580 break;
3581 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3582 value = fields->f_bitbase32_16_u19_unprefixed;
3583 break;
3584 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3585 value = fields->f_bitbase32_16_u27_unprefixed;
3586 break;
3587 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3588 value = fields->f_bitbase32_24_s11_prefixed;
3589 break;
3590 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3591 value = fields->f_bitbase32_24_s19_prefixed;
3592 break;
3593 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3594 value = fields->f_bitbase32_24_u11_prefixed;
3595 break;
3596 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3597 value = fields->f_bitbase32_24_u19_prefixed;
3598 break;
3599 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3600 value = fields->f_bitbase32_24_u27_prefixed;
3601 break;
3602 case M32C_OPERAND_BITNO16R :
3603 value = fields->f_dsp_16_u8;
3604 break;
3605 case M32C_OPERAND_BITNO32PREFIXED :
3606 value = fields->f_bitno32_prefixed;
3607 break;
3608 case M32C_OPERAND_BITNO32UNPREFIXED :
3609 value = fields->f_bitno32_unprefixed;
3610 break;
3611 case M32C_OPERAND_DSP_10_U6 :
3612 value = fields->f_dsp_10_u6;
3613 break;
3614 case M32C_OPERAND_DSP_16_S16 :
3615 value = fields->f_dsp_16_s16;
3616 break;
3617 case M32C_OPERAND_DSP_16_S8 :
3618 value = fields->f_dsp_16_s8;
3619 break;
3620 case M32C_OPERAND_DSP_16_U16 :
3621 value = fields->f_dsp_16_u16;
3622 break;
3623 case M32C_OPERAND_DSP_16_U20 :
3624 value = fields->f_dsp_16_u24;
3625 break;
3626 case M32C_OPERAND_DSP_16_U24 :
3627 value = fields->f_dsp_16_u24;
3628 break;
3629 case M32C_OPERAND_DSP_16_U8 :
3630 value = fields->f_dsp_16_u8;
3631 break;
3632 case M32C_OPERAND_DSP_24_S16 :
3633 value = fields->f_dsp_24_s16;
3634 break;
3635 case M32C_OPERAND_DSP_24_S8 :
3636 value = fields->f_dsp_24_s8;
3637 break;
3638 case M32C_OPERAND_DSP_24_U16 :
3639 value = fields->f_dsp_24_u16;
3640 break;
3641 case M32C_OPERAND_DSP_24_U20 :
3642 value = fields->f_dsp_24_u24;
3643 break;
3644 case M32C_OPERAND_DSP_24_U24 :
3645 value = fields->f_dsp_24_u24;
3646 break;
3647 case M32C_OPERAND_DSP_24_U8 :
3648 value = fields->f_dsp_24_u8;
3649 break;
3650 case M32C_OPERAND_DSP_32_S16 :
3651 value = fields->f_dsp_32_s16;
3652 break;
3653 case M32C_OPERAND_DSP_32_S8 :
3654 value = fields->f_dsp_32_s8;
3655 break;
3656 case M32C_OPERAND_DSP_32_U16 :
3657 value = fields->f_dsp_32_u16;
3658 break;
3659 case M32C_OPERAND_DSP_32_U20 :
3660 value = fields->f_dsp_32_u24;
3661 break;
3662 case M32C_OPERAND_DSP_32_U24 :
3663 value = fields->f_dsp_32_u24;
3664 break;
3665 case M32C_OPERAND_DSP_32_U8 :
3666 value = fields->f_dsp_32_u8;
3667 break;
3668 case M32C_OPERAND_DSP_40_S16 :
3669 value = fields->f_dsp_40_s16;
3670 break;
3671 case M32C_OPERAND_DSP_40_S8 :
3672 value = fields->f_dsp_40_s8;
3673 break;
3674 case M32C_OPERAND_DSP_40_U16 :
3675 value = fields->f_dsp_40_u16;
3676 break;
3677 case M32C_OPERAND_DSP_40_U20 :
3678 value = fields->f_dsp_40_u20;
3679 break;
3680 case M32C_OPERAND_DSP_40_U24 :
3681 value = fields->f_dsp_40_u24;
3682 break;
3683 case M32C_OPERAND_DSP_40_U8 :
3684 value = fields->f_dsp_40_u8;
3685 break;
3686 case M32C_OPERAND_DSP_48_S16 :
3687 value = fields->f_dsp_48_s16;
3688 break;
3689 case M32C_OPERAND_DSP_48_S8 :
3690 value = fields->f_dsp_48_s8;
3691 break;
3692 case M32C_OPERAND_DSP_48_U16 :
3693 value = fields->f_dsp_48_u16;
3694 break;
3695 case M32C_OPERAND_DSP_48_U20 :
3696 value = fields->f_dsp_48_u20;
3697 break;
3698 case M32C_OPERAND_DSP_48_U24 :
3699 value = fields->f_dsp_48_u24;
3700 break;
3701 case M32C_OPERAND_DSP_48_U8 :
3702 value = fields->f_dsp_48_u8;
3703 break;
3704 case M32C_OPERAND_DSP_8_S24 :
3705 value = fields->f_dsp_8_s24;
3706 break;
3707 case M32C_OPERAND_DSP_8_S8 :
3708 value = fields->f_dsp_8_s8;
3709 break;
3710 case M32C_OPERAND_DSP_8_U16 :
3711 value = fields->f_dsp_8_u16;
3712 break;
3713 case M32C_OPERAND_DSP_8_U24 :
3714 value = fields->f_dsp_8_u24;
3715 break;
3716 case M32C_OPERAND_DSP_8_U6 :
3717 value = fields->f_dsp_8_u6;
3718 break;
3719 case M32C_OPERAND_DSP_8_U8 :
3720 value = fields->f_dsp_8_u8;
3721 break;
3722 case M32C_OPERAND_DST16AN :
3723 value = fields->f_dst16_an;
3724 break;
3725 case M32C_OPERAND_DST16AN_S :
3726 value = fields->f_dst16_an_s;
3727 break;
3728 case M32C_OPERAND_DST16ANHI :
3729 value = fields->f_dst16_an;
3730 break;
3731 case M32C_OPERAND_DST16ANQI :
3732 value = fields->f_dst16_an;
3733 break;
3734 case M32C_OPERAND_DST16ANQI_S :
3735 value = fields->f_dst16_rn_QI_s;
3736 break;
3737 case M32C_OPERAND_DST16ANSI :
3738 value = fields->f_dst16_an;
3739 break;
3740 case M32C_OPERAND_DST16RNEXTQI :
3741 value = fields->f_dst16_rn_ext;
3742 break;
3743 case M32C_OPERAND_DST16RNHI :
3744 value = fields->f_dst16_rn;
3745 break;
3746 case M32C_OPERAND_DST16RNQI :
3747 value = fields->f_dst16_rn;
3748 break;
3749 case M32C_OPERAND_DST16RNQI_S :
3750 value = fields->f_dst16_rn_QI_s;
3751 break;
3752 case M32C_OPERAND_DST16RNSI :
3753 value = fields->f_dst16_rn;
3754 break;
3755 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3756 value = fields->f_dst32_an_unprefixed;
3757 break;
3758 case M32C_OPERAND_DST32ANPREFIXED :
3759 value = fields->f_dst32_an_prefixed;
3760 break;
3761 case M32C_OPERAND_DST32ANPREFIXEDHI :
3762 value = fields->f_dst32_an_prefixed;
3763 break;
3764 case M32C_OPERAND_DST32ANPREFIXEDQI :
3765 value = fields->f_dst32_an_prefixed;
3766 break;
3767 case M32C_OPERAND_DST32ANPREFIXEDSI :
3768 value = fields->f_dst32_an_prefixed;
3769 break;
3770 case M32C_OPERAND_DST32ANUNPREFIXED :
3771 value = fields->f_dst32_an_unprefixed;
3772 break;
3773 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3774 value = fields->f_dst32_an_unprefixed;
3775 break;
3776 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3777 value = fields->f_dst32_an_unprefixed;
3778 break;
3779 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3780 value = fields->f_dst32_an_unprefixed;
3781 break;
3782 case M32C_OPERAND_DST32R0HI_S :
3783 value = 0;
3784 break;
3785 case M32C_OPERAND_DST32R0QI_S :
3786 value = 0;
3787 break;
3788 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3789 value = fields->f_dst32_rn_ext_unprefixed;
3790 break;
3791 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3792 value = fields->f_dst32_rn_ext_unprefixed;
3793 break;
3794 case M32C_OPERAND_DST32RNPREFIXEDHI :
3795 value = fields->f_dst32_rn_prefixed_HI;
3796 break;
3797 case M32C_OPERAND_DST32RNPREFIXEDQI :
3798 value = fields->f_dst32_rn_prefixed_QI;
3799 break;
3800 case M32C_OPERAND_DST32RNPREFIXEDSI :
3801 value = fields->f_dst32_rn_prefixed_SI;
3802 break;
3803 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3804 value = fields->f_dst32_rn_unprefixed_HI;
3805 break;
3806 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3807 value = fields->f_dst32_rn_unprefixed_QI;
3808 break;
3809 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3810 value = fields->f_dst32_rn_unprefixed_SI;
3811 break;
3812 case M32C_OPERAND_G :
3813 value = 0;
3814 break;
3815 case M32C_OPERAND_IMM_12_S4 :
3816 value = fields->f_imm_12_s4;
3817 break;
3818 case M32C_OPERAND_IMM_12_S4N :
3819 value = fields->f_imm_12_s4;
3820 break;
3821 case M32C_OPERAND_IMM_13_U3 :
3822 value = fields->f_imm_13_u3;
3823 break;
3824 case M32C_OPERAND_IMM_16_HI :
3825 value = fields->f_dsp_16_s16;
3826 break;
3827 case M32C_OPERAND_IMM_16_QI :
3828 value = fields->f_dsp_16_s8;
3829 break;
3830 case M32C_OPERAND_IMM_16_SI :
3831 value = fields->f_dsp_16_s32;
3832 break;
3833 case M32C_OPERAND_IMM_20_S4 :
3834 value = fields->f_imm_20_s4;
3835 break;
3836 case M32C_OPERAND_IMM_24_HI :
3837 value = fields->f_dsp_24_s16;
3838 break;
3839 case M32C_OPERAND_IMM_24_QI :
3840 value = fields->f_dsp_24_s8;
3841 break;
3842 case M32C_OPERAND_IMM_24_SI :
3843 value = fields->f_dsp_24_s32;
3844 break;
3845 case M32C_OPERAND_IMM_32_HI :
3846 value = fields->f_dsp_32_s16;
3847 break;
3848 case M32C_OPERAND_IMM_32_QI :
3849 value = fields->f_dsp_32_s8;
3850 break;
3851 case M32C_OPERAND_IMM_32_SI :
3852 value = fields->f_dsp_32_s32;
3853 break;
3854 case M32C_OPERAND_IMM_40_HI :
3855 value = fields->f_dsp_40_s16;
3856 break;
3857 case M32C_OPERAND_IMM_40_QI :
3858 value = fields->f_dsp_40_s8;
3859 break;
3860 case M32C_OPERAND_IMM_40_SI :
3861 value = fields->f_dsp_40_s32;
3862 break;
3863 case M32C_OPERAND_IMM_48_HI :
3864 value = fields->f_dsp_48_s16;
3865 break;
3866 case M32C_OPERAND_IMM_48_QI :
3867 value = fields->f_dsp_48_s8;
3868 break;
3869 case M32C_OPERAND_IMM_48_SI :
3870 value = fields->f_dsp_48_s32;
3871 break;
3872 case M32C_OPERAND_IMM_56_HI :
3873 value = fields->f_dsp_56_s16;
3874 break;
3875 case M32C_OPERAND_IMM_56_QI :
3876 value = fields->f_dsp_56_s8;
3877 break;
3878 case M32C_OPERAND_IMM_64_HI :
3879 value = fields->f_dsp_64_s16;
3880 break;
3881 case M32C_OPERAND_IMM_8_HI :
3882 value = fields->f_dsp_8_s16;
3883 break;
3884 case M32C_OPERAND_IMM_8_QI :
3885 value = fields->f_dsp_8_s8;
3886 break;
3887 case M32C_OPERAND_IMM_8_S4 :
3888 value = fields->f_imm_8_s4;
3889 break;
3890 case M32C_OPERAND_IMM_8_S4N :
3891 value = fields->f_imm_8_s4;
3892 break;
3893 case M32C_OPERAND_IMM_SH_12_S4 :
3894 value = fields->f_imm_12_s4;
3895 break;
3896 case M32C_OPERAND_IMM_SH_20_S4 :
3897 value = fields->f_imm_20_s4;
3898 break;
3899 case M32C_OPERAND_IMM_SH_8_S4 :
3900 value = fields->f_imm_8_s4;
3901 break;
3902 case M32C_OPERAND_IMM1_S :
3903 value = fields->f_imm1_S;
3904 break;
3905 case M32C_OPERAND_IMM3_S :
3906 value = fields->f_imm3_S;
3907 break;
3908 case M32C_OPERAND_LAB_16_8 :
3909 value = fields->f_lab_16_8;
3910 break;
3911 case M32C_OPERAND_LAB_24_8 :
3912 value = fields->f_lab_24_8;
3913 break;
3914 case M32C_OPERAND_LAB_32_8 :
3915 value = fields->f_lab_32_8;
3916 break;
3917 case M32C_OPERAND_LAB_40_8 :
3918 value = fields->f_lab_40_8;
3919 break;
3920 case M32C_OPERAND_LAB_5_3 :
3921 value = fields->f_lab_5_3;
3922 break;
3923 case M32C_OPERAND_LAB_8_16 :
3924 value = fields->f_lab_8_16;
3925 break;
3926 case M32C_OPERAND_LAB_8_24 :
3927 value = fields->f_lab_8_24;
3928 break;
3929 case M32C_OPERAND_LAB_8_8 :
3930 value = fields->f_lab_8_8;
3931 break;
3932 case M32C_OPERAND_LAB32_JMP_S :
3933 value = fields->f_lab32_jmp_s;
3934 break;
3935 case M32C_OPERAND_Q :
3936 value = 0;
3937 break;
3938 case M32C_OPERAND_R0 :
3939 value = 0;
3940 break;
3941 case M32C_OPERAND_R0H :
3942 value = 0;
3943 break;
3944 case M32C_OPERAND_R0L :
3945 value = 0;
3946 break;
3947 case M32C_OPERAND_R1 :
3948 value = 0;
3949 break;
3950 case M32C_OPERAND_R1R2R0 :
3951 value = 0;
3952 break;
3953 case M32C_OPERAND_R2 :
3954 value = 0;
3955 break;
3956 case M32C_OPERAND_R2R0 :
3957 value = 0;
3958 break;
3959 case M32C_OPERAND_R3 :
3960 value = 0;
3961 break;
3962 case M32C_OPERAND_R3R1 :
3963 value = 0;
3964 break;
3965 case M32C_OPERAND_REGSETPOP :
3966 value = fields->f_8_8;
3967 break;
3968 case M32C_OPERAND_REGSETPUSH :
3969 value = fields->f_8_8;
3970 break;
3971 case M32C_OPERAND_RN16_PUSH_S :
3972 value = fields->f_4_1;
3973 break;
3974 case M32C_OPERAND_S :
3975 value = 0;
3976 break;
3977 case M32C_OPERAND_SRC16AN :
3978 value = fields->f_src16_an;
3979 break;
3980 case M32C_OPERAND_SRC16ANHI :
3981 value = fields->f_src16_an;
3982 break;
3983 case M32C_OPERAND_SRC16ANQI :
3984 value = fields->f_src16_an;
3985 break;
3986 case M32C_OPERAND_SRC16RNHI :
3987 value = fields->f_src16_rn;
3988 break;
3989 case M32C_OPERAND_SRC16RNQI :
3990 value = fields->f_src16_rn;
3991 break;
3992 case M32C_OPERAND_SRC32ANPREFIXED :
3993 value = fields->f_src32_an_prefixed;
3994 break;
3995 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3996 value = fields->f_src32_an_prefixed;
3997 break;
3998 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3999 value = fields->f_src32_an_prefixed;
4000 break;
4001 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4002 value = fields->f_src32_an_prefixed;
4003 break;
4004 case M32C_OPERAND_SRC32ANUNPREFIXED :
4005 value = fields->f_src32_an_unprefixed;
4006 break;
4007 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4008 value = fields->f_src32_an_unprefixed;
4009 break;
4010 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4011 value = fields->f_src32_an_unprefixed;
4012 break;
4013 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4014 value = fields->f_src32_an_unprefixed;
4015 break;
4016 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4017 value = fields->f_src32_rn_prefixed_HI;
4018 break;
4019 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4020 value = fields->f_src32_rn_prefixed_QI;
4021 break;
4022 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4023 value = fields->f_src32_rn_prefixed_SI;
4024 break;
4025 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4026 value = fields->f_src32_rn_unprefixed_HI;
4027 break;
4028 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4029 value = fields->f_src32_rn_unprefixed_QI;
4030 break;
4031 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4032 value = fields->f_src32_rn_unprefixed_SI;
4033 break;
4034 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4035 value = fields->f_5_1;
4036 break;
4037 case M32C_OPERAND_X :
4038 value = 0;
4039 break;
4040 case M32C_OPERAND_Z :
4041 value = 0;
4042 break;
4043 case M32C_OPERAND_COND16_16 :
4044 value = fields->f_dsp_16_u8;
4045 break;
4046 case M32C_OPERAND_COND16_24 :
4047 value = fields->f_dsp_24_u8;
4048 break;
4049 case M32C_OPERAND_COND16_32 :
4050 value = fields->f_dsp_32_u8;
4051 break;
4052 case M32C_OPERAND_COND16C :
4053 value = fields->f_cond16;
4054 break;
4055 case M32C_OPERAND_COND16J :
4056 value = fields->f_cond16;
4057 break;
4058 case M32C_OPERAND_COND16J5 :
4059 value = fields->f_cond16j_5;
4060 break;
4061 case M32C_OPERAND_COND32 :
4062 value = fields->f_cond32;
4063 break;
4064 case M32C_OPERAND_COND32_16 :
4065 value = fields->f_dsp_16_u8;
4066 break;
4067 case M32C_OPERAND_COND32_24 :
4068 value = fields->f_dsp_24_u8;
4069 break;
4070 case M32C_OPERAND_COND32_32 :
4071 value = fields->f_dsp_32_u8;
4072 break;
4073 case M32C_OPERAND_COND32_40 :
4074 value = fields->f_dsp_40_u8;
4075 break;
4076 case M32C_OPERAND_COND32J :
4077 value = fields->f_cond32j;
4078 break;
4079 case M32C_OPERAND_CR1_PREFIXED_32 :
4080 value = fields->f_21_3;
4081 break;
4082 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4083 value = fields->f_13_3;
4084 break;
4085 case M32C_OPERAND_CR16 :
4086 value = fields->f_9_3;
4087 break;
4088 case M32C_OPERAND_CR2_32 :
4089 value = fields->f_13_3;
4090 break;
4091 case M32C_OPERAND_CR3_PREFIXED_32 :
4092 value = fields->f_21_3;
4093 break;
4094 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4095 value = fields->f_13_3;
4096 break;
4097 case M32C_OPERAND_FLAGS16 :
4098 value = fields->f_9_3;
4099 break;
4100 case M32C_OPERAND_FLAGS32 :
4101 value = fields->f_13_3;
4102 break;
4103 case M32C_OPERAND_SCCOND32 :
4104 value = fields->f_cond16;
4105 break;
4106 case M32C_OPERAND_SIZE :
4107 value = 0;
4108 break;
4109
4110 default :
4111 /* xgettext:c-format */
4112 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
4113 opindex);
4114 abort ();
4115 }
4116
4117 return value;
4118 }
4119
4120 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4121 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4122
4123 /* Stuffing values in cgen_fields is handled by a collection of functions.
4124 They are distinguished by the type of the VALUE argument they accept.
4125 TODO: floating point, inlining support, remove cases where argument type
4126 not appropriate. */
4127
4128 void
4129 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4130 int opindex,
4131 CGEN_FIELDS * fields,
4132 int value)
4133 {
4134 switch (opindex)
4135 {
4136 case M32C_OPERAND_A0 :
4137 break;
4138 case M32C_OPERAND_A1 :
4139 break;
4140 case M32C_OPERAND_AN16_PUSH_S :
4141 fields->f_4_1 = value;
4142 break;
4143 case M32C_OPERAND_BIT16AN :
4144 fields->f_dst16_an = value;
4145 break;
4146 case M32C_OPERAND_BIT16RN :
4147 fields->f_dst16_rn = value;
4148 break;
4149 case M32C_OPERAND_BIT3_S :
4150 fields->f_imm3_S = value;
4151 break;
4152 case M32C_OPERAND_BIT32ANPREFIXED :
4153 fields->f_dst32_an_prefixed = value;
4154 break;
4155 case M32C_OPERAND_BIT32ANUNPREFIXED :
4156 fields->f_dst32_an_unprefixed = value;
4157 break;
4158 case M32C_OPERAND_BIT32RNPREFIXED :
4159 fields->f_dst32_rn_prefixed_QI = value;
4160 break;
4161 case M32C_OPERAND_BIT32RNUNPREFIXED :
4162 fields->f_dst32_rn_unprefixed_QI = value;
4163 break;
4164 case M32C_OPERAND_BITBASE16_16_S8 :
4165 fields->f_dsp_16_s8 = value;
4166 break;
4167 case M32C_OPERAND_BITBASE16_16_U16 :
4168 fields->f_dsp_16_u16 = value;
4169 break;
4170 case M32C_OPERAND_BITBASE16_16_U8 :
4171 fields->f_dsp_16_u8 = value;
4172 break;
4173 case M32C_OPERAND_BITBASE16_8_U11_S :
4174 fields->f_bitbase16_u11_S = value;
4175 break;
4176 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4177 fields->f_bitbase32_16_s11_unprefixed = value;
4178 break;
4179 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4180 fields->f_bitbase32_16_s19_unprefixed = value;
4181 break;
4182 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4183 fields->f_bitbase32_16_u11_unprefixed = value;
4184 break;
4185 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4186 fields->f_bitbase32_16_u19_unprefixed = value;
4187 break;
4188 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4189 fields->f_bitbase32_16_u27_unprefixed = value;
4190 break;
4191 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4192 fields->f_bitbase32_24_s11_prefixed = value;
4193 break;
4194 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4195 fields->f_bitbase32_24_s19_prefixed = value;
4196 break;
4197 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4198 fields->f_bitbase32_24_u11_prefixed = value;
4199 break;
4200 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4201 fields->f_bitbase32_24_u19_prefixed = value;
4202 break;
4203 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4204 fields->f_bitbase32_24_u27_prefixed = value;
4205 break;
4206 case M32C_OPERAND_BITNO16R :
4207 fields->f_dsp_16_u8 = value;
4208 break;
4209 case M32C_OPERAND_BITNO32PREFIXED :
4210 fields->f_bitno32_prefixed = value;
4211 break;
4212 case M32C_OPERAND_BITNO32UNPREFIXED :
4213 fields->f_bitno32_unprefixed = value;
4214 break;
4215 case M32C_OPERAND_DSP_10_U6 :
4216 fields->f_dsp_10_u6 = value;
4217 break;
4218 case M32C_OPERAND_DSP_16_S16 :
4219 fields->f_dsp_16_s16 = value;
4220 break;
4221 case M32C_OPERAND_DSP_16_S8 :
4222 fields->f_dsp_16_s8 = value;
4223 break;
4224 case M32C_OPERAND_DSP_16_U16 :
4225 fields->f_dsp_16_u16 = value;
4226 break;
4227 case M32C_OPERAND_DSP_16_U20 :
4228 fields->f_dsp_16_u24 = value;
4229 break;
4230 case M32C_OPERAND_DSP_16_U24 :
4231 fields->f_dsp_16_u24 = value;
4232 break;
4233 case M32C_OPERAND_DSP_16_U8 :
4234 fields->f_dsp_16_u8 = value;
4235 break;
4236 case M32C_OPERAND_DSP_24_S16 :
4237 fields->f_dsp_24_s16 = value;
4238 break;
4239 case M32C_OPERAND_DSP_24_S8 :
4240 fields->f_dsp_24_s8 = value;
4241 break;
4242 case M32C_OPERAND_DSP_24_U16 :
4243 fields->f_dsp_24_u16 = value;
4244 break;
4245 case M32C_OPERAND_DSP_24_U20 :
4246 fields->f_dsp_24_u24 = value;
4247 break;
4248 case M32C_OPERAND_DSP_24_U24 :
4249 fields->f_dsp_24_u24 = value;
4250 break;
4251 case M32C_OPERAND_DSP_24_U8 :
4252 fields->f_dsp_24_u8 = value;
4253 break;
4254 case M32C_OPERAND_DSP_32_S16 :
4255 fields->f_dsp_32_s16 = value;
4256 break;
4257 case M32C_OPERAND_DSP_32_S8 :
4258 fields->f_dsp_32_s8 = value;
4259 break;
4260 case M32C_OPERAND_DSP_32_U16 :
4261 fields->f_dsp_32_u16 = value;
4262 break;
4263 case M32C_OPERAND_DSP_32_U20 :
4264 fields->f_dsp_32_u24 = value;
4265 break;
4266 case M32C_OPERAND_DSP_32_U24 :
4267 fields->f_dsp_32_u24 = value;
4268 break;
4269 case M32C_OPERAND_DSP_32_U8 :
4270 fields->f_dsp_32_u8 = value;
4271 break;
4272 case M32C_OPERAND_DSP_40_S16 :
4273 fields->f_dsp_40_s16 = value;
4274 break;
4275 case M32C_OPERAND_DSP_40_S8 :
4276 fields->f_dsp_40_s8 = value;
4277 break;
4278 case M32C_OPERAND_DSP_40_U16 :
4279 fields->f_dsp_40_u16 = value;
4280 break;
4281 case M32C_OPERAND_DSP_40_U20 :
4282 fields->f_dsp_40_u20 = value;
4283 break;
4284 case M32C_OPERAND_DSP_40_U24 :
4285 fields->f_dsp_40_u24 = value;
4286 break;
4287 case M32C_OPERAND_DSP_40_U8 :
4288 fields->f_dsp_40_u8 = value;
4289 break;
4290 case M32C_OPERAND_DSP_48_S16 :
4291 fields->f_dsp_48_s16 = value;
4292 break;
4293 case M32C_OPERAND_DSP_48_S8 :
4294 fields->f_dsp_48_s8 = value;
4295 break;
4296 case M32C_OPERAND_DSP_48_U16 :
4297 fields->f_dsp_48_u16 = value;
4298 break;
4299 case M32C_OPERAND_DSP_48_U20 :
4300 fields->f_dsp_48_u20 = value;
4301 break;
4302 case M32C_OPERAND_DSP_48_U24 :
4303 fields->f_dsp_48_u24 = value;
4304 break;
4305 case M32C_OPERAND_DSP_48_U8 :
4306 fields->f_dsp_48_u8 = value;
4307 break;
4308 case M32C_OPERAND_DSP_8_S24 :
4309 fields->f_dsp_8_s24 = value;
4310 break;
4311 case M32C_OPERAND_DSP_8_S8 :
4312 fields->f_dsp_8_s8 = value;
4313 break;
4314 case M32C_OPERAND_DSP_8_U16 :
4315 fields->f_dsp_8_u16 = value;
4316 break;
4317 case M32C_OPERAND_DSP_8_U24 :
4318 fields->f_dsp_8_u24 = value;
4319 break;
4320 case M32C_OPERAND_DSP_8_U6 :
4321 fields->f_dsp_8_u6 = value;
4322 break;
4323 case M32C_OPERAND_DSP_8_U8 :
4324 fields->f_dsp_8_u8 = value;
4325 break;
4326 case M32C_OPERAND_DST16AN :
4327 fields->f_dst16_an = value;
4328 break;
4329 case M32C_OPERAND_DST16AN_S :
4330 fields->f_dst16_an_s = value;
4331 break;
4332 case M32C_OPERAND_DST16ANHI :
4333 fields->f_dst16_an = value;
4334 break;
4335 case M32C_OPERAND_DST16ANQI :
4336 fields->f_dst16_an = value;
4337 break;
4338 case M32C_OPERAND_DST16ANQI_S :
4339 fields->f_dst16_rn_QI_s = value;
4340 break;
4341 case M32C_OPERAND_DST16ANSI :
4342 fields->f_dst16_an = value;
4343 break;
4344 case M32C_OPERAND_DST16RNEXTQI :
4345 fields->f_dst16_rn_ext = value;
4346 break;
4347 case M32C_OPERAND_DST16RNHI :
4348 fields->f_dst16_rn = value;
4349 break;
4350 case M32C_OPERAND_DST16RNQI :
4351 fields->f_dst16_rn = value;
4352 break;
4353 case M32C_OPERAND_DST16RNQI_S :
4354 fields->f_dst16_rn_QI_s = value;
4355 break;
4356 case M32C_OPERAND_DST16RNSI :
4357 fields->f_dst16_rn = value;
4358 break;
4359 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4360 fields->f_dst32_an_unprefixed = value;
4361 break;
4362 case M32C_OPERAND_DST32ANPREFIXED :
4363 fields->f_dst32_an_prefixed = value;
4364 break;
4365 case M32C_OPERAND_DST32ANPREFIXEDHI :
4366 fields->f_dst32_an_prefixed = value;
4367 break;
4368 case M32C_OPERAND_DST32ANPREFIXEDQI :
4369 fields->f_dst32_an_prefixed = value;
4370 break;
4371 case M32C_OPERAND_DST32ANPREFIXEDSI :
4372 fields->f_dst32_an_prefixed = value;
4373 break;
4374 case M32C_OPERAND_DST32ANUNPREFIXED :
4375 fields->f_dst32_an_unprefixed = value;
4376 break;
4377 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4378 fields->f_dst32_an_unprefixed = value;
4379 break;
4380 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4381 fields->f_dst32_an_unprefixed = value;
4382 break;
4383 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4384 fields->f_dst32_an_unprefixed = value;
4385 break;
4386 case M32C_OPERAND_DST32R0HI_S :
4387 break;
4388 case M32C_OPERAND_DST32R0QI_S :
4389 break;
4390 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4391 fields->f_dst32_rn_ext_unprefixed = value;
4392 break;
4393 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4394 fields->f_dst32_rn_ext_unprefixed = value;
4395 break;
4396 case M32C_OPERAND_DST32RNPREFIXEDHI :
4397 fields->f_dst32_rn_prefixed_HI = value;
4398 break;
4399 case M32C_OPERAND_DST32RNPREFIXEDQI :
4400 fields->f_dst32_rn_prefixed_QI = value;
4401 break;
4402 case M32C_OPERAND_DST32RNPREFIXEDSI :
4403 fields->f_dst32_rn_prefixed_SI = value;
4404 break;
4405 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4406 fields->f_dst32_rn_unprefixed_HI = value;
4407 break;
4408 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4409 fields->f_dst32_rn_unprefixed_QI = value;
4410 break;
4411 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4412 fields->f_dst32_rn_unprefixed_SI = value;
4413 break;
4414 case M32C_OPERAND_G :
4415 break;
4416 case M32C_OPERAND_IMM_12_S4 :
4417 fields->f_imm_12_s4 = value;
4418 break;
4419 case M32C_OPERAND_IMM_12_S4N :
4420 fields->f_imm_12_s4 = value;
4421 break;
4422 case M32C_OPERAND_IMM_13_U3 :
4423 fields->f_imm_13_u3 = value;
4424 break;
4425 case M32C_OPERAND_IMM_16_HI :
4426 fields->f_dsp_16_s16 = value;
4427 break;
4428 case M32C_OPERAND_IMM_16_QI :
4429 fields->f_dsp_16_s8 = value;
4430 break;
4431 case M32C_OPERAND_IMM_16_SI :
4432 fields->f_dsp_16_s32 = value;
4433 break;
4434 case M32C_OPERAND_IMM_20_S4 :
4435 fields->f_imm_20_s4 = value;
4436 break;
4437 case M32C_OPERAND_IMM_24_HI :
4438 fields->f_dsp_24_s16 = value;
4439 break;
4440 case M32C_OPERAND_IMM_24_QI :
4441 fields->f_dsp_24_s8 = value;
4442 break;
4443 case M32C_OPERAND_IMM_24_SI :
4444 fields->f_dsp_24_s32 = value;
4445 break;
4446 case M32C_OPERAND_IMM_32_HI :
4447 fields->f_dsp_32_s16 = value;
4448 break;
4449 case M32C_OPERAND_IMM_32_QI :
4450 fields->f_dsp_32_s8 = value;
4451 break;
4452 case M32C_OPERAND_IMM_32_SI :
4453 fields->f_dsp_32_s32 = value;
4454 break;
4455 case M32C_OPERAND_IMM_40_HI :
4456 fields->f_dsp_40_s16 = value;
4457 break;
4458 case M32C_OPERAND_IMM_40_QI :
4459 fields->f_dsp_40_s8 = value;
4460 break;
4461 case M32C_OPERAND_IMM_40_SI :
4462 fields->f_dsp_40_s32 = value;
4463 break;
4464 case M32C_OPERAND_IMM_48_HI :
4465 fields->f_dsp_48_s16 = value;
4466 break;
4467 case M32C_OPERAND_IMM_48_QI :
4468 fields->f_dsp_48_s8 = value;
4469 break;
4470 case M32C_OPERAND_IMM_48_SI :
4471 fields->f_dsp_48_s32 = value;
4472 break;
4473 case M32C_OPERAND_IMM_56_HI :
4474 fields->f_dsp_56_s16 = value;
4475 break;
4476 case M32C_OPERAND_IMM_56_QI :
4477 fields->f_dsp_56_s8 = value;
4478 break;
4479 case M32C_OPERAND_IMM_64_HI :
4480 fields->f_dsp_64_s16 = value;
4481 break;
4482 case M32C_OPERAND_IMM_8_HI :
4483 fields->f_dsp_8_s16 = value;
4484 break;
4485 case M32C_OPERAND_IMM_8_QI :
4486 fields->f_dsp_8_s8 = value;
4487 break;
4488 case M32C_OPERAND_IMM_8_S4 :
4489 fields->f_imm_8_s4 = value;
4490 break;
4491 case M32C_OPERAND_IMM_8_S4N :
4492 fields->f_imm_8_s4 = value;
4493 break;
4494 case M32C_OPERAND_IMM_SH_12_S4 :
4495 fields->f_imm_12_s4 = value;
4496 break;
4497 case M32C_OPERAND_IMM_SH_20_S4 :
4498 fields->f_imm_20_s4 = value;
4499 break;
4500 case M32C_OPERAND_IMM_SH_8_S4 :
4501 fields->f_imm_8_s4 = value;
4502 break;
4503 case M32C_OPERAND_IMM1_S :
4504 fields->f_imm1_S = value;
4505 break;
4506 case M32C_OPERAND_IMM3_S :
4507 fields->f_imm3_S = value;
4508 break;
4509 case M32C_OPERAND_LAB_16_8 :
4510 fields->f_lab_16_8 = value;
4511 break;
4512 case M32C_OPERAND_LAB_24_8 :
4513 fields->f_lab_24_8 = value;
4514 break;
4515 case M32C_OPERAND_LAB_32_8 :
4516 fields->f_lab_32_8 = value;
4517 break;
4518 case M32C_OPERAND_LAB_40_8 :
4519 fields->f_lab_40_8 = value;
4520 break;
4521 case M32C_OPERAND_LAB_5_3 :
4522 fields->f_lab_5_3 = value;
4523 break;
4524 case M32C_OPERAND_LAB_8_16 :
4525 fields->f_lab_8_16 = value;
4526 break;
4527 case M32C_OPERAND_LAB_8_24 :
4528 fields->f_lab_8_24 = value;
4529 break;
4530 case M32C_OPERAND_LAB_8_8 :
4531 fields->f_lab_8_8 = value;
4532 break;
4533 case M32C_OPERAND_LAB32_JMP_S :
4534 fields->f_lab32_jmp_s = value;
4535 break;
4536 case M32C_OPERAND_Q :
4537 break;
4538 case M32C_OPERAND_R0 :
4539 break;
4540 case M32C_OPERAND_R0H :
4541 break;
4542 case M32C_OPERAND_R0L :
4543 break;
4544 case M32C_OPERAND_R1 :
4545 break;
4546 case M32C_OPERAND_R1R2R0 :
4547 break;
4548 case M32C_OPERAND_R2 :
4549 break;
4550 case M32C_OPERAND_R2R0 :
4551 break;
4552 case M32C_OPERAND_R3 :
4553 break;
4554 case M32C_OPERAND_R3R1 :
4555 break;
4556 case M32C_OPERAND_REGSETPOP :
4557 fields->f_8_8 = value;
4558 break;
4559 case M32C_OPERAND_REGSETPUSH :
4560 fields->f_8_8 = value;
4561 break;
4562 case M32C_OPERAND_RN16_PUSH_S :
4563 fields->f_4_1 = value;
4564 break;
4565 case M32C_OPERAND_S :
4566 break;
4567 case M32C_OPERAND_SRC16AN :
4568 fields->f_src16_an = value;
4569 break;
4570 case M32C_OPERAND_SRC16ANHI :
4571 fields->f_src16_an = value;
4572 break;
4573 case M32C_OPERAND_SRC16ANQI :
4574 fields->f_src16_an = value;
4575 break;
4576 case M32C_OPERAND_SRC16RNHI :
4577 fields->f_src16_rn = value;
4578 break;
4579 case M32C_OPERAND_SRC16RNQI :
4580 fields->f_src16_rn = value;
4581 break;
4582 case M32C_OPERAND_SRC32ANPREFIXED :
4583 fields->f_src32_an_prefixed = value;
4584 break;
4585 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4586 fields->f_src32_an_prefixed = value;
4587 break;
4588 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4589 fields->f_src32_an_prefixed = value;
4590 break;
4591 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4592 fields->f_src32_an_prefixed = value;
4593 break;
4594 case M32C_OPERAND_SRC32ANUNPREFIXED :
4595 fields->f_src32_an_unprefixed = value;
4596 break;
4597 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4598 fields->f_src32_an_unprefixed = value;
4599 break;
4600 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4601 fields->f_src32_an_unprefixed = value;
4602 break;
4603 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4604 fields->f_src32_an_unprefixed = value;
4605 break;
4606 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4607 fields->f_src32_rn_prefixed_HI = value;
4608 break;
4609 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4610 fields->f_src32_rn_prefixed_QI = value;
4611 break;
4612 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4613 fields->f_src32_rn_prefixed_SI = value;
4614 break;
4615 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4616 fields->f_src32_rn_unprefixed_HI = value;
4617 break;
4618 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4619 fields->f_src32_rn_unprefixed_QI = value;
4620 break;
4621 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4622 fields->f_src32_rn_unprefixed_SI = value;
4623 break;
4624 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4625 fields->f_5_1 = value;
4626 break;
4627 case M32C_OPERAND_X :
4628 break;
4629 case M32C_OPERAND_Z :
4630 break;
4631 case M32C_OPERAND_COND16_16 :
4632 fields->f_dsp_16_u8 = value;
4633 break;
4634 case M32C_OPERAND_COND16_24 :
4635 fields->f_dsp_24_u8 = value;
4636 break;
4637 case M32C_OPERAND_COND16_32 :
4638 fields->f_dsp_32_u8 = value;
4639 break;
4640 case M32C_OPERAND_COND16C :
4641 fields->f_cond16 = value;
4642 break;
4643 case M32C_OPERAND_COND16J :
4644 fields->f_cond16 = value;
4645 break;
4646 case M32C_OPERAND_COND16J5 :
4647 fields->f_cond16j_5 = value;
4648 break;
4649 case M32C_OPERAND_COND32 :
4650 fields->f_cond32 = value;
4651 break;
4652 case M32C_OPERAND_COND32_16 :
4653 fields->f_dsp_16_u8 = value;
4654 break;
4655 case M32C_OPERAND_COND32_24 :
4656 fields->f_dsp_24_u8 = value;
4657 break;
4658 case M32C_OPERAND_COND32_32 :
4659 fields->f_dsp_32_u8 = value;
4660 break;
4661 case M32C_OPERAND_COND32_40 :
4662 fields->f_dsp_40_u8 = value;
4663 break;
4664 case M32C_OPERAND_COND32J :
4665 fields->f_cond32j = value;
4666 break;
4667 case M32C_OPERAND_CR1_PREFIXED_32 :
4668 fields->f_21_3 = value;
4669 break;
4670 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4671 fields->f_13_3 = value;
4672 break;
4673 case M32C_OPERAND_CR16 :
4674 fields->f_9_3 = value;
4675 break;
4676 case M32C_OPERAND_CR2_32 :
4677 fields->f_13_3 = value;
4678 break;
4679 case M32C_OPERAND_CR3_PREFIXED_32 :
4680 fields->f_21_3 = value;
4681 break;
4682 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4683 fields->f_13_3 = value;
4684 break;
4685 case M32C_OPERAND_FLAGS16 :
4686 fields->f_9_3 = value;
4687 break;
4688 case M32C_OPERAND_FLAGS32 :
4689 fields->f_13_3 = value;
4690 break;
4691 case M32C_OPERAND_SCCOND32 :
4692 fields->f_cond16 = value;
4693 break;
4694 case M32C_OPERAND_SIZE :
4695 break;
4696
4697 default :
4698 /* xgettext:c-format */
4699 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4700 opindex);
4701 abort ();
4702 }
4703 }
4704
4705 void
4706 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4707 int opindex,
4708 CGEN_FIELDS * fields,
4709 bfd_vma value)
4710 {
4711 switch (opindex)
4712 {
4713 case M32C_OPERAND_A0 :
4714 break;
4715 case M32C_OPERAND_A1 :
4716 break;
4717 case M32C_OPERAND_AN16_PUSH_S :
4718 fields->f_4_1 = value;
4719 break;
4720 case M32C_OPERAND_BIT16AN :
4721 fields->f_dst16_an = value;
4722 break;
4723 case M32C_OPERAND_BIT16RN :
4724 fields->f_dst16_rn = value;
4725 break;
4726 case M32C_OPERAND_BIT3_S :
4727 fields->f_imm3_S = value;
4728 break;
4729 case M32C_OPERAND_BIT32ANPREFIXED :
4730 fields->f_dst32_an_prefixed = value;
4731 break;
4732 case M32C_OPERAND_BIT32ANUNPREFIXED :
4733 fields->f_dst32_an_unprefixed = value;
4734 break;
4735 case M32C_OPERAND_BIT32RNPREFIXED :
4736 fields->f_dst32_rn_prefixed_QI = value;
4737 break;
4738 case M32C_OPERAND_BIT32RNUNPREFIXED :
4739 fields->f_dst32_rn_unprefixed_QI = value;
4740 break;
4741 case M32C_OPERAND_BITBASE16_16_S8 :
4742 fields->f_dsp_16_s8 = value;
4743 break;
4744 case M32C_OPERAND_BITBASE16_16_U16 :
4745 fields->f_dsp_16_u16 = value;
4746 break;
4747 case M32C_OPERAND_BITBASE16_16_U8 :
4748 fields->f_dsp_16_u8 = value;
4749 break;
4750 case M32C_OPERAND_BITBASE16_8_U11_S :
4751 fields->f_bitbase16_u11_S = value;
4752 break;
4753 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4754 fields->f_bitbase32_16_s11_unprefixed = value;
4755 break;
4756 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4757 fields->f_bitbase32_16_s19_unprefixed = value;
4758 break;
4759 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4760 fields->f_bitbase32_16_u11_unprefixed = value;
4761 break;
4762 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4763 fields->f_bitbase32_16_u19_unprefixed = value;
4764 break;
4765 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4766 fields->f_bitbase32_16_u27_unprefixed = value;
4767 break;
4768 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4769 fields->f_bitbase32_24_s11_prefixed = value;
4770 break;
4771 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4772 fields->f_bitbase32_24_s19_prefixed = value;
4773 break;
4774 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4775 fields->f_bitbase32_24_u11_prefixed = value;
4776 break;
4777 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4778 fields->f_bitbase32_24_u19_prefixed = value;
4779 break;
4780 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4781 fields->f_bitbase32_24_u27_prefixed = value;
4782 break;
4783 case M32C_OPERAND_BITNO16R :
4784 fields->f_dsp_16_u8 = value;
4785 break;
4786 case M32C_OPERAND_BITNO32PREFIXED :
4787 fields->f_bitno32_prefixed = value;
4788 break;
4789 case M32C_OPERAND_BITNO32UNPREFIXED :
4790 fields->f_bitno32_unprefixed = value;
4791 break;
4792 case M32C_OPERAND_DSP_10_U6 :
4793 fields->f_dsp_10_u6 = value;
4794 break;
4795 case M32C_OPERAND_DSP_16_S16 :
4796 fields->f_dsp_16_s16 = value;
4797 break;
4798 case M32C_OPERAND_DSP_16_S8 :
4799 fields->f_dsp_16_s8 = value;
4800 break;
4801 case M32C_OPERAND_DSP_16_U16 :
4802 fields->f_dsp_16_u16 = value;
4803 break;
4804 case M32C_OPERAND_DSP_16_U20 :
4805 fields->f_dsp_16_u24 = value;
4806 break;
4807 case M32C_OPERAND_DSP_16_U24 :
4808 fields->f_dsp_16_u24 = value;
4809 break;
4810 case M32C_OPERAND_DSP_16_U8 :
4811 fields->f_dsp_16_u8 = value;
4812 break;
4813 case M32C_OPERAND_DSP_24_S16 :
4814 fields->f_dsp_24_s16 = value;
4815 break;
4816 case M32C_OPERAND_DSP_24_S8 :
4817 fields->f_dsp_24_s8 = value;
4818 break;
4819 case M32C_OPERAND_DSP_24_U16 :
4820 fields->f_dsp_24_u16 = value;
4821 break;
4822 case M32C_OPERAND_DSP_24_U20 :
4823 fields->f_dsp_24_u24 = value;
4824 break;
4825 case M32C_OPERAND_DSP_24_U24 :
4826 fields->f_dsp_24_u24 = value;
4827 break;
4828 case M32C_OPERAND_DSP_24_U8 :
4829 fields->f_dsp_24_u8 = value;
4830 break;
4831 case M32C_OPERAND_DSP_32_S16 :
4832 fields->f_dsp_32_s16 = value;
4833 break;
4834 case M32C_OPERAND_DSP_32_S8 :
4835 fields->f_dsp_32_s8 = value;
4836 break;
4837 case M32C_OPERAND_DSP_32_U16 :
4838 fields->f_dsp_32_u16 = value;
4839 break;
4840 case M32C_OPERAND_DSP_32_U20 :
4841 fields->f_dsp_32_u24 = value;
4842 break;
4843 case M32C_OPERAND_DSP_32_U24 :
4844 fields->f_dsp_32_u24 = value;
4845 break;
4846 case M32C_OPERAND_DSP_32_U8 :
4847 fields->f_dsp_32_u8 = value;
4848 break;
4849 case M32C_OPERAND_DSP_40_S16 :
4850 fields->f_dsp_40_s16 = value;
4851 break;
4852 case M32C_OPERAND_DSP_40_S8 :
4853 fields->f_dsp_40_s8 = value;
4854 break;
4855 case M32C_OPERAND_DSP_40_U16 :
4856 fields->f_dsp_40_u16 = value;
4857 break;
4858 case M32C_OPERAND_DSP_40_U20 :
4859 fields->f_dsp_40_u20 = value;
4860 break;
4861 case M32C_OPERAND_DSP_40_U24 :
4862 fields->f_dsp_40_u24 = value;
4863 break;
4864 case M32C_OPERAND_DSP_40_U8 :
4865 fields->f_dsp_40_u8 = value;
4866 break;
4867 case M32C_OPERAND_DSP_48_S16 :
4868 fields->f_dsp_48_s16 = value;
4869 break;
4870 case M32C_OPERAND_DSP_48_S8 :
4871 fields->f_dsp_48_s8 = value;
4872 break;
4873 case M32C_OPERAND_DSP_48_U16 :
4874 fields->f_dsp_48_u16 = value;
4875 break;
4876 case M32C_OPERAND_DSP_48_U20 :
4877 fields->f_dsp_48_u20 = value;
4878 break;
4879 case M32C_OPERAND_DSP_48_U24 :
4880 fields->f_dsp_48_u24 = value;
4881 break;
4882 case M32C_OPERAND_DSP_48_U8 :
4883 fields->f_dsp_48_u8 = value;
4884 break;
4885 case M32C_OPERAND_DSP_8_S24 :
4886 fields->f_dsp_8_s24 = value;
4887 break;
4888 case M32C_OPERAND_DSP_8_S8 :
4889 fields->f_dsp_8_s8 = value;
4890 break;
4891 case M32C_OPERAND_DSP_8_U16 :
4892 fields->f_dsp_8_u16 = value;
4893 break;
4894 case M32C_OPERAND_DSP_8_U24 :
4895 fields->f_dsp_8_u24 = value;
4896 break;
4897 case M32C_OPERAND_DSP_8_U6 :
4898 fields->f_dsp_8_u6 = value;
4899 break;
4900 case M32C_OPERAND_DSP_8_U8 :
4901 fields->f_dsp_8_u8 = value;
4902 break;
4903 case M32C_OPERAND_DST16AN :
4904 fields->f_dst16_an = value;
4905 break;
4906 case M32C_OPERAND_DST16AN_S :
4907 fields->f_dst16_an_s = value;
4908 break;
4909 case M32C_OPERAND_DST16ANHI :
4910 fields->f_dst16_an = value;
4911 break;
4912 case M32C_OPERAND_DST16ANQI :
4913 fields->f_dst16_an = value;
4914 break;
4915 case M32C_OPERAND_DST16ANQI_S :
4916 fields->f_dst16_rn_QI_s = value;
4917 break;
4918 case M32C_OPERAND_DST16ANSI :
4919 fields->f_dst16_an = value;
4920 break;
4921 case M32C_OPERAND_DST16RNEXTQI :
4922 fields->f_dst16_rn_ext = value;
4923 break;
4924 case M32C_OPERAND_DST16RNHI :
4925 fields->f_dst16_rn = value;
4926 break;
4927 case M32C_OPERAND_DST16RNQI :
4928 fields->f_dst16_rn = value;
4929 break;
4930 case M32C_OPERAND_DST16RNQI_S :
4931 fields->f_dst16_rn_QI_s = value;
4932 break;
4933 case M32C_OPERAND_DST16RNSI :
4934 fields->f_dst16_rn = value;
4935 break;
4936 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4937 fields->f_dst32_an_unprefixed = value;
4938 break;
4939 case M32C_OPERAND_DST32ANPREFIXED :
4940 fields->f_dst32_an_prefixed = value;
4941 break;
4942 case M32C_OPERAND_DST32ANPREFIXEDHI :
4943 fields->f_dst32_an_prefixed = value;
4944 break;
4945 case M32C_OPERAND_DST32ANPREFIXEDQI :
4946 fields->f_dst32_an_prefixed = value;
4947 break;
4948 case M32C_OPERAND_DST32ANPREFIXEDSI :
4949 fields->f_dst32_an_prefixed = value;
4950 break;
4951 case M32C_OPERAND_DST32ANUNPREFIXED :
4952 fields->f_dst32_an_unprefixed = value;
4953 break;
4954 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4955 fields->f_dst32_an_unprefixed = value;
4956 break;
4957 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4958 fields->f_dst32_an_unprefixed = value;
4959 break;
4960 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4961 fields->f_dst32_an_unprefixed = value;
4962 break;
4963 case M32C_OPERAND_DST32R0HI_S :
4964 break;
4965 case M32C_OPERAND_DST32R0QI_S :
4966 break;
4967 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4968 fields->f_dst32_rn_ext_unprefixed = value;
4969 break;
4970 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4971 fields->f_dst32_rn_ext_unprefixed = value;
4972 break;
4973 case M32C_OPERAND_DST32RNPREFIXEDHI :
4974 fields->f_dst32_rn_prefixed_HI = value;
4975 break;
4976 case M32C_OPERAND_DST32RNPREFIXEDQI :
4977 fields->f_dst32_rn_prefixed_QI = value;
4978 break;
4979 case M32C_OPERAND_DST32RNPREFIXEDSI :
4980 fields->f_dst32_rn_prefixed_SI = value;
4981 break;
4982 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4983 fields->f_dst32_rn_unprefixed_HI = value;
4984 break;
4985 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4986 fields->f_dst32_rn_unprefixed_QI = value;
4987 break;
4988 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4989 fields->f_dst32_rn_unprefixed_SI = value;
4990 break;
4991 case M32C_OPERAND_G :
4992 break;
4993 case M32C_OPERAND_IMM_12_S4 :
4994 fields->f_imm_12_s4 = value;
4995 break;
4996 case M32C_OPERAND_IMM_12_S4N :
4997 fields->f_imm_12_s4 = value;
4998 break;
4999 case M32C_OPERAND_IMM_13_U3 :
5000 fields->f_imm_13_u3 = value;
5001 break;
5002 case M32C_OPERAND_IMM_16_HI :
5003 fields->f_dsp_16_s16 = value;
5004 break;
5005 case M32C_OPERAND_IMM_16_QI :
5006 fields->f_dsp_16_s8 = value;
5007 break;
5008 case M32C_OPERAND_IMM_16_SI :
5009 fields->f_dsp_16_s32 = value;
5010 break;
5011 case M32C_OPERAND_IMM_20_S4 :
5012 fields->f_imm_20_s4 = value;
5013 break;
5014 case M32C_OPERAND_IMM_24_HI :
5015 fields->f_dsp_24_s16 = value;
5016 break;
5017 case M32C_OPERAND_IMM_24_QI :
5018 fields->f_dsp_24_s8 = value;
5019 break;
5020 case M32C_OPERAND_IMM_24_SI :
5021 fields->f_dsp_24_s32 = value;
5022 break;
5023 case M32C_OPERAND_IMM_32_HI :
5024 fields->f_dsp_32_s16 = value;
5025 break;
5026 case M32C_OPERAND_IMM_32_QI :
5027 fields->f_dsp_32_s8 = value;
5028 break;
5029 case M32C_OPERAND_IMM_32_SI :
5030 fields->f_dsp_32_s32 = value;
5031 break;
5032 case M32C_OPERAND_IMM_40_HI :
5033 fields->f_dsp_40_s16 = value;
5034 break;
5035 case M32C_OPERAND_IMM_40_QI :
5036 fields->f_dsp_40_s8 = value;
5037 break;
5038 case M32C_OPERAND_IMM_40_SI :
5039 fields->f_dsp_40_s32 = value;
5040 break;
5041 case M32C_OPERAND_IMM_48_HI :
5042 fields->f_dsp_48_s16 = value;
5043 break;
5044 case M32C_OPERAND_IMM_48_QI :
5045 fields->f_dsp_48_s8 = value;
5046 break;
5047 case M32C_OPERAND_IMM_48_SI :
5048 fields->f_dsp_48_s32 = value;
5049 break;
5050 case M32C_OPERAND_IMM_56_HI :
5051 fields->f_dsp_56_s16 = value;
5052 break;
5053 case M32C_OPERAND_IMM_56_QI :
5054 fields->f_dsp_56_s8 = value;
5055 break;
5056 case M32C_OPERAND_IMM_64_HI :
5057 fields->f_dsp_64_s16 = value;
5058 break;
5059 case M32C_OPERAND_IMM_8_HI :
5060 fields->f_dsp_8_s16 = value;
5061 break;
5062 case M32C_OPERAND_IMM_8_QI :
5063 fields->f_dsp_8_s8 = value;
5064 break;
5065 case M32C_OPERAND_IMM_8_S4 :
5066 fields->f_imm_8_s4 = value;
5067 break;
5068 case M32C_OPERAND_IMM_8_S4N :
5069 fields->f_imm_8_s4 = value;
5070 break;
5071 case M32C_OPERAND_IMM_SH_12_S4 :
5072 fields->f_imm_12_s4 = value;
5073 break;
5074 case M32C_OPERAND_IMM_SH_20_S4 :
5075 fields->f_imm_20_s4 = value;
5076 break;
5077 case M32C_OPERAND_IMM_SH_8_S4 :
5078 fields->f_imm_8_s4 = value;
5079 break;
5080 case M32C_OPERAND_IMM1_S :
5081 fields->f_imm1_S = value;
5082 break;
5083 case M32C_OPERAND_IMM3_S :
5084 fields->f_imm3_S = value;
5085 break;
5086 case M32C_OPERAND_LAB_16_8 :
5087 fields->f_lab_16_8 = value;
5088 break;
5089 case M32C_OPERAND_LAB_24_8 :
5090 fields->f_lab_24_8 = value;
5091 break;
5092 case M32C_OPERAND_LAB_32_8 :
5093 fields->f_lab_32_8 = value;
5094 break;
5095 case M32C_OPERAND_LAB_40_8 :
5096 fields->f_lab_40_8 = value;
5097 break;
5098 case M32C_OPERAND_LAB_5_3 :
5099 fields->f_lab_5_3 = value;
5100 break;
5101 case M32C_OPERAND_LAB_8_16 :
5102 fields->f_lab_8_16 = value;
5103 break;
5104 case M32C_OPERAND_LAB_8_24 :
5105 fields->f_lab_8_24 = value;
5106 break;
5107 case M32C_OPERAND_LAB_8_8 :
5108 fields->f_lab_8_8 = value;
5109 break;
5110 case M32C_OPERAND_LAB32_JMP_S :
5111 fields->f_lab32_jmp_s = value;
5112 break;
5113 case M32C_OPERAND_Q :
5114 break;
5115 case M32C_OPERAND_R0 :
5116 break;
5117 case M32C_OPERAND_R0H :
5118 break;
5119 case M32C_OPERAND_R0L :
5120 break;
5121 case M32C_OPERAND_R1 :
5122 break;
5123 case M32C_OPERAND_R1R2R0 :
5124 break;
5125 case M32C_OPERAND_R2 :
5126 break;
5127 case M32C_OPERAND_R2R0 :
5128 break;
5129 case M32C_OPERAND_R3 :
5130 break;
5131 case M32C_OPERAND_R3R1 :
5132 break;
5133 case M32C_OPERAND_REGSETPOP :
5134 fields->f_8_8 = value;
5135 break;
5136 case M32C_OPERAND_REGSETPUSH :
5137 fields->f_8_8 = value;
5138 break;
5139 case M32C_OPERAND_RN16_PUSH_S :
5140 fields->f_4_1 = value;
5141 break;
5142 case M32C_OPERAND_S :
5143 break;
5144 case M32C_OPERAND_SRC16AN :
5145 fields->f_src16_an = value;
5146 break;
5147 case M32C_OPERAND_SRC16ANHI :
5148 fields->f_src16_an = value;
5149 break;
5150 case M32C_OPERAND_SRC16ANQI :
5151 fields->f_src16_an = value;
5152 break;
5153 case M32C_OPERAND_SRC16RNHI :
5154 fields->f_src16_rn = value;
5155 break;
5156 case M32C_OPERAND_SRC16RNQI :
5157 fields->f_src16_rn = value;
5158 break;
5159 case M32C_OPERAND_SRC32ANPREFIXED :
5160 fields->f_src32_an_prefixed = value;
5161 break;
5162 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5163 fields->f_src32_an_prefixed = value;
5164 break;
5165 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5166 fields->f_src32_an_prefixed = value;
5167 break;
5168 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5169 fields->f_src32_an_prefixed = value;
5170 break;
5171 case M32C_OPERAND_SRC32ANUNPREFIXED :
5172 fields->f_src32_an_unprefixed = value;
5173 break;
5174 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5175 fields->f_src32_an_unprefixed = value;
5176 break;
5177 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5178 fields->f_src32_an_unprefixed = value;
5179 break;
5180 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5181 fields->f_src32_an_unprefixed = value;
5182 break;
5183 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5184 fields->f_src32_rn_prefixed_HI = value;
5185 break;
5186 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5187 fields->f_src32_rn_prefixed_QI = value;
5188 break;
5189 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5190 fields->f_src32_rn_prefixed_SI = value;
5191 break;
5192 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5193 fields->f_src32_rn_unprefixed_HI = value;
5194 break;
5195 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5196 fields->f_src32_rn_unprefixed_QI = value;
5197 break;
5198 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5199 fields->f_src32_rn_unprefixed_SI = value;
5200 break;
5201 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5202 fields->f_5_1 = value;
5203 break;
5204 case M32C_OPERAND_X :
5205 break;
5206 case M32C_OPERAND_Z :
5207 break;
5208 case M32C_OPERAND_COND16_16 :
5209 fields->f_dsp_16_u8 = value;
5210 break;
5211 case M32C_OPERAND_COND16_24 :
5212 fields->f_dsp_24_u8 = value;
5213 break;
5214 case M32C_OPERAND_COND16_32 :
5215 fields->f_dsp_32_u8 = value;
5216 break;
5217 case M32C_OPERAND_COND16C :
5218 fields->f_cond16 = value;
5219 break;
5220 case M32C_OPERAND_COND16J :
5221 fields->f_cond16 = value;
5222 break;
5223 case M32C_OPERAND_COND16J5 :
5224 fields->f_cond16j_5 = value;
5225 break;
5226 case M32C_OPERAND_COND32 :
5227 fields->f_cond32 = value;
5228 break;
5229 case M32C_OPERAND_COND32_16 :
5230 fields->f_dsp_16_u8 = value;
5231 break;
5232 case M32C_OPERAND_COND32_24 :
5233 fields->f_dsp_24_u8 = value;
5234 break;
5235 case M32C_OPERAND_COND32_32 :
5236 fields->f_dsp_32_u8 = value;
5237 break;
5238 case M32C_OPERAND_COND32_40 :
5239 fields->f_dsp_40_u8 = value;
5240 break;
5241 case M32C_OPERAND_COND32J :
5242 fields->f_cond32j = value;
5243 break;
5244 case M32C_OPERAND_CR1_PREFIXED_32 :
5245 fields->f_21_3 = value;
5246 break;
5247 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5248 fields->f_13_3 = value;
5249 break;
5250 case M32C_OPERAND_CR16 :
5251 fields->f_9_3 = value;
5252 break;
5253 case M32C_OPERAND_CR2_32 :
5254 fields->f_13_3 = value;
5255 break;
5256 case M32C_OPERAND_CR3_PREFIXED_32 :
5257 fields->f_21_3 = value;
5258 break;
5259 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5260 fields->f_13_3 = value;
5261 break;
5262 case M32C_OPERAND_FLAGS16 :
5263 fields->f_9_3 = value;
5264 break;
5265 case M32C_OPERAND_FLAGS32 :
5266 fields->f_13_3 = value;
5267 break;
5268 case M32C_OPERAND_SCCOND32 :
5269 fields->f_cond16 = value;
5270 break;
5271 case M32C_OPERAND_SIZE :
5272 break;
5273
5274 default :
5275 /* xgettext:c-format */
5276 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5277 opindex);
5278 abort ();
5279 }
5280 }
5281
5282 /* Function to call before using the instruction builder tables. */
5283
5284 void
5285 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5286 {
5287 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5288 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5289
5290 cd->insert_operand = m32c_cgen_insert_operand;
5291 cd->extract_operand = m32c_cgen_extract_operand;
5292
5293 cd->get_int_operand = m32c_cgen_get_int_operand;
5294 cd->set_int_operand = m32c_cgen_set_int_operand;
5295 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5296 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5297 }