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* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
[thirdparty/binutils-gdb.git] / opcodes / m32c-ibld.c
1 /* Instruction building/extraction support for m32c. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
7 Free Software Foundation, Inc.
8
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "safe-ctype.h"
38
39 #undef min
40 #define min(a,b) ((a) < (b) ? (a) : (b))
41 #undef max
42 #define max(a,b) ((a) > (b) ? (a) : (b))
43
44 /* Used by the ifield rtx function. */
45 #define FLD(f) (fields->f)
46
47 static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50 static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53 static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57 static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60 #if CGEN_INT_INSN_P
61 static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63 #endif
64 #if ! CGEN_INT_INSN_P
65 static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67 static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69 static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71 #endif
72 \f
73 /* Operand insertion. */
74
75 #if ! CGEN_INT_INSN_P
76
77 /* Subroutine of insert_normal. */
78
79 static CGEN_INLINE void
80 insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86 {
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101 }
102
103 #endif /* ! CGEN_INT_INSN_P */
104
105 /* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116 /* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118 /* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121 static const char *
122 insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131 {
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
140 if (word_length > 32)
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
171
172 if ((unsigned long) value > maxval)
173 {
174 /* xgettext:c-format */
175 sprintf (errbuf,
176 _("operand out of range (%lu not between 0 and %lu)"),
177 value, maxval);
178 return errbuf;
179 }
180 }
181 else
182 {
183 if (! cgen_signed_overflow_ok_p (cd))
184 {
185 long minval = - (1L << (length - 1));
186 long maxval = (1L << (length - 1)) - 1;
187
188 if (value < minval || value > maxval)
189 {
190 sprintf
191 /* xgettext:c-format */
192 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
193 value, minval, maxval);
194 return errbuf;
195 }
196 }
197 }
198
199 #if CGEN_INT_INSN_P
200
201 {
202 int shift;
203
204 if (CGEN_INSN_LSB0_P)
205 shift = (word_offset + start + 1) - length;
206 else
207 shift = total_length - (word_offset + start + length);
208 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
209 }
210
211 #else /* ! CGEN_INT_INSN_P */
212
213 {
214 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
215
216 insert_1 (cd, value, start, length, word_length, bufp);
217 }
218
219 #endif /* ! CGEN_INT_INSN_P */
220
221 return NULL;
222 }
223
224 /* Default insn builder (insert handler).
225 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
226 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
227 recorded in host byte order, otherwise BUFFER is an array of bytes
228 and the value is recorded in target byte order).
229 The result is an error message or NULL if success. */
230
231 static const char *
232 insert_insn_normal (CGEN_CPU_DESC cd,
233 const CGEN_INSN * insn,
234 CGEN_FIELDS * fields,
235 CGEN_INSN_BYTES_PTR buffer,
236 bfd_vma pc)
237 {
238 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
239 unsigned long value;
240 const CGEN_SYNTAX_CHAR_TYPE * syn;
241
242 CGEN_INIT_INSERT (cd);
243 value = CGEN_INSN_BASE_VALUE (insn);
244
245 /* If we're recording insns as numbers (rather than a string of bytes),
246 target byte order handling is deferred until later. */
247
248 #if CGEN_INT_INSN_P
249
250 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
251 CGEN_FIELDS_BITSIZE (fields), value);
252
253 #else
254
255 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
256 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
257 value);
258
259 #endif /* ! CGEN_INT_INSN_P */
260
261 /* ??? It would be better to scan the format's fields.
262 Still need to be able to insert a value based on the operand though;
263 e.g. storing a branch displacement that got resolved later.
264 Needs more thought first. */
265
266 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
267 {
268 const char *errmsg;
269
270 if (CGEN_SYNTAX_CHAR_P (* syn))
271 continue;
272
273 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
274 fields, buffer, pc);
275 if (errmsg)
276 return errmsg;
277 }
278
279 return NULL;
280 }
281
282 #if CGEN_INT_INSN_P
283 /* Cover function to store an insn value into an integral insn. Must go here
284 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
285
286 static void
287 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
288 CGEN_INSN_BYTES_PTR buf,
289 int length,
290 int insn_length,
291 CGEN_INSN_INT value)
292 {
293 /* For architectures with insns smaller than the base-insn-bitsize,
294 length may be too big. */
295 if (length > insn_length)
296 *buf = value;
297 else
298 {
299 int shift = insn_length - length;
300 /* Written this way to avoid undefined behaviour. */
301 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
302
303 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
304 }
305 }
306 #endif
307 \f
308 /* Operand extraction. */
309
310 #if ! CGEN_INT_INSN_P
311
312 /* Subroutine of extract_normal.
313 Ensure sufficient bytes are cached in EX_INFO.
314 OFFSET is the offset in bytes from the start of the insn of the value.
315 BYTES is the length of the needed value.
316 Returns 1 for success, 0 for failure. */
317
318 static CGEN_INLINE int
319 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
320 CGEN_EXTRACT_INFO *ex_info,
321 int offset,
322 int bytes,
323 bfd_vma pc)
324 {
325 /* It's doubtful that the middle part has already been fetched so
326 we don't optimize that case. kiss. */
327 unsigned int mask;
328 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
329
330 /* First do a quick check. */
331 mask = (1 << bytes) - 1;
332 if (((ex_info->valid >> offset) & mask) == mask)
333 return 1;
334
335 /* Search for the first byte we need to read. */
336 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
337 if (! (mask & ex_info->valid))
338 break;
339
340 if (bytes)
341 {
342 int status;
343
344 pc += offset;
345 status = (*info->read_memory_func)
346 (pc, ex_info->insn_bytes + offset, bytes, info);
347
348 if (status != 0)
349 {
350 (*info->memory_error_func) (status, pc, info);
351 return 0;
352 }
353
354 ex_info->valid |= ((1 << bytes) - 1) << offset;
355 }
356
357 return 1;
358 }
359
360 /* Subroutine of extract_normal. */
361
362 static CGEN_INLINE long
363 extract_1 (CGEN_CPU_DESC cd,
364 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
365 int start,
366 int length,
367 int word_length,
368 unsigned char *bufp,
369 bfd_vma pc ATTRIBUTE_UNUSED)
370 {
371 unsigned long x;
372 int shift;
373
374 x = cgen_get_insn_value (cd, bufp, word_length);
375
376 if (CGEN_INSN_LSB0_P)
377 shift = (start + 1) - length;
378 else
379 shift = (word_length - (start + length));
380 return x >> shift;
381 }
382
383 #endif /* ! CGEN_INT_INSN_P */
384
385 /* Default extraction routine.
386
387 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
388 or sometimes less for cases like the m32r where the base insn size is 32
389 but some insns are 16 bits.
390 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
391 but for generality we take a bitmask of all of them.
392 WORD_OFFSET is the offset in bits from the start of the insn of the value.
393 WORD_LENGTH is the length of the word in bits in which the value resides.
394 START is the starting bit number in the word, architecture origin.
395 LENGTH is the length of VALUE in bits.
396 TOTAL_LENGTH is the total length of the insn in bits.
397
398 Returns 1 for success, 0 for failure. */
399
400 /* ??? The return code isn't properly used. wip. */
401
402 /* ??? This doesn't handle bfd_vma's. Create another function when
403 necessary. */
404
405 static int
406 extract_normal (CGEN_CPU_DESC cd,
407 #if ! CGEN_INT_INSN_P
408 CGEN_EXTRACT_INFO *ex_info,
409 #else
410 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
411 #endif
412 CGEN_INSN_INT insn_value,
413 unsigned int attrs,
414 unsigned int word_offset,
415 unsigned int start,
416 unsigned int length,
417 unsigned int word_length,
418 unsigned int total_length,
419 #if ! CGEN_INT_INSN_P
420 bfd_vma pc,
421 #else
422 bfd_vma pc ATTRIBUTE_UNUSED,
423 #endif
424 long *valuep)
425 {
426 long value, mask;
427
428 /* If LENGTH is zero, this operand doesn't contribute to the value
429 so give it a standard value of zero. */
430 if (length == 0)
431 {
432 *valuep = 0;
433 return 1;
434 }
435
436 if (word_length > 32)
437 abort ();
438
439 /* For architectures with insns smaller than the insn-base-bitsize,
440 word_length may be too big. */
441 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
442 {
443 if (word_offset == 0
444 && word_length > total_length)
445 word_length = total_length;
446 }
447
448 /* Does the value reside in INSN_VALUE, and at the right alignment? */
449
450 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
451 {
452 if (CGEN_INSN_LSB0_P)
453 value = insn_value >> ((word_offset + start + 1) - length);
454 else
455 value = insn_value >> (total_length - ( word_offset + start + length));
456 }
457
458 #if ! CGEN_INT_INSN_P
459
460 else
461 {
462 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
463
464 if (word_length > 32)
465 abort ();
466
467 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
468 return 0;
469
470 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
471 }
472
473 #endif /* ! CGEN_INT_INSN_P */
474
475 /* Written this way to avoid undefined behaviour. */
476 mask = (((1L << (length - 1)) - 1) << 1) | 1;
477
478 value &= mask;
479 /* sign extend? */
480 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
481 && (value & (1L << (length - 1))))
482 value |= ~mask;
483
484 *valuep = value;
485
486 return 1;
487 }
488
489 /* Default insn extractor.
490
491 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
492 The extracted fields are stored in FIELDS.
493 EX_INFO is used to handle reading variable length insns.
494 Return the length of the insn in bits, or 0 if no match,
495 or -1 if an error occurs fetching data (memory_error_func will have
496 been called). */
497
498 static int
499 extract_insn_normal (CGEN_CPU_DESC cd,
500 const CGEN_INSN *insn,
501 CGEN_EXTRACT_INFO *ex_info,
502 CGEN_INSN_INT insn_value,
503 CGEN_FIELDS *fields,
504 bfd_vma pc)
505 {
506 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
507 const CGEN_SYNTAX_CHAR_TYPE *syn;
508
509 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
510
511 CGEN_INIT_EXTRACT (cd);
512
513 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
514 {
515 int length;
516
517 if (CGEN_SYNTAX_CHAR_P (*syn))
518 continue;
519
520 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
521 ex_info, insn_value, fields, pc);
522 if (length <= 0)
523 return length;
524 }
525
526 /* We recognized and successfully extracted this insn. */
527 return CGEN_INSN_BITSIZE (insn);
528 }
529 \f
530 /* Machine generated code added here. */
531
532 const char * m32c_cgen_insert_operand
533 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
534
535 /* Main entry point for operand insertion.
536
537 This function is basically just a big switch statement. Earlier versions
538 used tables to look up the function to use, but
539 - if the table contains both assembler and disassembler functions then
540 the disassembler contains much of the assembler and vice-versa,
541 - there's a lot of inlining possibilities as things grow,
542 - using a switch statement avoids the function call overhead.
543
544 This function could be moved into `parse_insn_normal', but keeping it
545 separate makes clear the interface between `parse_insn_normal' and each of
546 the handlers. It's also needed by GAS to insert operands that couldn't be
547 resolved during parsing. */
548
549 const char *
550 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
551 int opindex,
552 CGEN_FIELDS * fields,
553 CGEN_INSN_BYTES_PTR buffer,
554 bfd_vma pc ATTRIBUTE_UNUSED)
555 {
556 const char * errmsg = NULL;
557 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
558
559 switch (opindex)
560 {
561 case M32C_OPERAND_A0 :
562 break;
563 case M32C_OPERAND_A1 :
564 break;
565 case M32C_OPERAND_AN16_PUSH_S :
566 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
567 break;
568 case M32C_OPERAND_BIT16AN :
569 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
570 break;
571 case M32C_OPERAND_BIT16RN :
572 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
573 break;
574 case M32C_OPERAND_BIT32ANPREFIXED :
575 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
576 break;
577 case M32C_OPERAND_BIT32ANUNPREFIXED :
578 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
579 break;
580 case M32C_OPERAND_BIT32RNPREFIXED :
581 {
582 long value = fields->f_dst32_rn_prefixed_QI;
583 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
584 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
585 }
586 break;
587 case M32C_OPERAND_BIT32RNUNPREFIXED :
588 {
589 long value = fields->f_dst32_rn_unprefixed_QI;
590 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
591 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
592 }
593 break;
594 case M32C_OPERAND_BITBASE16_16_S8 :
595 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
596 break;
597 case M32C_OPERAND_BITBASE16_16_U16 :
598 {
599 long value = fields->f_dsp_16_u16;
600 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
601 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
602 }
603 break;
604 case M32C_OPERAND_BITBASE16_16_U8 :
605 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
606 break;
607 case M32C_OPERAND_BITBASE16_8_U11_S :
608 {
609 {
610 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
611 FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
612 }
613 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
614 if (errmsg)
615 break;
616 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
617 if (errmsg)
618 break;
619 }
620 break;
621 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
622 {
623 {
624 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
625 FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
626 }
627 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
628 if (errmsg)
629 break;
630 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
631 if (errmsg)
632 break;
633 }
634 break;
635 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
636 {
637 {
638 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
639 FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
640 }
641 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
642 if (errmsg)
643 break;
644 {
645 long value = fields->f_dsp_16_s16;
646 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
647 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
648 }
649 if (errmsg)
650 break;
651 }
652 break;
653 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
654 {
655 {
656 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
657 FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
658 }
659 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
660 if (errmsg)
661 break;
662 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
663 if (errmsg)
664 break;
665 }
666 break;
667 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
668 {
669 {
670 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
671 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
672 }
673 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
674 if (errmsg)
675 break;
676 {
677 long value = fields->f_dsp_16_u16;
678 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
679 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
680 }
681 if (errmsg)
682 break;
683 }
684 break;
685 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
686 {
687 {
688 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
689 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
690 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
691 }
692 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
693 if (errmsg)
694 break;
695 {
696 long value = fields->f_dsp_16_u16;
697 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
698 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
699 }
700 if (errmsg)
701 break;
702 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
703 if (errmsg)
704 break;
705 }
706 break;
707 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
708 {
709 {
710 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
711 FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
712 }
713 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
714 if (errmsg)
715 break;
716 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
717 if (errmsg)
718 break;
719 }
720 break;
721 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
722 {
723 {
724 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
725 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
726 FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
727 }
728 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
729 if (errmsg)
730 break;
731 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
732 if (errmsg)
733 break;
734 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
735 if (errmsg)
736 break;
737 }
738 break;
739 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
740 {
741 {
742 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
743 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
744 }
745 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
746 if (errmsg)
747 break;
748 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
749 if (errmsg)
750 break;
751 }
752 break;
753 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
754 {
755 {
756 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
757 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
758 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
759 }
760 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
761 if (errmsg)
762 break;
763 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
764 if (errmsg)
765 break;
766 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
767 if (errmsg)
768 break;
769 }
770 break;
771 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
772 {
773 {
774 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
775 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
776 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
777 }
778 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
779 if (errmsg)
780 break;
781 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
782 if (errmsg)
783 break;
784 {
785 long value = fields->f_dsp_32_u16;
786 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
787 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
788 }
789 if (errmsg)
790 break;
791 }
792 break;
793 case M32C_OPERAND_BITNO16R :
794 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
795 break;
796 case M32C_OPERAND_BITNO32PREFIXED :
797 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
798 break;
799 case M32C_OPERAND_BITNO32UNPREFIXED :
800 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
801 break;
802 case M32C_OPERAND_DSP_10_U6 :
803 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
804 break;
805 case M32C_OPERAND_DSP_16_S16 :
806 {
807 long value = fields->f_dsp_16_s16;
808 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
809 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
810 }
811 break;
812 case M32C_OPERAND_DSP_16_S8 :
813 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
814 break;
815 case M32C_OPERAND_DSP_16_U16 :
816 {
817 long value = fields->f_dsp_16_u16;
818 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
819 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
820 }
821 break;
822 case M32C_OPERAND_DSP_16_U20 :
823 {
824 {
825 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
826 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
827 }
828 {
829 long value = fields->f_dsp_16_u16;
830 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
831 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
832 }
833 if (errmsg)
834 break;
835 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
836 if (errmsg)
837 break;
838 }
839 break;
840 case M32C_OPERAND_DSP_16_U24 :
841 {
842 {
843 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
844 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
845 }
846 {
847 long value = fields->f_dsp_16_u16;
848 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
849 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
850 }
851 if (errmsg)
852 break;
853 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
854 if (errmsg)
855 break;
856 }
857 break;
858 case M32C_OPERAND_DSP_16_U8 :
859 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
860 break;
861 case M32C_OPERAND_DSP_24_S16 :
862 {
863 {
864 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
865 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
866 }
867 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
868 if (errmsg)
869 break;
870 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
871 if (errmsg)
872 break;
873 }
874 break;
875 case M32C_OPERAND_DSP_24_S8 :
876 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
877 break;
878 case M32C_OPERAND_DSP_24_U16 :
879 {
880 {
881 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
882 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255));
883 }
884 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
885 if (errmsg)
886 break;
887 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
888 if (errmsg)
889 break;
890 }
891 break;
892 case M32C_OPERAND_DSP_24_U20 :
893 {
894 {
895 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
896 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
897 }
898 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
899 if (errmsg)
900 break;
901 {
902 long value = fields->f_dsp_32_u16;
903 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
904 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
905 }
906 if (errmsg)
907 break;
908 }
909 break;
910 case M32C_OPERAND_DSP_24_U24 :
911 {
912 {
913 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
914 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
915 }
916 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
917 if (errmsg)
918 break;
919 {
920 long value = fields->f_dsp_32_u16;
921 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
922 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
923 }
924 if (errmsg)
925 break;
926 }
927 break;
928 case M32C_OPERAND_DSP_24_U8 :
929 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
930 break;
931 case M32C_OPERAND_DSP_32_S16 :
932 {
933 long value = fields->f_dsp_32_s16;
934 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
935 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
936 }
937 break;
938 case M32C_OPERAND_DSP_32_S8 :
939 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
940 break;
941 case M32C_OPERAND_DSP_32_U16 :
942 {
943 long value = fields->f_dsp_32_u16;
944 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
945 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
946 }
947 break;
948 case M32C_OPERAND_DSP_32_U20 :
949 {
950 long value = fields->f_dsp_32_u24;
951 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
952 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
953 }
954 break;
955 case M32C_OPERAND_DSP_32_U24 :
956 {
957 long value = fields->f_dsp_32_u24;
958 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
959 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
960 }
961 break;
962 case M32C_OPERAND_DSP_32_U8 :
963 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
964 break;
965 case M32C_OPERAND_DSP_40_S16 :
966 {
967 long value = fields->f_dsp_40_s16;
968 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
969 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
970 }
971 break;
972 case M32C_OPERAND_DSP_40_S8 :
973 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
974 break;
975 case M32C_OPERAND_DSP_40_U16 :
976 {
977 long value = fields->f_dsp_40_u16;
978 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
979 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
980 }
981 break;
982 case M32C_OPERAND_DSP_40_U24 :
983 {
984 long value = fields->f_dsp_40_u24;
985 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
986 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
987 }
988 break;
989 case M32C_OPERAND_DSP_40_U8 :
990 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
991 break;
992 case M32C_OPERAND_DSP_48_S16 :
993 {
994 long value = fields->f_dsp_48_s16;
995 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
996 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
997 }
998 break;
999 case M32C_OPERAND_DSP_48_S8 :
1000 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1001 break;
1002 case M32C_OPERAND_DSP_48_U16 :
1003 {
1004 long value = fields->f_dsp_48_u16;
1005 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1006 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1007 }
1008 break;
1009 case M32C_OPERAND_DSP_48_U24 :
1010 {
1011 {
1012 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1013 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1014 }
1015 {
1016 long value = fields->f_dsp_48_u16;
1017 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1018 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1019 }
1020 if (errmsg)
1021 break;
1022 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1023 if (errmsg)
1024 break;
1025 }
1026 break;
1027 case M32C_OPERAND_DSP_48_U8 :
1028 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1029 break;
1030 case M32C_OPERAND_DSP_8_S8 :
1031 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1032 break;
1033 case M32C_OPERAND_DSP_8_U16 :
1034 {
1035 long value = fields->f_dsp_8_u16;
1036 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1037 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1038 }
1039 break;
1040 case M32C_OPERAND_DSP_8_U24 :
1041 {
1042 long value = fields->f_dsp_8_u24;
1043 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1044 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1045 }
1046 break;
1047 case M32C_OPERAND_DSP_8_U6 :
1048 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1049 break;
1050 case M32C_OPERAND_DSP_8_U8 :
1051 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1052 break;
1053 case M32C_OPERAND_DST16AN :
1054 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1055 break;
1056 case M32C_OPERAND_DST16AN_S :
1057 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1058 break;
1059 case M32C_OPERAND_DST16ANHI :
1060 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1061 break;
1062 case M32C_OPERAND_DST16ANQI :
1063 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1064 break;
1065 case M32C_OPERAND_DST16ANQI_S :
1066 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1067 break;
1068 case M32C_OPERAND_DST16ANSI :
1069 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1070 break;
1071 case M32C_OPERAND_DST16RNEXTQI :
1072 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1073 break;
1074 case M32C_OPERAND_DST16RNHI :
1075 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1076 break;
1077 case M32C_OPERAND_DST16RNQI :
1078 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1079 break;
1080 case M32C_OPERAND_DST16RNQI_S :
1081 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1082 break;
1083 case M32C_OPERAND_DST16RNSI :
1084 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1085 break;
1086 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1087 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1088 break;
1089 case M32C_OPERAND_DST32ANPREFIXED :
1090 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1091 break;
1092 case M32C_OPERAND_DST32ANPREFIXEDHI :
1093 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1094 break;
1095 case M32C_OPERAND_DST32ANPREFIXEDQI :
1096 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1097 break;
1098 case M32C_OPERAND_DST32ANPREFIXEDSI :
1099 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1100 break;
1101 case M32C_OPERAND_DST32ANUNPREFIXED :
1102 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1103 break;
1104 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1105 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1106 break;
1107 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1108 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1109 break;
1110 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1111 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1112 break;
1113 case M32C_OPERAND_DST32R0HI_S :
1114 break;
1115 case M32C_OPERAND_DST32R0QI_S :
1116 break;
1117 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1118 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1119 break;
1120 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1121 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1122 break;
1123 case M32C_OPERAND_DST32RNPREFIXEDHI :
1124 {
1125 long value = fields->f_dst32_rn_prefixed_HI;
1126 value = ((((value) + (2))) % (4));
1127 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1128 }
1129 break;
1130 case M32C_OPERAND_DST32RNPREFIXEDQI :
1131 {
1132 long value = fields->f_dst32_rn_prefixed_QI;
1133 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1134 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1135 }
1136 break;
1137 case M32C_OPERAND_DST32RNPREFIXEDSI :
1138 {
1139 long value = fields->f_dst32_rn_prefixed_SI;
1140 value = ((value) + (2));
1141 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1142 }
1143 break;
1144 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1145 {
1146 long value = fields->f_dst32_rn_unprefixed_HI;
1147 value = ((((value) + (2))) % (4));
1148 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1149 }
1150 break;
1151 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1152 {
1153 long value = fields->f_dst32_rn_unprefixed_QI;
1154 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1155 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1156 }
1157 break;
1158 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1159 {
1160 long value = fields->f_dst32_rn_unprefixed_SI;
1161 value = ((value) + (2));
1162 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1163 }
1164 break;
1165 case M32C_OPERAND_G :
1166 break;
1167 case M32C_OPERAND_IMM_12_S4 :
1168 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1169 break;
1170 case M32C_OPERAND_IMM_13_U3 :
1171 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1172 break;
1173 case M32C_OPERAND_IMM_16_HI :
1174 {
1175 long value = fields->f_dsp_16_s16;
1176 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1177 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1178 }
1179 break;
1180 case M32C_OPERAND_IMM_16_QI :
1181 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1182 break;
1183 case M32C_OPERAND_IMM_16_SI :
1184 {
1185 {
1186 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1187 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1188 }
1189 {
1190 long value = fields->f_dsp_16_u16;
1191 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1192 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1193 }
1194 if (errmsg)
1195 break;
1196 {
1197 long value = fields->f_dsp_32_u16;
1198 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1199 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1200 }
1201 if (errmsg)
1202 break;
1203 }
1204 break;
1205 case M32C_OPERAND_IMM_20_S4 :
1206 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1207 break;
1208 case M32C_OPERAND_IMM_24_HI :
1209 {
1210 {
1211 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1212 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1213 }
1214 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1215 if (errmsg)
1216 break;
1217 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1218 if (errmsg)
1219 break;
1220 }
1221 break;
1222 case M32C_OPERAND_IMM_24_QI :
1223 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1224 break;
1225 case M32C_OPERAND_IMM_24_SI :
1226 {
1227 {
1228 FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1229 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1230 }
1231 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1232 if (errmsg)
1233 break;
1234 {
1235 long value = fields->f_dsp_32_u24;
1236 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1237 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1238 }
1239 if (errmsg)
1240 break;
1241 }
1242 break;
1243 case M32C_OPERAND_IMM_32_HI :
1244 {
1245 long value = fields->f_dsp_32_s16;
1246 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1247 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1248 }
1249 break;
1250 case M32C_OPERAND_IMM_32_QI :
1251 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1252 break;
1253 case M32C_OPERAND_IMM_32_SI :
1254 {
1255 long value = fields->f_dsp_32_s32;
1256 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1257 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1258 }
1259 break;
1260 case M32C_OPERAND_IMM_40_HI :
1261 {
1262 long value = fields->f_dsp_40_s16;
1263 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1264 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1265 }
1266 break;
1267 case M32C_OPERAND_IMM_40_QI :
1268 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1269 break;
1270 case M32C_OPERAND_IMM_40_SI :
1271 {
1272 {
1273 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1274 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1275 }
1276 {
1277 long value = fields->f_dsp_40_u24;
1278 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1279 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1280 }
1281 if (errmsg)
1282 break;
1283 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1284 if (errmsg)
1285 break;
1286 }
1287 break;
1288 case M32C_OPERAND_IMM_48_HI :
1289 {
1290 long value = fields->f_dsp_48_s16;
1291 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1292 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1293 }
1294 break;
1295 case M32C_OPERAND_IMM_48_QI :
1296 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1297 break;
1298 case M32C_OPERAND_IMM_48_SI :
1299 {
1300 {
1301 FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1302 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1303 }
1304 {
1305 long value = fields->f_dsp_48_u16;
1306 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1307 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1308 }
1309 if (errmsg)
1310 break;
1311 {
1312 long value = fields->f_dsp_64_u16;
1313 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1314 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1315 }
1316 if (errmsg)
1317 break;
1318 }
1319 break;
1320 case M32C_OPERAND_IMM_56_HI :
1321 {
1322 {
1323 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1324 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1325 }
1326 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1327 if (errmsg)
1328 break;
1329 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1330 if (errmsg)
1331 break;
1332 }
1333 break;
1334 case M32C_OPERAND_IMM_56_QI :
1335 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1336 break;
1337 case M32C_OPERAND_IMM_64_HI :
1338 {
1339 long value = fields->f_dsp_64_s16;
1340 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1341 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1342 }
1343 break;
1344 case M32C_OPERAND_IMM_8_HI :
1345 {
1346 long value = fields->f_dsp_8_s16;
1347 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1348 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1349 }
1350 break;
1351 case M32C_OPERAND_IMM_8_QI :
1352 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1353 break;
1354 case M32C_OPERAND_IMM_8_S4 :
1355 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1356 break;
1357 case M32C_OPERAND_IMM_SH_12_S4 :
1358 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1359 break;
1360 case M32C_OPERAND_IMM_SH_20_S4 :
1361 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1362 break;
1363 case M32C_OPERAND_IMM_SH_8_S4 :
1364 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1365 break;
1366 case M32C_OPERAND_IMM1_S :
1367 {
1368 long value = fields->f_imm1_S;
1369 value = ((value) - (1));
1370 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1371 }
1372 break;
1373 case M32C_OPERAND_IMM3_S :
1374 {
1375 {
1376 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1377 FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1378 }
1379 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1380 if (errmsg)
1381 break;
1382 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1383 if (errmsg)
1384 break;
1385 }
1386 break;
1387 case M32C_OPERAND_LAB_16_8 :
1388 {
1389 long value = fields->f_lab_16_8;
1390 value = ((value) - (((pc) + (2))));
1391 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1392 }
1393 break;
1394 case M32C_OPERAND_LAB_24_8 :
1395 {
1396 long value = fields->f_lab_24_8;
1397 value = ((value) - (((pc) + (2))));
1398 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1399 }
1400 break;
1401 case M32C_OPERAND_LAB_32_8 :
1402 {
1403 long value = fields->f_lab_32_8;
1404 value = ((value) - (((pc) + (2))));
1405 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1406 }
1407 break;
1408 case M32C_OPERAND_LAB_40_8 :
1409 {
1410 long value = fields->f_lab_40_8;
1411 value = ((value) - (((pc) + (2))));
1412 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1413 }
1414 break;
1415 case M32C_OPERAND_LAB_5_3 :
1416 {
1417 long value = fields->f_lab_5_3;
1418 value = ((value) - (((pc) + (2))));
1419 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1420 }
1421 break;
1422 case M32C_OPERAND_LAB_8_16 :
1423 {
1424 long value = fields->f_lab_8_16;
1425 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1426 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1427 }
1428 break;
1429 case M32C_OPERAND_LAB_8_24 :
1430 {
1431 long value = fields->f_lab_8_24;
1432 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1433 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1434 }
1435 break;
1436 case M32C_OPERAND_LAB_8_8 :
1437 {
1438 long value = fields->f_lab_8_8;
1439 value = ((value) - (((pc) + (1))));
1440 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1441 }
1442 break;
1443 case M32C_OPERAND_LAB32_JMP_S :
1444 {
1445 {
1446 SI tmp_val;
1447 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1448 FLD (f_7_1) = ((tmp_val) & (1));
1449 FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1));
1450 }
1451 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1452 if (errmsg)
1453 break;
1454 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1455 if (errmsg)
1456 break;
1457 }
1458 break;
1459 case M32C_OPERAND_Q :
1460 break;
1461 case M32C_OPERAND_R0 :
1462 break;
1463 case M32C_OPERAND_R0H :
1464 break;
1465 case M32C_OPERAND_R0L :
1466 break;
1467 case M32C_OPERAND_R1 :
1468 break;
1469 case M32C_OPERAND_R1R2R0 :
1470 break;
1471 case M32C_OPERAND_R2 :
1472 break;
1473 case M32C_OPERAND_R2R0 :
1474 break;
1475 case M32C_OPERAND_R3 :
1476 break;
1477 case M32C_OPERAND_R3R1 :
1478 break;
1479 case M32C_OPERAND_REGSETPOP :
1480 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1481 break;
1482 case M32C_OPERAND_REGSETPUSH :
1483 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1484 break;
1485 case M32C_OPERAND_RN16_PUSH_S :
1486 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1487 break;
1488 case M32C_OPERAND_S :
1489 break;
1490 case M32C_OPERAND_SRC16AN :
1491 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1492 break;
1493 case M32C_OPERAND_SRC16ANHI :
1494 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1495 break;
1496 case M32C_OPERAND_SRC16ANQI :
1497 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1498 break;
1499 case M32C_OPERAND_SRC16RNHI :
1500 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1501 break;
1502 case M32C_OPERAND_SRC16RNQI :
1503 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1504 break;
1505 case M32C_OPERAND_SRC32ANPREFIXED :
1506 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1507 break;
1508 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1509 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1510 break;
1511 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1512 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1513 break;
1514 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1515 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1516 break;
1517 case M32C_OPERAND_SRC32ANUNPREFIXED :
1518 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1519 break;
1520 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1521 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1522 break;
1523 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1524 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1525 break;
1526 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1527 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1528 break;
1529 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1530 {
1531 long value = fields->f_src32_rn_prefixed_HI;
1532 value = ((((value) + (2))) % (4));
1533 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1534 }
1535 break;
1536 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1537 {
1538 long value = fields->f_src32_rn_prefixed_QI;
1539 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1540 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1541 }
1542 break;
1543 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1544 {
1545 long value = fields->f_src32_rn_prefixed_SI;
1546 value = ((value) + (2));
1547 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1548 }
1549 break;
1550 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1551 {
1552 long value = fields->f_src32_rn_unprefixed_HI;
1553 value = ((((value) + (2))) % (4));
1554 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1555 }
1556 break;
1557 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1558 {
1559 long value = fields->f_src32_rn_unprefixed_QI;
1560 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1561 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1562 }
1563 break;
1564 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1565 {
1566 long value = fields->f_src32_rn_unprefixed_SI;
1567 value = ((value) + (2));
1568 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1569 }
1570 break;
1571 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1572 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1573 break;
1574 case M32C_OPERAND_X :
1575 break;
1576 case M32C_OPERAND_Z :
1577 break;
1578 case M32C_OPERAND_COND16_16 :
1579 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1580 break;
1581 case M32C_OPERAND_COND16_24 :
1582 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1583 break;
1584 case M32C_OPERAND_COND16_32 :
1585 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1586 break;
1587 case M32C_OPERAND_COND16C :
1588 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1589 break;
1590 case M32C_OPERAND_COND16J :
1591 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1592 break;
1593 case M32C_OPERAND_COND16J5 :
1594 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1595 break;
1596 case M32C_OPERAND_COND32 :
1597 {
1598 {
1599 FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1));
1600 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1601 }
1602 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1603 if (errmsg)
1604 break;
1605 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1606 if (errmsg)
1607 break;
1608 }
1609 break;
1610 case M32C_OPERAND_COND32_16 :
1611 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1612 break;
1613 case M32C_OPERAND_COND32_24 :
1614 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1615 break;
1616 case M32C_OPERAND_COND32_32 :
1617 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1618 break;
1619 case M32C_OPERAND_COND32_40 :
1620 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1621 break;
1622 case M32C_OPERAND_COND32J :
1623 {
1624 {
1625 FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7));
1626 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1627 }
1628 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1629 if (errmsg)
1630 break;
1631 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1632 if (errmsg)
1633 break;
1634 }
1635 break;
1636 case M32C_OPERAND_CR1_PREFIXED_32 :
1637 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1638 break;
1639 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1640 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1641 break;
1642 case M32C_OPERAND_CR16 :
1643 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1644 break;
1645 case M32C_OPERAND_CR2_32 :
1646 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1647 break;
1648 case M32C_OPERAND_CR3_PREFIXED_32 :
1649 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1650 break;
1651 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1652 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1653 break;
1654 case M32C_OPERAND_FLAGS16 :
1655 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1656 break;
1657 case M32C_OPERAND_FLAGS32 :
1658 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1659 break;
1660 case M32C_OPERAND_SCCOND32 :
1661 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1662 break;
1663 case M32C_OPERAND_SIZE :
1664 break;
1665
1666 default :
1667 /* xgettext:c-format */
1668 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1669 opindex);
1670 abort ();
1671 }
1672
1673 return errmsg;
1674 }
1675
1676 int m32c_cgen_extract_operand
1677 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1678
1679 /* Main entry point for operand extraction.
1680 The result is <= 0 for error, >0 for success.
1681 ??? Actual values aren't well defined right now.
1682
1683 This function is basically just a big switch statement. Earlier versions
1684 used tables to look up the function to use, but
1685 - if the table contains both assembler and disassembler functions then
1686 the disassembler contains much of the assembler and vice-versa,
1687 - there's a lot of inlining possibilities as things grow,
1688 - using a switch statement avoids the function call overhead.
1689
1690 This function could be moved into `print_insn_normal', but keeping it
1691 separate makes clear the interface between `print_insn_normal' and each of
1692 the handlers. */
1693
1694 int
1695 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1696 int opindex,
1697 CGEN_EXTRACT_INFO *ex_info,
1698 CGEN_INSN_INT insn_value,
1699 CGEN_FIELDS * fields,
1700 bfd_vma pc)
1701 {
1702 /* Assume success (for those operands that are nops). */
1703 int length = 1;
1704 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1705
1706 switch (opindex)
1707 {
1708 case M32C_OPERAND_A0 :
1709 break;
1710 case M32C_OPERAND_A1 :
1711 break;
1712 case M32C_OPERAND_AN16_PUSH_S :
1713 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1714 break;
1715 case M32C_OPERAND_BIT16AN :
1716 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1717 break;
1718 case M32C_OPERAND_BIT16RN :
1719 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1720 break;
1721 case M32C_OPERAND_BIT32ANPREFIXED :
1722 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1723 break;
1724 case M32C_OPERAND_BIT32ANUNPREFIXED :
1725 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1726 break;
1727 case M32C_OPERAND_BIT32RNPREFIXED :
1728 {
1729 long value;
1730 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1731 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1732 fields->f_dst32_rn_prefixed_QI = value;
1733 }
1734 break;
1735 case M32C_OPERAND_BIT32RNUNPREFIXED :
1736 {
1737 long value;
1738 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1739 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1740 fields->f_dst32_rn_unprefixed_QI = value;
1741 }
1742 break;
1743 case M32C_OPERAND_BITBASE16_16_S8 :
1744 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1745 break;
1746 case M32C_OPERAND_BITBASE16_16_U16 :
1747 {
1748 long value;
1749 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1750 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1751 fields->f_dsp_16_u16 = value;
1752 }
1753 break;
1754 case M32C_OPERAND_BITBASE16_16_U8 :
1755 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1756 break;
1757 case M32C_OPERAND_BITBASE16_8_U11_S :
1758 {
1759 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1760 if (length <= 0) break;
1761 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1762 if (length <= 0) break;
1763 {
1764 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1765 }
1766 }
1767 break;
1768 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1769 {
1770 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1771 if (length <= 0) break;
1772 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1773 if (length <= 0) break;
1774 {
1775 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1776 }
1777 }
1778 break;
1779 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1780 {
1781 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1782 if (length <= 0) break;
1783 {
1784 long value;
1785 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1786 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1787 fields->f_dsp_16_s16 = value;
1788 }
1789 if (length <= 0) break;
1790 {
1791 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1792 }
1793 }
1794 break;
1795 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1796 {
1797 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1798 if (length <= 0) break;
1799 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1800 if (length <= 0) break;
1801 {
1802 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1803 }
1804 }
1805 break;
1806 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1807 {
1808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1809 if (length <= 0) break;
1810 {
1811 long value;
1812 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1813 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1814 fields->f_dsp_16_u16 = value;
1815 }
1816 if (length <= 0) break;
1817 {
1818 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1819 }
1820 }
1821 break;
1822 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1823 {
1824 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1825 if (length <= 0) break;
1826 {
1827 long value;
1828 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1829 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1830 fields->f_dsp_16_u16 = value;
1831 }
1832 if (length <= 0) break;
1833 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1834 if (length <= 0) break;
1835 {
1836 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1837 }
1838 }
1839 break;
1840 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1841 {
1842 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1843 if (length <= 0) break;
1844 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1845 if (length <= 0) break;
1846 {
1847 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1848 }
1849 }
1850 break;
1851 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1852 {
1853 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1854 if (length <= 0) break;
1855 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1856 if (length <= 0) break;
1857 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1858 if (length <= 0) break;
1859 {
1860 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1861 }
1862 }
1863 break;
1864 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1865 {
1866 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1867 if (length <= 0) break;
1868 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1869 if (length <= 0) break;
1870 {
1871 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1872 }
1873 }
1874 break;
1875 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1876 {
1877 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1878 if (length <= 0) break;
1879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1880 if (length <= 0) break;
1881 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1882 if (length <= 0) break;
1883 {
1884 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1885 }
1886 }
1887 break;
1888 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1889 {
1890 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1891 if (length <= 0) break;
1892 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1893 if (length <= 0) break;
1894 {
1895 long value;
1896 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1897 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1898 fields->f_dsp_32_u16 = value;
1899 }
1900 if (length <= 0) break;
1901 {
1902 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1903 }
1904 }
1905 break;
1906 case M32C_OPERAND_BITNO16R :
1907 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1908 break;
1909 case M32C_OPERAND_BITNO32PREFIXED :
1910 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1911 break;
1912 case M32C_OPERAND_BITNO32UNPREFIXED :
1913 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1914 break;
1915 case M32C_OPERAND_DSP_10_U6 :
1916 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1917 break;
1918 case M32C_OPERAND_DSP_16_S16 :
1919 {
1920 long value;
1921 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1922 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1923 fields->f_dsp_16_s16 = value;
1924 }
1925 break;
1926 case M32C_OPERAND_DSP_16_S8 :
1927 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1928 break;
1929 case M32C_OPERAND_DSP_16_U16 :
1930 {
1931 long value;
1932 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1933 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1934 fields->f_dsp_16_u16 = value;
1935 }
1936 break;
1937 case M32C_OPERAND_DSP_16_U20 :
1938 {
1939 {
1940 long value;
1941 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1942 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1943 fields->f_dsp_16_u16 = value;
1944 }
1945 if (length <= 0) break;
1946 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1947 if (length <= 0) break;
1948 {
1949 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1950 }
1951 }
1952 break;
1953 case M32C_OPERAND_DSP_16_U24 :
1954 {
1955 {
1956 long value;
1957 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1958 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1959 fields->f_dsp_16_u16 = value;
1960 }
1961 if (length <= 0) break;
1962 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1963 if (length <= 0) break;
1964 {
1965 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1966 }
1967 }
1968 break;
1969 case M32C_OPERAND_DSP_16_U8 :
1970 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1971 break;
1972 case M32C_OPERAND_DSP_24_S16 :
1973 {
1974 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1975 if (length <= 0) break;
1976 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1977 if (length <= 0) break;
1978 {
1979 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
1980 }
1981 }
1982 break;
1983 case M32C_OPERAND_DSP_24_S8 :
1984 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1985 break;
1986 case M32C_OPERAND_DSP_24_U16 :
1987 {
1988 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1989 if (length <= 0) break;
1990 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1991 if (length <= 0) break;
1992 {
1993 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
1994 }
1995 }
1996 break;
1997 case M32C_OPERAND_DSP_24_U20 :
1998 {
1999 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2000 if (length <= 0) break;
2001 {
2002 long value;
2003 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2004 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2005 fields->f_dsp_32_u16 = value;
2006 }
2007 if (length <= 0) break;
2008 {
2009 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2010 }
2011 }
2012 break;
2013 case M32C_OPERAND_DSP_24_U24 :
2014 {
2015 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2016 if (length <= 0) break;
2017 {
2018 long value;
2019 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2020 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2021 fields->f_dsp_32_u16 = value;
2022 }
2023 if (length <= 0) break;
2024 {
2025 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2026 }
2027 }
2028 break;
2029 case M32C_OPERAND_DSP_24_U8 :
2030 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2031 break;
2032 case M32C_OPERAND_DSP_32_S16 :
2033 {
2034 long value;
2035 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2036 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2037 fields->f_dsp_32_s16 = value;
2038 }
2039 break;
2040 case M32C_OPERAND_DSP_32_S8 :
2041 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2042 break;
2043 case M32C_OPERAND_DSP_32_U16 :
2044 {
2045 long value;
2046 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2047 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2048 fields->f_dsp_32_u16 = value;
2049 }
2050 break;
2051 case M32C_OPERAND_DSP_32_U20 :
2052 {
2053 long value;
2054 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2055 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2056 fields->f_dsp_32_u24 = value;
2057 }
2058 break;
2059 case M32C_OPERAND_DSP_32_U24 :
2060 {
2061 long value;
2062 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2063 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2064 fields->f_dsp_32_u24 = value;
2065 }
2066 break;
2067 case M32C_OPERAND_DSP_32_U8 :
2068 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2069 break;
2070 case M32C_OPERAND_DSP_40_S16 :
2071 {
2072 long value;
2073 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2074 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2075 fields->f_dsp_40_s16 = value;
2076 }
2077 break;
2078 case M32C_OPERAND_DSP_40_S8 :
2079 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2080 break;
2081 case M32C_OPERAND_DSP_40_U16 :
2082 {
2083 long value;
2084 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2085 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2086 fields->f_dsp_40_u16 = value;
2087 }
2088 break;
2089 case M32C_OPERAND_DSP_40_U24 :
2090 {
2091 long value;
2092 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2093 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2094 fields->f_dsp_40_u24 = value;
2095 }
2096 break;
2097 case M32C_OPERAND_DSP_40_U8 :
2098 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2099 break;
2100 case M32C_OPERAND_DSP_48_S16 :
2101 {
2102 long value;
2103 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2104 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2105 fields->f_dsp_48_s16 = value;
2106 }
2107 break;
2108 case M32C_OPERAND_DSP_48_S8 :
2109 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2110 break;
2111 case M32C_OPERAND_DSP_48_U16 :
2112 {
2113 long value;
2114 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2115 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2116 fields->f_dsp_48_u16 = value;
2117 }
2118 break;
2119 case M32C_OPERAND_DSP_48_U24 :
2120 {
2121 {
2122 long value;
2123 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2124 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2125 fields->f_dsp_48_u16 = value;
2126 }
2127 if (length <= 0) break;
2128 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2129 if (length <= 0) break;
2130 {
2131 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2132 }
2133 }
2134 break;
2135 case M32C_OPERAND_DSP_48_U8 :
2136 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2137 break;
2138 case M32C_OPERAND_DSP_8_S8 :
2139 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2140 break;
2141 case M32C_OPERAND_DSP_8_U16 :
2142 {
2143 long value;
2144 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2145 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2146 fields->f_dsp_8_u16 = value;
2147 }
2148 break;
2149 case M32C_OPERAND_DSP_8_U24 :
2150 {
2151 long value;
2152 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2153 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2154 fields->f_dsp_8_u24 = value;
2155 }
2156 break;
2157 case M32C_OPERAND_DSP_8_U6 :
2158 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2159 break;
2160 case M32C_OPERAND_DSP_8_U8 :
2161 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2162 break;
2163 case M32C_OPERAND_DST16AN :
2164 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2165 break;
2166 case M32C_OPERAND_DST16AN_S :
2167 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2168 break;
2169 case M32C_OPERAND_DST16ANHI :
2170 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2171 break;
2172 case M32C_OPERAND_DST16ANQI :
2173 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2174 break;
2175 case M32C_OPERAND_DST16ANQI_S :
2176 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2177 break;
2178 case M32C_OPERAND_DST16ANSI :
2179 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2180 break;
2181 case M32C_OPERAND_DST16RNEXTQI :
2182 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2183 break;
2184 case M32C_OPERAND_DST16RNHI :
2185 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2186 break;
2187 case M32C_OPERAND_DST16RNQI :
2188 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2189 break;
2190 case M32C_OPERAND_DST16RNQI_S :
2191 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2192 break;
2193 case M32C_OPERAND_DST16RNSI :
2194 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2195 break;
2196 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2197 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2198 break;
2199 case M32C_OPERAND_DST32ANPREFIXED :
2200 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2201 break;
2202 case M32C_OPERAND_DST32ANPREFIXEDHI :
2203 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2204 break;
2205 case M32C_OPERAND_DST32ANPREFIXEDQI :
2206 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2207 break;
2208 case M32C_OPERAND_DST32ANPREFIXEDSI :
2209 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2210 break;
2211 case M32C_OPERAND_DST32ANUNPREFIXED :
2212 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2213 break;
2214 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2215 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2216 break;
2217 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2218 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2219 break;
2220 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2221 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2222 break;
2223 case M32C_OPERAND_DST32R0HI_S :
2224 break;
2225 case M32C_OPERAND_DST32R0QI_S :
2226 break;
2227 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2228 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2229 break;
2230 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2231 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2232 break;
2233 case M32C_OPERAND_DST32RNPREFIXEDHI :
2234 {
2235 long value;
2236 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2237 value = ((((value) + (2))) % (4));
2238 fields->f_dst32_rn_prefixed_HI = value;
2239 }
2240 break;
2241 case M32C_OPERAND_DST32RNPREFIXEDQI :
2242 {
2243 long value;
2244 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2245 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2246 fields->f_dst32_rn_prefixed_QI = value;
2247 }
2248 break;
2249 case M32C_OPERAND_DST32RNPREFIXEDSI :
2250 {
2251 long value;
2252 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2253 value = ((value) - (2));
2254 fields->f_dst32_rn_prefixed_SI = value;
2255 }
2256 break;
2257 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2258 {
2259 long value;
2260 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2261 value = ((((value) + (2))) % (4));
2262 fields->f_dst32_rn_unprefixed_HI = value;
2263 }
2264 break;
2265 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2266 {
2267 long value;
2268 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2269 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2270 fields->f_dst32_rn_unprefixed_QI = value;
2271 }
2272 break;
2273 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2274 {
2275 long value;
2276 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2277 value = ((value) - (2));
2278 fields->f_dst32_rn_unprefixed_SI = value;
2279 }
2280 break;
2281 case M32C_OPERAND_G :
2282 break;
2283 case M32C_OPERAND_IMM_12_S4 :
2284 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2285 break;
2286 case M32C_OPERAND_IMM_13_U3 :
2287 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2288 break;
2289 case M32C_OPERAND_IMM_16_HI :
2290 {
2291 long value;
2292 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2293 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2294 fields->f_dsp_16_s16 = value;
2295 }
2296 break;
2297 case M32C_OPERAND_IMM_16_QI :
2298 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2299 break;
2300 case M32C_OPERAND_IMM_16_SI :
2301 {
2302 {
2303 long value;
2304 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2305 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2306 fields->f_dsp_16_u16 = value;
2307 }
2308 if (length <= 0) break;
2309 {
2310 long value;
2311 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2312 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2313 fields->f_dsp_32_u16 = value;
2314 }
2315 if (length <= 0) break;
2316 {
2317 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2318 }
2319 }
2320 break;
2321 case M32C_OPERAND_IMM_20_S4 :
2322 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2323 break;
2324 case M32C_OPERAND_IMM_24_HI :
2325 {
2326 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2327 if (length <= 0) break;
2328 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2329 if (length <= 0) break;
2330 {
2331 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2332 }
2333 }
2334 break;
2335 case M32C_OPERAND_IMM_24_QI :
2336 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2337 break;
2338 case M32C_OPERAND_IMM_24_SI :
2339 {
2340 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2341 if (length <= 0) break;
2342 {
2343 long value;
2344 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2345 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2346 fields->f_dsp_32_u24 = value;
2347 }
2348 if (length <= 0) break;
2349 {
2350 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2351 }
2352 }
2353 break;
2354 case M32C_OPERAND_IMM_32_HI :
2355 {
2356 long value;
2357 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2358 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2359 fields->f_dsp_32_s16 = value;
2360 }
2361 break;
2362 case M32C_OPERAND_IMM_32_QI :
2363 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2364 break;
2365 case M32C_OPERAND_IMM_32_SI :
2366 {
2367 long value;
2368 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2369 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2370 fields->f_dsp_32_s32 = value;
2371 }
2372 break;
2373 case M32C_OPERAND_IMM_40_HI :
2374 {
2375 long value;
2376 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2377 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2378 fields->f_dsp_40_s16 = value;
2379 }
2380 break;
2381 case M32C_OPERAND_IMM_40_QI :
2382 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2383 break;
2384 case M32C_OPERAND_IMM_40_SI :
2385 {
2386 {
2387 long value;
2388 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2389 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2390 fields->f_dsp_40_u24 = value;
2391 }
2392 if (length <= 0) break;
2393 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2394 if (length <= 0) break;
2395 {
2396 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2397 }
2398 }
2399 break;
2400 case M32C_OPERAND_IMM_48_HI :
2401 {
2402 long value;
2403 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2404 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2405 fields->f_dsp_48_s16 = value;
2406 }
2407 break;
2408 case M32C_OPERAND_IMM_48_QI :
2409 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2410 break;
2411 case M32C_OPERAND_IMM_48_SI :
2412 {
2413 {
2414 long value;
2415 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2416 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2417 fields->f_dsp_48_u16 = value;
2418 }
2419 if (length <= 0) break;
2420 {
2421 long value;
2422 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2423 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2424 fields->f_dsp_64_u16 = value;
2425 }
2426 if (length <= 0) break;
2427 {
2428 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2429 }
2430 }
2431 break;
2432 case M32C_OPERAND_IMM_56_HI :
2433 {
2434 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2435 if (length <= 0) break;
2436 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2437 if (length <= 0) break;
2438 {
2439 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2440 }
2441 }
2442 break;
2443 case M32C_OPERAND_IMM_56_QI :
2444 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2445 break;
2446 case M32C_OPERAND_IMM_64_HI :
2447 {
2448 long value;
2449 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2450 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2451 fields->f_dsp_64_s16 = value;
2452 }
2453 break;
2454 case M32C_OPERAND_IMM_8_HI :
2455 {
2456 long value;
2457 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2458 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2459 fields->f_dsp_8_s16 = value;
2460 }
2461 break;
2462 case M32C_OPERAND_IMM_8_QI :
2463 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2464 break;
2465 case M32C_OPERAND_IMM_8_S4 :
2466 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2467 break;
2468 case M32C_OPERAND_IMM_SH_12_S4 :
2469 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2470 break;
2471 case M32C_OPERAND_IMM_SH_20_S4 :
2472 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2473 break;
2474 case M32C_OPERAND_IMM_SH_8_S4 :
2475 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2476 break;
2477 case M32C_OPERAND_IMM1_S :
2478 {
2479 long value;
2480 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2481 value = ((value) + (1));
2482 fields->f_imm1_S = value;
2483 }
2484 break;
2485 case M32C_OPERAND_IMM3_S :
2486 {
2487 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2488 if (length <= 0) break;
2489 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2490 if (length <= 0) break;
2491 {
2492 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2493 }
2494 }
2495 break;
2496 case M32C_OPERAND_LAB_16_8 :
2497 {
2498 long value;
2499 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2500 value = ((value) + (((pc) + (2))));
2501 fields->f_lab_16_8 = value;
2502 }
2503 break;
2504 case M32C_OPERAND_LAB_24_8 :
2505 {
2506 long value;
2507 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2508 value = ((value) + (((pc) + (2))));
2509 fields->f_lab_24_8 = value;
2510 }
2511 break;
2512 case M32C_OPERAND_LAB_32_8 :
2513 {
2514 long value;
2515 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2516 value = ((value) + (((pc) + (2))));
2517 fields->f_lab_32_8 = value;
2518 }
2519 break;
2520 case M32C_OPERAND_LAB_40_8 :
2521 {
2522 long value;
2523 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2524 value = ((value) + (((pc) + (2))));
2525 fields->f_lab_40_8 = value;
2526 }
2527 break;
2528 case M32C_OPERAND_LAB_5_3 :
2529 {
2530 long value;
2531 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2532 value = ((value) + (((pc) + (2))));
2533 fields->f_lab_5_3 = value;
2534 }
2535 break;
2536 case M32C_OPERAND_LAB_8_16 :
2537 {
2538 long value;
2539 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2540 value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2541 fields->f_lab_8_16 = value;
2542 }
2543 break;
2544 case M32C_OPERAND_LAB_8_24 :
2545 {
2546 long value;
2547 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2548 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2549 fields->f_lab_8_24 = value;
2550 }
2551 break;
2552 case M32C_OPERAND_LAB_8_8 :
2553 {
2554 long value;
2555 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2556 value = ((value) + (((pc) + (1))));
2557 fields->f_lab_8_8 = value;
2558 }
2559 break;
2560 case M32C_OPERAND_LAB32_JMP_S :
2561 {
2562 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2563 if (length <= 0) break;
2564 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2565 if (length <= 0) break;
2566 {
2567 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2568 }
2569 }
2570 break;
2571 case M32C_OPERAND_Q :
2572 break;
2573 case M32C_OPERAND_R0 :
2574 break;
2575 case M32C_OPERAND_R0H :
2576 break;
2577 case M32C_OPERAND_R0L :
2578 break;
2579 case M32C_OPERAND_R1 :
2580 break;
2581 case M32C_OPERAND_R1R2R0 :
2582 break;
2583 case M32C_OPERAND_R2 :
2584 break;
2585 case M32C_OPERAND_R2R0 :
2586 break;
2587 case M32C_OPERAND_R3 :
2588 break;
2589 case M32C_OPERAND_R3R1 :
2590 break;
2591 case M32C_OPERAND_REGSETPOP :
2592 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2593 break;
2594 case M32C_OPERAND_REGSETPUSH :
2595 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2596 break;
2597 case M32C_OPERAND_RN16_PUSH_S :
2598 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2599 break;
2600 case M32C_OPERAND_S :
2601 break;
2602 case M32C_OPERAND_SRC16AN :
2603 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2604 break;
2605 case M32C_OPERAND_SRC16ANHI :
2606 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2607 break;
2608 case M32C_OPERAND_SRC16ANQI :
2609 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2610 break;
2611 case M32C_OPERAND_SRC16RNHI :
2612 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2613 break;
2614 case M32C_OPERAND_SRC16RNQI :
2615 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2616 break;
2617 case M32C_OPERAND_SRC32ANPREFIXED :
2618 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2619 break;
2620 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2621 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2622 break;
2623 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2624 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2625 break;
2626 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2627 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2628 break;
2629 case M32C_OPERAND_SRC32ANUNPREFIXED :
2630 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2631 break;
2632 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2633 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2634 break;
2635 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2636 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2637 break;
2638 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2639 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2640 break;
2641 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2642 {
2643 long value;
2644 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2645 value = ((((value) + (2))) % (4));
2646 fields->f_src32_rn_prefixed_HI = value;
2647 }
2648 break;
2649 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2650 {
2651 long value;
2652 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2653 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2654 fields->f_src32_rn_prefixed_QI = value;
2655 }
2656 break;
2657 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2658 {
2659 long value;
2660 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2661 value = ((value) - (2));
2662 fields->f_src32_rn_prefixed_SI = value;
2663 }
2664 break;
2665 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2666 {
2667 long value;
2668 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2669 value = ((((value) + (2))) % (4));
2670 fields->f_src32_rn_unprefixed_HI = value;
2671 }
2672 break;
2673 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2674 {
2675 long value;
2676 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2677 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2678 fields->f_src32_rn_unprefixed_QI = value;
2679 }
2680 break;
2681 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2682 {
2683 long value;
2684 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2685 value = ((value) - (2));
2686 fields->f_src32_rn_unprefixed_SI = value;
2687 }
2688 break;
2689 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2690 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2691 break;
2692 case M32C_OPERAND_X :
2693 break;
2694 case M32C_OPERAND_Z :
2695 break;
2696 case M32C_OPERAND_COND16_16 :
2697 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2698 break;
2699 case M32C_OPERAND_COND16_24 :
2700 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2701 break;
2702 case M32C_OPERAND_COND16_32 :
2703 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2704 break;
2705 case M32C_OPERAND_COND16C :
2706 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2707 break;
2708 case M32C_OPERAND_COND16J :
2709 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2710 break;
2711 case M32C_OPERAND_COND16J5 :
2712 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2713 break;
2714 case M32C_OPERAND_COND32 :
2715 {
2716 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2717 if (length <= 0) break;
2718 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2719 if (length <= 0) break;
2720 {
2721 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2722 }
2723 }
2724 break;
2725 case M32C_OPERAND_COND32_16 :
2726 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2727 break;
2728 case M32C_OPERAND_COND32_24 :
2729 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2730 break;
2731 case M32C_OPERAND_COND32_32 :
2732 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2733 break;
2734 case M32C_OPERAND_COND32_40 :
2735 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2736 break;
2737 case M32C_OPERAND_COND32J :
2738 {
2739 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2740 if (length <= 0) break;
2741 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2742 if (length <= 0) break;
2743 {
2744 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2745 }
2746 }
2747 break;
2748 case M32C_OPERAND_CR1_PREFIXED_32 :
2749 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2750 break;
2751 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2752 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2753 break;
2754 case M32C_OPERAND_CR16 :
2755 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2756 break;
2757 case M32C_OPERAND_CR2_32 :
2758 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2759 break;
2760 case M32C_OPERAND_CR3_PREFIXED_32 :
2761 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2762 break;
2763 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2764 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2765 break;
2766 case M32C_OPERAND_FLAGS16 :
2767 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2768 break;
2769 case M32C_OPERAND_FLAGS32 :
2770 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2771 break;
2772 case M32C_OPERAND_SCCOND32 :
2773 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2774 break;
2775 case M32C_OPERAND_SIZE :
2776 break;
2777
2778 default :
2779 /* xgettext:c-format */
2780 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2781 opindex);
2782 abort ();
2783 }
2784
2785 return length;
2786 }
2787
2788 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2789 {
2790 insert_insn_normal,
2791 };
2792
2793 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2794 {
2795 extract_insn_normal,
2796 };
2797
2798 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2799 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2800
2801 /* Getting values from cgen_fields is handled by a collection of functions.
2802 They are distinguished by the type of the VALUE argument they return.
2803 TODO: floating point, inlining support, remove cases where result type
2804 not appropriate. */
2805
2806 int
2807 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2808 int opindex,
2809 const CGEN_FIELDS * fields)
2810 {
2811 int value;
2812
2813 switch (opindex)
2814 {
2815 case M32C_OPERAND_A0 :
2816 value = 0;
2817 break;
2818 case M32C_OPERAND_A1 :
2819 value = 0;
2820 break;
2821 case M32C_OPERAND_AN16_PUSH_S :
2822 value = fields->f_4_1;
2823 break;
2824 case M32C_OPERAND_BIT16AN :
2825 value = fields->f_dst16_an;
2826 break;
2827 case M32C_OPERAND_BIT16RN :
2828 value = fields->f_dst16_rn;
2829 break;
2830 case M32C_OPERAND_BIT32ANPREFIXED :
2831 value = fields->f_dst32_an_prefixed;
2832 break;
2833 case M32C_OPERAND_BIT32ANUNPREFIXED :
2834 value = fields->f_dst32_an_unprefixed;
2835 break;
2836 case M32C_OPERAND_BIT32RNPREFIXED :
2837 value = fields->f_dst32_rn_prefixed_QI;
2838 break;
2839 case M32C_OPERAND_BIT32RNUNPREFIXED :
2840 value = fields->f_dst32_rn_unprefixed_QI;
2841 break;
2842 case M32C_OPERAND_BITBASE16_16_S8 :
2843 value = fields->f_dsp_16_s8;
2844 break;
2845 case M32C_OPERAND_BITBASE16_16_U16 :
2846 value = fields->f_dsp_16_u16;
2847 break;
2848 case M32C_OPERAND_BITBASE16_16_U8 :
2849 value = fields->f_dsp_16_u8;
2850 break;
2851 case M32C_OPERAND_BITBASE16_8_U11_S :
2852 value = fields->f_bitbase16_u11_S;
2853 break;
2854 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2855 value = fields->f_bitbase32_16_s11_unprefixed;
2856 break;
2857 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2858 value = fields->f_bitbase32_16_s19_unprefixed;
2859 break;
2860 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2861 value = fields->f_bitbase32_16_u11_unprefixed;
2862 break;
2863 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2864 value = fields->f_bitbase32_16_u19_unprefixed;
2865 break;
2866 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2867 value = fields->f_bitbase32_16_u27_unprefixed;
2868 break;
2869 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2870 value = fields->f_bitbase32_24_s11_prefixed;
2871 break;
2872 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2873 value = fields->f_bitbase32_24_s19_prefixed;
2874 break;
2875 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2876 value = fields->f_bitbase32_24_u11_prefixed;
2877 break;
2878 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2879 value = fields->f_bitbase32_24_u19_prefixed;
2880 break;
2881 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
2882 value = fields->f_bitbase32_24_u27_prefixed;
2883 break;
2884 case M32C_OPERAND_BITNO16R :
2885 value = fields->f_dsp_16_u8;
2886 break;
2887 case M32C_OPERAND_BITNO32PREFIXED :
2888 value = fields->f_bitno32_prefixed;
2889 break;
2890 case M32C_OPERAND_BITNO32UNPREFIXED :
2891 value = fields->f_bitno32_unprefixed;
2892 break;
2893 case M32C_OPERAND_DSP_10_U6 :
2894 value = fields->f_dsp_10_u6;
2895 break;
2896 case M32C_OPERAND_DSP_16_S16 :
2897 value = fields->f_dsp_16_s16;
2898 break;
2899 case M32C_OPERAND_DSP_16_S8 :
2900 value = fields->f_dsp_16_s8;
2901 break;
2902 case M32C_OPERAND_DSP_16_U16 :
2903 value = fields->f_dsp_16_u16;
2904 break;
2905 case M32C_OPERAND_DSP_16_U20 :
2906 value = fields->f_dsp_16_u24;
2907 break;
2908 case M32C_OPERAND_DSP_16_U24 :
2909 value = fields->f_dsp_16_u24;
2910 break;
2911 case M32C_OPERAND_DSP_16_U8 :
2912 value = fields->f_dsp_16_u8;
2913 break;
2914 case M32C_OPERAND_DSP_24_S16 :
2915 value = fields->f_dsp_24_s16;
2916 break;
2917 case M32C_OPERAND_DSP_24_S8 :
2918 value = fields->f_dsp_24_s8;
2919 break;
2920 case M32C_OPERAND_DSP_24_U16 :
2921 value = fields->f_dsp_24_u16;
2922 break;
2923 case M32C_OPERAND_DSP_24_U20 :
2924 value = fields->f_dsp_24_u24;
2925 break;
2926 case M32C_OPERAND_DSP_24_U24 :
2927 value = fields->f_dsp_24_u24;
2928 break;
2929 case M32C_OPERAND_DSP_24_U8 :
2930 value = fields->f_dsp_24_u8;
2931 break;
2932 case M32C_OPERAND_DSP_32_S16 :
2933 value = fields->f_dsp_32_s16;
2934 break;
2935 case M32C_OPERAND_DSP_32_S8 :
2936 value = fields->f_dsp_32_s8;
2937 break;
2938 case M32C_OPERAND_DSP_32_U16 :
2939 value = fields->f_dsp_32_u16;
2940 break;
2941 case M32C_OPERAND_DSP_32_U20 :
2942 value = fields->f_dsp_32_u24;
2943 break;
2944 case M32C_OPERAND_DSP_32_U24 :
2945 value = fields->f_dsp_32_u24;
2946 break;
2947 case M32C_OPERAND_DSP_32_U8 :
2948 value = fields->f_dsp_32_u8;
2949 break;
2950 case M32C_OPERAND_DSP_40_S16 :
2951 value = fields->f_dsp_40_s16;
2952 break;
2953 case M32C_OPERAND_DSP_40_S8 :
2954 value = fields->f_dsp_40_s8;
2955 break;
2956 case M32C_OPERAND_DSP_40_U16 :
2957 value = fields->f_dsp_40_u16;
2958 break;
2959 case M32C_OPERAND_DSP_40_U24 :
2960 value = fields->f_dsp_40_u24;
2961 break;
2962 case M32C_OPERAND_DSP_40_U8 :
2963 value = fields->f_dsp_40_u8;
2964 break;
2965 case M32C_OPERAND_DSP_48_S16 :
2966 value = fields->f_dsp_48_s16;
2967 break;
2968 case M32C_OPERAND_DSP_48_S8 :
2969 value = fields->f_dsp_48_s8;
2970 break;
2971 case M32C_OPERAND_DSP_48_U16 :
2972 value = fields->f_dsp_48_u16;
2973 break;
2974 case M32C_OPERAND_DSP_48_U24 :
2975 value = fields->f_dsp_48_u24;
2976 break;
2977 case M32C_OPERAND_DSP_48_U8 :
2978 value = fields->f_dsp_48_u8;
2979 break;
2980 case M32C_OPERAND_DSP_8_S8 :
2981 value = fields->f_dsp_8_s8;
2982 break;
2983 case M32C_OPERAND_DSP_8_U16 :
2984 value = fields->f_dsp_8_u16;
2985 break;
2986 case M32C_OPERAND_DSP_8_U24 :
2987 value = fields->f_dsp_8_u24;
2988 break;
2989 case M32C_OPERAND_DSP_8_U6 :
2990 value = fields->f_dsp_8_u6;
2991 break;
2992 case M32C_OPERAND_DSP_8_U8 :
2993 value = fields->f_dsp_8_u8;
2994 break;
2995 case M32C_OPERAND_DST16AN :
2996 value = fields->f_dst16_an;
2997 break;
2998 case M32C_OPERAND_DST16AN_S :
2999 value = fields->f_dst16_an_s;
3000 break;
3001 case M32C_OPERAND_DST16ANHI :
3002 value = fields->f_dst16_an;
3003 break;
3004 case M32C_OPERAND_DST16ANQI :
3005 value = fields->f_dst16_an;
3006 break;
3007 case M32C_OPERAND_DST16ANQI_S :
3008 value = fields->f_dst16_rn_QI_s;
3009 break;
3010 case M32C_OPERAND_DST16ANSI :
3011 value = fields->f_dst16_an;
3012 break;
3013 case M32C_OPERAND_DST16RNEXTQI :
3014 value = fields->f_dst16_rn_ext;
3015 break;
3016 case M32C_OPERAND_DST16RNHI :
3017 value = fields->f_dst16_rn;
3018 break;
3019 case M32C_OPERAND_DST16RNQI :
3020 value = fields->f_dst16_rn;
3021 break;
3022 case M32C_OPERAND_DST16RNQI_S :
3023 value = fields->f_dst16_rn_QI_s;
3024 break;
3025 case M32C_OPERAND_DST16RNSI :
3026 value = fields->f_dst16_rn;
3027 break;
3028 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3029 value = fields->f_dst32_an_unprefixed;
3030 break;
3031 case M32C_OPERAND_DST32ANPREFIXED :
3032 value = fields->f_dst32_an_prefixed;
3033 break;
3034 case M32C_OPERAND_DST32ANPREFIXEDHI :
3035 value = fields->f_dst32_an_prefixed;
3036 break;
3037 case M32C_OPERAND_DST32ANPREFIXEDQI :
3038 value = fields->f_dst32_an_prefixed;
3039 break;
3040 case M32C_OPERAND_DST32ANPREFIXEDSI :
3041 value = fields->f_dst32_an_prefixed;
3042 break;
3043 case M32C_OPERAND_DST32ANUNPREFIXED :
3044 value = fields->f_dst32_an_unprefixed;
3045 break;
3046 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3047 value = fields->f_dst32_an_unprefixed;
3048 break;
3049 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3050 value = fields->f_dst32_an_unprefixed;
3051 break;
3052 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3053 value = fields->f_dst32_an_unprefixed;
3054 break;
3055 case M32C_OPERAND_DST32R0HI_S :
3056 value = 0;
3057 break;
3058 case M32C_OPERAND_DST32R0QI_S :
3059 value = 0;
3060 break;
3061 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3062 value = fields->f_dst32_rn_ext_unprefixed;
3063 break;
3064 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3065 value = fields->f_dst32_rn_ext_unprefixed;
3066 break;
3067 case M32C_OPERAND_DST32RNPREFIXEDHI :
3068 value = fields->f_dst32_rn_prefixed_HI;
3069 break;
3070 case M32C_OPERAND_DST32RNPREFIXEDQI :
3071 value = fields->f_dst32_rn_prefixed_QI;
3072 break;
3073 case M32C_OPERAND_DST32RNPREFIXEDSI :
3074 value = fields->f_dst32_rn_prefixed_SI;
3075 break;
3076 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3077 value = fields->f_dst32_rn_unprefixed_HI;
3078 break;
3079 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3080 value = fields->f_dst32_rn_unprefixed_QI;
3081 break;
3082 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3083 value = fields->f_dst32_rn_unprefixed_SI;
3084 break;
3085 case M32C_OPERAND_G :
3086 value = 0;
3087 break;
3088 case M32C_OPERAND_IMM_12_S4 :
3089 value = fields->f_imm_12_s4;
3090 break;
3091 case M32C_OPERAND_IMM_13_U3 :
3092 value = fields->f_imm_13_u3;
3093 break;
3094 case M32C_OPERAND_IMM_16_HI :
3095 value = fields->f_dsp_16_s16;
3096 break;
3097 case M32C_OPERAND_IMM_16_QI :
3098 value = fields->f_dsp_16_s8;
3099 break;
3100 case M32C_OPERAND_IMM_16_SI :
3101 value = fields->f_dsp_16_s32;
3102 break;
3103 case M32C_OPERAND_IMM_20_S4 :
3104 value = fields->f_imm_20_s4;
3105 break;
3106 case M32C_OPERAND_IMM_24_HI :
3107 value = fields->f_dsp_24_s16;
3108 break;
3109 case M32C_OPERAND_IMM_24_QI :
3110 value = fields->f_dsp_24_s8;
3111 break;
3112 case M32C_OPERAND_IMM_24_SI :
3113 value = fields->f_dsp_24_s32;
3114 break;
3115 case M32C_OPERAND_IMM_32_HI :
3116 value = fields->f_dsp_32_s16;
3117 break;
3118 case M32C_OPERAND_IMM_32_QI :
3119 value = fields->f_dsp_32_s8;
3120 break;
3121 case M32C_OPERAND_IMM_32_SI :
3122 value = fields->f_dsp_32_s32;
3123 break;
3124 case M32C_OPERAND_IMM_40_HI :
3125 value = fields->f_dsp_40_s16;
3126 break;
3127 case M32C_OPERAND_IMM_40_QI :
3128 value = fields->f_dsp_40_s8;
3129 break;
3130 case M32C_OPERAND_IMM_40_SI :
3131 value = fields->f_dsp_40_s32;
3132 break;
3133 case M32C_OPERAND_IMM_48_HI :
3134 value = fields->f_dsp_48_s16;
3135 break;
3136 case M32C_OPERAND_IMM_48_QI :
3137 value = fields->f_dsp_48_s8;
3138 break;
3139 case M32C_OPERAND_IMM_48_SI :
3140 value = fields->f_dsp_48_s32;
3141 break;
3142 case M32C_OPERAND_IMM_56_HI :
3143 value = fields->f_dsp_56_s16;
3144 break;
3145 case M32C_OPERAND_IMM_56_QI :
3146 value = fields->f_dsp_56_s8;
3147 break;
3148 case M32C_OPERAND_IMM_64_HI :
3149 value = fields->f_dsp_64_s16;
3150 break;
3151 case M32C_OPERAND_IMM_8_HI :
3152 value = fields->f_dsp_8_s16;
3153 break;
3154 case M32C_OPERAND_IMM_8_QI :
3155 value = fields->f_dsp_8_s8;
3156 break;
3157 case M32C_OPERAND_IMM_8_S4 :
3158 value = fields->f_imm_8_s4;
3159 break;
3160 case M32C_OPERAND_IMM_SH_12_S4 :
3161 value = fields->f_imm_12_s4;
3162 break;
3163 case M32C_OPERAND_IMM_SH_20_S4 :
3164 value = fields->f_imm_20_s4;
3165 break;
3166 case M32C_OPERAND_IMM_SH_8_S4 :
3167 value = fields->f_imm_8_s4;
3168 break;
3169 case M32C_OPERAND_IMM1_S :
3170 value = fields->f_imm1_S;
3171 break;
3172 case M32C_OPERAND_IMM3_S :
3173 value = fields->f_imm3_S;
3174 break;
3175 case M32C_OPERAND_LAB_16_8 :
3176 value = fields->f_lab_16_8;
3177 break;
3178 case M32C_OPERAND_LAB_24_8 :
3179 value = fields->f_lab_24_8;
3180 break;
3181 case M32C_OPERAND_LAB_32_8 :
3182 value = fields->f_lab_32_8;
3183 break;
3184 case M32C_OPERAND_LAB_40_8 :
3185 value = fields->f_lab_40_8;
3186 break;
3187 case M32C_OPERAND_LAB_5_3 :
3188 value = fields->f_lab_5_3;
3189 break;
3190 case M32C_OPERAND_LAB_8_16 :
3191 value = fields->f_lab_8_16;
3192 break;
3193 case M32C_OPERAND_LAB_8_24 :
3194 value = fields->f_lab_8_24;
3195 break;
3196 case M32C_OPERAND_LAB_8_8 :
3197 value = fields->f_lab_8_8;
3198 break;
3199 case M32C_OPERAND_LAB32_JMP_S :
3200 value = fields->f_lab32_jmp_s;
3201 break;
3202 case M32C_OPERAND_Q :
3203 value = 0;
3204 break;
3205 case M32C_OPERAND_R0 :
3206 value = 0;
3207 break;
3208 case M32C_OPERAND_R0H :
3209 value = 0;
3210 break;
3211 case M32C_OPERAND_R0L :
3212 value = 0;
3213 break;
3214 case M32C_OPERAND_R1 :
3215 value = 0;
3216 break;
3217 case M32C_OPERAND_R1R2R0 :
3218 value = 0;
3219 break;
3220 case M32C_OPERAND_R2 :
3221 value = 0;
3222 break;
3223 case M32C_OPERAND_R2R0 :
3224 value = 0;
3225 break;
3226 case M32C_OPERAND_R3 :
3227 value = 0;
3228 break;
3229 case M32C_OPERAND_R3R1 :
3230 value = 0;
3231 break;
3232 case M32C_OPERAND_REGSETPOP :
3233 value = fields->f_8_8;
3234 break;
3235 case M32C_OPERAND_REGSETPUSH :
3236 value = fields->f_8_8;
3237 break;
3238 case M32C_OPERAND_RN16_PUSH_S :
3239 value = fields->f_4_1;
3240 break;
3241 case M32C_OPERAND_S :
3242 value = 0;
3243 break;
3244 case M32C_OPERAND_SRC16AN :
3245 value = fields->f_src16_an;
3246 break;
3247 case M32C_OPERAND_SRC16ANHI :
3248 value = fields->f_src16_an;
3249 break;
3250 case M32C_OPERAND_SRC16ANQI :
3251 value = fields->f_src16_an;
3252 break;
3253 case M32C_OPERAND_SRC16RNHI :
3254 value = fields->f_src16_rn;
3255 break;
3256 case M32C_OPERAND_SRC16RNQI :
3257 value = fields->f_src16_rn;
3258 break;
3259 case M32C_OPERAND_SRC32ANPREFIXED :
3260 value = fields->f_src32_an_prefixed;
3261 break;
3262 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3263 value = fields->f_src32_an_prefixed;
3264 break;
3265 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3266 value = fields->f_src32_an_prefixed;
3267 break;
3268 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3269 value = fields->f_src32_an_prefixed;
3270 break;
3271 case M32C_OPERAND_SRC32ANUNPREFIXED :
3272 value = fields->f_src32_an_unprefixed;
3273 break;
3274 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3275 value = fields->f_src32_an_unprefixed;
3276 break;
3277 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3278 value = fields->f_src32_an_unprefixed;
3279 break;
3280 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3281 value = fields->f_src32_an_unprefixed;
3282 break;
3283 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3284 value = fields->f_src32_rn_prefixed_HI;
3285 break;
3286 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3287 value = fields->f_src32_rn_prefixed_QI;
3288 break;
3289 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3290 value = fields->f_src32_rn_prefixed_SI;
3291 break;
3292 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3293 value = fields->f_src32_rn_unprefixed_HI;
3294 break;
3295 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3296 value = fields->f_src32_rn_unprefixed_QI;
3297 break;
3298 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3299 value = fields->f_src32_rn_unprefixed_SI;
3300 break;
3301 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3302 value = fields->f_5_1;
3303 break;
3304 case M32C_OPERAND_X :
3305 value = 0;
3306 break;
3307 case M32C_OPERAND_Z :
3308 value = 0;
3309 break;
3310 case M32C_OPERAND_COND16_16 :
3311 value = fields->f_dsp_16_u8;
3312 break;
3313 case M32C_OPERAND_COND16_24 :
3314 value = fields->f_dsp_24_u8;
3315 break;
3316 case M32C_OPERAND_COND16_32 :
3317 value = fields->f_dsp_32_u8;
3318 break;
3319 case M32C_OPERAND_COND16C :
3320 value = fields->f_cond16;
3321 break;
3322 case M32C_OPERAND_COND16J :
3323 value = fields->f_cond16;
3324 break;
3325 case M32C_OPERAND_COND16J5 :
3326 value = fields->f_cond16j_5;
3327 break;
3328 case M32C_OPERAND_COND32 :
3329 value = fields->f_cond32;
3330 break;
3331 case M32C_OPERAND_COND32_16 :
3332 value = fields->f_dsp_16_u8;
3333 break;
3334 case M32C_OPERAND_COND32_24 :
3335 value = fields->f_dsp_24_u8;
3336 break;
3337 case M32C_OPERAND_COND32_32 :
3338 value = fields->f_dsp_32_u8;
3339 break;
3340 case M32C_OPERAND_COND32_40 :
3341 value = fields->f_dsp_40_u8;
3342 break;
3343 case M32C_OPERAND_COND32J :
3344 value = fields->f_cond32j;
3345 break;
3346 case M32C_OPERAND_CR1_PREFIXED_32 :
3347 value = fields->f_21_3;
3348 break;
3349 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3350 value = fields->f_13_3;
3351 break;
3352 case M32C_OPERAND_CR16 :
3353 value = fields->f_9_3;
3354 break;
3355 case M32C_OPERAND_CR2_32 :
3356 value = fields->f_13_3;
3357 break;
3358 case M32C_OPERAND_CR3_PREFIXED_32 :
3359 value = fields->f_21_3;
3360 break;
3361 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3362 value = fields->f_13_3;
3363 break;
3364 case M32C_OPERAND_FLAGS16 :
3365 value = fields->f_9_3;
3366 break;
3367 case M32C_OPERAND_FLAGS32 :
3368 value = fields->f_13_3;
3369 break;
3370 case M32C_OPERAND_SCCOND32 :
3371 value = fields->f_cond16;
3372 break;
3373 case M32C_OPERAND_SIZE :
3374 value = 0;
3375 break;
3376
3377 default :
3378 /* xgettext:c-format */
3379 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3380 opindex);
3381 abort ();
3382 }
3383
3384 return value;
3385 }
3386
3387 bfd_vma
3388 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3389 int opindex,
3390 const CGEN_FIELDS * fields)
3391 {
3392 bfd_vma value;
3393
3394 switch (opindex)
3395 {
3396 case M32C_OPERAND_A0 :
3397 value = 0;
3398 break;
3399 case M32C_OPERAND_A1 :
3400 value = 0;
3401 break;
3402 case M32C_OPERAND_AN16_PUSH_S :
3403 value = fields->f_4_1;
3404 break;
3405 case M32C_OPERAND_BIT16AN :
3406 value = fields->f_dst16_an;
3407 break;
3408 case M32C_OPERAND_BIT16RN :
3409 value = fields->f_dst16_rn;
3410 break;
3411 case M32C_OPERAND_BIT32ANPREFIXED :
3412 value = fields->f_dst32_an_prefixed;
3413 break;
3414 case M32C_OPERAND_BIT32ANUNPREFIXED :
3415 value = fields->f_dst32_an_unprefixed;
3416 break;
3417 case M32C_OPERAND_BIT32RNPREFIXED :
3418 value = fields->f_dst32_rn_prefixed_QI;
3419 break;
3420 case M32C_OPERAND_BIT32RNUNPREFIXED :
3421 value = fields->f_dst32_rn_unprefixed_QI;
3422 break;
3423 case M32C_OPERAND_BITBASE16_16_S8 :
3424 value = fields->f_dsp_16_s8;
3425 break;
3426 case M32C_OPERAND_BITBASE16_16_U16 :
3427 value = fields->f_dsp_16_u16;
3428 break;
3429 case M32C_OPERAND_BITBASE16_16_U8 :
3430 value = fields->f_dsp_16_u8;
3431 break;
3432 case M32C_OPERAND_BITBASE16_8_U11_S :
3433 value = fields->f_bitbase16_u11_S;
3434 break;
3435 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3436 value = fields->f_bitbase32_16_s11_unprefixed;
3437 break;
3438 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3439 value = fields->f_bitbase32_16_s19_unprefixed;
3440 break;
3441 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3442 value = fields->f_bitbase32_16_u11_unprefixed;
3443 break;
3444 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3445 value = fields->f_bitbase32_16_u19_unprefixed;
3446 break;
3447 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3448 value = fields->f_bitbase32_16_u27_unprefixed;
3449 break;
3450 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3451 value = fields->f_bitbase32_24_s11_prefixed;
3452 break;
3453 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3454 value = fields->f_bitbase32_24_s19_prefixed;
3455 break;
3456 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3457 value = fields->f_bitbase32_24_u11_prefixed;
3458 break;
3459 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3460 value = fields->f_bitbase32_24_u19_prefixed;
3461 break;
3462 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3463 value = fields->f_bitbase32_24_u27_prefixed;
3464 break;
3465 case M32C_OPERAND_BITNO16R :
3466 value = fields->f_dsp_16_u8;
3467 break;
3468 case M32C_OPERAND_BITNO32PREFIXED :
3469 value = fields->f_bitno32_prefixed;
3470 break;
3471 case M32C_OPERAND_BITNO32UNPREFIXED :
3472 value = fields->f_bitno32_unprefixed;
3473 break;
3474 case M32C_OPERAND_DSP_10_U6 :
3475 value = fields->f_dsp_10_u6;
3476 break;
3477 case M32C_OPERAND_DSP_16_S16 :
3478 value = fields->f_dsp_16_s16;
3479 break;
3480 case M32C_OPERAND_DSP_16_S8 :
3481 value = fields->f_dsp_16_s8;
3482 break;
3483 case M32C_OPERAND_DSP_16_U16 :
3484 value = fields->f_dsp_16_u16;
3485 break;
3486 case M32C_OPERAND_DSP_16_U20 :
3487 value = fields->f_dsp_16_u24;
3488 break;
3489 case M32C_OPERAND_DSP_16_U24 :
3490 value = fields->f_dsp_16_u24;
3491 break;
3492 case M32C_OPERAND_DSP_16_U8 :
3493 value = fields->f_dsp_16_u8;
3494 break;
3495 case M32C_OPERAND_DSP_24_S16 :
3496 value = fields->f_dsp_24_s16;
3497 break;
3498 case M32C_OPERAND_DSP_24_S8 :
3499 value = fields->f_dsp_24_s8;
3500 break;
3501 case M32C_OPERAND_DSP_24_U16 :
3502 value = fields->f_dsp_24_u16;
3503 break;
3504 case M32C_OPERAND_DSP_24_U20 :
3505 value = fields->f_dsp_24_u24;
3506 break;
3507 case M32C_OPERAND_DSP_24_U24 :
3508 value = fields->f_dsp_24_u24;
3509 break;
3510 case M32C_OPERAND_DSP_24_U8 :
3511 value = fields->f_dsp_24_u8;
3512 break;
3513 case M32C_OPERAND_DSP_32_S16 :
3514 value = fields->f_dsp_32_s16;
3515 break;
3516 case M32C_OPERAND_DSP_32_S8 :
3517 value = fields->f_dsp_32_s8;
3518 break;
3519 case M32C_OPERAND_DSP_32_U16 :
3520 value = fields->f_dsp_32_u16;
3521 break;
3522 case M32C_OPERAND_DSP_32_U20 :
3523 value = fields->f_dsp_32_u24;
3524 break;
3525 case M32C_OPERAND_DSP_32_U24 :
3526 value = fields->f_dsp_32_u24;
3527 break;
3528 case M32C_OPERAND_DSP_32_U8 :
3529 value = fields->f_dsp_32_u8;
3530 break;
3531 case M32C_OPERAND_DSP_40_S16 :
3532 value = fields->f_dsp_40_s16;
3533 break;
3534 case M32C_OPERAND_DSP_40_S8 :
3535 value = fields->f_dsp_40_s8;
3536 break;
3537 case M32C_OPERAND_DSP_40_U16 :
3538 value = fields->f_dsp_40_u16;
3539 break;
3540 case M32C_OPERAND_DSP_40_U24 :
3541 value = fields->f_dsp_40_u24;
3542 break;
3543 case M32C_OPERAND_DSP_40_U8 :
3544 value = fields->f_dsp_40_u8;
3545 break;
3546 case M32C_OPERAND_DSP_48_S16 :
3547 value = fields->f_dsp_48_s16;
3548 break;
3549 case M32C_OPERAND_DSP_48_S8 :
3550 value = fields->f_dsp_48_s8;
3551 break;
3552 case M32C_OPERAND_DSP_48_U16 :
3553 value = fields->f_dsp_48_u16;
3554 break;
3555 case M32C_OPERAND_DSP_48_U24 :
3556 value = fields->f_dsp_48_u24;
3557 break;
3558 case M32C_OPERAND_DSP_48_U8 :
3559 value = fields->f_dsp_48_u8;
3560 break;
3561 case M32C_OPERAND_DSP_8_S8 :
3562 value = fields->f_dsp_8_s8;
3563 break;
3564 case M32C_OPERAND_DSP_8_U16 :
3565 value = fields->f_dsp_8_u16;
3566 break;
3567 case M32C_OPERAND_DSP_8_U24 :
3568 value = fields->f_dsp_8_u24;
3569 break;
3570 case M32C_OPERAND_DSP_8_U6 :
3571 value = fields->f_dsp_8_u6;
3572 break;
3573 case M32C_OPERAND_DSP_8_U8 :
3574 value = fields->f_dsp_8_u8;
3575 break;
3576 case M32C_OPERAND_DST16AN :
3577 value = fields->f_dst16_an;
3578 break;
3579 case M32C_OPERAND_DST16AN_S :
3580 value = fields->f_dst16_an_s;
3581 break;
3582 case M32C_OPERAND_DST16ANHI :
3583 value = fields->f_dst16_an;
3584 break;
3585 case M32C_OPERAND_DST16ANQI :
3586 value = fields->f_dst16_an;
3587 break;
3588 case M32C_OPERAND_DST16ANQI_S :
3589 value = fields->f_dst16_rn_QI_s;
3590 break;
3591 case M32C_OPERAND_DST16ANSI :
3592 value = fields->f_dst16_an;
3593 break;
3594 case M32C_OPERAND_DST16RNEXTQI :
3595 value = fields->f_dst16_rn_ext;
3596 break;
3597 case M32C_OPERAND_DST16RNHI :
3598 value = fields->f_dst16_rn;
3599 break;
3600 case M32C_OPERAND_DST16RNQI :
3601 value = fields->f_dst16_rn;
3602 break;
3603 case M32C_OPERAND_DST16RNQI_S :
3604 value = fields->f_dst16_rn_QI_s;
3605 break;
3606 case M32C_OPERAND_DST16RNSI :
3607 value = fields->f_dst16_rn;
3608 break;
3609 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3610 value = fields->f_dst32_an_unprefixed;
3611 break;
3612 case M32C_OPERAND_DST32ANPREFIXED :
3613 value = fields->f_dst32_an_prefixed;
3614 break;
3615 case M32C_OPERAND_DST32ANPREFIXEDHI :
3616 value = fields->f_dst32_an_prefixed;
3617 break;
3618 case M32C_OPERAND_DST32ANPREFIXEDQI :
3619 value = fields->f_dst32_an_prefixed;
3620 break;
3621 case M32C_OPERAND_DST32ANPREFIXEDSI :
3622 value = fields->f_dst32_an_prefixed;
3623 break;
3624 case M32C_OPERAND_DST32ANUNPREFIXED :
3625 value = fields->f_dst32_an_unprefixed;
3626 break;
3627 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3628 value = fields->f_dst32_an_unprefixed;
3629 break;
3630 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3631 value = fields->f_dst32_an_unprefixed;
3632 break;
3633 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3634 value = fields->f_dst32_an_unprefixed;
3635 break;
3636 case M32C_OPERAND_DST32R0HI_S :
3637 value = 0;
3638 break;
3639 case M32C_OPERAND_DST32R0QI_S :
3640 value = 0;
3641 break;
3642 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3643 value = fields->f_dst32_rn_ext_unprefixed;
3644 break;
3645 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3646 value = fields->f_dst32_rn_ext_unprefixed;
3647 break;
3648 case M32C_OPERAND_DST32RNPREFIXEDHI :
3649 value = fields->f_dst32_rn_prefixed_HI;
3650 break;
3651 case M32C_OPERAND_DST32RNPREFIXEDQI :
3652 value = fields->f_dst32_rn_prefixed_QI;
3653 break;
3654 case M32C_OPERAND_DST32RNPREFIXEDSI :
3655 value = fields->f_dst32_rn_prefixed_SI;
3656 break;
3657 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3658 value = fields->f_dst32_rn_unprefixed_HI;
3659 break;
3660 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3661 value = fields->f_dst32_rn_unprefixed_QI;
3662 break;
3663 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3664 value = fields->f_dst32_rn_unprefixed_SI;
3665 break;
3666 case M32C_OPERAND_G :
3667 value = 0;
3668 break;
3669 case M32C_OPERAND_IMM_12_S4 :
3670 value = fields->f_imm_12_s4;
3671 break;
3672 case M32C_OPERAND_IMM_13_U3 :
3673 value = fields->f_imm_13_u3;
3674 break;
3675 case M32C_OPERAND_IMM_16_HI :
3676 value = fields->f_dsp_16_s16;
3677 break;
3678 case M32C_OPERAND_IMM_16_QI :
3679 value = fields->f_dsp_16_s8;
3680 break;
3681 case M32C_OPERAND_IMM_16_SI :
3682 value = fields->f_dsp_16_s32;
3683 break;
3684 case M32C_OPERAND_IMM_20_S4 :
3685 value = fields->f_imm_20_s4;
3686 break;
3687 case M32C_OPERAND_IMM_24_HI :
3688 value = fields->f_dsp_24_s16;
3689 break;
3690 case M32C_OPERAND_IMM_24_QI :
3691 value = fields->f_dsp_24_s8;
3692 break;
3693 case M32C_OPERAND_IMM_24_SI :
3694 value = fields->f_dsp_24_s32;
3695 break;
3696 case M32C_OPERAND_IMM_32_HI :
3697 value = fields->f_dsp_32_s16;
3698 break;
3699 case M32C_OPERAND_IMM_32_QI :
3700 value = fields->f_dsp_32_s8;
3701 break;
3702 case M32C_OPERAND_IMM_32_SI :
3703 value = fields->f_dsp_32_s32;
3704 break;
3705 case M32C_OPERAND_IMM_40_HI :
3706 value = fields->f_dsp_40_s16;
3707 break;
3708 case M32C_OPERAND_IMM_40_QI :
3709 value = fields->f_dsp_40_s8;
3710 break;
3711 case M32C_OPERAND_IMM_40_SI :
3712 value = fields->f_dsp_40_s32;
3713 break;
3714 case M32C_OPERAND_IMM_48_HI :
3715 value = fields->f_dsp_48_s16;
3716 break;
3717 case M32C_OPERAND_IMM_48_QI :
3718 value = fields->f_dsp_48_s8;
3719 break;
3720 case M32C_OPERAND_IMM_48_SI :
3721 value = fields->f_dsp_48_s32;
3722 break;
3723 case M32C_OPERAND_IMM_56_HI :
3724 value = fields->f_dsp_56_s16;
3725 break;
3726 case M32C_OPERAND_IMM_56_QI :
3727 value = fields->f_dsp_56_s8;
3728 break;
3729 case M32C_OPERAND_IMM_64_HI :
3730 value = fields->f_dsp_64_s16;
3731 break;
3732 case M32C_OPERAND_IMM_8_HI :
3733 value = fields->f_dsp_8_s16;
3734 break;
3735 case M32C_OPERAND_IMM_8_QI :
3736 value = fields->f_dsp_8_s8;
3737 break;
3738 case M32C_OPERAND_IMM_8_S4 :
3739 value = fields->f_imm_8_s4;
3740 break;
3741 case M32C_OPERAND_IMM_SH_12_S4 :
3742 value = fields->f_imm_12_s4;
3743 break;
3744 case M32C_OPERAND_IMM_SH_20_S4 :
3745 value = fields->f_imm_20_s4;
3746 break;
3747 case M32C_OPERAND_IMM_SH_8_S4 :
3748 value = fields->f_imm_8_s4;
3749 break;
3750 case M32C_OPERAND_IMM1_S :
3751 value = fields->f_imm1_S;
3752 break;
3753 case M32C_OPERAND_IMM3_S :
3754 value = fields->f_imm3_S;
3755 break;
3756 case M32C_OPERAND_LAB_16_8 :
3757 value = fields->f_lab_16_8;
3758 break;
3759 case M32C_OPERAND_LAB_24_8 :
3760 value = fields->f_lab_24_8;
3761 break;
3762 case M32C_OPERAND_LAB_32_8 :
3763 value = fields->f_lab_32_8;
3764 break;
3765 case M32C_OPERAND_LAB_40_8 :
3766 value = fields->f_lab_40_8;
3767 break;
3768 case M32C_OPERAND_LAB_5_3 :
3769 value = fields->f_lab_5_3;
3770 break;
3771 case M32C_OPERAND_LAB_8_16 :
3772 value = fields->f_lab_8_16;
3773 break;
3774 case M32C_OPERAND_LAB_8_24 :
3775 value = fields->f_lab_8_24;
3776 break;
3777 case M32C_OPERAND_LAB_8_8 :
3778 value = fields->f_lab_8_8;
3779 break;
3780 case M32C_OPERAND_LAB32_JMP_S :
3781 value = fields->f_lab32_jmp_s;
3782 break;
3783 case M32C_OPERAND_Q :
3784 value = 0;
3785 break;
3786 case M32C_OPERAND_R0 :
3787 value = 0;
3788 break;
3789 case M32C_OPERAND_R0H :
3790 value = 0;
3791 break;
3792 case M32C_OPERAND_R0L :
3793 value = 0;
3794 break;
3795 case M32C_OPERAND_R1 :
3796 value = 0;
3797 break;
3798 case M32C_OPERAND_R1R2R0 :
3799 value = 0;
3800 break;
3801 case M32C_OPERAND_R2 :
3802 value = 0;
3803 break;
3804 case M32C_OPERAND_R2R0 :
3805 value = 0;
3806 break;
3807 case M32C_OPERAND_R3 :
3808 value = 0;
3809 break;
3810 case M32C_OPERAND_R3R1 :
3811 value = 0;
3812 break;
3813 case M32C_OPERAND_REGSETPOP :
3814 value = fields->f_8_8;
3815 break;
3816 case M32C_OPERAND_REGSETPUSH :
3817 value = fields->f_8_8;
3818 break;
3819 case M32C_OPERAND_RN16_PUSH_S :
3820 value = fields->f_4_1;
3821 break;
3822 case M32C_OPERAND_S :
3823 value = 0;
3824 break;
3825 case M32C_OPERAND_SRC16AN :
3826 value = fields->f_src16_an;
3827 break;
3828 case M32C_OPERAND_SRC16ANHI :
3829 value = fields->f_src16_an;
3830 break;
3831 case M32C_OPERAND_SRC16ANQI :
3832 value = fields->f_src16_an;
3833 break;
3834 case M32C_OPERAND_SRC16RNHI :
3835 value = fields->f_src16_rn;
3836 break;
3837 case M32C_OPERAND_SRC16RNQI :
3838 value = fields->f_src16_rn;
3839 break;
3840 case M32C_OPERAND_SRC32ANPREFIXED :
3841 value = fields->f_src32_an_prefixed;
3842 break;
3843 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3844 value = fields->f_src32_an_prefixed;
3845 break;
3846 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3847 value = fields->f_src32_an_prefixed;
3848 break;
3849 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3850 value = fields->f_src32_an_prefixed;
3851 break;
3852 case M32C_OPERAND_SRC32ANUNPREFIXED :
3853 value = fields->f_src32_an_unprefixed;
3854 break;
3855 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3856 value = fields->f_src32_an_unprefixed;
3857 break;
3858 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3859 value = fields->f_src32_an_unprefixed;
3860 break;
3861 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3862 value = fields->f_src32_an_unprefixed;
3863 break;
3864 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3865 value = fields->f_src32_rn_prefixed_HI;
3866 break;
3867 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3868 value = fields->f_src32_rn_prefixed_QI;
3869 break;
3870 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3871 value = fields->f_src32_rn_prefixed_SI;
3872 break;
3873 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3874 value = fields->f_src32_rn_unprefixed_HI;
3875 break;
3876 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3877 value = fields->f_src32_rn_unprefixed_QI;
3878 break;
3879 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3880 value = fields->f_src32_rn_unprefixed_SI;
3881 break;
3882 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3883 value = fields->f_5_1;
3884 break;
3885 case M32C_OPERAND_X :
3886 value = 0;
3887 break;
3888 case M32C_OPERAND_Z :
3889 value = 0;
3890 break;
3891 case M32C_OPERAND_COND16_16 :
3892 value = fields->f_dsp_16_u8;
3893 break;
3894 case M32C_OPERAND_COND16_24 :
3895 value = fields->f_dsp_24_u8;
3896 break;
3897 case M32C_OPERAND_COND16_32 :
3898 value = fields->f_dsp_32_u8;
3899 break;
3900 case M32C_OPERAND_COND16C :
3901 value = fields->f_cond16;
3902 break;
3903 case M32C_OPERAND_COND16J :
3904 value = fields->f_cond16;
3905 break;
3906 case M32C_OPERAND_COND16J5 :
3907 value = fields->f_cond16j_5;
3908 break;
3909 case M32C_OPERAND_COND32 :
3910 value = fields->f_cond32;
3911 break;
3912 case M32C_OPERAND_COND32_16 :
3913 value = fields->f_dsp_16_u8;
3914 break;
3915 case M32C_OPERAND_COND32_24 :
3916 value = fields->f_dsp_24_u8;
3917 break;
3918 case M32C_OPERAND_COND32_32 :
3919 value = fields->f_dsp_32_u8;
3920 break;
3921 case M32C_OPERAND_COND32_40 :
3922 value = fields->f_dsp_40_u8;
3923 break;
3924 case M32C_OPERAND_COND32J :
3925 value = fields->f_cond32j;
3926 break;
3927 case M32C_OPERAND_CR1_PREFIXED_32 :
3928 value = fields->f_21_3;
3929 break;
3930 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3931 value = fields->f_13_3;
3932 break;
3933 case M32C_OPERAND_CR16 :
3934 value = fields->f_9_3;
3935 break;
3936 case M32C_OPERAND_CR2_32 :
3937 value = fields->f_13_3;
3938 break;
3939 case M32C_OPERAND_CR3_PREFIXED_32 :
3940 value = fields->f_21_3;
3941 break;
3942 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3943 value = fields->f_13_3;
3944 break;
3945 case M32C_OPERAND_FLAGS16 :
3946 value = fields->f_9_3;
3947 break;
3948 case M32C_OPERAND_FLAGS32 :
3949 value = fields->f_13_3;
3950 break;
3951 case M32C_OPERAND_SCCOND32 :
3952 value = fields->f_cond16;
3953 break;
3954 case M32C_OPERAND_SIZE :
3955 value = 0;
3956 break;
3957
3958 default :
3959 /* xgettext:c-format */
3960 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
3961 opindex);
3962 abort ();
3963 }
3964
3965 return value;
3966 }
3967
3968 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
3969 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
3970
3971 /* Stuffing values in cgen_fields is handled by a collection of functions.
3972 They are distinguished by the type of the VALUE argument they accept.
3973 TODO: floating point, inlining support, remove cases where argument type
3974 not appropriate. */
3975
3976 void
3977 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3978 int opindex,
3979 CGEN_FIELDS * fields,
3980 int value)
3981 {
3982 switch (opindex)
3983 {
3984 case M32C_OPERAND_A0 :
3985 break;
3986 case M32C_OPERAND_A1 :
3987 break;
3988 case M32C_OPERAND_AN16_PUSH_S :
3989 fields->f_4_1 = value;
3990 break;
3991 case M32C_OPERAND_BIT16AN :
3992 fields->f_dst16_an = value;
3993 break;
3994 case M32C_OPERAND_BIT16RN :
3995 fields->f_dst16_rn = value;
3996 break;
3997 case M32C_OPERAND_BIT32ANPREFIXED :
3998 fields->f_dst32_an_prefixed = value;
3999 break;
4000 case M32C_OPERAND_BIT32ANUNPREFIXED :
4001 fields->f_dst32_an_unprefixed = value;
4002 break;
4003 case M32C_OPERAND_BIT32RNPREFIXED :
4004 fields->f_dst32_rn_prefixed_QI = value;
4005 break;
4006 case M32C_OPERAND_BIT32RNUNPREFIXED :
4007 fields->f_dst32_rn_unprefixed_QI = value;
4008 break;
4009 case M32C_OPERAND_BITBASE16_16_S8 :
4010 fields->f_dsp_16_s8 = value;
4011 break;
4012 case M32C_OPERAND_BITBASE16_16_U16 :
4013 fields->f_dsp_16_u16 = value;
4014 break;
4015 case M32C_OPERAND_BITBASE16_16_U8 :
4016 fields->f_dsp_16_u8 = value;
4017 break;
4018 case M32C_OPERAND_BITBASE16_8_U11_S :
4019 fields->f_bitbase16_u11_S = value;
4020 break;
4021 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4022 fields->f_bitbase32_16_s11_unprefixed = value;
4023 break;
4024 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4025 fields->f_bitbase32_16_s19_unprefixed = value;
4026 break;
4027 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4028 fields->f_bitbase32_16_u11_unprefixed = value;
4029 break;
4030 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4031 fields->f_bitbase32_16_u19_unprefixed = value;
4032 break;
4033 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4034 fields->f_bitbase32_16_u27_unprefixed = value;
4035 break;
4036 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4037 fields->f_bitbase32_24_s11_prefixed = value;
4038 break;
4039 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4040 fields->f_bitbase32_24_s19_prefixed = value;
4041 break;
4042 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4043 fields->f_bitbase32_24_u11_prefixed = value;
4044 break;
4045 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4046 fields->f_bitbase32_24_u19_prefixed = value;
4047 break;
4048 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4049 fields->f_bitbase32_24_u27_prefixed = value;
4050 break;
4051 case M32C_OPERAND_BITNO16R :
4052 fields->f_dsp_16_u8 = value;
4053 break;
4054 case M32C_OPERAND_BITNO32PREFIXED :
4055 fields->f_bitno32_prefixed = value;
4056 break;
4057 case M32C_OPERAND_BITNO32UNPREFIXED :
4058 fields->f_bitno32_unprefixed = value;
4059 break;
4060 case M32C_OPERAND_DSP_10_U6 :
4061 fields->f_dsp_10_u6 = value;
4062 break;
4063 case M32C_OPERAND_DSP_16_S16 :
4064 fields->f_dsp_16_s16 = value;
4065 break;
4066 case M32C_OPERAND_DSP_16_S8 :
4067 fields->f_dsp_16_s8 = value;
4068 break;
4069 case M32C_OPERAND_DSP_16_U16 :
4070 fields->f_dsp_16_u16 = value;
4071 break;
4072 case M32C_OPERAND_DSP_16_U20 :
4073 fields->f_dsp_16_u24 = value;
4074 break;
4075 case M32C_OPERAND_DSP_16_U24 :
4076 fields->f_dsp_16_u24 = value;
4077 break;
4078 case M32C_OPERAND_DSP_16_U8 :
4079 fields->f_dsp_16_u8 = value;
4080 break;
4081 case M32C_OPERAND_DSP_24_S16 :
4082 fields->f_dsp_24_s16 = value;
4083 break;
4084 case M32C_OPERAND_DSP_24_S8 :
4085 fields->f_dsp_24_s8 = value;
4086 break;
4087 case M32C_OPERAND_DSP_24_U16 :
4088 fields->f_dsp_24_u16 = value;
4089 break;
4090 case M32C_OPERAND_DSP_24_U20 :
4091 fields->f_dsp_24_u24 = value;
4092 break;
4093 case M32C_OPERAND_DSP_24_U24 :
4094 fields->f_dsp_24_u24 = value;
4095 break;
4096 case M32C_OPERAND_DSP_24_U8 :
4097 fields->f_dsp_24_u8 = value;
4098 break;
4099 case M32C_OPERAND_DSP_32_S16 :
4100 fields->f_dsp_32_s16 = value;
4101 break;
4102 case M32C_OPERAND_DSP_32_S8 :
4103 fields->f_dsp_32_s8 = value;
4104 break;
4105 case M32C_OPERAND_DSP_32_U16 :
4106 fields->f_dsp_32_u16 = value;
4107 break;
4108 case M32C_OPERAND_DSP_32_U20 :
4109 fields->f_dsp_32_u24 = value;
4110 break;
4111 case M32C_OPERAND_DSP_32_U24 :
4112 fields->f_dsp_32_u24 = value;
4113 break;
4114 case M32C_OPERAND_DSP_32_U8 :
4115 fields->f_dsp_32_u8 = value;
4116 break;
4117 case M32C_OPERAND_DSP_40_S16 :
4118 fields->f_dsp_40_s16 = value;
4119 break;
4120 case M32C_OPERAND_DSP_40_S8 :
4121 fields->f_dsp_40_s8 = value;
4122 break;
4123 case M32C_OPERAND_DSP_40_U16 :
4124 fields->f_dsp_40_u16 = value;
4125 break;
4126 case M32C_OPERAND_DSP_40_U24 :
4127 fields->f_dsp_40_u24 = value;
4128 break;
4129 case M32C_OPERAND_DSP_40_U8 :
4130 fields->f_dsp_40_u8 = value;
4131 break;
4132 case M32C_OPERAND_DSP_48_S16 :
4133 fields->f_dsp_48_s16 = value;
4134 break;
4135 case M32C_OPERAND_DSP_48_S8 :
4136 fields->f_dsp_48_s8 = value;
4137 break;
4138 case M32C_OPERAND_DSP_48_U16 :
4139 fields->f_dsp_48_u16 = value;
4140 break;
4141 case M32C_OPERAND_DSP_48_U24 :
4142 fields->f_dsp_48_u24 = value;
4143 break;
4144 case M32C_OPERAND_DSP_48_U8 :
4145 fields->f_dsp_48_u8 = value;
4146 break;
4147 case M32C_OPERAND_DSP_8_S8 :
4148 fields->f_dsp_8_s8 = value;
4149 break;
4150 case M32C_OPERAND_DSP_8_U16 :
4151 fields->f_dsp_8_u16 = value;
4152 break;
4153 case M32C_OPERAND_DSP_8_U24 :
4154 fields->f_dsp_8_u24 = value;
4155 break;
4156 case M32C_OPERAND_DSP_8_U6 :
4157 fields->f_dsp_8_u6 = value;
4158 break;
4159 case M32C_OPERAND_DSP_8_U8 :
4160 fields->f_dsp_8_u8 = value;
4161 break;
4162 case M32C_OPERAND_DST16AN :
4163 fields->f_dst16_an = value;
4164 break;
4165 case M32C_OPERAND_DST16AN_S :
4166 fields->f_dst16_an_s = value;
4167 break;
4168 case M32C_OPERAND_DST16ANHI :
4169 fields->f_dst16_an = value;
4170 break;
4171 case M32C_OPERAND_DST16ANQI :
4172 fields->f_dst16_an = value;
4173 break;
4174 case M32C_OPERAND_DST16ANQI_S :
4175 fields->f_dst16_rn_QI_s = value;
4176 break;
4177 case M32C_OPERAND_DST16ANSI :
4178 fields->f_dst16_an = value;
4179 break;
4180 case M32C_OPERAND_DST16RNEXTQI :
4181 fields->f_dst16_rn_ext = value;
4182 break;
4183 case M32C_OPERAND_DST16RNHI :
4184 fields->f_dst16_rn = value;
4185 break;
4186 case M32C_OPERAND_DST16RNQI :
4187 fields->f_dst16_rn = value;
4188 break;
4189 case M32C_OPERAND_DST16RNQI_S :
4190 fields->f_dst16_rn_QI_s = value;
4191 break;
4192 case M32C_OPERAND_DST16RNSI :
4193 fields->f_dst16_rn = value;
4194 break;
4195 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4196 fields->f_dst32_an_unprefixed = value;
4197 break;
4198 case M32C_OPERAND_DST32ANPREFIXED :
4199 fields->f_dst32_an_prefixed = value;
4200 break;
4201 case M32C_OPERAND_DST32ANPREFIXEDHI :
4202 fields->f_dst32_an_prefixed = value;
4203 break;
4204 case M32C_OPERAND_DST32ANPREFIXEDQI :
4205 fields->f_dst32_an_prefixed = value;
4206 break;
4207 case M32C_OPERAND_DST32ANPREFIXEDSI :
4208 fields->f_dst32_an_prefixed = value;
4209 break;
4210 case M32C_OPERAND_DST32ANUNPREFIXED :
4211 fields->f_dst32_an_unprefixed = value;
4212 break;
4213 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4214 fields->f_dst32_an_unprefixed = value;
4215 break;
4216 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4217 fields->f_dst32_an_unprefixed = value;
4218 break;
4219 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4220 fields->f_dst32_an_unprefixed = value;
4221 break;
4222 case M32C_OPERAND_DST32R0HI_S :
4223 break;
4224 case M32C_OPERAND_DST32R0QI_S :
4225 break;
4226 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4227 fields->f_dst32_rn_ext_unprefixed = value;
4228 break;
4229 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4230 fields->f_dst32_rn_ext_unprefixed = value;
4231 break;
4232 case M32C_OPERAND_DST32RNPREFIXEDHI :
4233 fields->f_dst32_rn_prefixed_HI = value;
4234 break;
4235 case M32C_OPERAND_DST32RNPREFIXEDQI :
4236 fields->f_dst32_rn_prefixed_QI = value;
4237 break;
4238 case M32C_OPERAND_DST32RNPREFIXEDSI :
4239 fields->f_dst32_rn_prefixed_SI = value;
4240 break;
4241 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4242 fields->f_dst32_rn_unprefixed_HI = value;
4243 break;
4244 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4245 fields->f_dst32_rn_unprefixed_QI = value;
4246 break;
4247 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4248 fields->f_dst32_rn_unprefixed_SI = value;
4249 break;
4250 case M32C_OPERAND_G :
4251 break;
4252 case M32C_OPERAND_IMM_12_S4 :
4253 fields->f_imm_12_s4 = value;
4254 break;
4255 case M32C_OPERAND_IMM_13_U3 :
4256 fields->f_imm_13_u3 = value;
4257 break;
4258 case M32C_OPERAND_IMM_16_HI :
4259 fields->f_dsp_16_s16 = value;
4260 break;
4261 case M32C_OPERAND_IMM_16_QI :
4262 fields->f_dsp_16_s8 = value;
4263 break;
4264 case M32C_OPERAND_IMM_16_SI :
4265 fields->f_dsp_16_s32 = value;
4266 break;
4267 case M32C_OPERAND_IMM_20_S4 :
4268 fields->f_imm_20_s4 = value;
4269 break;
4270 case M32C_OPERAND_IMM_24_HI :
4271 fields->f_dsp_24_s16 = value;
4272 break;
4273 case M32C_OPERAND_IMM_24_QI :
4274 fields->f_dsp_24_s8 = value;
4275 break;
4276 case M32C_OPERAND_IMM_24_SI :
4277 fields->f_dsp_24_s32 = value;
4278 break;
4279 case M32C_OPERAND_IMM_32_HI :
4280 fields->f_dsp_32_s16 = value;
4281 break;
4282 case M32C_OPERAND_IMM_32_QI :
4283 fields->f_dsp_32_s8 = value;
4284 break;
4285 case M32C_OPERAND_IMM_32_SI :
4286 fields->f_dsp_32_s32 = value;
4287 break;
4288 case M32C_OPERAND_IMM_40_HI :
4289 fields->f_dsp_40_s16 = value;
4290 break;
4291 case M32C_OPERAND_IMM_40_QI :
4292 fields->f_dsp_40_s8 = value;
4293 break;
4294 case M32C_OPERAND_IMM_40_SI :
4295 fields->f_dsp_40_s32 = value;
4296 break;
4297 case M32C_OPERAND_IMM_48_HI :
4298 fields->f_dsp_48_s16 = value;
4299 break;
4300 case M32C_OPERAND_IMM_48_QI :
4301 fields->f_dsp_48_s8 = value;
4302 break;
4303 case M32C_OPERAND_IMM_48_SI :
4304 fields->f_dsp_48_s32 = value;
4305 break;
4306 case M32C_OPERAND_IMM_56_HI :
4307 fields->f_dsp_56_s16 = value;
4308 break;
4309 case M32C_OPERAND_IMM_56_QI :
4310 fields->f_dsp_56_s8 = value;
4311 break;
4312 case M32C_OPERAND_IMM_64_HI :
4313 fields->f_dsp_64_s16 = value;
4314 break;
4315 case M32C_OPERAND_IMM_8_HI :
4316 fields->f_dsp_8_s16 = value;
4317 break;
4318 case M32C_OPERAND_IMM_8_QI :
4319 fields->f_dsp_8_s8 = value;
4320 break;
4321 case M32C_OPERAND_IMM_8_S4 :
4322 fields->f_imm_8_s4 = value;
4323 break;
4324 case M32C_OPERAND_IMM_SH_12_S4 :
4325 fields->f_imm_12_s4 = value;
4326 break;
4327 case M32C_OPERAND_IMM_SH_20_S4 :
4328 fields->f_imm_20_s4 = value;
4329 break;
4330 case M32C_OPERAND_IMM_SH_8_S4 :
4331 fields->f_imm_8_s4 = value;
4332 break;
4333 case M32C_OPERAND_IMM1_S :
4334 fields->f_imm1_S = value;
4335 break;
4336 case M32C_OPERAND_IMM3_S :
4337 fields->f_imm3_S = value;
4338 break;
4339 case M32C_OPERAND_LAB_16_8 :
4340 fields->f_lab_16_8 = value;
4341 break;
4342 case M32C_OPERAND_LAB_24_8 :
4343 fields->f_lab_24_8 = value;
4344 break;
4345 case M32C_OPERAND_LAB_32_8 :
4346 fields->f_lab_32_8 = value;
4347 break;
4348 case M32C_OPERAND_LAB_40_8 :
4349 fields->f_lab_40_8 = value;
4350 break;
4351 case M32C_OPERAND_LAB_5_3 :
4352 fields->f_lab_5_3 = value;
4353 break;
4354 case M32C_OPERAND_LAB_8_16 :
4355 fields->f_lab_8_16 = value;
4356 break;
4357 case M32C_OPERAND_LAB_8_24 :
4358 fields->f_lab_8_24 = value;
4359 break;
4360 case M32C_OPERAND_LAB_8_8 :
4361 fields->f_lab_8_8 = value;
4362 break;
4363 case M32C_OPERAND_LAB32_JMP_S :
4364 fields->f_lab32_jmp_s = value;
4365 break;
4366 case M32C_OPERAND_Q :
4367 break;
4368 case M32C_OPERAND_R0 :
4369 break;
4370 case M32C_OPERAND_R0H :
4371 break;
4372 case M32C_OPERAND_R0L :
4373 break;
4374 case M32C_OPERAND_R1 :
4375 break;
4376 case M32C_OPERAND_R1R2R0 :
4377 break;
4378 case M32C_OPERAND_R2 :
4379 break;
4380 case M32C_OPERAND_R2R0 :
4381 break;
4382 case M32C_OPERAND_R3 :
4383 break;
4384 case M32C_OPERAND_R3R1 :
4385 break;
4386 case M32C_OPERAND_REGSETPOP :
4387 fields->f_8_8 = value;
4388 break;
4389 case M32C_OPERAND_REGSETPUSH :
4390 fields->f_8_8 = value;
4391 break;
4392 case M32C_OPERAND_RN16_PUSH_S :
4393 fields->f_4_1 = value;
4394 break;
4395 case M32C_OPERAND_S :
4396 break;
4397 case M32C_OPERAND_SRC16AN :
4398 fields->f_src16_an = value;
4399 break;
4400 case M32C_OPERAND_SRC16ANHI :
4401 fields->f_src16_an = value;
4402 break;
4403 case M32C_OPERAND_SRC16ANQI :
4404 fields->f_src16_an = value;
4405 break;
4406 case M32C_OPERAND_SRC16RNHI :
4407 fields->f_src16_rn = value;
4408 break;
4409 case M32C_OPERAND_SRC16RNQI :
4410 fields->f_src16_rn = value;
4411 break;
4412 case M32C_OPERAND_SRC32ANPREFIXED :
4413 fields->f_src32_an_prefixed = value;
4414 break;
4415 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4416 fields->f_src32_an_prefixed = value;
4417 break;
4418 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4419 fields->f_src32_an_prefixed = value;
4420 break;
4421 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4422 fields->f_src32_an_prefixed = value;
4423 break;
4424 case M32C_OPERAND_SRC32ANUNPREFIXED :
4425 fields->f_src32_an_unprefixed = value;
4426 break;
4427 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4428 fields->f_src32_an_unprefixed = value;
4429 break;
4430 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4431 fields->f_src32_an_unprefixed = value;
4432 break;
4433 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4434 fields->f_src32_an_unprefixed = value;
4435 break;
4436 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4437 fields->f_src32_rn_prefixed_HI = value;
4438 break;
4439 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4440 fields->f_src32_rn_prefixed_QI = value;
4441 break;
4442 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4443 fields->f_src32_rn_prefixed_SI = value;
4444 break;
4445 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4446 fields->f_src32_rn_unprefixed_HI = value;
4447 break;
4448 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4449 fields->f_src32_rn_unprefixed_QI = value;
4450 break;
4451 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4452 fields->f_src32_rn_unprefixed_SI = value;
4453 break;
4454 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4455 fields->f_5_1 = value;
4456 break;
4457 case M32C_OPERAND_X :
4458 break;
4459 case M32C_OPERAND_Z :
4460 break;
4461 case M32C_OPERAND_COND16_16 :
4462 fields->f_dsp_16_u8 = value;
4463 break;
4464 case M32C_OPERAND_COND16_24 :
4465 fields->f_dsp_24_u8 = value;
4466 break;
4467 case M32C_OPERAND_COND16_32 :
4468 fields->f_dsp_32_u8 = value;
4469 break;
4470 case M32C_OPERAND_COND16C :
4471 fields->f_cond16 = value;
4472 break;
4473 case M32C_OPERAND_COND16J :
4474 fields->f_cond16 = value;
4475 break;
4476 case M32C_OPERAND_COND16J5 :
4477 fields->f_cond16j_5 = value;
4478 break;
4479 case M32C_OPERAND_COND32 :
4480 fields->f_cond32 = value;
4481 break;
4482 case M32C_OPERAND_COND32_16 :
4483 fields->f_dsp_16_u8 = value;
4484 break;
4485 case M32C_OPERAND_COND32_24 :
4486 fields->f_dsp_24_u8 = value;
4487 break;
4488 case M32C_OPERAND_COND32_32 :
4489 fields->f_dsp_32_u8 = value;
4490 break;
4491 case M32C_OPERAND_COND32_40 :
4492 fields->f_dsp_40_u8 = value;
4493 break;
4494 case M32C_OPERAND_COND32J :
4495 fields->f_cond32j = value;
4496 break;
4497 case M32C_OPERAND_CR1_PREFIXED_32 :
4498 fields->f_21_3 = value;
4499 break;
4500 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4501 fields->f_13_3 = value;
4502 break;
4503 case M32C_OPERAND_CR16 :
4504 fields->f_9_3 = value;
4505 break;
4506 case M32C_OPERAND_CR2_32 :
4507 fields->f_13_3 = value;
4508 break;
4509 case M32C_OPERAND_CR3_PREFIXED_32 :
4510 fields->f_21_3 = value;
4511 break;
4512 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4513 fields->f_13_3 = value;
4514 break;
4515 case M32C_OPERAND_FLAGS16 :
4516 fields->f_9_3 = value;
4517 break;
4518 case M32C_OPERAND_FLAGS32 :
4519 fields->f_13_3 = value;
4520 break;
4521 case M32C_OPERAND_SCCOND32 :
4522 fields->f_cond16 = value;
4523 break;
4524 case M32C_OPERAND_SIZE :
4525 break;
4526
4527 default :
4528 /* xgettext:c-format */
4529 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4530 opindex);
4531 abort ();
4532 }
4533 }
4534
4535 void
4536 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4537 int opindex,
4538 CGEN_FIELDS * fields,
4539 bfd_vma value)
4540 {
4541 switch (opindex)
4542 {
4543 case M32C_OPERAND_A0 :
4544 break;
4545 case M32C_OPERAND_A1 :
4546 break;
4547 case M32C_OPERAND_AN16_PUSH_S :
4548 fields->f_4_1 = value;
4549 break;
4550 case M32C_OPERAND_BIT16AN :
4551 fields->f_dst16_an = value;
4552 break;
4553 case M32C_OPERAND_BIT16RN :
4554 fields->f_dst16_rn = value;
4555 break;
4556 case M32C_OPERAND_BIT32ANPREFIXED :
4557 fields->f_dst32_an_prefixed = value;
4558 break;
4559 case M32C_OPERAND_BIT32ANUNPREFIXED :
4560 fields->f_dst32_an_unprefixed = value;
4561 break;
4562 case M32C_OPERAND_BIT32RNPREFIXED :
4563 fields->f_dst32_rn_prefixed_QI = value;
4564 break;
4565 case M32C_OPERAND_BIT32RNUNPREFIXED :
4566 fields->f_dst32_rn_unprefixed_QI = value;
4567 break;
4568 case M32C_OPERAND_BITBASE16_16_S8 :
4569 fields->f_dsp_16_s8 = value;
4570 break;
4571 case M32C_OPERAND_BITBASE16_16_U16 :
4572 fields->f_dsp_16_u16 = value;
4573 break;
4574 case M32C_OPERAND_BITBASE16_16_U8 :
4575 fields->f_dsp_16_u8 = value;
4576 break;
4577 case M32C_OPERAND_BITBASE16_8_U11_S :
4578 fields->f_bitbase16_u11_S = value;
4579 break;
4580 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4581 fields->f_bitbase32_16_s11_unprefixed = value;
4582 break;
4583 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4584 fields->f_bitbase32_16_s19_unprefixed = value;
4585 break;
4586 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4587 fields->f_bitbase32_16_u11_unprefixed = value;
4588 break;
4589 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4590 fields->f_bitbase32_16_u19_unprefixed = value;
4591 break;
4592 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4593 fields->f_bitbase32_16_u27_unprefixed = value;
4594 break;
4595 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4596 fields->f_bitbase32_24_s11_prefixed = value;
4597 break;
4598 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4599 fields->f_bitbase32_24_s19_prefixed = value;
4600 break;
4601 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4602 fields->f_bitbase32_24_u11_prefixed = value;
4603 break;
4604 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4605 fields->f_bitbase32_24_u19_prefixed = value;
4606 break;
4607 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4608 fields->f_bitbase32_24_u27_prefixed = value;
4609 break;
4610 case M32C_OPERAND_BITNO16R :
4611 fields->f_dsp_16_u8 = value;
4612 break;
4613 case M32C_OPERAND_BITNO32PREFIXED :
4614 fields->f_bitno32_prefixed = value;
4615 break;
4616 case M32C_OPERAND_BITNO32UNPREFIXED :
4617 fields->f_bitno32_unprefixed = value;
4618 break;
4619 case M32C_OPERAND_DSP_10_U6 :
4620 fields->f_dsp_10_u6 = value;
4621 break;
4622 case M32C_OPERAND_DSP_16_S16 :
4623 fields->f_dsp_16_s16 = value;
4624 break;
4625 case M32C_OPERAND_DSP_16_S8 :
4626 fields->f_dsp_16_s8 = value;
4627 break;
4628 case M32C_OPERAND_DSP_16_U16 :
4629 fields->f_dsp_16_u16 = value;
4630 break;
4631 case M32C_OPERAND_DSP_16_U20 :
4632 fields->f_dsp_16_u24 = value;
4633 break;
4634 case M32C_OPERAND_DSP_16_U24 :
4635 fields->f_dsp_16_u24 = value;
4636 break;
4637 case M32C_OPERAND_DSP_16_U8 :
4638 fields->f_dsp_16_u8 = value;
4639 break;
4640 case M32C_OPERAND_DSP_24_S16 :
4641 fields->f_dsp_24_s16 = value;
4642 break;
4643 case M32C_OPERAND_DSP_24_S8 :
4644 fields->f_dsp_24_s8 = value;
4645 break;
4646 case M32C_OPERAND_DSP_24_U16 :
4647 fields->f_dsp_24_u16 = value;
4648 break;
4649 case M32C_OPERAND_DSP_24_U20 :
4650 fields->f_dsp_24_u24 = value;
4651 break;
4652 case M32C_OPERAND_DSP_24_U24 :
4653 fields->f_dsp_24_u24 = value;
4654 break;
4655 case M32C_OPERAND_DSP_24_U8 :
4656 fields->f_dsp_24_u8 = value;
4657 break;
4658 case M32C_OPERAND_DSP_32_S16 :
4659 fields->f_dsp_32_s16 = value;
4660 break;
4661 case M32C_OPERAND_DSP_32_S8 :
4662 fields->f_dsp_32_s8 = value;
4663 break;
4664 case M32C_OPERAND_DSP_32_U16 :
4665 fields->f_dsp_32_u16 = value;
4666 break;
4667 case M32C_OPERAND_DSP_32_U20 :
4668 fields->f_dsp_32_u24 = value;
4669 break;
4670 case M32C_OPERAND_DSP_32_U24 :
4671 fields->f_dsp_32_u24 = value;
4672 break;
4673 case M32C_OPERAND_DSP_32_U8 :
4674 fields->f_dsp_32_u8 = value;
4675 break;
4676 case M32C_OPERAND_DSP_40_S16 :
4677 fields->f_dsp_40_s16 = value;
4678 break;
4679 case M32C_OPERAND_DSP_40_S8 :
4680 fields->f_dsp_40_s8 = value;
4681 break;
4682 case M32C_OPERAND_DSP_40_U16 :
4683 fields->f_dsp_40_u16 = value;
4684 break;
4685 case M32C_OPERAND_DSP_40_U24 :
4686 fields->f_dsp_40_u24 = value;
4687 break;
4688 case M32C_OPERAND_DSP_40_U8 :
4689 fields->f_dsp_40_u8 = value;
4690 break;
4691 case M32C_OPERAND_DSP_48_S16 :
4692 fields->f_dsp_48_s16 = value;
4693 break;
4694 case M32C_OPERAND_DSP_48_S8 :
4695 fields->f_dsp_48_s8 = value;
4696 break;
4697 case M32C_OPERAND_DSP_48_U16 :
4698 fields->f_dsp_48_u16 = value;
4699 break;
4700 case M32C_OPERAND_DSP_48_U24 :
4701 fields->f_dsp_48_u24 = value;
4702 break;
4703 case M32C_OPERAND_DSP_48_U8 :
4704 fields->f_dsp_48_u8 = value;
4705 break;
4706 case M32C_OPERAND_DSP_8_S8 :
4707 fields->f_dsp_8_s8 = value;
4708 break;
4709 case M32C_OPERAND_DSP_8_U16 :
4710 fields->f_dsp_8_u16 = value;
4711 break;
4712 case M32C_OPERAND_DSP_8_U24 :
4713 fields->f_dsp_8_u24 = value;
4714 break;
4715 case M32C_OPERAND_DSP_8_U6 :
4716 fields->f_dsp_8_u6 = value;
4717 break;
4718 case M32C_OPERAND_DSP_8_U8 :
4719 fields->f_dsp_8_u8 = value;
4720 break;
4721 case M32C_OPERAND_DST16AN :
4722 fields->f_dst16_an = value;
4723 break;
4724 case M32C_OPERAND_DST16AN_S :
4725 fields->f_dst16_an_s = value;
4726 break;
4727 case M32C_OPERAND_DST16ANHI :
4728 fields->f_dst16_an = value;
4729 break;
4730 case M32C_OPERAND_DST16ANQI :
4731 fields->f_dst16_an = value;
4732 break;
4733 case M32C_OPERAND_DST16ANQI_S :
4734 fields->f_dst16_rn_QI_s = value;
4735 break;
4736 case M32C_OPERAND_DST16ANSI :
4737 fields->f_dst16_an = value;
4738 break;
4739 case M32C_OPERAND_DST16RNEXTQI :
4740 fields->f_dst16_rn_ext = value;
4741 break;
4742 case M32C_OPERAND_DST16RNHI :
4743 fields->f_dst16_rn = value;
4744 break;
4745 case M32C_OPERAND_DST16RNQI :
4746 fields->f_dst16_rn = value;
4747 break;
4748 case M32C_OPERAND_DST16RNQI_S :
4749 fields->f_dst16_rn_QI_s = value;
4750 break;
4751 case M32C_OPERAND_DST16RNSI :
4752 fields->f_dst16_rn = value;
4753 break;
4754 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4755 fields->f_dst32_an_unprefixed = value;
4756 break;
4757 case M32C_OPERAND_DST32ANPREFIXED :
4758 fields->f_dst32_an_prefixed = value;
4759 break;
4760 case M32C_OPERAND_DST32ANPREFIXEDHI :
4761 fields->f_dst32_an_prefixed = value;
4762 break;
4763 case M32C_OPERAND_DST32ANPREFIXEDQI :
4764 fields->f_dst32_an_prefixed = value;
4765 break;
4766 case M32C_OPERAND_DST32ANPREFIXEDSI :
4767 fields->f_dst32_an_prefixed = value;
4768 break;
4769 case M32C_OPERAND_DST32ANUNPREFIXED :
4770 fields->f_dst32_an_unprefixed = value;
4771 break;
4772 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4773 fields->f_dst32_an_unprefixed = value;
4774 break;
4775 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4776 fields->f_dst32_an_unprefixed = value;
4777 break;
4778 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4779 fields->f_dst32_an_unprefixed = value;
4780 break;
4781 case M32C_OPERAND_DST32R0HI_S :
4782 break;
4783 case M32C_OPERAND_DST32R0QI_S :
4784 break;
4785 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4786 fields->f_dst32_rn_ext_unprefixed = value;
4787 break;
4788 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4789 fields->f_dst32_rn_ext_unprefixed = value;
4790 break;
4791 case M32C_OPERAND_DST32RNPREFIXEDHI :
4792 fields->f_dst32_rn_prefixed_HI = value;
4793 break;
4794 case M32C_OPERAND_DST32RNPREFIXEDQI :
4795 fields->f_dst32_rn_prefixed_QI = value;
4796 break;
4797 case M32C_OPERAND_DST32RNPREFIXEDSI :
4798 fields->f_dst32_rn_prefixed_SI = value;
4799 break;
4800 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4801 fields->f_dst32_rn_unprefixed_HI = value;
4802 break;
4803 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4804 fields->f_dst32_rn_unprefixed_QI = value;
4805 break;
4806 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4807 fields->f_dst32_rn_unprefixed_SI = value;
4808 break;
4809 case M32C_OPERAND_G :
4810 break;
4811 case M32C_OPERAND_IMM_12_S4 :
4812 fields->f_imm_12_s4 = value;
4813 break;
4814 case M32C_OPERAND_IMM_13_U3 :
4815 fields->f_imm_13_u3 = value;
4816 break;
4817 case M32C_OPERAND_IMM_16_HI :
4818 fields->f_dsp_16_s16 = value;
4819 break;
4820 case M32C_OPERAND_IMM_16_QI :
4821 fields->f_dsp_16_s8 = value;
4822 break;
4823 case M32C_OPERAND_IMM_16_SI :
4824 fields->f_dsp_16_s32 = value;
4825 break;
4826 case M32C_OPERAND_IMM_20_S4 :
4827 fields->f_imm_20_s4 = value;
4828 break;
4829 case M32C_OPERAND_IMM_24_HI :
4830 fields->f_dsp_24_s16 = value;
4831 break;
4832 case M32C_OPERAND_IMM_24_QI :
4833 fields->f_dsp_24_s8 = value;
4834 break;
4835 case M32C_OPERAND_IMM_24_SI :
4836 fields->f_dsp_24_s32 = value;
4837 break;
4838 case M32C_OPERAND_IMM_32_HI :
4839 fields->f_dsp_32_s16 = value;
4840 break;
4841 case M32C_OPERAND_IMM_32_QI :
4842 fields->f_dsp_32_s8 = value;
4843 break;
4844 case M32C_OPERAND_IMM_32_SI :
4845 fields->f_dsp_32_s32 = value;
4846 break;
4847 case M32C_OPERAND_IMM_40_HI :
4848 fields->f_dsp_40_s16 = value;
4849 break;
4850 case M32C_OPERAND_IMM_40_QI :
4851 fields->f_dsp_40_s8 = value;
4852 break;
4853 case M32C_OPERAND_IMM_40_SI :
4854 fields->f_dsp_40_s32 = value;
4855 break;
4856 case M32C_OPERAND_IMM_48_HI :
4857 fields->f_dsp_48_s16 = value;
4858 break;
4859 case M32C_OPERAND_IMM_48_QI :
4860 fields->f_dsp_48_s8 = value;
4861 break;
4862 case M32C_OPERAND_IMM_48_SI :
4863 fields->f_dsp_48_s32 = value;
4864 break;
4865 case M32C_OPERAND_IMM_56_HI :
4866 fields->f_dsp_56_s16 = value;
4867 break;
4868 case M32C_OPERAND_IMM_56_QI :
4869 fields->f_dsp_56_s8 = value;
4870 break;
4871 case M32C_OPERAND_IMM_64_HI :
4872 fields->f_dsp_64_s16 = value;
4873 break;
4874 case M32C_OPERAND_IMM_8_HI :
4875 fields->f_dsp_8_s16 = value;
4876 break;
4877 case M32C_OPERAND_IMM_8_QI :
4878 fields->f_dsp_8_s8 = value;
4879 break;
4880 case M32C_OPERAND_IMM_8_S4 :
4881 fields->f_imm_8_s4 = value;
4882 break;
4883 case M32C_OPERAND_IMM_SH_12_S4 :
4884 fields->f_imm_12_s4 = value;
4885 break;
4886 case M32C_OPERAND_IMM_SH_20_S4 :
4887 fields->f_imm_20_s4 = value;
4888 break;
4889 case M32C_OPERAND_IMM_SH_8_S4 :
4890 fields->f_imm_8_s4 = value;
4891 break;
4892 case M32C_OPERAND_IMM1_S :
4893 fields->f_imm1_S = value;
4894 break;
4895 case M32C_OPERAND_IMM3_S :
4896 fields->f_imm3_S = value;
4897 break;
4898 case M32C_OPERAND_LAB_16_8 :
4899 fields->f_lab_16_8 = value;
4900 break;
4901 case M32C_OPERAND_LAB_24_8 :
4902 fields->f_lab_24_8 = value;
4903 break;
4904 case M32C_OPERAND_LAB_32_8 :
4905 fields->f_lab_32_8 = value;
4906 break;
4907 case M32C_OPERAND_LAB_40_8 :
4908 fields->f_lab_40_8 = value;
4909 break;
4910 case M32C_OPERAND_LAB_5_3 :
4911 fields->f_lab_5_3 = value;
4912 break;
4913 case M32C_OPERAND_LAB_8_16 :
4914 fields->f_lab_8_16 = value;
4915 break;
4916 case M32C_OPERAND_LAB_8_24 :
4917 fields->f_lab_8_24 = value;
4918 break;
4919 case M32C_OPERAND_LAB_8_8 :
4920 fields->f_lab_8_8 = value;
4921 break;
4922 case M32C_OPERAND_LAB32_JMP_S :
4923 fields->f_lab32_jmp_s = value;
4924 break;
4925 case M32C_OPERAND_Q :
4926 break;
4927 case M32C_OPERAND_R0 :
4928 break;
4929 case M32C_OPERAND_R0H :
4930 break;
4931 case M32C_OPERAND_R0L :
4932 break;
4933 case M32C_OPERAND_R1 :
4934 break;
4935 case M32C_OPERAND_R1R2R0 :
4936 break;
4937 case M32C_OPERAND_R2 :
4938 break;
4939 case M32C_OPERAND_R2R0 :
4940 break;
4941 case M32C_OPERAND_R3 :
4942 break;
4943 case M32C_OPERAND_R3R1 :
4944 break;
4945 case M32C_OPERAND_REGSETPOP :
4946 fields->f_8_8 = value;
4947 break;
4948 case M32C_OPERAND_REGSETPUSH :
4949 fields->f_8_8 = value;
4950 break;
4951 case M32C_OPERAND_RN16_PUSH_S :
4952 fields->f_4_1 = value;
4953 break;
4954 case M32C_OPERAND_S :
4955 break;
4956 case M32C_OPERAND_SRC16AN :
4957 fields->f_src16_an = value;
4958 break;
4959 case M32C_OPERAND_SRC16ANHI :
4960 fields->f_src16_an = value;
4961 break;
4962 case M32C_OPERAND_SRC16ANQI :
4963 fields->f_src16_an = value;
4964 break;
4965 case M32C_OPERAND_SRC16RNHI :
4966 fields->f_src16_rn = value;
4967 break;
4968 case M32C_OPERAND_SRC16RNQI :
4969 fields->f_src16_rn = value;
4970 break;
4971 case M32C_OPERAND_SRC32ANPREFIXED :
4972 fields->f_src32_an_prefixed = value;
4973 break;
4974 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4975 fields->f_src32_an_prefixed = value;
4976 break;
4977 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4978 fields->f_src32_an_prefixed = value;
4979 break;
4980 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4981 fields->f_src32_an_prefixed = value;
4982 break;
4983 case M32C_OPERAND_SRC32ANUNPREFIXED :
4984 fields->f_src32_an_unprefixed = value;
4985 break;
4986 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4987 fields->f_src32_an_unprefixed = value;
4988 break;
4989 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4990 fields->f_src32_an_unprefixed = value;
4991 break;
4992 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4993 fields->f_src32_an_unprefixed = value;
4994 break;
4995 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4996 fields->f_src32_rn_prefixed_HI = value;
4997 break;
4998 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4999 fields->f_src32_rn_prefixed_QI = value;
5000 break;
5001 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5002 fields->f_src32_rn_prefixed_SI = value;
5003 break;
5004 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5005 fields->f_src32_rn_unprefixed_HI = value;
5006 break;
5007 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5008 fields->f_src32_rn_unprefixed_QI = value;
5009 break;
5010 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5011 fields->f_src32_rn_unprefixed_SI = value;
5012 break;
5013 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5014 fields->f_5_1 = value;
5015 break;
5016 case M32C_OPERAND_X :
5017 break;
5018 case M32C_OPERAND_Z :
5019 break;
5020 case M32C_OPERAND_COND16_16 :
5021 fields->f_dsp_16_u8 = value;
5022 break;
5023 case M32C_OPERAND_COND16_24 :
5024 fields->f_dsp_24_u8 = value;
5025 break;
5026 case M32C_OPERAND_COND16_32 :
5027 fields->f_dsp_32_u8 = value;
5028 break;
5029 case M32C_OPERAND_COND16C :
5030 fields->f_cond16 = value;
5031 break;
5032 case M32C_OPERAND_COND16J :
5033 fields->f_cond16 = value;
5034 break;
5035 case M32C_OPERAND_COND16J5 :
5036 fields->f_cond16j_5 = value;
5037 break;
5038 case M32C_OPERAND_COND32 :
5039 fields->f_cond32 = value;
5040 break;
5041 case M32C_OPERAND_COND32_16 :
5042 fields->f_dsp_16_u8 = value;
5043 break;
5044 case M32C_OPERAND_COND32_24 :
5045 fields->f_dsp_24_u8 = value;
5046 break;
5047 case M32C_OPERAND_COND32_32 :
5048 fields->f_dsp_32_u8 = value;
5049 break;
5050 case M32C_OPERAND_COND32_40 :
5051 fields->f_dsp_40_u8 = value;
5052 break;
5053 case M32C_OPERAND_COND32J :
5054 fields->f_cond32j = value;
5055 break;
5056 case M32C_OPERAND_CR1_PREFIXED_32 :
5057 fields->f_21_3 = value;
5058 break;
5059 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5060 fields->f_13_3 = value;
5061 break;
5062 case M32C_OPERAND_CR16 :
5063 fields->f_9_3 = value;
5064 break;
5065 case M32C_OPERAND_CR2_32 :
5066 fields->f_13_3 = value;
5067 break;
5068 case M32C_OPERAND_CR3_PREFIXED_32 :
5069 fields->f_21_3 = value;
5070 break;
5071 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5072 fields->f_13_3 = value;
5073 break;
5074 case M32C_OPERAND_FLAGS16 :
5075 fields->f_9_3 = value;
5076 break;
5077 case M32C_OPERAND_FLAGS32 :
5078 fields->f_13_3 = value;
5079 break;
5080 case M32C_OPERAND_SCCOND32 :
5081 fields->f_cond16 = value;
5082 break;
5083 case M32C_OPERAND_SIZE :
5084 break;
5085
5086 default :
5087 /* xgettext:c-format */
5088 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5089 opindex);
5090 abort ();
5091 }
5092 }
5093
5094 /* Function to call before using the instruction builder tables. */
5095
5096 void
5097 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5098 {
5099 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5100 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5101
5102 cd->insert_operand = m32c_cgen_insert_operand;
5103 cd->extract_operand = m32c_cgen_extract_operand;
5104
5105 cd->get_int_operand = m32c_cgen_get_int_operand;
5106 cd->set_int_operand = m32c_cgen_set_int_operand;
5107 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5108 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5109 }
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