1 /* Table of opcodes for the sparc.
2 Copyright (C) 1989, 1991, 1992, 1995, 1996 Free Software Foundation, Inc.
4 This file is part of the BFD library.
6 BFD is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2, or (at your option) any later
11 BFD is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with this software; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* FIXME-someday: perhaps the ,a's and such should be embedded in the
22 instruction's name rather than the args. This would make gas faster, pinsn
23 slower, but would mess up some macros a bit. xoxorich. */
25 /* v9 FIXME: Doesn't accept `setsw', `setx' synthetic instructions for v9. */
29 #include "opcode/sparc.h"
31 /* Some defines to make life easy. */
32 #define MASK_V6 (1 << SPARC_OPCODE_ARCH_V6)
33 #define MASK_V7 (1 << SPARC_OPCODE_ARCH_V7)
34 #define MASK_V8 (1 << SPARC_OPCODE_ARCH_V8)
35 #define MASK_SPARCLET (1 << SPARC_OPCODE_ARCH_SPARCLET)
36 #define MASK_SPARCLITE (1 << SPARC_OPCODE_ARCH_SPARCLITE)
37 #define MASK_V9 (1 << SPARC_OPCODE_ARCH_V9)
38 #define MASK_V9A (1 << SPARC_OPCODE_ARCH_V9A)
40 /* Bit masks of architectures supporting the insn. */
42 #define v6 (MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLET \
43 | MASK_SPARCLITE | MASK_V9 | MASK_V9A)
44 #define v7 (MASK_V7 | MASK_V8 | MASK_SPARCLET \
45 | MASK_SPARCLITE | MASK_V9 | MASK_V9A)
46 /* Although not all insns are implemented in hardware, sparclite is defined
47 to be a superset of v8. Unimplemented insns trap and are then theoretically
48 implemented in software.
49 It's not clear that the same is true for sparclet, although the docs
50 suggest it is. Rather than complicating things, the sparclet assembler
51 recognizes all v8 insns. */
52 #define v8 (MASK_V8 | MASK_SPARCLET | MASK_SPARCLITE | MASK_V9 | MASK_V9A)
53 #define sparclet (MASK_SPARCLET)
54 #define sparclite (MASK_SPARCLITE)
55 #define v9 (MASK_V9 | MASK_V9A)
56 #define v9a (MASK_V9A)
57 /* v6 insns not supported by v9 */
58 #define v6notv9 (MASK_V6 | MASK_V7 | MASK_V8 \
59 | MASK_SPARCLET | MASK_SPARCLITE)
61 /* Table of opcode architectures.
62 The order is defined in opcode/sparc.h. */
63 const struct sparc_opcode_arch sparc_opcode_archs
[] = {
65 { "v7", MASK_V6
| MASK_V7
},
66 { "v8", MASK_V6
| MASK_V7
| MASK_V8
},
67 { "sparclet", MASK_V6
| MASK_V7
| MASK_V8
| MASK_SPARCLET
},
68 { "sparclite", MASK_V6
| MASK_V7
| MASK_V8
| MASK_SPARCLITE
},
69 /* ??? Don't some v8 priviledged insns conflict with v9? */
70 { "v9", MASK_V6
| MASK_V7
| MASK_V8
| MASK_V9
},
71 /* v9 with ultrasparc additions */
72 { "v9a", MASK_V6
| MASK_V7
| MASK_V8
| MASK_V9
| MASK_V9A
},
76 /* Given NAME, return it's architecture entry. */
78 enum sparc_opcode_arch_val
79 sparc_opcode_lookup_arch (name
)
82 const struct sparc_opcode_arch
*p
;
84 for (p
= &sparc_opcode_archs
[0]; p
->name
; ++p
)
86 if (strcmp (name
, p
->name
) == 0)
87 return (enum sparc_opcode_arch_val
) (p
- &sparc_opcode_archs
[0]);
90 return SPARC_OPCODE_ARCH_BAD
;
93 /* Branch condition field. */
94 #define COND(x) (((x)&0xf)<<25)
96 /* v9: Move (MOVcc and FMOVcc) condition field. */
97 #define MCOND(x,i_or_f) ((((i_or_f)&1)<<18)|(((x)>>11)&(0xf<<14))) /* v9 */
99 /* v9: Move register (MOVRcc and FMOVRcc) condition field. */
100 #define RCOND(x) (((x)&0x7)<<10) /* v9 */
102 #define CONDA (COND(0x8))
103 #define CONDCC (COND(0xd))
104 #define CONDCS (COND(0x5))
105 #define CONDE (COND(0x1))
106 #define CONDG (COND(0xa))
107 #define CONDGE (COND(0xb))
108 #define CONDGU (COND(0xc))
109 #define CONDL (COND(0x3))
110 #define CONDLE (COND(0x2))
111 #define CONDLEU (COND(0x4))
112 #define CONDN (COND(0x0))
113 #define CONDNE (COND(0x9))
114 #define CONDNEG (COND(0x6))
115 #define CONDPOS (COND(0xe))
116 #define CONDVC (COND(0xf))
117 #define CONDVS (COND(0x7))
119 #define CONDNZ CONDNE
121 #define CONDGEU CONDCC
122 #define CONDLU CONDCS
124 #define FCONDA (COND(0x8))
125 #define FCONDE (COND(0x9))
126 #define FCONDG (COND(0x6))
127 #define FCONDGE (COND(0xb))
128 #define FCONDL (COND(0x4))
129 #define FCONDLE (COND(0xd))
130 #define FCONDLG (COND(0x2))
131 #define FCONDN (COND(0x0))
132 #define FCONDNE (COND(0x1))
133 #define FCONDO (COND(0xf))
134 #define FCONDU (COND(0x7))
135 #define FCONDUE (COND(0xa))
136 #define FCONDUG (COND(0x5))
137 #define FCONDUGE (COND(0xc))
138 #define FCONDUL (COND(0x3))
139 #define FCONDULE (COND(0xe))
141 #define FCONDNZ FCONDNE
142 #define FCONDZ FCONDE
144 #define ICC (0) /* v9 */
145 #define XCC (1<<12) /* v9 */
146 #define FCC(x) (((x)&0x3)<<11) /* v9 */
147 #define FBFCC(x) (((x)&0x3)<<20) /* v9 */
149 /* The order of the opcodes in the table is significant:
151 * The assembler requires that all instances of the same mnemonic must
152 be consecutive. If they aren't, the assembler will bomb at runtime.
154 * The disassembler should not care about the order of the opcodes.
158 /* Entries for commutative arithmetic operations. */
159 /* ??? More entries can make use of this. */
160 #define commuteop(opcode, op3, arch_mask) \
161 { opcode, F3(2, op3, 0), F3(~2, ~op3, ~0)|ASI(~0), "1,2,d", 0, arch_mask }, \
162 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "1,i,d", 0, arch_mask }, \
163 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "i,1,d", 0, arch_mask }
165 struct sparc_opcode sparc_opcodes
[] = {
167 { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0), "[1+2],d", 0, v6
},
168 { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0
, "[1],d", 0, v6
}, /* ld [rs1+%g0],d */
169 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[1+i],d", 0, v6
},
170 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[i+1],d", 0, v6
},
171 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0
, "[i],d", 0, v6
},
172 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ld [rs1+0],d */
173 { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0), "[1+2],g", 0, v6
},
174 { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0)|RS2_G0
, "[1],g", 0, v6
}, /* ld [rs1+%g0],d */
175 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1), "[1+i],g", 0, v6
},
176 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1), "[i+1],g", 0, v6
},
177 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|RS1_G0
, "[i],g", 0, v6
},
178 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|SIMM13(~0), "[1],g", 0, v6
}, /* ld [rs1+0],d */
180 { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RD(~0), "[1+2],F", 0, v6
},
181 { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RS2_G0
|RD(~0),"[1],F", 0, v6
}, /* ld [rs1+%g0],d */
182 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[1+i],F", 0, v6
},
183 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[i+1],F", 0, v6
},
184 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RS1_G0
|RD(~0),"[i],F", 0, v6
},
185 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~0),"[1],F", 0, v6
}, /* ld [rs1+0],d */
187 { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0), "[1+2],D", 0, v6notv9
},
188 { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0
, "[1],D", 0, v6notv9
}, /* ld [rs1+%g0],d */
189 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[1+i],D", 0, v6notv9
},
190 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[i+1],D", 0, v6notv9
},
191 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0
, "[i],D", 0, v6notv9
},
192 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1],D", 0, v6notv9
}, /* ld [rs1+0],d */
193 { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0), "[1+2],C", 0, v6notv9
},
194 { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0)|RS2_G0
, "[1],C", 0, v6notv9
}, /* ld [rs1+%g0],d */
195 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1), "[1+i],C", 0, v6notv9
},
196 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1), "[i+1],C", 0, v6notv9
},
197 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|RS1_G0
, "[i],C", 0, v6notv9
},
198 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|SIMM13(~0), "[1],C", 0, v6notv9
}, /* ld [rs1+0],d */
200 /* The v9 LDUW is the same as the old 'ld' opcode, it is not the same as the
201 'ld' pseudo-op in v9. */
202 { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0), "[1+2],d", F_ALIAS
, v9
},
203 { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0
, "[1],d", F_ALIAS
, v9
}, /* ld [rs1+%g0],d */
204 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[1+i],d", F_ALIAS
, v9
},
205 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[i+1],d", F_ALIAS
, v9
},
206 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0
, "[i],d", F_ALIAS
, v9
},
207 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", F_ALIAS
, v9
}, /* ld [rs1+0],d */
209 { "ldd", F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI(~0), "[1+2],d", 0, v6
},
210 { "ldd", F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldd [rs1+%g0],d */
211 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1), "[1+i],d", 0, v6
},
212 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1), "[i+1],d", 0, v6
},
213 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|RS1_G0
, "[i],d", 0, v6
},
214 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldd [rs1+0],d */
215 { "ldd", F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI(~0), "[1+2],H", 0, v6
},
216 { "ldd", F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI_RS2(~0), "[1],H", 0, v6
}, /* ldd [rs1+%g0],d */
217 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1), "[1+i],H", 0, v6
},
218 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1), "[i+1],H", 0, v6
},
219 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|RS1_G0
, "[i],H", 0, v6
},
220 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|SIMM13(~0), "[1],H", 0, v6
}, /* ldd [rs1+0],d */
222 { "ldd", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI(~0), "[1+2],D", 0, v6notv9
},
223 { "ldd", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI_RS2(~0), "[1],D", 0, v6notv9
}, /* ldd [rs1+%g0],d */
224 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[1+i],D", 0, v6notv9
},
225 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[i+1],D", 0, v6notv9
},
226 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0
, "[i],D", 0, v6notv9
},
227 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1],D", 0, v6notv9
}, /* ldd [rs1+0],d */
229 { "ldq", F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI(~0), "[1+2],J", 0, v9
},
230 { "ldq", F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI_RS2(~0), "[1],J", 0, v9
}, /* ldd [rs1+%g0],d */
231 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1), "[1+i],J", 0, v9
},
232 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1), "[i+1],J", 0, v9
},
233 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|RS1_G0
, "[i],J", 0, v9
},
234 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|SIMM13(~0), "[1],J", 0, v9
}, /* ldd [rs1+0],d */
236 { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI(~0), "[1+2],d", 0, v6
},
237 { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldsb [rs1+%g0],d */
238 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1), "[1+i],d", 0, v6
},
239 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1), "[i+1],d", 0, v6
},
240 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|RS1_G0
, "[i],d", 0, v6
},
241 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldsb [rs1+0],d */
243 { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldsh [rs1+%g0],d */
244 { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI(~0), "[1+2],d", 0, v6
},
245 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1), "[1+i],d", 0, v6
},
246 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1), "[i+1],d", 0, v6
},
247 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|RS1_G0
, "[i],d", 0, v6
},
248 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldsh [rs1+0],d */
250 { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI(~0), "[1+2],d", 0, v6
},
251 { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldstub [rs1+%g0],d */
252 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1), "[1+i],d", 0, v6
},
253 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1), "[i+1],d", 0, v6
},
254 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|RS1_G0
, "[i],d", 0, v6
},
255 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldstub [rs1+0],d */
257 { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI(~0), "[1+2],d", 0, v9
},
258 { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI_RS2(~0), "[1],d", 0, v9
}, /* ldsw [rs1+%g0],d */
259 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1), "[1+i],d", 0, v9
},
260 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1), "[i+1],d", 0, v9
},
261 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|RS1_G0
, "[i],d", 0, v9
},
262 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|SIMM13(~0), "[1],d", 0, v9
}, /* ldsw [rs1+0],d */
264 { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI(~0), "[1+2],d", 0, v6
},
265 { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldub [rs1+%g0],d */
266 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1), "[1+i],d", 0, v6
},
267 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1), "[i+1],d", 0, v6
},
268 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|RS1_G0
, "[i],d", 0, v6
},
269 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldub [rs1+0],d */
271 { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI(~0), "[1+2],d", 0, v6
},
272 { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* lduh [rs1+%g0],d */
273 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1), "[1+i],d", 0, v6
},
274 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1), "[i+1],d", 0, v6
},
275 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|RS1_G0
, "[i],d", 0, v6
},
276 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* lduh [rs1+0],d */
278 { "ldx", F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI(~0), "[1+2],d", 0, v9
},
279 { "ldx", F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI_RS2(~0), "[1],d", 0, v9
}, /* ldx [rs1+%g0],d */
280 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1), "[1+i],d", 0, v9
},
281 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1), "[i+1],d", 0, v9
},
282 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|RS1_G0
, "[i],d", 0, v9
},
283 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|SIMM13(~0), "[1],d", 0, v9
}, /* ldx [rs1+0],d */
285 { "ldx", F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RD(~1), "[1+2],F", 0, v9
},
286 { "ldx", F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RS2_G0
|RD(~1), "[1],F", 0, v9
}, /* ld [rs1+%g0],d */
287 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[1+i],F", 0, v9
},
288 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[i+1],F", 0, v9
},
289 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RS1_G0
|RD(~1), "[i],F", 0, v9
},
290 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~1),"[1],F", 0, v9
}, /* ld [rs1+0],d */
292 { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0), "[1+2]A,d", 0, v6
},
293 { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* lda [rs1+%g0],d */
294 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[1+i]o,d", 0, v9
},
295 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[i+1]o,d", 0, v9
},
296 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
297 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
298 { "lda", F3(3, 0x30, 0), F3(~3, ~0x30, ~0), "[1+2]A,g", 0, v9
},
299 { "lda", F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0
, "[1]A,g", 0, v9
}, /* lda [rs1+%g0],d */
300 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[1+i]o,g", 0, v9
},
301 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[i+1]o,g", 0, v9
},
302 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0
, "[i]o,g", 0, v9
},
303 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1]o,g", 0, v9
}, /* ld [rs1+0],d */
305 { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0), "[1+2]A,d", 0, v6
},
306 { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldda [rs1+%g0],d */
307 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1), "[1+i]o,d", 0, v9
},
308 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1), "[i+1]o,d", 0, v9
},
309 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
310 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
312 { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0), "[1+2]A,H", 0, v9
},
313 { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|RS2_G0
, "[1]A,H", 0, v9
}, /* ldda [rs1+%g0],d */
314 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[1+i]o,H", 0, v9
},
315 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[i+1]o,H", 0, v9
},
316 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0
, "[i]o,H", 0, v9
},
317 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1]o,H", 0, v9
}, /* ld [rs1+0],d */
319 { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0), "[1+2]A,J", 0, v9
},
320 { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0)|RS2_G0
, "[1]A,J", 0, v9
}, /* ldd [rs1+%g0],d */
321 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1), "[1+i]o,J", 0, v9
},
322 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1), "[i+1]o,J", 0, v9
},
323 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|RS1_G0
, "[i]o,J", 0, v9
},
324 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|SIMM13(~0), "[1]o,J", 0, v9
}, /* ldd [rs1+0],d */
326 { "ldsba", F3(3, 0x19, 0), F3(~3, ~0x19, ~0), "[1+2]A,d", 0, v6
},
327 { "ldsba", F3(3, 0x19, 0), F3(~3, ~0x19, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldsba [rs1+%g0],d */
328 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1), "[1+i]o,d", 0, v9
},
329 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1), "[i+1]o,d", 0, v9
},
330 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
331 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
333 { "ldsha", F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0), "[1+2]A,d", 0, v6
},
334 { "ldsha", F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldsha [rs1+%g0],d */
335 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1), "[1+i]o,d", 0, v9
},
336 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1), "[i+1]o,d", 0, v9
},
337 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
338 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
340 { "ldstuba", F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0), "[1+2]A,d", 0, v6
},
341 { "ldstuba", F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldstuba [rs1+%g0],d */
342 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1), "[1+i]o,d", 0, v9
},
343 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1), "[i+1]o,d", 0, v9
},
344 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
345 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
347 { "ldswa", F3(3, 0x18, 0), F3(~3, ~0x18, ~0), "[1+2]A,d", 0, v9
},
348 { "ldswa", F3(3, 0x18, 0), F3(~3, ~0x18, ~0)|RS2_G0
, "[1]A,d", 0, v9
}, /* lda [rs1+%g0],d */
349 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1), "[1+i]o,d", 0, v9
},
350 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1), "[i+1]o,d", 0, v9
},
351 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
352 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
354 { "lduba", F3(3, 0x11, 0), F3(~3, ~0x11, ~0), "[1+2]A,d", 0, v6
},
355 { "lduba", F3(3, 0x11, 0), F3(~3, ~0x11, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* lduba [rs1+%g0],d */
356 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1), "[1+i]o,d", 0, v9
},
357 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1), "[i+1]o,d", 0, v9
},
358 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
359 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
361 { "lduha", F3(3, 0x12, 0), F3(~3, ~0x12, ~0), "[1+2]A,d", 0, v6
},
362 { "lduha", F3(3, 0x12, 0), F3(~3, ~0x12, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* lduha [rs1+%g0],d */
363 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1), "[1+i]o,d", 0, v9
},
364 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1), "[i+1]o,d", 0, v9
},
365 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
366 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
368 { "lduwa", F3(3, 0x10, 0), F3(~3, ~0x10, ~0), "[1+2]A,d", F_ALIAS
, v9
}, /* lduwa === lda */
369 { "lduwa", F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0
, "[1]A,d", F_ALIAS
, v9
}, /* lda [rs1+%g0],d */
370 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[1+i]o,d", F_ALIAS
, v9
},
371 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[i+1]o,d", F_ALIAS
, v9
},
372 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0
, "[i]o,d", F_ALIAS
, v9
},
373 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", F_ALIAS
, v9
}, /* ld [rs1+0],d */
375 { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0), "[1+2]A,d", 0, v9
}, /* lduwa === lda */
376 { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0)|RS2_G0
, "[1]A,d", 0, v9
}, /* lda [rs1+%g0],d */
377 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1), "[1+i]o,d", 0, v9
},
378 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1), "[i+1]o,d", 0, v9
},
379 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
380 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
382 { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
383 { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* st d,[rs1+%g0] */
384 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", 0, v6
},
385 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", 0, v6
},
386 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", 0, v6
},
387 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* st d,[rs1+0] */
388 { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI(~0), "g,[1+2]", 0, v6
},
389 { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI_RS2(~0), "g,[1]", 0, v6
}, /* st d[rs1+%g0] */
390 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1), "g,[1+i]", 0, v6
},
391 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1), "g,[i+1]", 0, v6
},
392 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|RS1_G0
, "g,[i]", 0, v6
},
393 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|SIMM13(~0), "g,[1]", 0, v6
}, /* st d,[rs1+0] */
395 { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI(~0), "D,[1+2]", 0, v6notv9
},
396 { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI_RS2(~0), "D,[1]", 0, v6notv9
}, /* st d,[rs1+%g0] */
397 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "D,[1+i]", 0, v6notv9
},
398 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "D,[i+1]", 0, v6notv9
},
399 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0
, "D,[i]", 0, v6notv9
},
400 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0), "D,[1]", 0, v6notv9
}, /* st d,[rs1+0] */
401 { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI(~0), "C,[1+2]", 0, v6notv9
},
402 { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI_RS2(~0), "C,[1]", 0, v6notv9
}, /* st d,[rs1+%g0] */
403 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1), "C,[1+i]", 0, v6notv9
},
404 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1), "C,[i+1]", 0, v6notv9
},
405 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|RS1_G0
, "C,[i]", 0, v6notv9
},
406 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|SIMM13(~0), "C,[1]", 0, v6notv9
}, /* st d,[rs1+0] */
408 { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0
|ASI(~0), "F,[1+2]", 0, v6
},
409 { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0
|ASI_RS2(~0), "F,[1]", 0, v6
}, /* st d,[rs1+%g0] */
410 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
, "F,[1+i]", 0, v6
},
411 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
, "F,[i+1]", 0, v6
},
412 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
|RS1_G0
, "F,[i]", 0, v6
},
413 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
|SIMM13(~0), "F,[1]", 0, v6
}, /* st d,[rs1+0] */
415 { "stw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
416 { "stw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+%g0] */
417 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS
, v9
},
418 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS
, v9
},
419 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
420 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+0] */
422 { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", 0, v6
},
423 { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* sta d,[rs1+%g0] */
424 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", 0, v9
},
425 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", 0, v9
},
426 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
427 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* st d,[rs1+0] */
429 { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0), "g,[1+2]A", 0, v9
},
430 { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|RS2(~0), "g,[1]A", 0, v9
}, /* sta d,[rs1+%g0] */
431 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "g,[1+i]o", 0, v9
},
432 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "g,[i+1]o", 0, v9
},
433 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0
, "g,[i]o", 0, v9
},
434 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0), "g,[1]o", 0, v9
}, /* st d,[rs1+0] */
436 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS
, v9
},
437 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* sta d,[rs1+%g0] */
438 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS
, v9
},
439 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS
, v9
},
440 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
441 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* st d,[rs1+0] */
443 { "stb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
444 { "stb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* stb d,[rs1+%g0] */
445 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", 0, v6
},
446 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", 0, v6
},
447 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0
, "d,[i]", 0, v6
},
448 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* stb d,[rs1+0] */
450 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", 0, v6
},
451 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* stba d,[rs1+%g0] */
452 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", 0, v9
},
453 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", 0, v9
},
454 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
455 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* stb d,[rs1+0] */
457 { "std", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
458 { "std", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* std d,[rs1+%g0] */
459 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1), "d,[1+i]", 0, v6
},
460 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1), "d,[i+1]", 0, v6
},
461 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|RS1_G0
, "d,[i]", 0, v6
},
462 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* std d,[rs1+0] */
464 { "std", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0), "q,[1+2]", 0, v6notv9
},
465 { "std", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0), "q,[1]", 0, v6notv9
}, /* std d,[rs1+%g0] */
466 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "q,[1+i]", 0, v6notv9
},
467 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "q,[i+1]", 0, v6notv9
},
468 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0
, "q,[i]", 0, v6notv9
},
469 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "q,[1]", 0, v6notv9
}, /* std d,[rs1+0] */
470 { "std", F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI(~0), "H,[1+2]", 0, v6
},
471 { "std", F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI_RS2(~0), "H,[1]", 0, v6
}, /* std d,[rs1+%g0] */
472 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1), "H,[1+i]", 0, v6
},
473 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1), "H,[i+1]", 0, v6
},
474 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|RS1_G0
, "H,[i]", 0, v6
},
475 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|SIMM13(~0), "H,[1]", 0, v6
}, /* std d,[rs1+0] */
477 { "std", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0), "Q,[1+2]", 0, v6notv9
},
478 { "std", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0), "Q,[1]", 0, v6notv9
}, /* std d,[rs1+%g0] */
479 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "Q,[1+i]", 0, v6notv9
},
480 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "Q,[i+1]", 0, v6notv9
},
481 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0
, "Q,[i]", 0, v6notv9
},
482 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "Q,[1]", 0, v6notv9
}, /* std d,[rs1+0] */
483 { "std", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI(~0), "D,[1+2]", 0, v6notv9
},
484 { "std", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI_RS2(~0), "D,[1]", 0, v6notv9
}, /* std d,[rs1+%g0] */
485 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "D,[1+i]", 0, v6notv9
},
486 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "D,[i+1]", 0, v6notv9
},
487 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0
, "D,[i]", 0, v6notv9
},
488 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "D,[1]", 0, v6notv9
}, /* std d,[rs1+0] */
490 { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0), "d,[1+2]A", 0, v6
},
491 { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* stda d,[rs1+%g0] */
492 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1), "d,[1+i]o", 0, v9
},
493 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1), "d,[i+1]o", 0, v9
},
494 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
495 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* std d,[rs1+0] */
496 { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0), "H,[1+2]A", 0, v9
},
497 { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|RS2(~0), "H,[1]A", 0, v9
}, /* stda d,[rs1+%g0] */
498 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "H,[1+i]o", 0, v9
},
499 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "H,[i+1]o", 0, v9
},
500 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0
, "H,[i]o", 0, v9
},
501 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "H,[1]o", 0, v9
}, /* std d,[rs1+0] */
503 { "sth", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
504 { "sth", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* sth d,[rs1+%g0] */
505 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", 0, v6
},
506 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", 0, v6
},
507 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0
, "d,[i]", 0, v6
},
508 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* sth d,[rs1+0] */
510 { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", 0, v6
},
511 { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* stha ,[rs1+%g0] */
512 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", 0, v9
},
513 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", 0, v9
},
514 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
515 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* sth d,[rs1+0] */
517 { "stx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI(~0), "d,[1+2]", 0, v9
},
518 { "stx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI_RS2(~0), "d,[1]", 0, v9
}, /* stx d,[rs1+%g0] */
519 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1), "d,[1+i]", 0, v9
},
520 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1), "d,[i+1]", 0, v9
},
521 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RS1_G0
, "d,[i]", 0, v9
},
522 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|SIMM13(~0), "d,[1]", 0, v9
}, /* stx d,[rs1+0] */
524 { "stx", F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI(~0)|RD(~1), "F,[1+2]", 0, v9
},
525 { "stx", F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI_RS2(~0)|RD(~1),"F,[1]", 0, v9
}, /* stx d,[rs1+%g0] */
526 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1), "F,[1+i]", 0, v9
},
527 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1), "F,[i+1]", 0, v9
},
528 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RS1_G0
|RD(~1), "F,[i]", 0, v9
},
529 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|SIMM13(~0)|RD(~1),"F,[1]", 0, v9
}, /* stx d,[rs1+0] */
531 { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0), "d,[1+2]A", 0, v9
},
532 { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0)|RS2(~0), "d,[1]A", 0, v9
}, /* stxa d,[rs1+%g0] */
533 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1), "d,[1+i]o", 0, v9
},
534 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1), "d,[i+1]o", 0, v9
},
535 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
536 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* stx d,[rs1+0] */
538 { "stq", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0), "J,[1+2]", 0, v9
},
539 { "stq", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0), "J,[1]", 0, v9
}, /* stq [rs1+%g0] */
540 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "J,[1+i]", 0, v9
},
541 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "J,[i+1]", 0, v9
},
542 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0
, "J,[i]", 0, v9
},
543 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "J,[1]", 0, v9
}, /* stq [rs1+0] */
545 { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0), "J,[1+2]A", 0, v9
},
546 { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0), "J,[1]A", 0, v9
}, /* stqa [rs1+%g0] */
547 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "J,[1+i]o", 0, v9
},
548 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "J,[i+1]o", 0, v9
},
549 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0
, "J,[i]o", 0, v9
},
550 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "J,[1]o", 0, v9
}, /* stqa [rs1+0] */
552 { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI(~0), "[1+2],d", 0, v7
},
553 { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI_RS2(~0), "[1],d", 0, v7
}, /* swap [rs1+%g0],d */
554 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1), "[1+i],d", 0, v7
},
555 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1), "[i+1],d", 0, v7
},
556 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|RS1_G0
, "[i],d", 0, v7
},
557 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|SIMM13(~0), "[1],d", 0, v7
}, /* swap [rs1+0],d */
559 { "swapa", F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0), "[1+2]A,d", 0, v7
},
560 { "swapa", F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0)|RS2(~0), "[1]A,d", 0, v7
}, /* swapa [rs1+%g0],d */
561 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1), "[1+i]o,d", 0, v9
},
562 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1), "[i+1]o,d", 0, v9
},
563 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
564 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* swap [rs1+0],d */
566 { "restore", F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|ASI(~0), "1,2,d", 0, v6
},
567 { "restore", F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|RD_G0
|RS1_G0
|ASI_RS2(~0), "", 0, v6
}, /* restore %g0,%g0,%g0 */
568 { "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1), "1,i,d", 0, v6
},
569 { "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1)|RD_G0
|RS1_G0
|SIMM13(~0), "", 0, v6
}, /* restore %g0,0,%g0 */
571 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0
|ASI(~0), "1+2", F_UNBR
|F_DELAYED
, v6
}, /* rett rs1+rs2 */
572 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0
|ASI_RS2(~0), "1", F_UNBR
|F_DELAYED
, v6
}, /* rett rs1,%g0 */
573 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
, "1+i", F_UNBR
|F_DELAYED
, v6
}, /* rett rs1+X */
574 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
, "i+1", F_UNBR
|F_DELAYED
, v6
}, /* rett X+rs1 */
575 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
|RS1_G0
, "i", F_UNBR
|F_DELAYED
, v6
}, /* rett X+rs1 */
576 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
|RS1_G0
, "i", F_UNBR
|F_DELAYED
, v6
}, /* rett X */
577 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
|SIMM13(~0), "1", F_UNBR
|F_DELAYED
, v6
}, /* rett rs1+0 */
579 { "save", F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0), "1,2,d", 0, v6
},
580 { "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1), "1,i,d", 0, v6
},
581 { "save", 0x81e00000, ~0x81e00000, "", F_ALIAS
, v6
},
583 { "ret", F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8), "", F_UNBR
|F_DELAYED
, v6
}, /* jmpl %i7+8,%g0 */
584 { "retl", F3(2, 0x38, 1)|RS1(0x0f)|SIMM13(8), F3(~2, ~0x38, ~1)|RS1(~0x0f)|SIMM13(~8), "", F_UNBR
|F_DELAYED
, v6
}, /* jmpl %o7+8,%g0 */
586 { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI(~0), "1+2,d", F_JSR
|F_DELAYED
, v6
},
587 { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI_RS2(~0), "1,d", F_JSR
|F_DELAYED
, v6
}, /* jmpl rs1+%g0,d */
588 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|SIMM13(~0), "1,d", F_JSR
|F_DELAYED
, v6
}, /* jmpl rs1+0,d */
589 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RS1_G0
, "i,d", F_JSR
|F_DELAYED
, v6
}, /* jmpl %g0+i,d */
590 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1), "1+i,d", F_JSR
|F_DELAYED
, v6
},
591 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1), "i+1,d", F_JSR
|F_DELAYED
, v6
},
593 { "done", F3(2, 0x3e, 0)|RD(0), F3(~2, ~0x3e, ~0)|RD(~0)|RS1_G0
|SIMM13(~0), "", 0, v9
},
594 { "retry", F3(2, 0x3e, 0)|RD(1), F3(~2, ~0x3e, ~0)|RD(~1)|RS1_G0
|SIMM13(~0), "", 0, v9
},
595 { "saved", F3(2, 0x31, 0)|RD(0), F3(~2, ~0x31, ~0)|RD(~0)|RS1_G0
|SIMM13(~0), "", 0, v9
},
596 { "restored", F3(2, 0x31, 0)|RD(1), F3(~2, ~0x31, ~0)|RD(~1)|RS1_G0
|SIMM13(~0), "", 0, v9
},
597 { "sir", F3(2, 0x30, 1)|RD(0xf), F3(~2, ~0x30, ~1)|RD(~0xf)|RS1_G0
, "i", 0, v9
},
599 { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", 0, v8
},
600 { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0), "1", 0, v8
}, /* flush rs1+%g0 */
601 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", 0, v8
}, /* flush rs1+0 */
602 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0
, "i", 0, v8
}, /* flush %g0+i */
603 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "1+i", 0, v8
},
604 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "i+1", 0, v8
},
606 /* IFLUSH was renamed to FLUSH in v8. */
607 { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", F_ALIAS
, v6
},
608 { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0), "1", F_ALIAS
, v6
}, /* flush rs1+%g0 */
609 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", F_ALIAS
, v6
}, /* flush rs1+0 */
610 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0
, "i", F_ALIAS
, v6
},
611 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "1+i", F_ALIAS
, v6
},
612 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "i+1", F_ALIAS
, v6
},
614 { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI(~0), "1+2", 0, v9
},
615 { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI_RS2(~0), "1", 0, v9
}, /* return rs1+%g0 */
616 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|SIMM13(~0), "1", 0, v9
}, /* return rs1+0 */
617 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RS1_G0
, "i", 0, v9
}, /* return %g0+i */
618 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1), "1+i", 0, v9
},
619 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1), "i+1", 0, v9
},
621 { "flushw", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RD_G0
|RS1_G0
|ASI_RS2(~0), "", 0, v9
},
623 { "membar", F3(2, 0x28, 1)|RS1(0xf), F3(~2, ~0x28, ~1)|RD_G0
|RS1(~0xf)|SIMM13(~127), "K", 0, v9
},
624 { "stbar", F3(2, 0x28, 0)|RS1(0xf), F3(~2, ~0x28, ~0)|RD_G0
|RS1(~0xf)|SIMM13(~0), "", 0, v8
},
626 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0), "[1+2],*", 0, v9
},
627 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0)|RS2_G0
, "[1],*", 0, v9
}, /* prefetch [rs1+%g0],prefetch_fcn */
628 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1), "[1+i],*", 0, v9
},
629 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1), "[i+1],*", 0, v9
},
630 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|RS1_G0
, "[i],*", 0, v9
},
631 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|SIMM13(~0), "[1],*", 0, v9
}, /* prefetch [rs1+0],prefetch_fcn */
632 { "prefetcha", F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0), "[1+2]A,*", 0, v9
},
633 { "prefetcha", F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0)|RS2_G0
, "[1]A,*", 0, v9
}, /* prefetcha [rs1+%g0],prefetch_fcn */
634 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1), "[1+i]o,*", 0, v9
},
635 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1), "[i+1]o,*", 0, v9
},
636 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|RS1_G0
, "[i]o,*", 0, v9
},
637 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|SIMM13(~0), "[1]o,*", 0, v9
}, /* prefetcha [rs1+0],d */
639 /* The 1<<12 is a long story. It is necessary. For more info, please contact rich@cygnus.com */
640 /* FIXME: 'i' is wrong, need new letter for 5 bit unsigned constants. */
641 { "sll", F3(2, 0x25, 0), F3(~2, ~0x25, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6
},
642 { "sll", F3(2, 0x25, 1), F3(~2, ~0x25, ~1)|(1<<12), "1,i,d", 0, v6
},
643 { "sra", F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6
},
644 { "sra", F3(2, 0x27, 1), F3(~2, ~0x27, ~1)|(1<<12), "1,i,d", 0, v6
},
645 { "srl", F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6
},
646 { "srl", F3(2, 0x26, 1), F3(~2, ~0x26, ~1)|(1<<12), "1,i,d", 0, v6
},
648 /* FIXME: 'j' is wrong, need new letter for 6 bit unsigned constants. */
649 { "sllx", F3(2, 0x25, 0)|(1<<12), F3(~2, ~0x25, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9
},
650 { "sllx", F3(2, 0x25, 1)|(1<<12), F3(~2, ~0x25, ~1)|(0x3f<<6), "1,j,d", 0, v9
},
651 { "srax", F3(2, 0x27, 0)|(1<<12), F3(~2, ~0x27, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9
},
652 { "srax", F3(2, 0x27, 1)|(1<<12), F3(~2, ~0x27, ~1)|(0x3f<<6), "1,j,d", 0, v9
},
653 { "srlx", F3(2, 0x26, 0)|(1<<12), F3(~2, ~0x26, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9
},
654 { "srlx", F3(2, 0x26, 1)|(1<<12), F3(~2, ~0x26, ~1)|(0x3f<<6), "1,j,d", 0, v9
},
656 { "mulscc", F3(2, 0x24, 0), F3(~2, ~0x24, ~0)|ASI(~0), "1,2,d", 0, v6
},
657 { "mulscc", F3(2, 0x24, 1), F3(~2, ~0x24, ~1), "1,i,d", 0, v6
},
659 { "divscc", F3(2, 0x1d, 0), F3(~2, ~0x1d, ~0)|ASI(~0), "1,2,d", 0, sparclite
},
660 { "divscc", F3(2, 0x1d, 1), F3(~2, ~0x1d, ~1), "1,i,d", 0, sparclite
},
662 { "scan", F3(2, 0x2c, 0), F3(~2, ~0x2c, ~0)|ASI(~0), "1,2,d", 0, sparclet
|sparclite
},
663 { "scan", F3(2, 0x2c, 1), F3(~2, ~0x2c, ~1), "1,i,d", 0, sparclet
|sparclite
},
665 { "popc", F3(2, 0x2e, 0), F3(~2, ~0x2e, ~0)|RS2_G0
|ASI(~0),"2,d", 0, v9
},
666 { "popc", F3(2, 0x2e, 1), F3(~2, ~0x2e, ~1)|RS2_G0
, "i,d", 0, v9
},
668 { "clr", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RD_G0
|RS1_G0
|ASI_RS2(~0), "d", F_ALIAS
, v6
}, /* or %g0,%g0,d */
669 { "clr", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0
|SIMM13(~0), "d", F_ALIAS
, v6
}, /* or %g0,0,d */
670 { "clr", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v6
},
671 { "clr", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v6
}, /* st %g0,[rs1+%g0] */
672 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v6
},
673 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v6
},
674 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v6
},
675 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v6
}, /* st %g0,[rs1+0] */
677 { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v6
},
678 { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v6
}, /* stb %g0,[rs1+%g0] */
679 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v6
},
680 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v6
},
681 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v6
},
682 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v6
}, /* stb %g0,[rs1+0] */
684 { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v6
},
685 { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v6
}, /* sth %g0,[rs1+%g0] */
686 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v6
},
687 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v6
},
688 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v6
},
689 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v6
}, /* sth %g0,[rs1+0] */
691 { "clrx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v9
},
692 { "clrx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v9
}, /* stx %g0,[rs1+%g0] */
693 { "clrx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v9
},
694 { "clrx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v9
},
695 { "clrx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v9
},
696 { "clrx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v9
}, /* stx %g0,[rs1+0] */
698 { "orcc", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|ASI(~0), "1,2,d", 0, v6
},
699 { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1), "1,i,d", 0, v6
},
700 { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1), "i,1,d", 0, v6
},
702 /* This is not a commutative instruction. */
703 { "orncc", F3(2, 0x16, 0), F3(~2, ~0x16, ~0)|ASI(~0), "1,2,d", 0, v6
},
704 { "orncc", F3(2, 0x16, 1), F3(~2, ~0x16, ~1), "1,i,d", 0, v6
},
706 /* This is not a commutative instruction. */
707 { "orn", F3(2, 0x06, 0), F3(~2, ~0x06, ~0)|ASI(~0), "1,2,d", 0, v6
},
708 { "orn", F3(2, 0x06, 1), F3(~2, ~0x06, ~1), "1,i,d", 0, v6
},
710 { "tst", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0
|ASI_RS2(~0), "1", 0, v6
}, /* orcc rs1, %g0, %g0 */
711 { "tst", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0
|RS1_G0
|ASI(~0), "2", 0, v6
}, /* orcc %g0, rs2, %g0 */
712 { "tst", F3(2, 0x12, 1), F3(~2, ~0x12, ~1)|RD_G0
|SIMM13(~0), "1", 0, v6
}, /* orcc rs1, 0, %g0 */
714 { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", 0, v8
}, /* wr r,r,%asrX */
715 { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", 0, v8
}, /* wr r,i,%asrX */
716 { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0
|ASI(~0), "1,2,y", 0, v6
}, /* wr r,r,%y */
717 { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0
, "1,i,y", 0, v6
}, /* wr r,i,%y */
718 { "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0
|ASI(~0), "1,2,p", 0, v6notv9
}, /* wr r,r,%psr */
719 { "wr", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0
, "1,i,p", 0, v6notv9
}, /* wr r,i,%psr */
720 { "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0
|ASI(~0), "1,2,w", 0, v6notv9
}, /* wr r,r,%wim */
721 { "wr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0
, "1,i,w", 0, v6notv9
}, /* wr r,i,%wim */
722 { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0
|ASI(~0), "1,2,t", 0, v6notv9
}, /* wr r,r,%tbr */
723 { "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
, "1,i,t", 0, v6notv9
}, /* wr r,i,%tbr */
725 { "wr", F3(2, 0x30, 0)|RD(2), F3(~2, ~0x30, ~0)|RD(~2)|ASI(~0), "1,2,E", 0, v9
}, /* wr r,r,%ccr */
726 { "wr", F3(2, 0x30, 1)|RD(2), F3(~2, ~0x30, ~1)|RD(~2), "1,i,E", 0, v9
}, /* wr r,i,%ccr */
727 { "wr", F3(2, 0x30, 0)|RD(3), F3(~2, ~0x30, ~0)|RD(~3)|ASI(~0), "1,2,o", 0, v9
}, /* wr r,r,%asi */
728 { "wr", F3(2, 0x30, 1)|RD(3), F3(~2, ~0x30, ~1)|RD(~3), "1,i,o", 0, v9
}, /* wr r,i,%asi */
729 { "wr", F3(2, 0x30, 0)|RD(6), F3(~2, ~0x30, ~0)|RD(~6)|ASI(~0), "1,2,s", 0, v9
}, /* wr r,i,%fprs */
730 { "wr", F3(2, 0x30, 1)|RD(6), F3(~2, ~0x30, ~1)|RD(~6), "1,i,s", 0, v9
}, /* wr r,i,%fprs */
732 { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0), "M,d", 0, v8
}, /* rd %asrX,r */
733 { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0
|SIMM13(~0), "y,d", 0, v6
}, /* rd %y,r */
734 { "rd", F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0
|SIMM13(~0), "p,d", 0, v6notv9
}, /* rd %psr,r */
735 { "rd", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0
|SIMM13(~0), "w,d", 0, v6notv9
}, /* rd %wim,r */
736 { "rd", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0
|SIMM13(~0), "t,d", 0, v6notv9
}, /* rd %tbr,r */
738 { "rd", F3(2, 0x28, 0)|RS1(2), F3(~2, ~0x28, ~0)|RS1(~2)|SIMM13(~0), "E,d", 0, v9
}, /* rd %ccr,r */
739 { "rd", F3(2, 0x28, 0)|RS1(3), F3(~2, ~0x28, ~0)|RS1(~3)|SIMM13(~0), "o,d", 0, v9
}, /* rd %asi,r */
740 { "rd", F3(2, 0x28, 0)|RS1(4), F3(~2, ~0x28, ~0)|RS1(~4)|SIMM13(~0), "W,d", 0, v9
}, /* rd %tick,r */
741 { "rd", F3(2, 0x28, 0)|RS1(5), F3(~2, ~0x28, ~0)|RS1(~5)|SIMM13(~0), "P,d", 0, v9
}, /* rd %pc,r */
742 { "rd", F3(2, 0x28, 0)|RS1(6), F3(~2, ~0x28, ~0)|RS1(~6)|SIMM13(~0), "s,d", 0, v9
}, /* rd %fprs,r */
744 { "rdpr", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|SIMM13(~0), "?,d", 0, v9
}, /* rdpr %priv,r */
745 { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0), "1,2,!", 0, v9
}, /* wrpr r1,r2,%priv */
746 { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "1,!", 0, v9
}, /* wrpr r1,%priv */
747 { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "1,i,!", 0, v9
}, /* wrpr r1,i,%priv */
748 { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,1,!", F_ALIAS
, v9
}, /* wrpr i,r1,%priv */
749 { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RS1(~0), "i,!", 0, v9
}, /* wrpr i,%priv */
751 /* ??? This group seems wrong. A three operand move? */
752 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", F_ALIAS
, v8
}, /* wr r,r,%asrX */
753 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", F_ALIAS
, v8
}, /* wr r,i,%asrX */
754 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0
|ASI(~0), "1,2,y", F_ALIAS
, v6
}, /* wr r,r,%y */
755 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0
, "1,i,y", F_ALIAS
, v6
}, /* wr r,i,%y */
756 { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0
|ASI(~0), "1,2,p", F_ALIAS
, v6notv9
}, /* wr r,r,%psr */
757 { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0
, "1,i,p", F_ALIAS
, v6notv9
}, /* wr r,i,%psr */
758 { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0
|ASI(~0), "1,2,w", F_ALIAS
, v6notv9
}, /* wr r,r,%wim */
759 { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0
, "1,i,w", F_ALIAS
, v6notv9
}, /* wr r,i,%wim */
760 { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0
|ASI(~0), "1,2,t", F_ALIAS
, v6notv9
}, /* wr r,r,%tbr */
761 { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
, "1,i,t", F_ALIAS
, v6notv9
}, /* wr r,i,%tbr */
763 { "mov", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0), "M,d", F_ALIAS
, v8
}, /* rd %asr1,r */
764 { "mov", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0
|SIMM13(~0), "y,d", F_ALIAS
, v6
}, /* rd %y,r */
765 { "mov", F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0
|SIMM13(~0), "p,d", F_ALIAS
, v6notv9
}, /* rd %psr,r */
766 { "mov", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0
|SIMM13(~0), "w,d", F_ALIAS
, v6notv9
}, /* rd %wim,r */
767 { "mov", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0
|SIMM13(~0), "t,d", F_ALIAS
, v6notv9
}, /* rd %tbr,r */
769 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI_RS2(~0), "1,m", F_ALIAS
, v8
}, /* wr rs1,%g0,%asrX */
770 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "i,m", F_ALIAS
, v8
}, /* wr %g0,i,%asrX */
771 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|SIMM13(~0), "1,m", F_ALIAS
, v8
}, /* wr rs1,0,%asrX */
772 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0
|ASI_RS2(~0), "1,y", F_ALIAS
, v6
}, /* wr rs1,%g0,%y */
773 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0
, "i,y", F_ALIAS
, v6
}, /* wr %g0,i,%y */
774 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0
|SIMM13(~0), "1,y", F_ALIAS
, v6
}, /* wr rs1,0,%y */
775 { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0
|ASI_RS2(~0), "1,p", F_ALIAS
, v6notv9
}, /* wr rs1,%g0,%psr */
776 { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0
, "i,p", F_ALIAS
, v6notv9
}, /* wr %g0,i,%psr */
777 { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0
|SIMM13(~0), "1,p", F_ALIAS
, v6notv9
}, /* wr rs1,0,%psr */
778 { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0
|ASI_RS2(~0), "1,w", F_ALIAS
, v6notv9
}, /* wr rs1,%g0,%wim */
779 { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0
, "i,w", F_ALIAS
, v6notv9
}, /* wr %g0,i,%wim */
780 { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0
|SIMM13(~0), "1,w", F_ALIAS
, v6notv9
}, /* wr rs1,0,%wim */
781 { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0
|ASI_RS2(~0), "1,t", F_ALIAS
, v6notv9
}, /* wr rs1,%g0,%tbr */
782 { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
, "i,t", F_ALIAS
, v6notv9
}, /* wr %g0,i,%tbr */
783 { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
|SIMM13(~0), "1,t", F_ALIAS
, v6notv9
}, /* wr rs1,0,%tbr */
785 { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RS1_G0
|ASI(~0), "2,d", 0, v6
}, /* or %g0,rs2,d */
786 { "mov", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0
, "i,d", 0, v6
}, /* or %g0,i,d */
787 { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI_RS2(~0), "1,d", 0, v6
}, /* or rs1,%g0,d */
788 { "mov", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|SIMM13(~0), "1,d", 0, v6
}, /* or rs1,0,d */
790 { "or", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0), "1,2,d", 0, v6
},
791 { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "1,i,d", 0, v6
},
792 { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "i,1,d", 0, v6
},
794 { "bset", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0), "2,r", F_ALIAS
, v6
}, /* or rd,rs2,rd */
795 { "bset", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "i,r", F_ALIAS
, v6
}, /* or rd,i,rd */
797 /* This is not a commutative instruction. */
798 { "andn", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0), "1,2,d", 0, v6
},
799 { "andn", F3(2, 0x05, 1), F3(~2, ~0x05, ~1), "1,i,d", 0, v6
},
801 /* This is not a commutative instruction. */
802 { "andncc", F3(2, 0x15, 0), F3(~2, ~0x15, ~0)|ASI(~0), "1,2,d", 0, v6
},
803 { "andncc", F3(2, 0x15, 1), F3(~2, ~0x15, ~1), "1,i,d", 0, v6
},
805 { "bclr", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0), "2,r", F_ALIAS
, v6
}, /* andn rd,rs2,rd */
806 { "bclr", F3(2, 0x05, 1), F3(~2, ~0x05, ~1), "i,r", F_ALIAS
, v6
}, /* andn rd,i,rd */
808 { "cmp", F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|RD_G0
|ASI(~0), "1,2", 0, v6
}, /* subcc rs1,rs2,%g0 */
809 { "cmp", F3(2, 0x14, 1), F3(~2, ~0x14, ~1)|RD_G0
, "1,i", 0, v6
}, /* subcc rs1,i,%g0 */
811 { "sub", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|ASI(~0), "1,2,d", 0, v6
},
812 { "sub", F3(2, 0x04, 1), F3(~2, ~0x04, ~1), "1,i,d", 0, v6
},
814 { "subcc", F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|ASI(~0), "1,2,d", 0, v6
},
815 { "subcc", F3(2, 0x14, 1), F3(~2, ~0x14, ~1), "1,i,d", 0, v6
},
817 { "subx", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0), "1,2,d", 0, v6notv9
},
818 { "subx", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1), "1,i,d", 0, v6notv9
},
819 { "subc", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0), "1,2,d", 0, v9
},
820 { "subc", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1), "1,i,d", 0, v9
},
822 { "subxcc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0), "1,2,d", 0, v6notv9
},
823 { "subxcc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1), "1,i,d", 0, v6notv9
},
824 { "subccc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0), "1,2,d", 0, v9
},
825 { "subccc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1), "1,i,d", 0, v9
},
827 { "and", F3(2, 0x01, 0), F3(~2, ~0x01, ~0)|ASI(~0), "1,2,d", 0, v6
},
828 { "and", F3(2, 0x01, 1), F3(~2, ~0x01, ~1), "1,i,d", 0, v6
},
829 { "and", F3(2, 0x01, 1), F3(~2, ~0x01, ~1), "i,1,d", 0, v6
},
831 { "andcc", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|ASI(~0), "1,2,d", 0, v6
},
832 { "andcc", F3(2, 0x11, 1), F3(~2, ~0x11, ~1), "1,i,d", 0, v6
},
833 { "andcc", F3(2, 0x11, 1), F3(~2, ~0x11, ~1), "i,1,d", 0, v6
},
835 { "dec", F3(2, 0x04, 1)|SIMM13(0x1), F3(~2, ~0x04, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* sub rd,1,rd */
836 { "dec", F3(2, 0x04, 1), F3(~2, ~0x04, ~1), "i,r", F_ALIAS
, v8
}, /* sub rd,imm,rd */
837 { "deccc", F3(2, 0x14, 1)|SIMM13(0x1), F3(~2, ~0x14, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* subcc rd,1,rd */
838 { "deccc", F3(2, 0x14, 1), F3(~2, ~0x14, ~1), "i,r", F_ALIAS
, v8
}, /* subcc rd,imm,rd */
839 { "inc", F3(2, 0x00, 1)|SIMM13(0x1), F3(~2, ~0x00, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* add rd,1,rd */
840 { "inc", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "i,r", F_ALIAS
, v8
}, /* add rd,imm,rd */
841 { "inccc", F3(2, 0x10, 1)|SIMM13(0x1), F3(~2, ~0x10, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* addcc rd,1,rd */
842 { "inccc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "i,r", F_ALIAS
, v8
}, /* addcc rd,imm,rd */
844 { "btst", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|RD_G0
|ASI(~0), "1,2", F_ALIAS
, v6
}, /* andcc rs1,rs2,%g0 */
845 { "btst", F3(2, 0x11, 1), F3(~2, ~0x11, ~1)|RD_G0
, "i,1", F_ALIAS
, v6
}, /* andcc rs1,i,%g0 */
847 { "neg", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0
|ASI(~0), "2,d", F_ALIAS
, v6
}, /* sub %g0,rs2,rd */
848 { "neg", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0
|ASI(~0), "O", F_ALIAS
, v6
}, /* sub %g0,rd,rd */
850 { "add", F3(2, 0x00, 0), F3(~2, ~0x00, ~0)|ASI(~0), "1,2,d", 0, v6
},
851 { "add", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "1,i,d", 0, v6
},
852 { "add", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "i,1,d", 0, v6
},
853 { "addcc", F3(2, 0x10, 0), F3(~2, ~0x10, ~0)|ASI(~0), "1,2,d", 0, v6
},
854 { "addcc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "1,i,d", 0, v6
},
855 { "addcc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "i,1,d", 0, v6
},
857 { "addx", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0), "1,2,d", 0, v6notv9
},
858 { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "1,i,d", 0, v6notv9
},
859 { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "i,1,d", 0, v6notv9
},
860 { "addc", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0), "1,2,d", 0, v9
},
861 { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "1,i,d", 0, v9
},
862 { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "i,1,d", 0, v9
},
864 { "addxcc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0), "1,2,d", 0, v6notv9
},
865 { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "1,i,d", 0, v6notv9
},
866 { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "i,1,d", 0, v6notv9
},
867 { "addccc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0), "1,2,d", 0, v9
},
868 { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "1,i,d", 0, v9
},
869 { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "i,1,d", 0, v9
},
871 { "smul", F3(2, 0x0b, 0), F3(~2, ~0x0b, ~0)|ASI(~0), "1,2,d", 0, v8
},
872 { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "1,i,d", 0, v8
},
873 { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "i,1,d", 0, v8
},
874 { "smulcc", F3(2, 0x1b, 0), F3(~2, ~0x1b, ~0)|ASI(~0), "1,2,d", 0, v8
},
875 { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "1,i,d", 0, v8
},
876 { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "i,1,d", 0, v8
},
877 { "umul", F3(2, 0x0a, 0), F3(~2, ~0x0a, ~0)|ASI(~0), "1,2,d", 0, v8
},
878 { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "1,i,d", 0, v8
},
879 { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "i,1,d", 0, v8
},
880 { "umulcc", F3(2, 0x1a, 0), F3(~2, ~0x1a, ~0)|ASI(~0), "1,2,d", 0, v8
},
881 { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "1,i,d", 0, v8
},
882 { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "i,1,d", 0, v8
},
883 { "sdiv", F3(2, 0x0f, 0), F3(~2, ~0x0f, ~0)|ASI(~0), "1,2,d", 0, v8
},
884 { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "1,i,d", 0, v8
},
885 { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "i,1,d", 0, v8
},
886 { "sdivcc", F3(2, 0x1f, 0), F3(~2, ~0x1f, ~0)|ASI(~0), "1,2,d", 0, v8
},
887 { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "1,i,d", 0, v8
},
888 { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "i,1,d", 0, v8
},
889 { "udiv", F3(2, 0x0e, 0), F3(~2, ~0x0e, ~0)|ASI(~0), "1,2,d", 0, v8
},
890 { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "1,i,d", 0, v8
},
891 { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "i,1,d", 0, v8
},
892 { "udivcc", F3(2, 0x1e, 0), F3(~2, ~0x1e, ~0)|ASI(~0), "1,2,d", 0, v8
},
893 { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "1,i,d", 0, v8
},
894 { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "i,1,d", 0, v8
},
896 { "mulx", F3(2, 0x09, 0), F3(~2, ~0x09, ~0)|ASI(~0), "1,2,d", 0, v9
},
897 { "mulx", F3(2, 0x09, 1), F3(~2, ~0x09, ~1), "1,i,d", 0, v9
},
898 { "sdivx", F3(2, 0x2d, 0), F3(~2, ~0x2d, ~0)|ASI(~0), "1,2,d", 0, v9
},
899 { "sdivx", F3(2, 0x2d, 1), F3(~2, ~0x2d, ~1), "1,i,d", 0, v9
},
900 { "udivx", F3(2, 0x0d, 0), F3(~2, ~0x0d, ~0)|ASI(~0), "1,2,d", 0, v9
},
901 { "udivx", F3(2, 0x0d, 1), F3(~2, ~0x0d, ~1), "1,i,d", 0, v9
},
903 { "call", F1(0x1), F1(~0x1), "L", F_JSR
|F_DELAYED
, v6
},
904 { "call", F1(0x1), F1(~0x1), "L,#", F_JSR
|F_DELAYED
, v6
},
906 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI(~0), "1+2", F_JSR
|F_DELAYED
, v6
}, /* jmpl rs1+rs2,%o7 */
907 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI(~0), "1+2,#", F_JSR
|F_DELAYED
, v6
},
908 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1", F_JSR
|F_DELAYED
, v6
}, /* jmpl rs1+%g0,%o7 */
909 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1,#", F_JSR
|F_DELAYED
, v6
},
910 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf), "1+i", F_JSR
|F_DELAYED
, v6
}, /* jmpl rs1+i,%o7 */
911 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf), "1+i,#", F_JSR
|F_DELAYED
, v6
},
912 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf), "i+1", F_JSR
|F_DELAYED
, v6
}, /* jmpl i+rs1,%o7 */
913 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf), "i+1,#", F_JSR
|F_DELAYED
, v6
},
914 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|RS1_G0
, "i", F_JSR
|F_DELAYED
, v6
}, /* jmpl %g0+i,%o7 */
915 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|RS1_G0
, "i,#", F_JSR
|F_DELAYED
, v6
},
916 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|SIMM13(~0), "1", F_JSR
|F_DELAYED
, v6
}, /* jmpl rs1+0,%o7 */
917 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|SIMM13(~0), "1,#", F_JSR
|F_DELAYED
, v6
},
920 /* Conditional instructions.
922 Because this part of the table was such a mess earlier, I have
923 macrofied it so that all the branches and traps are generated from
924 a single-line description of each condition value. John Gilmore. */
926 /* Define branches -- one annulled, one without, etc. */
927 #define br(opcode, mask, lose, flags) \
928 { opcode, (mask)|ANNUL, (lose), ",a l", (flags), v6 }, \
929 { opcode, (mask) , (lose)|ANNUL, "l", (flags), v6 }
931 #define brx(opcode, mask, lose, flags) /* v9 */ \
932 { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), "Z,G", (flags), v9 }, \
933 { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), ",T Z,G", (flags), v9 }, \
934 { opcode, (mask)|(2<<20)|BPRED|ANNUL, (lose), ",a Z,G", (flags), v9 }, \
935 { opcode, (mask)|(2<<20)|BPRED|ANNUL, (lose), ",a,T Z,G", (flags), v9 }, \
936 { opcode, (mask)|(2<<20), ANNUL|BPRED|(lose), ",N Z,G", (flags), v9 }, \
937 { opcode, (mask)|(2<<20)|ANNUL, BPRED|(lose), ",a,N Z,G", (flags), v9 }, \
938 { opcode, (mask)|BPRED, ANNUL|(lose)|(2<<20), "z,G", (flags), v9 }, \
939 { opcode, (mask)|BPRED, ANNUL|(lose)|(2<<20), ",T z,G", (flags), v9 }, \
940 { opcode, (mask)|BPRED|ANNUL, (lose)|(2<<20), ",a z,G", (flags), v9 }, \
941 { opcode, (mask)|BPRED|ANNUL, (lose)|(2<<20), ",a,T z,G", (flags), v9 }, \
942 { opcode, (mask), ANNUL|BPRED|(lose)|(2<<20), ",N z,G", (flags), v9 }, \
943 { opcode, (mask)|ANNUL, BPRED|(lose)|(2<<20), ",a,N z,G", (flags), v9 }
945 /* Define four traps: reg+reg, reg + immediate, immediate alone, reg alone. */
946 #define tr(opcode, mask, lose, flags) \
947 { opcode, (mask)|(2<<11)|IMMED, (lose)|RS1_G0, "Z,i", (flags), v9 }, /* %g0 + imm */ \
948 { opcode, (mask)|(2<<11)|IMMED, (lose), "Z,1+i", (flags), v9 }, /* rs1 + imm */ \
949 { opcode, (mask)|(2<<11), IMMED|(lose), "Z,1+2", (flags), v9 }, /* rs1 + rs2 */ \
950 { opcode, (mask)|(2<<11), IMMED|(lose)|RS2_G0, "Z,1", (flags), v9 }, /* rs1 + %g0 */ \
951 { opcode, (mask)|IMMED, (lose)|RS1_G0, "z,i", (flags)|F_ALIAS, v9 }, /* %g0 + imm */ \
952 { opcode, (mask)|IMMED, (lose), "z,1+i", (flags)|F_ALIAS, v9 }, /* rs1 + imm */ \
953 { opcode, (mask), IMMED|(lose), "z,1+2", (flags)|F_ALIAS, v9 }, /* rs1 + rs2 */ \
954 { opcode, (mask), IMMED|(lose)|RS2_G0, "z,1", (flags)|F_ALIAS, v9 }, /* rs1 + %g0 */ \
955 { opcode, (mask)|IMMED, (lose)|RS1_G0, "i", (flags), v6 }, /* %g0 + imm */ \
956 { opcode, (mask)|IMMED, (lose), "1+i", (flags), v6 }, /* rs1 + imm */ \
957 { opcode, (mask), IMMED|(lose), "1+2", (flags), v6 }, /* rs1 + rs2 */ \
958 { opcode, (mask), IMMED|(lose)|RS2_G0, "1", (flags), v6 } /* rs1 + %g0 */
960 /* v9: We must put `brx' before `br', to ensure that we never match something
961 v9: against an expression unless it is an expression. Otherwise, we end
962 v9: up with undefined symbol tables entries, because they get added, but
963 v9: are not deleted if the pattern fails to match. */
965 /* Define both branches and traps based on condition mask */
966 #define cond(bop, top, mask, flags) \
967 brx(bop, F2(0, 1)|(mask), F2(~0, ~1)|((~mask)&COND(~0)), F_DELAYED|(flags)), /* v9 */ \
968 br(bop, F2(0, 2)|(mask), F2(~0, ~2)|((~mask)&COND(~0)), F_DELAYED|(flags)), \
969 tr(top, F3(2, 0x3a, 0)|(mask), F3(~2, ~0x3a, 0)|((~mask)&COND(~0)), ((flags) & ~(F_UNBR|F_CONDBR)))
971 /* Define all the conditions, all the branches, all the traps. */
973 /* Standard branch, trap mnemonics */
974 cond ("b", "ta", CONDA
, F_UNBR
),
975 /* Alternative form (just for assembly, not for disassembly) */
976 cond ("ba", "t", CONDA
, F_UNBR
|F_ALIAS
),
978 cond ("bcc", "tcc", CONDCC
, F_CONDBR
),
979 cond ("bcs", "tcs", CONDCS
, F_CONDBR
),
980 cond ("be", "te", CONDE
, F_CONDBR
),
981 cond ("bg", "tg", CONDG
, F_CONDBR
),
982 cond ("bgt", "tgt", CONDG
, F_CONDBR
|F_ALIAS
),
983 cond ("bge", "tge", CONDGE
, F_CONDBR
),
984 cond ("bgeu", "tgeu", CONDGEU
, F_CONDBR
|F_ALIAS
), /* for cc */
985 cond ("bgu", "tgu", CONDGU
, F_CONDBR
),
986 cond ("bl", "tl", CONDL
, F_CONDBR
),
987 cond ("blt", "tlt", CONDL
, F_CONDBR
|F_ALIAS
),
988 cond ("ble", "tle", CONDLE
, F_CONDBR
),
989 cond ("bleu", "tleu", CONDLEU
, F_CONDBR
),
990 cond ("blu", "tlu", CONDLU
, F_CONDBR
|F_ALIAS
), /* for cs */
991 cond ("bn", "tn", CONDN
, F_CONDBR
),
992 cond ("bne", "tne", CONDNE
, F_CONDBR
),
993 cond ("bneg", "tneg", CONDNEG
, F_CONDBR
),
994 cond ("bnz", "tnz", CONDNZ
, F_CONDBR
|F_ALIAS
), /* for ne */
995 cond ("bpos", "tpos", CONDPOS
, F_CONDBR
),
996 cond ("bvc", "tvc", CONDVC
, F_CONDBR
),
997 cond ("bvs", "tvs", CONDVS
, F_CONDBR
),
998 cond ("bz", "tz", CONDZ
, F_CONDBR
|F_ALIAS
), /* for e */
1005 #define brr(opcode, mask, lose, flags) /* v9 */ \
1006 { opcode, (mask)|BPRED, ANNUL|(lose), "1,k", F_DELAYED|(flags), v9 }, \
1007 { opcode, (mask)|BPRED, ANNUL|(lose), ",T 1,k", F_DELAYED|(flags), v9 }, \
1008 { opcode, (mask)|BPRED|ANNUL, (lose), ",a 1,k", F_DELAYED|(flags), v9 }, \
1009 { opcode, (mask)|BPRED|ANNUL, (lose), ",a,T 1,k", F_DELAYED|(flags), v9 }, \
1010 { opcode, (mask), ANNUL|BPRED|(lose), ",N 1,k", F_DELAYED|(flags), v9 }, \
1011 { opcode, (mask)|ANNUL, BPRED|(lose), ",a,N 1,k", F_DELAYED|(flags), v9 }
1013 #define condr(bop, mask, flags) /* v9 */ \
1014 brr(bop, F2(0, 3)|COND(mask), F2(~0, ~3)|COND(~(mask)), (flags)) /* v9 */
1016 /* v9 */ condr("brnz", 0x5, F_CONDBR
),
1017 /* v9 */ condr("brz", 0x1, F_CONDBR
),
1018 /* v9 */ condr("brgez", 0x7, F_CONDBR
),
1019 /* v9 */ condr("brlz", 0x3, F_CONDBR
),
1020 /* v9 */ condr("brlez", 0x2, F_CONDBR
),
1021 /* v9 */ condr("brgz", 0x6, F_CONDBR
),
1023 #undef condr /* v9 */
1026 #define movr(opcode, mask, flags) /* v9 */ \
1027 { opcode, F3(2, 0x2f, 0)|RCOND(mask), F3(~2, ~0x2f, ~0)|RCOND(~(mask)), "1,2,d", (flags), v9 }, \
1028 { opcode, F3(2, 0x2f, 1)|RCOND(mask), F3(~2, ~0x2f, ~1)|RCOND(~(mask)), "1,j,d", (flags), v9 }
1030 #define fmrrs(opcode, mask, lose, flags) /* v9 */ \
1031 { opcode, (mask), (lose), "1,f,g", (flags), v9 }
1032 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \
1033 { opcode, (mask), (lose), "1,B,H", (flags), v9 }
1034 #define fmrrq(opcode, mask, lose, flags) /* v9 */ \
1035 { opcode, (mask), (lose), "1,R,J", (flags), v9 }
1037 #define fmovrs(mop, mask, flags) /* v9 */ \
1038 fmrrs(mop, F3(2, 0x35, 0)|OPF_LOW5(5)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~5)|RCOND(~(mask)), (flags)) /* v9 */
1039 #define fmovrd(mop, mask, flags) /* v9 */ \
1040 fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (flags)) /* v9 */
1041 #define fmovrq(mop, mask, flags) /* v9 */ \
1042 fmrrq(mop, F3(2, 0x35, 0)|OPF_LOW5(7)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~7)|RCOND(~(mask)), (flags)) /* v9 */
1044 /* v9 */ movr("movrne", 0x5, 0),
1045 /* v9 */ movr("movre", 0x1, 0),
1046 /* v9 */ movr("movrgez", 0x7, 0),
1047 /* v9 */ movr("movrlz", 0x3, 0),
1048 /* v9 */ movr("movrlez", 0x2, 0),
1049 /* v9 */ movr("movrgz", 0x6, 0),
1050 /* v9 */ movr("movrnz", 0x5, F_ALIAS
),
1051 /* v9 */ movr("movrz", 0x1, F_ALIAS
),
1053 /* v9 */ fmovrs("fmovrsne", 0x5, 0),
1054 /* v9 */ fmovrs("fmovrse", 0x1, 0),
1055 /* v9 */ fmovrs("fmovrsgez", 0x7, 0),
1056 /* v9 */ fmovrs("fmovrslz", 0x3, 0),
1057 /* v9 */ fmovrs("fmovrslez", 0x2, 0),
1058 /* v9 */ fmovrs("fmovrsgz", 0x6, 0),
1059 /* v9 */ fmovrs("fmovrsnz", 0x5, F_ALIAS
),
1060 /* v9 */ fmovrs("fmovrsz", 0x1, F_ALIAS
),
1062 /* v9 */ fmovrd("fmovrdne", 0x5, 0),
1063 /* v9 */ fmovrd("fmovrde", 0x1, 0),
1064 /* v9 */ fmovrd("fmovrdgez", 0x7, 0),
1065 /* v9 */ fmovrd("fmovrdlz", 0x3, 0),
1066 /* v9 */ fmovrd("fmovrdlez", 0x2, 0),
1067 /* v9 */ fmovrd("fmovrdgz", 0x6, 0),
1068 /* v9 */ fmovrd("fmovrdnz", 0x5, F_ALIAS
),
1069 /* v9 */ fmovrd("fmovrdz", 0x1, F_ALIAS
),
1071 /* v9 */ fmovrq("fmovrqne", 0x5, 0),
1072 /* v9 */ fmovrq("fmovrqe", 0x1, 0),
1073 /* v9 */ fmovrq("fmovrqgez", 0x7, 0),
1074 /* v9 */ fmovrq("fmovrqlz", 0x3, 0),
1075 /* v9 */ fmovrq("fmovrqlez", 0x2, 0),
1076 /* v9 */ fmovrq("fmovrqgz", 0x6, 0),
1077 /* v9 */ fmovrq("fmovrqnz", 0x5, F_ALIAS
),
1078 /* v9 */ fmovrq("fmovrqz", 0x1, F_ALIAS
),
1080 #undef movr /* v9 */
1081 #undef fmovr /* v9 */
1082 #undef fmrr /* v9 */
1084 #define movicc(opcode, cond, flags) /* v9 */ \
1085 { opcode, F3(2, 0x2c, 0)|MCOND(cond,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~cond,~1)|XCC|(1<<11), "z,2,d", flags, v9 }, \
1086 { opcode, F3(2, 0x2c, 1)|MCOND(cond,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~cond,~1)|XCC|(1<<11), "z,I,d", flags, v9 }, \
1087 { opcode, F3(2, 0x2c, 0)|MCOND(cond,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~cond,~1)|(1<<11), "Z,2,d", flags, v9 }, \
1088 { opcode, F3(2, 0x2c, 1)|MCOND(cond,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~cond,~1)|(1<<11), "Z,I,d", flags, v9 }
1090 #define movfcc(opcode, fcond, flags) /* v9 */ \
1091 { opcode, F3(2, 0x2c, 0)|FCC(0)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", flags, v9 }, \
1092 { opcode, F3(2, 0x2c, 1)|FCC(0)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", flags, v9 }, \
1093 { opcode, F3(2, 0x2c, 0)|FCC(1)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", flags, v9 }, \
1094 { opcode, F3(2, 0x2c, 1)|FCC(1)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", flags, v9 }, \
1095 { opcode, F3(2, 0x2c, 0)|FCC(2)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", flags, v9 }, \
1096 { opcode, F3(2, 0x2c, 1)|FCC(2)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", flags, v9 }, \
1097 { opcode, F3(2, 0x2c, 0)|FCC(3)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", flags, v9 }, \
1098 { opcode, F3(2, 0x2c, 1)|FCC(3)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", flags, v9 }
1100 #define movcc(opcode, cond, fcond, flags) /* v9 */ \
1101 movfcc (opcode, fcond, flags), /* v9 */ \
1102 movicc (opcode, cond, flags) /* v9 */
1104 /* v9 */ movcc ("mova", CONDA
, FCONDA
, 0),
1105 /* v9 */ movicc ("movcc", CONDCC
, 0),
1106 /* v9 */ movicc ("movgeu", CONDGEU
, F_ALIAS
),
1107 /* v9 */ movicc ("movcs", CONDCS
, 0),
1108 /* v9 */ movicc ("movlu", CONDLU
, F_ALIAS
),
1109 /* v9 */ movcc ("move", CONDE
, FCONDE
, 0),
1110 /* v9 */ movcc ("movg", CONDG
, FCONDG
, 0),
1111 /* v9 */ movcc ("movge", CONDGE
, FCONDGE
, 0),
1112 /* v9 */ movicc ("movgu", CONDGU
, 0),
1113 /* v9 */ movcc ("movl", CONDL
, FCONDL
, 0),
1114 /* v9 */ movcc ("movle", CONDLE
, FCONDLE
, 0),
1115 /* v9 */ movicc ("movleu", CONDLEU
, 0),
1116 /* v9 */ movfcc ("movlg", FCONDLG
, 0),
1117 /* v9 */ movcc ("movn", CONDN
, FCONDN
, 0),
1118 /* v9 */ movcc ("movne", CONDNE
, FCONDNE
, 0),
1119 /* v9 */ movicc ("movneg", CONDNEG
, 0),
1120 /* v9 */ movcc ("movnz", CONDNZ
, FCONDNZ
, F_ALIAS
),
1121 /* v9 */ movfcc ("movo", FCONDO
, 0),
1122 /* v9 */ movicc ("movpos", CONDPOS
, 0),
1123 /* v9 */ movfcc ("movu", FCONDU
, 0),
1124 /* v9 */ movfcc ("movue", FCONDUE
, 0),
1125 /* v9 */ movfcc ("movug", FCONDUG
, 0),
1126 /* v9 */ movfcc ("movuge", FCONDUGE
, 0),
1127 /* v9 */ movfcc ("movul", FCONDUL
, 0),
1128 /* v9 */ movfcc ("movule", FCONDULE
, 0),
1129 /* v9 */ movicc ("movvc", CONDVC
, 0),
1130 /* v9 */ movicc ("movvs", CONDVS
, 0),
1131 /* v9 */ movcc ("movz", CONDZ
, FCONDZ
, F_ALIAS
),
1133 #undef movicc /* v9 */
1134 #undef movfcc /* v9 */
1135 #undef movcc /* v9 */
1137 #define FM_SF 1 /* v9 - values for fpsize */
1138 #define FM_DF 2 /* v9 */
1139 #define FM_QF 3 /* v9 */
1141 #define fmovicc(opcode, fpsize, cond, flags) /* v9 */ \
1142 { opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z,f,g", flags, v9 }, \
1143 { opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z,f,g", flags, v9 }
1145 #define fmovfcc(opcode, fpsize, fcond, flags) /* v9 */ \
1146 { opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6,f,g", flags, v9 }, \
1147 { opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7,f,g", flags, v9 }, \
1148 { opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8,f,g", flags, v9 }, \
1149 { opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9,f,g", flags, v9 }
1151 /* FIXME: use fmovicc/fmovfcc? */ /* v9 */
1152 #define fmovcc(opcode, fpsize, cond, fcond, flags) /* v9 */ \
1153 { opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z,f,g", flags, v9 }, \
1154 { opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6,f,g", flags, v9 }, \
1155 { opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z,f,g", flags, v9 }, \
1156 { opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7,f,g", flags, v9 }, \
1157 { opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8,f,g", flags, v9 }, \
1158 { opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9,f,g", flags, v9 }
1160 /* v9 */ fmovcc ("fmovda", FM_DF
, CONDA
, FCONDA
, 0),
1161 /* v9 */ fmovcc ("fmovqa", FM_QF
, CONDA
, FCONDA
, 0),
1162 /* v9 */ fmovcc ("fmovsa", FM_SF
, CONDA
, FCONDA
, 0),
1163 /* v9 */ fmovicc ("fmovdcc", FM_DF
, CONDCC
, 0),
1164 /* v9 */ fmovicc ("fmovqcc", FM_QF
, CONDCC
, 0),
1165 /* v9 */ fmovicc ("fmovscc", FM_SF
, CONDCC
, 0),
1166 /* v9 */ fmovicc ("fmovdcs", FM_DF
, CONDCS
, 0),
1167 /* v9 */ fmovicc ("fmovqcs", FM_QF
, CONDCS
, 0),
1168 /* v9 */ fmovicc ("fmovscs", FM_SF
, CONDCS
, 0),
1169 /* v9 */ fmovcc ("fmovde", FM_DF
, CONDE
, FCONDE
, 0),
1170 /* v9 */ fmovcc ("fmovqe", FM_QF
, CONDE
, FCONDE
, 0),
1171 /* v9 */ fmovcc ("fmovse", FM_SF
, CONDE
, FCONDE
, 0),
1172 /* v9 */ fmovcc ("fmovdg", FM_DF
, CONDG
, FCONDG
, 0),
1173 /* v9 */ fmovcc ("fmovqg", FM_QF
, CONDG
, FCONDG
, 0),
1174 /* v9 */ fmovcc ("fmovsg", FM_SF
, CONDG
, FCONDG
, 0),
1175 /* v9 */ fmovcc ("fmovdge", FM_DF
, CONDGE
, FCONDGE
, 0),
1176 /* v9 */ fmovcc ("fmovqge", FM_QF
, CONDGE
, FCONDGE
, 0),
1177 /* v9 */ fmovcc ("fmovsge", FM_SF
, CONDGE
, FCONDGE
, 0),
1178 /* v9 */ fmovicc ("fmovdgeu", FM_DF
, CONDGEU
, F_ALIAS
),
1179 /* v9 */ fmovicc ("fmovqgeu", FM_QF
, CONDGEU
, F_ALIAS
),
1180 /* v9 */ fmovicc ("fmovsgeu", FM_SF
, CONDGEU
, F_ALIAS
),
1181 /* v9 */ fmovicc ("fmovdgu", FM_DF
, CONDGU
, 0),
1182 /* v9 */ fmovicc ("fmovqgu", FM_QF
, CONDGU
, 0),
1183 /* v9 */ fmovicc ("fmovsgu", FM_SF
, CONDGU
, 0),
1184 /* v9 */ fmovcc ("fmovdl", FM_DF
, CONDL
, FCONDL
, 0),
1185 /* v9 */ fmovcc ("fmovql", FM_QF
, CONDL
, FCONDL
, 0),
1186 /* v9 */ fmovcc ("fmovsl", FM_SF
, CONDL
, FCONDL
, 0),
1187 /* v9 */ fmovcc ("fmovdle", FM_DF
, CONDLE
, FCONDLE
, 0),
1188 /* v9 */ fmovcc ("fmovqle", FM_QF
, CONDLE
, FCONDLE
, 0),
1189 /* v9 */ fmovcc ("fmovsle", FM_SF
, CONDLE
, FCONDLE
, 0),
1190 /* v9 */ fmovicc ("fmovdleu", FM_DF
, CONDLEU
, 0),
1191 /* v9 */ fmovicc ("fmovqleu", FM_QF
, CONDLEU
, 0),
1192 /* v9 */ fmovicc ("fmovsleu", FM_SF
, CONDLEU
, 0),
1193 /* v9 */ fmovfcc ("fmovdlg", FM_DF
, FCONDLG
, 0),
1194 /* v9 */ fmovfcc ("fmovqlg", FM_QF
, FCONDLG
, 0),
1195 /* v9 */ fmovfcc ("fmovslg", FM_SF
, FCONDLG
, 0),
1196 /* v9 */ fmovicc ("fmovdlu", FM_DF
, CONDLU
, F_ALIAS
),
1197 /* v9 */ fmovicc ("fmovqlu", FM_QF
, CONDLU
, F_ALIAS
),
1198 /* v9 */ fmovicc ("fmovslu", FM_SF
, CONDLU
, F_ALIAS
),
1199 /* v9 */ fmovcc ("fmovdn", FM_DF
, CONDN
, FCONDN
, 0),
1200 /* v9 */ fmovcc ("fmovqn", FM_QF
, CONDN
, FCONDN
, 0),
1201 /* v9 */ fmovcc ("fmovsn", FM_SF
, CONDN
, FCONDN
, 0),
1202 /* v9 */ fmovcc ("fmovdne", FM_DF
, CONDNE
, FCONDNE
, 0),
1203 /* v9 */ fmovcc ("fmovqne", FM_QF
, CONDNE
, FCONDNE
, 0),
1204 /* v9 */ fmovcc ("fmovsne", FM_SF
, CONDNE
, FCONDNE
, 0),
1205 /* v9 */ fmovicc ("fmovdneg", FM_DF
, CONDNEG
, 0),
1206 /* v9 */ fmovicc ("fmovqneg", FM_QF
, CONDNEG
, 0),
1207 /* v9 */ fmovicc ("fmovsneg", FM_SF
, CONDNEG
, 0),
1208 /* v9 */ fmovcc ("fmovdnz", FM_DF
, CONDNZ
, FCONDNZ
, F_ALIAS
),
1209 /* v9 */ fmovcc ("fmovqnz", FM_QF
, CONDNZ
, FCONDNZ
, F_ALIAS
),
1210 /* v9 */ fmovcc ("fmovsnz", FM_SF
, CONDNZ
, FCONDNZ
, F_ALIAS
),
1211 /* v9 */ fmovfcc ("fmovdo", FM_DF
, FCONDO
, 0),
1212 /* v9 */ fmovfcc ("fmovqo", FM_QF
, FCONDO
, 0),
1213 /* v9 */ fmovfcc ("fmovso", FM_SF
, FCONDO
, 0),
1214 /* v9 */ fmovicc ("fmovdpos", FM_DF
, CONDPOS
, 0),
1215 /* v9 */ fmovicc ("fmovqpos", FM_QF
, CONDPOS
, 0),
1216 /* v9 */ fmovicc ("fmovspos", FM_SF
, CONDPOS
, 0),
1217 /* v9 */ fmovfcc ("fmovdu", FM_DF
, FCONDU
, 0),
1218 /* v9 */ fmovfcc ("fmovqu", FM_QF
, FCONDU
, 0),
1219 /* v9 */ fmovfcc ("fmovsu", FM_SF
, FCONDU
, 0),
1220 /* v9 */ fmovfcc ("fmovdue", FM_DF
, FCONDUE
, 0),
1221 /* v9 */ fmovfcc ("fmovque", FM_QF
, FCONDUE
, 0),
1222 /* v9 */ fmovfcc ("fmovsue", FM_SF
, FCONDUE
, 0),
1223 /* v9 */ fmovfcc ("fmovdug", FM_DF
, FCONDUG
, 0),
1224 /* v9 */ fmovfcc ("fmovqug", FM_QF
, FCONDUG
, 0),
1225 /* v9 */ fmovfcc ("fmovsug", FM_SF
, FCONDUG
, 0),
1226 /* v9 */ fmovfcc ("fmovduge", FM_DF
, FCONDUGE
, 0),
1227 /* v9 */ fmovfcc ("fmovquge", FM_QF
, FCONDUGE
, 0),
1228 /* v9 */ fmovfcc ("fmovsuge", FM_SF
, FCONDUGE
, 0),
1229 /* v9 */ fmovfcc ("fmovdul", FM_DF
, FCONDUL
, 0),
1230 /* v9 */ fmovfcc ("fmovqul", FM_QF
, FCONDUL
, 0),
1231 /* v9 */ fmovfcc ("fmovsul", FM_SF
, FCONDUL
, 0),
1232 /* v9 */ fmovfcc ("fmovdule", FM_DF
, FCONDULE
, 0),
1233 /* v9 */ fmovfcc ("fmovqule", FM_QF
, FCONDULE
, 0),
1234 /* v9 */ fmovfcc ("fmovsule", FM_SF
, FCONDULE
, 0),
1235 /* v9 */ fmovicc ("fmovdvc", FM_DF
, CONDVC
, 0),
1236 /* v9 */ fmovicc ("fmovqvc", FM_QF
, CONDVC
, 0),
1237 /* v9 */ fmovicc ("fmovsvc", FM_SF
, CONDVC
, 0),
1238 /* v9 */ fmovicc ("fmovdvs", FM_DF
, CONDVS
, 0),
1239 /* v9 */ fmovicc ("fmovqvs", FM_QF
, CONDVS
, 0),
1240 /* v9 */ fmovicc ("fmovsvs", FM_SF
, CONDVS
, 0),
1241 /* v9 */ fmovcc ("fmovdz", FM_DF
, CONDZ
, FCONDZ
, F_ALIAS
),
1242 /* v9 */ fmovcc ("fmovqz", FM_QF
, CONDZ
, FCONDZ
, F_ALIAS
),
1243 /* v9 */ fmovcc ("fmovsz", FM_SF
, CONDZ
, FCONDZ
, F_ALIAS
),
1245 #undef fmovicc /* v9 */
1246 #undef fmovfcc /* v9 */
1247 #undef fmovcc /* v9 */
1248 #undef FM_DF /* v9 */
1249 #undef FM_QF /* v9 */
1250 #undef FM_SF /* v9 */
1252 #define brfc(opcode, mask, lose, flags) \
1253 { opcode, (mask), ANNUL|(lose), "l", flags|F_DELAYED, v6 }, \
1254 { opcode, (mask)|ANNUL, (lose), ",a l", flags|F_DELAYED, v6 }
1256 #define brfcx(opcode, mask, lose, flags) /* v9 */ \
1257 { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), "6,G", flags|F_DELAYED, v9 }, \
1258 { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), ",T 6,G", flags|F_DELAYED, v9 }, \
1259 { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a 6,G", flags|F_DELAYED, v9 }, \
1260 { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a,T 6,G", flags|F_DELAYED, v9 }, \
1261 { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), ",N 6,G", flags|F_DELAYED, v9 }, \
1262 { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a,N 6,G", flags|F_DELAYED, v9 }, \
1263 { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), "7,G", flags|F_DELAYED, v9 }, \
1264 { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), ",T 7,G", flags|F_DELAYED, v9 }, \
1265 { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a 7,G", flags|F_DELAYED, v9 }, \
1266 { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a,T 7,G", flags|F_DELAYED, v9 }, \
1267 { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), ",N 7,G", flags|F_DELAYED, v9 }, \
1268 { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a,N 7,G", flags|F_DELAYED, v9 }, \
1269 { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), "8,G", flags|F_DELAYED, v9 }, \
1270 { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), ",T 8,G", flags|F_DELAYED, v9 }, \
1271 { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a 8,G", flags|F_DELAYED, v9 }, \
1272 { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a,T 8,G", flags|F_DELAYED, v9 }, \
1273 { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), ",N 8,G", flags|F_DELAYED, v9 }, \
1274 { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a,N 8,G", flags|F_DELAYED, v9 }, \
1275 { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), "9,G", flags|F_DELAYED, v9 }, \
1276 { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), ",T 9,G", flags|F_DELAYED, v9 }, \
1277 { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a 9,G", flags|F_DELAYED, v9 }, \
1278 { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a,T 9,G", flags|F_DELAYED, v9 }, \
1279 { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), ",N 9,G", flags|F_DELAYED, v9 }, \
1280 { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a,N 9,G", flags|F_DELAYED, v9 }
1282 /* v9: We must put `brfcx' before `brfc', to ensure that we never match
1283 v9: something against an expression unless it is an expression. Otherwise,
1284 v9: we end up with undefined symbol tables entries, because they get added,
1285 v9: but are not deleted if the pattern fails to match. */
1287 #define condfc(fop, cop, mask, flags) \
1288 brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
1289 brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
1290 brfc(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags)
1292 #define condf(fop, mask, flags) \
1293 brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
1294 brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags)
1296 condfc("fb", "cb", 0x8, 0),
1297 condfc("fba", "cba", 0x8, F_ALIAS
),
1298 condfc("fbe", "cb0", 0x9, 0),
1299 condf("fbz", 0x9, F_ALIAS
),
1300 condfc("fbg", "cb2", 0x6, 0),
1301 condfc("fbge", "cb02", 0xb, 0),
1302 condfc("fbl", "cb1", 0x4, 0),
1303 condfc("fble", "cb01", 0xd, 0),
1304 condfc("fblg", "cb12", 0x2, 0),
1305 condfc("fbn", "cbn", 0x0, 0),
1306 condfc("fbne", "cb123", 0x1, 0),
1307 condf("fbnz", 0x1, F_ALIAS
),
1308 condfc("fbo", "cb012", 0xf, 0),
1309 condfc("fbu", "cb3", 0x7, 0),
1310 condfc("fbue", "cb03", 0xa, 0),
1311 condfc("fbug", "cb23", 0x5, 0),
1312 condfc("fbuge", "cb023", 0xc, 0),
1313 condfc("fbul", "cb13", 0x3, 0),
1314 condfc("fbule", "cb013", 0xe, 0),
1318 #undef brfcx /* v9 */
1320 { "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0
|ASI(~0), "1+2", F_UNBR
|F_DELAYED
, v6
}, /* jmpl rs1+rs2,%g0 */
1321 { "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0
|ASI_RS2(~0), "1", F_UNBR
|F_DELAYED
, v6
}, /* jmpl rs1+%g0,%g0 */
1322 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
, "1+i", F_UNBR
|F_DELAYED
, v6
}, /* jmpl rs1+i,%g0 */
1323 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
, "i+1", F_UNBR
|F_DELAYED
, v6
}, /* jmpl i+rs1,%g0 */
1324 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
|RS1_G0
, "i", F_UNBR
|F_DELAYED
, v6
}, /* jmpl %g0+i,%g0 */
1325 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
|SIMM13(~0), "1", F_UNBR
|F_DELAYED
, v6
}, /* jmpl rs1+0,%g0 */
1327 { "nop", F2(0, 4), 0xfeffffff, "", 0, v6
}, /* sethi 0, %g0 */
1329 { "set", F2(0x0, 0x4), F2(~0x0, ~0x4), "Sh,d", F_ALIAS
, v6
},
1331 { "sethi", F2(0x0, 0x4), F2(~0x0, ~0x4), "h,d", 0, v6
},
1333 { "taddcc", F3(2, 0x20, 0), F3(~2, ~0x20, ~0)|ASI(~0), "1,2,d", 0, v6
},
1334 { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1), "1,i,d", 0, v6
},
1335 { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1), "i,1,d", 0, v6
},
1336 { "taddcctv", F3(2, 0x22, 0), F3(~2, ~0x22, ~0)|ASI(~0), "1,2,d", 0, v6
},
1337 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1), "1,i,d", 0, v6
},
1338 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1), "i,1,d", 0, v6
},
1340 { "tsubcc", F3(2, 0x21, 0), F3(~2, ~0x21, ~0)|ASI(~0), "1,2,d", 0, v6
},
1341 { "tsubcc", F3(2, 0x21, 1), F3(~2, ~0x21, ~1), "1,i,d", 0, v6
},
1342 { "tsubcctv", F3(2, 0x23, 0), F3(~2, ~0x23, ~0)|ASI(~0), "1,2,d", 0, v6
},
1343 { "tsubcctv", F3(2, 0x23, 1), F3(~2, ~0x23, ~1), "1,i,d", 0, v6
},
1345 { "unimp", F2(0x0, 0x0), 0xffc00000, "n", 0, v6notv9
},
1346 { "illtrap", F2(0, 0), F2(~0, ~0)|RD_G0
, "n", 0, v9
},
1348 /* This *is* a commutative instruction. */
1349 { "xnor", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,2,d", 0, v6
},
1350 { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1), "1,i,d", 0, v6
},
1351 { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1), "i,1,d", 0, v6
},
1352 /* This *is* a commutative instruction. */
1353 { "xnorcc", F3(2, 0x17, 0), F3(~2, ~0x17, ~0)|ASI(~0), "1,2,d", 0, v6
},
1354 { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1), "1,i,d", 0, v6
},
1355 { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1), "i,1,d", 0, v6
},
1356 { "xor", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0), "1,2,d", 0, v6
},
1357 { "xor", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "1,i,d", 0, v6
},
1358 { "xor", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "i,1,d", 0, v6
},
1359 { "xorcc", F3(2, 0x13, 0), F3(~2, ~0x13, ~0)|ASI(~0), "1,2,d", 0, v6
},
1360 { "xorcc", F3(2, 0x13, 1), F3(~2, ~0x13, ~1), "1,i,d", 0, v6
},
1361 { "xorcc", F3(2, 0x13, 1), F3(~2, ~0x13, ~1), "i,1,d", 0, v6
},
1363 { "not", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,d", F_ALIAS
, v6
}, /* xnor rs1,%0,rd */
1364 { "not", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "r", F_ALIAS
, v6
}, /* xnor rd,%0,rd */
1366 { "btog", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0), "2,r", F_ALIAS
, v6
}, /* xor rd,rs2,rd */
1367 { "btog", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "i,r", F_ALIAS
, v6
}, /* xor rd,i,rd */
1369 /* FPop1 and FPop2 are not instructions. Don't accept them. */
1371 { "fdtoi", F3F(2, 0x34, 0x0d2), F3F(~2, ~0x34, ~0x0d2)|RS1_G0
, "B,g", 0, v6
},
1372 { "fstoi", F3F(2, 0x34, 0x0d1), F3F(~2, ~0x34, ~0x0d1)|RS1_G0
, "f,g", 0, v6
},
1373 { "fqtoi", F3F(2, 0x34, 0x0d3), F3F(~2, ~0x34, ~0x0d3)|RS1_G0
, "R,g", 0, v8
},
1375 { "fdtox", F3F(2, 0x34, 0x082), F3F(~2, ~0x34, ~0x082)|RS1_G0
, "B,g", 0, v9
},
1376 { "fstox", F3F(2, 0x34, 0x081), F3F(~2, ~0x34, ~0x081)|RS1_G0
, "f,g", 0, v9
},
1377 { "fqtox", F3F(2, 0x34, 0x083), F3F(~2, ~0x34, ~0x083)|RS1_G0
, "R,g", 0, v9
},
1379 { "fitod", F3F(2, 0x34, 0x0c8), F3F(~2, ~0x34, ~0x0c8)|RS1_G0
, "f,H", 0, v6
},
1380 { "fitos", F3F(2, 0x34, 0x0c4), F3F(~2, ~0x34, ~0x0c4)|RS1_G0
, "f,g", 0, v6
},
1381 { "fitoq", F3F(2, 0x34, 0x0cc), F3F(~2, ~0x34, ~0x0cc)|RS1_G0
, "f,J", 0, v8
},
1383 { "fxtod", F3F(2, 0x34, 0x088), F3F(~2, ~0x34, ~0x088)|RS1_G0
, "f,H", 0, v9
},
1384 { "fxtos", F3F(2, 0x34, 0x084), F3F(~2, ~0x34, ~0x084)|RS1_G0
, "f,g", 0, v9
},
1385 { "fxtoq", F3F(2, 0x34, 0x08c), F3F(~2, ~0x34, ~0x08c)|RS1_G0
, "f,J", 0, v9
},
1387 { "fdtoq", F3F(2, 0x34, 0x0ce), F3F(~2, ~0x34, ~0x0ce)|RS1_G0
, "B,J", 0, v8
},
1388 { "fdtos", F3F(2, 0x34, 0x0c6), F3F(~2, ~0x34, ~0x0c6)|RS1_G0
, "B,g", 0, v6
},
1389 { "fqtod", F3F(2, 0x34, 0x0cb), F3F(~2, ~0x34, ~0x0cb)|RS1_G0
, "R,H", 0, v8
},
1390 { "fqtos", F3F(2, 0x34, 0x0c7), F3F(~2, ~0x34, ~0x0c7)|RS1_G0
, "R,g", 0, v8
},
1391 { "fstod", F3F(2, 0x34, 0x0c9), F3F(~2, ~0x34, ~0x0c9)|RS1_G0
, "f,H", 0, v6
},
1392 { "fstoq", F3F(2, 0x34, 0x0cd), F3F(~2, ~0x34, ~0x0cd)|RS1_G0
, "f,J", 0, v8
},
1394 { "fdivd", F3F(2, 0x34, 0x04e), F3F(~2, ~0x34, ~0x04e), "v,B,H", 0, v6
},
1395 { "fdivq", F3F(2, 0x34, 0x04f), F3F(~2, ~0x34, ~0x04f), "V,R,J", 0, v8
},
1396 { "fdivs", F3F(2, 0x34, 0x04d), F3F(~2, ~0x34, ~0x04d), "e,f,g", 0, v6
},
1397 { "fmuld", F3F(2, 0x34, 0x04a), F3F(~2, ~0x34, ~0x04a), "v,B,H", 0, v6
},
1398 { "fmulq", F3F(2, 0x34, 0x04b), F3F(~2, ~0x34, ~0x04b), "V,R,J", 0, v8
},
1399 { "fmuls", F3F(2, 0x34, 0x049), F3F(~2, ~0x34, ~0x049), "e,f,g", 0, v6
},
1401 { "fdmulq", F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", 0, v8
},
1402 { "fsmuld", F3F(2, 0x34, 0x069), F3F(~2, ~0x34, ~0x069), "e,f,H", 0, v8
},
1404 { "fsqrtd", F3F(2, 0x34, 0x02a), F3F(~2, ~0x34, ~0x02a)|RS1_G0
, "B,H", 0, v7
},
1405 { "fsqrtq", F3F(2, 0x34, 0x02b), F3F(~2, ~0x34, ~0x02b)|RS1_G0
, "R,J", 0, v8
},
1406 { "fsqrts", F3F(2, 0x34, 0x029), F3F(~2, ~0x34, ~0x029)|RS1_G0
, "f,g", 0, v7
},
1408 { "fabsd", F3F(2, 0x34, 0x00a), F3F(~2, ~0x34, ~0x00a)|RS1_G0
, "B,H", 0, v9
},
1409 { "fabsq", F3F(2, 0x34, 0x00b), F3F(~2, ~0x34, ~0x00b)|RS1_G0
, "R,J", 0, v9
},
1410 { "fabss", F3F(2, 0x34, 0x009), F3F(~2, ~0x34, ~0x009)|RS1_G0
, "f,g", 0, v6
},
1411 { "fmovd", F3F(2, 0x34, 0x002), F3F(~2, ~0x34, ~0x002)|RS1_G0
, "B,H", 0, v9
},
1412 { "fmovq", F3F(2, 0x34, 0x003), F3F(~2, ~0x34, ~0x003)|RS1_G0
, "R,J", 0, v9
},
1413 { "fmovs", F3F(2, 0x34, 0x001), F3F(~2, ~0x34, ~0x001)|RS1_G0
, "f,g", 0, v6
},
1414 { "fnegd", F3F(2, 0x34, 0x006), F3F(~2, ~0x34, ~0x006)|RS1_G0
, "B,H", 0, v9
},
1415 { "fnegq", F3F(2, 0x34, 0x007), F3F(~2, ~0x34, ~0x007)|RS1_G0
, "R,J", 0, v9
},
1416 { "fnegs", F3F(2, 0x34, 0x005), F3F(~2, ~0x34, ~0x005)|RS1_G0
, "f,g", 0, v6
},
1418 { "faddd", F3F(2, 0x34, 0x042), F3F(~2, ~0x34, ~0x042), "v,B,H", 0, v6
},
1419 { "faddq", F3F(2, 0x34, 0x043), F3F(~2, ~0x34, ~0x043), "V,R,J", 0, v8
},
1420 { "fadds", F3F(2, 0x34, 0x041), F3F(~2, ~0x34, ~0x041), "e,f,g", 0, v6
},
1421 { "fsubd", F3F(2, 0x34, 0x046), F3F(~2, ~0x34, ~0x046), "v,B,H", 0, v6
},
1422 { "fsubq", F3F(2, 0x34, 0x047), F3F(~2, ~0x34, ~0x047), "V,R,J", 0, v8
},
1423 { "fsubs", F3F(2, 0x34, 0x045), F3F(~2, ~0x34, ~0x045), "e,f,g", 0, v6
},
1425 #define CMPFCC(x) (((x)&0x3)<<25)
1427 { "fcmpd", F3F(2, 0x35, 0x052), F3F(~2, ~0x35, ~0x052)|RD_G0
, "v,B", 0, v6
},
1428 { "fcmpd", CMPFCC(0)|F3F(2, 0x35, 0x052), CMPFCC(~0)|F3F(~2, ~0x35, ~0x052), "6,v,B", 0, v9
},
1429 { "fcmpd", CMPFCC(1)|F3F(2, 0x35, 0x052), CMPFCC(~1)|F3F(~2, ~0x35, ~0x052), "7,v,B", 0, v9
},
1430 { "fcmpd", CMPFCC(2)|F3F(2, 0x35, 0x052), CMPFCC(~2)|F3F(~2, ~0x35, ~0x052), "8,v,B", 0, v9
},
1431 { "fcmpd", CMPFCC(3)|F3F(2, 0x35, 0x052), CMPFCC(~3)|F3F(~2, ~0x35, ~0x052), "9,v,B", 0, v9
},
1432 { "fcmped", F3F(2, 0x35, 0x056), F3F(~2, ~0x35, ~0x056)|RD_G0
, "v,B", 0, v6
},
1433 { "fcmped", CMPFCC(0)|F3F(2, 0x35, 0x056), CMPFCC(~0)|F3F(~2, ~0x35, ~0x056), "6,v,B", 0, v9
},
1434 { "fcmped", CMPFCC(1)|F3F(2, 0x35, 0x056), CMPFCC(~1)|F3F(~2, ~0x35, ~0x056), "7,v,B", 0, v9
},
1435 { "fcmped", CMPFCC(2)|F3F(2, 0x35, 0x056), CMPFCC(~2)|F3F(~2, ~0x35, ~0x056), "8,v,B", 0, v9
},
1436 { "fcmped", CMPFCC(3)|F3F(2, 0x35, 0x056), CMPFCC(~3)|F3F(~2, ~0x35, ~0x056), "9,v,B", 0, v9
},
1437 { "fcmpq", F3F(2, 0x34, 0x053), F3F(~2, ~0x34, ~0x053)|RD_G0
, "V,R", 0, v8
},
1438 { "fcmpq", CMPFCC(0)|F3F(2, 0x35, 0x053), CMPFCC(~0)|F3F(~2, ~0x35, ~0x053), "6,V,R", 0, v9
},
1439 { "fcmpq", CMPFCC(1)|F3F(2, 0x35, 0x053), CMPFCC(~1)|F3F(~2, ~0x35, ~0x053), "7,V,R", 0, v9
},
1440 { "fcmpq", CMPFCC(2)|F3F(2, 0x35, 0x053), CMPFCC(~2)|F3F(~2, ~0x35, ~0x053), "8,V,R", 0, v9
},
1441 { "fcmpq", CMPFCC(3)|F3F(2, 0x35, 0x053), CMPFCC(~3)|F3F(~2, ~0x35, ~0x053), "9,V,R", 0, v9
},
1442 { "fcmpeq", F3F(2, 0x34, 0x057), F3F(~2, ~0x34, ~0x057)|RD_G0
, "V,R", 0, v8
},
1443 { "fcmpeq", CMPFCC(0)|F3F(2, 0x35, 0x057), CMPFCC(~0)|F3F(~2, ~0x35, ~0x057), "6,V,R", 0, v9
},
1444 { "fcmpeq", CMPFCC(1)|F3F(2, 0x35, 0x057), CMPFCC(~1)|F3F(~2, ~0x35, ~0x057), "7,V,R", 0, v9
},
1445 { "fcmpeq", CMPFCC(2)|F3F(2, 0x35, 0x057), CMPFCC(~2)|F3F(~2, ~0x35, ~0x057), "8,V,R", 0, v9
},
1446 { "fcmpeq", CMPFCC(3)|F3F(2, 0x35, 0x057), CMPFCC(~3)|F3F(~2, ~0x35, ~0x057), "9,V,R", 0, v9
},
1447 { "fcmps", F3F(2, 0x35, 0x051), F3F(~2, ~0x35, ~0x051)|RD_G0
, "e,f", 0, v6
},
1448 { "fcmps", CMPFCC(0)|F3F(2, 0x35, 0x051), CMPFCC(~0)|F3F(~2, ~0x35, ~0x051), "6,e,f", 0, v9
},
1449 { "fcmps", CMPFCC(1)|F3F(2, 0x35, 0x051), CMPFCC(~1)|F3F(~2, ~0x35, ~0x051), "7,e,f", 0, v9
},
1450 { "fcmps", CMPFCC(2)|F3F(2, 0x35, 0x051), CMPFCC(~2)|F3F(~2, ~0x35, ~0x051), "8,e,f", 0, v9
},
1451 { "fcmps", CMPFCC(3)|F3F(2, 0x35, 0x051), CMPFCC(~3)|F3F(~2, ~0x35, ~0x051), "9,e,f", 0, v9
},
1452 { "fcmpes", F3F(2, 0x35, 0x055), F3F(~2, ~0x35, ~0x055)|RD_G0
, "e,f", 0, v6
},
1453 { "fcmpes", CMPFCC(0)|F3F(2, 0x35, 0x055), CMPFCC(~0)|F3F(~2, ~0x35, ~0x055), "6,e,f", 0, v9
},
1454 { "fcmpes", CMPFCC(1)|F3F(2, 0x35, 0x055), CMPFCC(~1)|F3F(~2, ~0x35, ~0x055), "7,e,f", 0, v9
},
1455 { "fcmpes", CMPFCC(2)|F3F(2, 0x35, 0x055), CMPFCC(~2)|F3F(~2, ~0x35, ~0x055), "8,e,f", 0, v9
},
1456 { "fcmpes", CMPFCC(3)|F3F(2, 0x35, 0x055), CMPFCC(~3)|F3F(~2, ~0x35, ~0x055), "9,e,f", 0, v9
},
1458 /* These Extended FPop (FIFO) instructions are new in the Fujitsu
1459 MB86934, replacing the CPop instructions from v6 and later
1462 #define EFPOP1_2(name, op, args) { name, F3F(2, 0x36, op), F3F(~2, ~0x36, ~op)|RS1_G0, args, 0, sparclite }
1463 #define EFPOP1_3(name, op, args) { name, F3F(2, 0x36, op), F3F(~2, ~0x36, ~op), args, 0, sparclite }
1464 #define EFPOP2_2(name, op, args) { name, F3F(2, 0x37, op), F3F(~2, ~0x37, ~op)|RD_G0, args, 0, sparclite }
1466 EFPOP1_2 ("efitod", 0x0c8, "f,H"),
1467 EFPOP1_2 ("efitos", 0x0c4, "f,g"),
1468 EFPOP1_2 ("efdtoi", 0x0d2, "B,g"),
1469 EFPOP1_2 ("efstoi", 0x0d1, "f,g"),
1470 EFPOP1_2 ("efstod", 0x0c9, "f,H"),
1471 EFPOP1_2 ("efdtos", 0x0c6, "B,g"),
1472 EFPOP1_2 ("efmovs", 0x001, "f,g"),
1473 EFPOP1_2 ("efnegs", 0x005, "f,g"),
1474 EFPOP1_2 ("efabss", 0x009, "f,g"),
1475 EFPOP1_2 ("efsqrtd", 0x02a, "B,H"),
1476 EFPOP1_2 ("efsqrts", 0x029, "f,g"),
1477 EFPOP1_3 ("efaddd", 0x042, "v,B,H"),
1478 EFPOP1_3 ("efadds", 0x041, "e,f,g"),
1479 EFPOP1_3 ("efsubd", 0x046, "v,B,H"),
1480 EFPOP1_3 ("efsubs", 0x045, "e,f,g"),
1481 EFPOP1_3 ("efdivd", 0x04e, "v,B,H"),
1482 EFPOP1_3 ("efdivs", 0x04d, "e,f,g"),
1483 EFPOP1_3 ("efmuld", 0x04a, "v,B,H"),
1484 EFPOP1_3 ("efmuls", 0x049, "e,f,g"),
1485 EFPOP1_3 ("efsmuld", 0x069, "e,f,H"),
1486 EFPOP2_2 ("efcmpd", 0x052, "v,B"),
1487 EFPOP2_2 ("efcmped", 0x056, "v,B"),
1488 EFPOP2_2 ("efcmps", 0x051, "e,f"),
1489 EFPOP2_2 ("efcmpes", 0x055, "e,f"),
1495 /* These are marked F_ALIAS, so that they won't conflict with sparclite insns
1496 present. Otherwise, the F_ALIAS flag is ignored. */
1497 { "cpop1", F3(2, 0x36, 0), F3(~2, ~0x36, ~1), "[1+2],d", F_ALIAS
, v6notv9
},
1498 { "cpop2", F3(2, 0x37, 0), F3(~2, ~0x37, ~1), "[1+2],d", F_ALIAS
, v6notv9
},
1500 /* sparclet specific insns */
1502 commuteop ("umac", 0x3e, sparclet
),
1503 commuteop ("smac", 0x3f, sparclet
),
1504 commuteop ("umacd", 0x2e, sparclet
),
1505 commuteop ("smacd", 0x2f, sparclet
),
1506 commuteop ("umuld", 0x09, sparclet
),
1507 commuteop ("smuld", 0x0d, sparclet
),
1509 { "shuffle", F3(2, 0x2d, 0), F3(~2, ~0x2d, ~0)|ASI(~0), "1,2,d", 0, sparclet
},
1510 { "shuffle", F3(2, 0x2d, 1), F3(~2, ~0x2d, ~1), "1,i,d", 0, sparclet
},
1512 { "crdcxt", F3(2, 0x36, 0)|ASI(4), F3(~2, ~0x36, ~0)|ASI(~4)|RS2(~0), "U,d", 0, sparclet
},
1513 { "cwrcxt", F3(2, 0x36, 0)|ASI(3), F3(~2, ~0x36, ~0)|ASI(~3)|RS2(~0), "1,u", 0, sparclet
},
1514 { "cpush", F3(2, 0x36, 0)|ASI(0), F3(~2, ~0x36, ~0)|ASI(~0)|RD(~0), "1,2", 0, sparclet
},
1515 { "cpusha", F3(2, 0x36, 0)|ASI(1), F3(~2, ~0x36, ~0)|ASI(~1)|RD(~0), "1,2", 0, sparclet
},
1516 { "cpull", F3(2, 0x36, 0)|ASI(2), F3(~2, ~0x36, ~0)|ASI(~2)|RS1(~0)|RS2(~0), "d", 0, sparclet
},
1518 /* sparclet coprocessor branch insns */
1519 /* FIXME: We have to mark these as aliases until we can sort opcodes based
1521 #define slcbcc2(opcode, mask, lose) \
1522 { opcode, (mask), ANNUL|(lose), "l", F_DELAYED|F_CONDBR|F_ALIAS, sparclet }, \
1523 { opcode, (mask)|ANNUL, (lose), ",a l", F_DELAYED|F_CONDBR|F_ALIAS, sparclet }
1524 #define slcbcc(opcode, mask) \
1525 slcbcc2(opcode, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)))
1527 /*slcbcc("cbn", 0), - already defined */
1535 /*slcbcc("cba", 8), - already defined */
1538 slcbcc("cbnef", 11),
1540 slcbcc("cbner", 13),
1541 slcbcc("cbnfr", 14),
1542 slcbcc("cbnefr", 15),
1547 /* More v9 specific insns */
1549 #define IMPDEP(name, code) \
1550 { name, F3(2, code, 0), F3(~2, ~code, ~0)|ASI(~0), "1,2,d", 0, v9 }, \
1551 { name, F3(2, code, 1), F3(~2, ~code, ~1), "1,i,d", 0, v9 }, \
1552 { name, F3(2, code, 0), F3(~2, ~code, ~0), "x,1,2,d", 0, v9 }, \
1553 { name, F3(2, code, 0), F3(~2, ~code, ~0), "x,e,f,g", 0, v9 }
1555 IMPDEP ("impdep1", 0x36),
1556 IMPDEP ("impdep2", 0x37),
1560 { "casa", F3(3, 0x3c, 0), F3(~3, ~0x3c, ~0), "[1]A,2,d", 0, v9
},
1561 { "casa", F3(3, 0x3c, 1), F3(~3, ~0x3c, ~1), "[1]o,2,d", 0, v9
},
1562 { "casxa", F3(3, 0x3e, 0), F3(~3, ~0x3e, ~0), "[1]A,2,d", 0, v9
},
1563 { "casxa", F3(3, 0x3e, 1), F3(~3, ~0x3e, ~1), "[1]o,2,d", 0, v9
},
1565 /* v9 synthetic insns */
1566 /* FIXME: still missing "signx d", and "clruw d". Can't be done here. */
1567 { "iprefetch", F2(0, 1)|(2<<20)|BPRED
, F2(~0, ~1)|(1<<20)|ANNUL
|COND(~0), "G", 0, v9
}, /* bn,a,pt %xcc,label */
1568 { "signx", F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0)|RS2_G0
, "1,d", F_ALIAS
, v9
}, /* sra rs1,%g0,rd */
1569 { "clruw", F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0)|RS2_G0
, "1,d", F_ALIAS
, v9
}, /* srl rs1,%g0,rd */
1570 { "cas", F3(3, 0x3c, 0)|ASI(0x80), F3(~3, ~0x3c, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS
, v9
}, /* casa [rs1]ASI_P,rs2,rd */
1571 { "casl", F3(3, 0x3c, 0)|ASI(0x88), F3(~3, ~0x3c, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS
, v9
}, /* casa [rs1]ASI_P_L,rs2,rd */
1572 { "casx", F3(3, 0x3e, 0)|ASI(0x80), F3(~3, ~0x3e, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS
, v9
}, /* casxa [rs1]ASI_P,rs2,rd */
1573 { "casxl", F3(3, 0x3e, 0)|ASI(0x88), F3(~3, ~0x3e, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS
, v9
}, /* casxa [rs1]ASI_P_L,rs2,rd */
1575 /* Ultrasparc extensions */
1576 /* FIXME: lots more to go */
1577 { "shutdown", F3F(2, 0x36, 0x80), F3(~2, ~0x36, ~0x80)|RD_G0
|RS1_G0
|RS2_G0
, "", 0, v9a
},
1581 const int sparc_num_opcodes
= ((sizeof sparc_opcodes
)/(sizeof sparc_opcodes
[0]));
1583 /* Utilities for argument parsing. */
1591 /* Look up NAME in TABLE. */
1594 lookup_name (table
, name
)
1600 for (p
= table
; p
->name
; ++p
)
1601 if (strcmp (name
, p
->name
) == 0)
1607 /* Look up VALUE in TABLE. */
1610 lookup_value (table
, value
)
1616 for (p
= table
; p
->name
; ++p
)
1617 if (value
== p
->value
)
1625 static arg asi_table
[] =
1627 { 0x10, "#ASI_AIUP" },
1628 { 0x11, "#ASI_AIUS" },
1629 { 0x18, "#ASI_AIUP_L" },
1630 { 0x19, "#ASI_AIUS_L" },
1633 { 0x82, "#ASI_PNF" },
1634 { 0x83, "#ASI_SNF" },
1635 { 0x88, "#ASI_P_L" },
1636 { 0x89, "#ASI_S_L" },
1637 { 0x8a, "#ASI_PNF_L" },
1638 { 0x8b, "#ASI_SNF_L" },
1639 { 0x10, "#ASI_AS_IF_USER_PRIMARY" },
1640 { 0x11, "#ASI_AS_IF_USER_SECONDARY" },
1641 { 0x18, "#ASI_AS_IF_USER_PRIMARY_L" },
1642 { 0x19, "#ASI_AS_IF_USER_SECONDARY_L" },
1643 { 0x80, "#ASI_PRIMARY" },
1644 { 0x81, "#ASI_SECONDARY" },
1645 { 0x82, "#ASI_PRIMARY_NOFAULT" },
1646 { 0x83, "#ASI_SECONDARY_NOFAULT" },
1647 { 0x88, "#ASI_PRIMARY_LITTLE" },
1648 { 0x89, "#ASI_SECONDARY_LITTLE" },
1649 { 0x8a, "#ASI_PRIMARY_NOFAULT_LITTLE" },
1650 { 0x8b, "#ASI_SECONDARY_NOFAULT_LITTLE" },
1654 /* Return the value for ASI NAME, or -1 if not found. */
1657 sparc_encode_asi (name
)
1660 return lookup_name (asi_table
, name
);
1663 /* Return the name for ASI value VALUE or NULL if not found. */
1666 sparc_decode_asi (value
)
1669 return lookup_value (asi_table
, value
);
1672 /* Handle membar masks. */
1674 static arg membar_table
[] =
1677 { 0x20, "#MemIssue" },
1678 { 0x10, "#Lookaside" },
1679 { 0x08, "#StoreStore" },
1680 { 0x04, "#LoadStore" },
1681 { 0x02, "#StoreLoad" },
1682 { 0x01, "#LoadLoad" },
1686 /* Return the value for membar arg NAME, or -1 if not found. */
1689 sparc_encode_membar (name
)
1692 return lookup_name (membar_table
, name
);
1695 /* Return the name for membar value VALUE or NULL if not found. */
1698 sparc_decode_membar (value
)
1701 return lookup_value (membar_table
, value
);
1704 /* Handle prefetch args. */
1706 static arg prefetch_table
[] =
1711 { 3, "#one_write" },
1716 /* Return the value for prefetch arg NAME, or -1 if not found. */
1719 sparc_encode_prefetch (name
)
1722 return lookup_name (prefetch_table
, name
);
1725 /* Return the name for prefetch value VALUE or NULL if not found. */
1728 sparc_decode_prefetch (value
)
1731 return lookup_value (prefetch_table
, value
);
1734 /* Handle sparclet coprocessor registers. */
1736 static arg sparclet_cpreg_table
[] =
1745 /* Return the value for sparclet cpreg arg NAME, or -1 if not found. */
1748 sparc_encode_sparclet_cpreg (name
)
1751 return lookup_name (sparclet_cpreg_table
, name
);
1754 /* Return the name for sparclet cpreg value VALUE or NULL if not found. */
1757 sparc_decode_sparclet_cpreg (value
)
1760 return lookup_value (sparclet_cpreg_table
, value
);