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git.ipfire.org Git - thirdparty/mdadm.git/blob - platform-intel.h
2 * Intel(R) Matrix Storage Manager hardware and firmware support routines
4 * Copyright (C) 2008 Intel Corporation
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 #include <asm/types.h>
21 /* The IMSM OROM Version Table definition */
24 __u8 table_ver_major
; /* Currently 2 (can change with future revs) */
25 __u8 table_ver_minor
; /* Currently 2 (can change with future revs) */
26 __u16 major_ver
; /* Example: 8 as in 8.6.0.1020 */
27 __u16 minor_ver
; /* Example: 6 as in 8.6.0.1020 */
28 __u16 hotfix_ver
; /* Example: 0 as in 8.6.0.1020 */
29 __u16 build
; /* Example: 1020 as in 8.6.0.1020 */
30 __u8 len
; /* number of bytes in this entire table */
31 __u8 checksum
; /* checksum of all the bytes in this table */
32 __u16 rlc
; /* RAID Level Capability */
33 /* we assume the cpu is x86 as the orom should not be found
36 #define IMSM_OROM_RLC_RAID0 (1 << 0)
37 #define IMSM_OROM_RLC_RAID1 (1 << 1)
38 #define IMSM_OROM_RLC_RAID10 (1 << 2)
39 #define IMSM_OROM_RLC_RAID1E (1 << 3)
40 #define IMSM_OROM_RLC_RAID5 (1 << 4)
41 #define IMSM_OROM_RLC_RAID_CNG (1 << 5)
42 __u16 sss
; /* Strip Size Supported */
43 #define IMSM_OROM_SSS_2kB (1 << 0)
44 #define IMSM_OROM_SSS_4kB (1 << 1)
45 #define IMSM_OROM_SSS_8kB (1 << 2)
46 #define IMSM_OROM_SSS_16kB (1 << 3)
47 #define IMSM_OROM_SSS_32kB (1 << 4)
48 #define IMSM_OROM_SSS_64kB (1 << 5)
49 #define IMSM_OROM_SSS_128kB (1 << 6)
50 #define IMSM_OROM_SSS_256kB (1 << 7)
51 #define IMSM_OROM_SSS_512kB (1 << 8)
52 #define IMSM_OROM_SSS_1MB (1 << 9)
53 #define IMSM_OROM_SSS_2MB (1 << 10)
54 #define IMSM_OROM_SSS_4MB (1 << 11)
55 #define IMSM_OROM_SSS_8MB (1 << 12)
56 #define IMSM_OROM_SSS_16MB (1 << 13)
57 #define IMSM_OROM_SSS_32MB (1 << 14)
58 #define IMSM_OROM_SSS_64MB (1 << 15)
59 __u16 dpa
; /* Disks Per Array supported */
60 __u16 tds
; /* Total Disks Supported */
61 __u8 vpa
; /* # Volumes Per Array supported */
62 __u8 vphba
; /* # Volumes Per Host Bus Adapter supported */
63 /* Attributes supported. This should map to the
64 * attributes in the MPB. Also, lower 16 bits
65 * should match/duplicate RLC bits above.
68 #define IMSM_OROM_ATTR_RAID0 IMSM_OROM_RLC_RAID0
69 #define IMSM_OROM_ATTR_RAID1 IMSM_OROM_RLC_RAID1
70 #define IMSM_OROM_ATTR_RAID10 IMSM_OROM_RLC_RAID10
71 #define IMSM_OROM_ATTR_RAID1E IMSM_OROM_RLC_RAID1E
72 #define IMSM_OROM_ATTR_RAID5 IMSM_OROM_RLC_RAID5
73 #define IMSM_OROM_ATTR_RAID_CNG IMSM_OROM_RLC_RAID_CNG
74 #define IMSM_OROM_ATTR_2TB (1 << 29)
75 #define IMSM_OROM_ATTR_PM (1 << 30)
76 #define IMSM_OROM_ATTR_ChecksumVerify (1 << 31)
79 } __attribute__((packed
));
86 struct sys_dev
*find_driver_devices(const char *bus
, const char *driver
);
87 __u16
devpath_to_vendor(const char *dev_path
);
88 void free_sys_dev(struct sys_dev
**list
);
89 const struct imsm_orom
*find_imsm_orom(void);