sim/aarch64/ChangeLog

   1 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * aclocal.m4, config.in, configure: Regenerate.
   4
   5 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * config.in, configure: Regenerate.
   8
   9 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
  10
  11         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
  12
  13 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
  14
  15         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
  16         (struct sim_state): Delete.
  17
  18 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
  19
  20         * cpustate.c: Include defs.h.
  21         * interp.c: Replace config.h include with defs.h.
  22         * memory.c, simulator.c: Likewise.
  23         * cpustate.h, simulator.h: Delete config.h include.
  24
  25 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
  26
  27         * config.in, configure: Regenerate.
  28
  29 2021-05-14  Mike Frysinger  <vapier@gentoo.org>
  30
  31         * cpustate.h: Update include path.
  32         * interp.c: Likewise.
  33
  34 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
  35
  36         * configure: Regenerate.
  37
  38 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
  39
  40         * config.in, configure: Regenerate.
  41
  42 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * cpustate.c (aarch64_set_FP_float): Change lx to PRIx64.
  45         (aarch64_set_FP_double, aarch64_set_FP_long_double,
  46         aarch64_set_vec_u64, aarch64_set_vec_s64): Likewise.
  47
  48 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
  49
  50         * simulator.c (do_fcvtzu): Change UL to ULL.
  51
  52 2021-04-26  Mike Frysinger  <vapier@gentoo.org>
  53
  54         * aclocal.m4, config.in, configure: Regenerate.
  55
  56 2021-04-22  Tom Tromey  <tom@tromey.com>
  57
  58         * configure, config.in: Rebuild.
  59
  60 2021-04-22  Tom Tromey  <tom@tromey.com>
  61
  62         * configure: Rebuild.
  63
  64 2021-04-21  Mike Frysinger  <vapier@gentoo.org>
  65
  66         * aclocal.m4: Regenerate.
  67
  68 2021-04-21  Simon Marchi  <simon.marchi@polymtl.ca>
  69
  70         * configure: Regenerate.
  71
  72 2021-04-18  Mike Frysinger  <vapier@gentoo.org>
  73
  74         * configure: Regenerate.
  75
  76 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
  77
  78         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
  79
  80 2021-04-07  Jim Wilson  <jimw@sifive.com>
  81
  82         PR sim/27483
  83         * simulator.c (set_flags_for_add32): Compare uresult against
  84         itself.  Compare sresult against itself.
  85
  86 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  87
  88         * aclocal.m4, configure: Regenerate.
  89
  90 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
  91
  92         * configure: Regenerate.
  93
  94 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
  95
  96         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
  97         * aclocal.m4, configure: Regenerate.
  98
  99 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
 100
 101         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
 102         * aclocal.m4, configure: Regenerate.
 103
 104 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
 105
 106         * configure: Regenerate.
 107
 108 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
 109
 110         * config.in, configure: Regenerate.
 111
 112 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 113
 114         * configure: Regenerate.
 115
 116 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
 117
 118         * configure: Regenerate.
 119
 120 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
 121
 122         * configure: Regenerate.
 123
 124 2020-02-06  Carlo Bramini  <carlo_bramini@users.sourceforge.net>
 125
 126         PR sim/25318
 127         * simulator.c (blr): Read destination register before calling
 128         aarch64_save_LR.
 129
 130 2019-03-28  Andrew Burgess  <andrew.burgess@embecosm.com>
 131
 132         * cpustate.c: Add 'libiberty.h' include.
 133         * interp.c: Add 'sim-assert.h' include.
 134
 135 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
 136
 137         * configure: Regenerate.
 138
 139 2017-04-22  Jim Wilson  <jim.wilson@linaro.org>
 140
 141         * simulator.c (vec_load): Add M argument.  Rewrite to iterate over
 142         registers based on structure size.
 143         (LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load.
 144         (LD1_1): Replace with call to vec_load.
 145         (vec_store): Add new M argument.  Rewrite to iterate over registers
 146         based on structure size.
 147         (ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store.
 148         (ST1_1): Replace with call to vec_store.
 149
 150 2017-04-08  Jim Wilson  <jim.wilson@linaro.org>
 151
 152         * simulator.c (do_vec_FCVTL): New.
 153         (do_vec_op1): Call do_vec_FCVTL.
 154
 155         * simulator.c (do_scalar_FCMGE_zero, do_scalar_FCMLE_zero,
 156         do_scalar_FCMGT_zero, do_scalar_FCMEQ_zero, do_scalar_FCMLT_zero): New.
 157         (do_scalar_vec): Add calls to new functions.
 158
 159 2017-03-25  Jim Wilson  <jim.wilson@linaro.org>
 160
 161         * simulator.c (set_flags_for_add32): Cast result to uint32_t in carry
 162         flag check.
 163
 164 2017-03-03  Jim Wilson  <jim.wilson@linaro.org>
 165
 166         * simulator.c (mul64hi): Shift carry left by 32.
 167         (smulh): Change signum to negate.  If negate, invert result, and add
 168         carry bit if low part of multiply result is zero.
 169
 170 2017-02-25  Jim Wilson  <jim.wilson@linaro.org>
 171
 172         * simulator.c (do_vec_SMOV_into_scalar): New.
 173         (do_vec_UMOV_into_scalar): Renamed from do_vec_MOV_into_scalar.
 174         Rewritten.
 175         (do_vec_UMOV): Merged into do_vec_UMOV_into_scalar and deleted.
 176         (do_vec_op1): Move do_vec_TRN call and do_vec_UZP call.  Add
 177         do_vec_SMOV_into_scalar call.  Delete do_vec_MOV_into_scalar and
 178         do_vec_UMOV calls.  Add do_vec_UMOV_into_scalar call.
 179
 180         * simulator.c (popcount): New.
 181         (do_vec_CNT): New.
 182         (do_vec_op1): Add do_vec_CNT call.
 183
 184 2017-02-19  Jim Wilson  <jim.wilson@linaro.org>
 185
 186         * simulator.c (do_vec_ADDV): Mov val declaration inside each case,
 187         with type set to input type size.
 188         (do_vec_xtl): Change bias from 3 to 4 for byte case.
 189
 190 2017-02-14  Jim Wilson  <jim.wilson@linaro.org>
 191
 192         * simulator.c (do_vec_MLA): Rewrite switch body.
 193
 194         * simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and
 195         2.  Move test_false if inside loop.  Fix logic for computing result
 196         stored to vd.
 197
 198         * simulator.c: (LDn_STn_SINGLE_LANE_AND_SIZE): New.
 199         (do_vec_LDn_single, do_vec_STn_single): New.
 200         (do_vec_LDnR): Add and set new nregs var.  Replace switch on nregs with
 201         loop over nregs using new var n.  Add n times size to address in loop.
 202         Add n to vd in loop.
 203         (do_vec_load_store): Add comment for instruction bit 24.  New var
 204         single to hold instruction bit 24.  Add new code to use single.  Move
 205         ldnr support inside single if statements.  Fix ldnr register counts
 206         inside post if statement.  Change HALT_NYI calls to HALT_UNALLOC.
 207
 208 2017-01-23  Jim Wilson  <jim.wilson@linaro.org>
 209
 210         * simulator.c (do_vec_compare): Add case 0x23 for CMTST.
 211
 212 2017-01-17  Jim Wilson  <jim.wilson@linaro.org>
 213
 214         * simulator.c (do_vec_ADDV): Call aarch64_set_vec_u64 instead of
 215         aarch64_set_reg_u64.  In case 2, call HALT_UNALLOC if not full.  In
 216         case 3, call HALT_UNALLOC unconditionally.
 217         (do_vec_XTN): Delete shifts.  In case 2, change index from i + 4 to
 218         i + 2.  Delete if on bias, change index to i + bias * X.
 219
 220 2017-01-09  Jim Wilson  <jim.wilson@linaro.org>
 221
 222         * simulator.c (do_vec_UZP): Rewrite.
 223
 224 2017-01-04  Jim Wilson  <jim.wilson@linaro.org>
 225
 226         * cpustate.c: Include math.h.
 227         (aarch64_set_FP_float): Use signbit to check for signed zero.
 228         (aarch64_set_FP_double): Likewise.
 229         * simulator.c (do_vec_MOV_immediate, case 0x8): Add missing break.
 230         (do_vec_mul): In all DO_VEC_WIDENING_MUL calls, make second and fourth
 231         args same size as third arg.
 232         (fmaxnm): Use isnan instead of fpclassify.
 233         (fminnm, dmaxnm, dminnm): Likewise.
 234         (do_vec_MLS): Reverse order of subtraction operands.
 235         (dexSimpleFPCondSelect): Call aarch64_get_FP_double or
 236         aarch64_get_FP_float to get source register contents.
 237         (UINT_MIN, ULONG_MIN, FLOAT_UINT_MAX, FLOAT_UINT_MIN,
 238         DOUBLE_UINT_MAX, DOUBLE_UINT_MIN, FLOAT_ULONG_MAX, FLOAT_ULONG_MIN,
 239         DOUBLE_ULONG_MAX, DOUBLE_ULONG_MIN): New.
 240         (do_fcvtzu): Use ULONG instead of LONG, and UINT instead of INT in
 241         raise_exception calls.
 242
 243 2016-12-21  Jim Wilson  <jim.wilson@linaro.org>
 244
 245         * simulator.c (set_flags_for_float_compare): Add code to handle Inf.
 246         Add comment to document NaN issue.
 247         (set_flags_for_double_compare): Likewise.
 248
 249 2016-12-13  Jim Wilson  <jim.wilson@linaro.org>
 250
 251         * simulator.c (NEG, POS): Move before set_flags_for_add64.
 252         (set_flags_for_add64): Replace with a modified copy of
 253         set_flags_for_sub64.
 254
 255 2016-12-03  Jim Wilson  <jim.wilson@linaro.org>
 256
 257         * simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting.
 258         (dexTestBranchImmediate): Shift high bit of pos by 5 not 4.
 259
 260 2016-12-01  Jim Wilson  <jim.wilson@linaro.org>
 261
 262         * simulator.c (fsturs): Switch use of rn and st variables.
 263         (fsturd, fsturq): Likewise
 264
 265 2016-08-15  Mike Frysinger  <vapier@gentoo.org>
 266
 267         * interp.c: Include bfd.h.
 268         (symcount, symtab, aarch64_get_sym_value): Delete.
 269         (remove_useless_symbols): Change count type to long.
 270         (aarch64_get_func): Add SIM_DESC to arg list.  Add symcount
 271         and symtab local variables.
 272         (sim_create_inferior): Delete storage.  Replace symbol code
 273         with a call to trace_load_symbols.
 274         * memory.c: Delete bfd.h, elf/internal.h, and elf/common.h
 275         includes.
 276         (aarch64_get_heap_start): Change aarch64_get_sym_value to
 277         trace_sym_value.
 278         * memory.h: Delete bfd.h include.
 279         (mem_add_blk): Delete unused prototype.
 280         * simulator.c (bl, blr): Pass SIM_DESC to aarch64_get_func.
 281         * simulator.c (aarch64_get_func): Add SIM_DESC to arg list.
 282         (aarch64_get_sym_value): Delete.
 283
 284 2016-08-12  Nick Clifton  <nickc@redhat.com>
 285
 286         * simulator.c (aarch64_step): Revert pervious delta.
 287         (aarch64_run): Call sim_events_tick after each
 288         instruction is simulated, and if necessary call
 289         sim_events_process.
 290         * simulator.h: Revert previous delta.
 291
 292 2016-08-11  Nick Clifton  <nickc@redhat.com>
 293
 294         * interp.c (sim_create_inferior): Allow for being called with a
 295         NULL abfd parameter.  If a bfd is provided, initialise the sim
 296         with that start address.
 297         * simulator.c (HALT_NYI): Just print out the numeric value of the
 298         instruction when not tracing.
 299         (aarch64_step): Change from static to global.
 300         * simulator.h: Add a prototype for aarch64_step().
 301
 302 2016-07-27  Alan Modra  <amodra@gmail.com>
 303
 304         * memory.c: Don't include libbfd.h.
 305
 306 2016-07-21  Nick Clifton  <nickc@redhat.com>
 307
 308         * simulator.c (fsqrts): Use sqrtf rather than sqrt.
 309
 310 2016-06-30  Jim Wilson  <jim.wilson@linaro.org>
 311
 312         * cpustate.h: Include config.h.
 313         (union GRegisterValue): Add WORDS_BIGENDIAN check.  For big endian code
 314         use anonymous structs to align members.
 315         * simulator.c (aarch64_step): Use sim_core_read_buffer and
 316         endian_le2h_4 to read instruction from pc.
 317
 318 2016-05-06  Nick Clifton  <nickc@redhat.com>
 319
 320         * simulator.c (do_FMLA_by_element): New function.
 321         (do_vec_op2): Call it.
 322
 323 2016-04-27  Nick Clifton  <nickc@redhat.com>
 324
 325         * simulator.c: Add TRACE_DECODE statements to all emulation
 326         functions.
 327
 328 2016-03-30  Nick Clifton  <nickc@redhat.com>
 329
 330         * cpustate.c (aarch64_set_reg_s32): New function.
 331         (aarch64_set_reg_u32): New function.
 332         (aarch64_get_FP_half): Place half precision value into the correct
 333         slot of the union.
 334         (aarch64_set_FP_half): Likewise.
 335         * cpustate.h: Add prototypes for aarch64_set_reg_s32 and
 336         aarch64_set_reg_u32.
 337         * memory.c (FETCH_FUNC): Cast the read value to the access type
 338         before converting it to the return type.  Rename to FETCH_FUNC64.
 339         (FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
 340         accesses.  Use for 32-bit memory access functions.
 341         * simulator.c (ldrsb_wb): Use sign extension not zero extension.
 342         (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
 343         (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
 344         (ldrsh_scale_ext, ldrsw_abs): Likewise.
 345         (ldrh32_abs): Store 32 bit value not 64-bits.
 346         (ldrh32_wb, ldrh32_scale_ext): Likewise.
 347         (do_vec_MOV_immediate): Fix computation of val.
 348         (do_vec_MVNI): Likewise.
 349         (DO_VEC_WIDENING_MUL): New macro.
 350         (do_vec_mull): Use new macro.
 351         (do_vec_mul): Use new macro.
 352         (do_vec_MLA): Read values before writing.
 353         (do_vec_xtl): Likewise.
 354         (do_vec_SSHL): Select correct shift value.
 355         (do_vec_USHL): Likewise.
 356         (do_scalar_UCVTF): New function.
 357         (do_scalar_vec): Call new function.
 358         (store_pair_u64): Treat reads of SP as reads of XZR.
 359
 360 2016-03-29  Nick Clifton  <nickc@redhat.com>
 361
 362         * cpustate.c: Remove space after asterisk in function parameters.
 363         * decode.h (greg): Delete unused function.
 364         (vreg, shift, extension, scaling, writeback, condcode): Likewise.
 365         * simulator.c: Use INSTR macro in more places.
 366         (HALT_NYI): Use sim_io_eprintf in place of fprintf.
 367         Remove extraneous whitespace.
 368
 369 2016-03-23  Nick Clifton  <nickc@redhat.com>
 370
 371         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
 372         register as a half precision floating point number.
 373         (aarch64_set_FP_half): New function.  Similar, but for setting
 374         a half precision register.
 375         (aarch64_get_thread_id): New function.  Returns the value of the
 376         CPU's TPIDR register.
 377         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
 378         floating point control register.
 379         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
 380         register.
 381         * cpustate.h: Add prototypes for new functions.
 382         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
 383         * memory.c: Use unaligned core access functions for all memory
 384         reads and writes.
 385         * simulator.c (HALT_NYI): Generate an error message if tracing
 386         will not tell the user why the simulator is halting.
 387         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
 388         (INSTR): New time-saver macro.
 389         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
 390         offset.
 391         (fldrh_abs): New function.  Likewise for 16-bit values.
 392         (do_vec_SSHL): Allow for negative shift values.
 393         (do_vec_USHL): Likewise.
 394         (do_vec_SHL): Correct computation of shift amount.
 395         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
 396         shifts and computation of shift value.
 397         (clz): New function.  Counts leading zero bits.
 398         (do_vec_CLZ): New function.  Implements CLZ (vector).
 399         (do_vec_MOV_element): Call do_vec_CLZ.
 400         (dexSimpleFPCondCompare): Implement.
 401         (do_FCVT_half_to_single): New function.  Implements one of the
 402         FCVT operations.
 403         (do_FCVT_half_to_double): New function.  Likewise.
 404         (do_FCVT_single_to_half): New function.  Likewise.
 405         (do_FCVT_double_to_half): New function.  Likewise.
 406         (dexSimpleFPDataProc1Source): Call new FCVT functions.
 407         (do_scalar_SHL): Handle negative shifts.
 408         (do_scalar_shift): Handle SSHR.
 409         (do_scalar_USHL): New function.
 410         (do_double_add): Simplify to just performing a double precision
 411         add operation.  Move remaining code into...
 412         (do_scalar_vec): ... New function.
 413         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
 414         functions.
 415         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
 416         registers.
 417         (system_set): New function.
 418         (do_MSR_immediate): New function.  Stub for now.
 419         (do_MSR_reg): New function.  Likewise. Partially implements MSR
 420         instruction.
 421         (do_SYS): New function.  Stub for now,
 422         (dexSystem): Call new functions.
 423
 424 2016-03-18  Nick Clifton  <nickc@redhat.com>
 425
 426         * cpustate.c: Remove spurious spaces from TRACE strings.
 427         Print hex equivalents of floats and doubles.
 428         Check element number against array size when accessing vector
 429         registers.
 430         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
 431         element index.
 432         (SET_VEC_ELEMENT): Likewise.
 433         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
 434
 435         * memory.c: Trace memory reads when --trace-memory is enabled.
 436         Remove float and double load and store functions.
 437         * memory.h (aarch64_get_mem_float): Delete prototype.
 438         (aarch64_get_mem_double): Likewise.
 439         (aarch64_set_mem_float): Likewise.
 440         (aarch64_set_mem_double): Likewise.
 441         * simulator (IS_SET): Always return either 0 or 1.
 442         (IS_CLEAR): Likewise.
 443         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
 444         and doubles using 64-bit memory accesses.
 445         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
 446         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
 447         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
 448         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
 449         (store_pair_double, load_pair_float, load_pair_double): Likewise.
 450         (do_vec_MUL_by_element): New function.
 451         (do_vec_op2): Call do_vec_MUL_by_element.
 452         (do_scalar_NEG): New function.
 453         (do_double_add): Call do_scalar_NEG.
 454
 455 2016-03-03  Nick Clifton  <nickc@redhat.com>
 456
 457         * simulator.c (set_flags_for_sub32): Correct type of signbit.
 458         (CondCompare): Swap interpretation of bit 30.
 459         (DO_ADDP): Delete macro.
 460         (do_vec_ADDP): Copy source registers before starting to update
 461         destination register.
 462         (do_vec_FADDP): Likewise.
 463         (do_vec_load_store): Fix computation of sizeof_operation.
 464         (rbit64): Fix type of constant.
 465         (aarch64_step): When displaying insn value, display all 32 bits.
 466
 467 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 468
 469         * config.in, configure: Regenerate.
 470
 471 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 472
 473         * configure: Regenerate.
 474
 475 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 476
 477         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 478         * configure: Regenerate.
 479
 480 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 481
 482         * configure: Regenerate.
 483
 484 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 485
 486         * configure: Regenerate.
 487
 488 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 489
 490         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 491         * configure: Regenerate.
 492
 493 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 494
 495         * configure: Regenerate.
 496
 497 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 498
 499         * configure: Regenerate.
 500
 501 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 502
 503         * config.in, configure: Regenerate.
 504
 505 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 506
 507         * interp.c (sim_create_inferior): Mark argv and env const.
 508         (sim_open): Mark argv const.
 509
 510 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 511
 512         * interp.c: Delete dis-asm.h include.
 513         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 514         (sim_create_inferior): Delete disassemble init logic.
 515         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 516         (sim_open): Delete sim_add_option_table call.
 517         * memory.c (mem_error): Delete disas check.
 518         * simulator.c: Delete dis-asm.h include.
 519         (disas): Delete.
 520         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 521         (HALT_NYI): Likewise.
 522         (handle_halt): Delete disas call.
 523         (aarch64_step): Replace disas logic with TRACE_DISASM.
 524         * simulator.h: Delete dis-asm.h include.
 525         (aarch64_print_insn): Delete.
 526
 527 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 528
 529         * simulator.c (MAX, MIN): Delete.
 530         (do_vec_maxv): Change MAX to max and MIN to min.
 531         (do_vec_fminmaxV): Likewise.
 532
 533 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 534
 535         * simulator.c: Remove syscall.h include.
 536
 537 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 538
 539         * configure: Regenerate.
 540
 541 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 542
 543         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 544         * configure: Regenerate.
 545
 546 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 547
 548         * configure: Regenerate.
 549
 550 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 551
 552         * interp.c (sim_dis_read): Change private_data to application_data.
 553         (sim_create_inferior): Likewise.
 554
 555 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 556
 557         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 558
 559 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 560
 561         * config.in, configure: Regenerate.
 562
 563 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 564
 565         * interp.c (sim_create_inferior): Update comment and argv check.
 566
 567 2015-12-14  Nick Clifton  <nickc@redhat.com>
 568
 569         * simulator.c (system_get): New function.  Provides read
 570         access to the dczid system register.
 571         (do_mrs): New function - implements the MRS instruction.
 572         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 573         unimplemented system instructions.
 574
 575 2015-11-24  Nick Clifton  <nickc@redhat.com>
 576
 577         * configure.ac: New configure template.
 578         * aclocal.m4: Generate.
 579         * config.in: Generate.
 580         * configure: Generate.
 581         * cpustate.c: New file - functions for accessing AArch64 registers.
 582         * cpustate.h: New header.
 583         * decode.h: New header.
 584         * interp.c: New file - interface between GDB and simulator.
 585         * Makefile.in: New makefile template.
 586         * memory.c: New file - functions for simulating aarch64 memory
 587         accesses.
 588         * memory.h: New header.
 589         * sim-main.h: New header.
 590         * simulator.c: New file - aarch64 simulator functions.
 591         * simulator.h: New header.