sim/aarch64/memory.c

   1 /* memory.c -- Memory accessor functions for the AArch64 simulator
   2
   3    Copyright (C) 2015-2016 Free Software Foundation, Inc.
   4
   5    Contributed by Red Hat.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 #include "config.h"
  23 #include <sys/types.h>
  24 #include <stdio.h>
  25 #include <stdlib.h>
  26 #include <string.h>
  27
  28 #include "bfd.h"
  29 #include "libbfd.h"
  30 #include "libiberty.h"
  31 #include "elf/internal.h"
  32 #include "elf/common.h"
  33
  34 #include "memory.h"
  35 #include "simulator.h"
  36
  37 #include "sim-core.h"
  38
  39 static inline void
  40 mem_error (sim_cpu *cpu, const char *message, uint64_t addr)
  41 {
  42   TRACE_MEMORY (cpu, "ERROR: %s: %" PRIx64, message, addr);
  43 }
  44
  45 /* FIXME: AArch64 requires aligned memory access if SCTRLR_ELx.A is set,
  46    but we are not implementing that here.  */
  47 #define FETCH_FUNC64(RETURN_TYPE, ACCESS_TYPE, NAME, N)                 \
  48   RETURN_TYPE                                                           \
  49   aarch64_get_mem_##NAME (sim_cpu *cpu, uint64_t address)               \
  50   {                                                                     \
  51     RETURN_TYPE val = (RETURN_TYPE) (ACCESS_TYPE)                       \
  52       sim_core_read_unaligned_##N (cpu, 0, read_map, address);          \
  53     TRACE_MEMORY (cpu, "read of %" PRIx64 " (%d bytes) from %" PRIx64,  \
  54                   val, N, address);                                     \
  55                                                                         \
  56     return val;                                                         \
  57   }
  58
  59 FETCH_FUNC64 (uint64_t, uint64_t, u64, 8)
  60 FETCH_FUNC64 (int64_t,   int64_t, s64, 8)
  61
  62 #define FETCH_FUNC32(RETURN_TYPE, ACCESS_TYPE, NAME, N)                 \
  63   RETURN_TYPE                                                           \
  64   aarch64_get_mem_##NAME (sim_cpu *cpu, uint64_t address)               \
  65   {                                                                     \
  66     RETURN_TYPE val = (RETURN_TYPE) (ACCESS_TYPE)                       \
  67       sim_core_read_unaligned_##N (cpu, 0, read_map, address);          \
  68     TRACE_MEMORY (cpu, "read of %8x (%d bytes) from %" PRIx64,          \
  69                   val, N, address);                                     \
  70                                                                         \
  71     return val;                                                         \
  72   }
  73
  74 FETCH_FUNC32 (uint32_t, uint32_t, u32, 4)
  75 FETCH_FUNC32 (int32_t,   int32_t, s32, 4)
  76 FETCH_FUNC32 (uint32_t, uint16_t, u16, 2)
  77 FETCH_FUNC32 (int32_t,   int16_t, s16, 2)
  78 FETCH_FUNC32 (uint32_t,  uint8_t, u8, 1)
  79 FETCH_FUNC32 (int32_t,    int8_t, s8, 1)
  80
  81 void
  82 aarch64_get_mem_long_double (sim_cpu *cpu, uint64_t address, FRegister *a)
  83 {
  84   a->v[0] = sim_core_read_unaligned_8 (cpu, 0, read_map, address);
  85   a->v[1] = sim_core_read_unaligned_8 (cpu, 0, read_map, address + 8);
  86 }
  87
  88 /* FIXME: Aarch64 requires aligned memory access if SCTRLR_ELx.A is set,
  89    but we are not implementing that here.  */
  90 #define STORE_FUNC(TYPE, NAME, N)                                       \
  91   void                                                                  \
  92   aarch64_set_mem_##NAME (sim_cpu *cpu, uint64_t address, TYPE value)   \
  93   {                                                                     \
  94     TRACE_MEMORY (cpu,                                                  \
  95                   "write of %" PRIx64 " (%d bytes) to %" PRIx64,        \
  96                   (uint64_t) value, N, address);                        \
  97                                                                         \
  98     sim_core_write_unaligned_##N (cpu, 0, write_map, address, value);   \
  99   }
 100
 101 STORE_FUNC (uint64_t, u64, 8)
 102 STORE_FUNC (int64_t,  s64, 8)
 103 STORE_FUNC (uint32_t, u32, 4)
 104 STORE_FUNC (int32_t,  s32, 4)
 105 STORE_FUNC (uint16_t, u16, 2)
 106 STORE_FUNC (int16_t,  s16, 2)
 107 STORE_FUNC (uint8_t,  u8, 1)
 108 STORE_FUNC (int8_t,   s8, 1)
 109
 110 void
 111 aarch64_set_mem_long_double (sim_cpu *cpu, uint64_t address, FRegister a)
 112 {
 113   TRACE_MEMORY (cpu,
 114                 "write of long double %" PRIx64 " %" PRIx64 " to %" PRIx64,
 115                 a.v[0], a.v[1], address);
 116
 117   sim_core_write_unaligned_8 (cpu, 0, write_map, address, a.v[0]);
 118   sim_core_write_unaligned_8 (cpu, 0, write_map, address + 8, a.v[1]);
 119 }
 120
 121 void
 122 aarch64_get_mem_blk (sim_cpu *  cpu,
 123                      uint64_t   address,
 124                      char *     buffer,
 125                      unsigned   length)
 126 {
 127   unsigned len;
 128
 129   len = sim_core_read_buffer (CPU_STATE (cpu), cpu, read_map,
 130                               buffer, address, length);
 131   if (len == length)
 132     return;
 133
 134   memset (buffer, 0, length);
 135   if (cpu)
 136     mem_error (cpu, "read of non-existant mem block at", address);
 137
 138   sim_engine_halt (CPU_STATE (cpu), cpu, NULL, aarch64_get_PC (cpu),
 139                    sim_stopped, SIM_SIGBUS);
 140 }
 141
 142 const char *
 143 aarch64_get_mem_ptr (sim_cpu *cpu, uint64_t address)
 144 {
 145   char *addr = sim_core_trans_addr (CPU_STATE (cpu), cpu, read_map, address);
 146
 147   if (addr == NULL)
 148     {
 149       mem_error (cpu, "request for non-existant mem addr of", address);
 150       sim_engine_halt (CPU_STATE (cpu), cpu, NULL, aarch64_get_PC (cpu),
 151                        sim_stopped, SIM_SIGBUS);
 152     }
 153
 154   return addr;
 155 }
 156
 157 /* We implement a combined stack and heap.  That way the sbrk()
 158    function in libgloss/aarch64/syscalls.c has a chance to detect
 159    an out-of-memory condition by noticing a stack/heap collision.
 160
 161    The heap starts at the end of loaded memory and carries on up
 162    to an arbitary 2Gb limit.  */
 163
 164 uint64_t
 165 aarch64_get_heap_start (sim_cpu *cpu)
 166 {
 167   uint64_t heap = aarch64_get_sym_value ("end");
 168
 169   if (heap == 0)
 170     heap = aarch64_get_sym_value ("_end");
 171   if (heap == 0)
 172     {
 173       heap = STACK_TOP - 0x100000;
 174       sim_io_eprintf (CPU_STATE (cpu),
 175                       "Unable to find 'end' symbol - using addr based "
 176                       "upon stack instead %" PRIx64 "\n",
 177                       heap);
 178     }
 179   return heap;
 180 }
 181
 182 uint64_t
 183 aarch64_get_stack_start (sim_cpu *cpu)
 184 {
 185   if (aarch64_get_heap_start (cpu) >= STACK_TOP)
 186     mem_error (cpu, "executable is too big", aarch64_get_heap_start (cpu));
 187   return STACK_TOP;
 188 }