1 /* run front end support for arm
2 Copyright (C) 1995-2015 Free Software Foundation, Inc.
4 This file is part of ARM SIM.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 /* This file provides the interface between the simulator and
20 run.c and gdb (when the simulator is linked with gdb).
21 All simulator interaction should go through this file. */
29 #include "gdb/callback.h"
30 #include "gdb/remote-sim.h"
32 #include "sim-options.h"
36 #include "gdb/sim-arm.h"
37 #include "gdb/signals.h"
38 #include "libiberty.h"
41 /* TODO: This should get pulled from the SIM_DESC. */
42 host_callback
*sim_callback
;
44 /* TODO: This should get merged into sim_cpu. */
45 struct ARMul_State
*state
;
47 /* Memory size in bytes. */
48 /* TODO: Memory should be converted to the common memory module. */
49 static int mem_size
= (1 << 21);
55 /* TODO: Tracing should be converted to common tracing module. */
60 static struct disassemble_info info
;
61 static char opbuf
[1000];
64 op_printf (char *buf
, char *fmt
, ...)
70 ret
= vsprintf (opbuf
+ strlen (opbuf
), fmt
, ap
);
76 sim_dis_read (bfd_vma memaddr ATTRIBUTE_UNUSED
,
79 struct disassemble_info
* info
)
81 ARMword val
= (ARMword
) *((ARMword
*) info
->application_data
);
85 * ptr
++ = val
& 0xFF;
92 print_insn (ARMword instr
)
97 info
.application_data
= & instr
;
98 size
= print_insn_little_arm (0, & info
);
99 fprintf (stderr
, " %*s\n", size
, opbuf
);
102 /* Cirrus DSP registers.
104 We need to define these registers outside of maverick.c because
105 maverick.c might not be linked in unless --target=arm9e-* in which
106 case wrapper.c will not compile because it tries to access Cirrus
107 registers. This should all go away once we get the Cirrus and ARM
108 Coprocessor to coexist in armcopro.c-- aldyh. */
125 union maverick_acc_regs
127 long double ld
; /* Acc registers are 72-bits. */
130 struct maverick_regs DSPregs
[16];
131 union maverick_acc_regs DSPacc
[4];
141 ARMul_EmulateInit ();
142 state
= ARMul_NewState ();
143 state
->bigendSig
= (CURRENT_TARGET_BYTE_ORDER
== BIG_ENDIAN
? HIGH
: LOW
);
144 ARMul_MemoryInit (state
, mem_size
);
145 ARMul_OSInit (state
);
152 ARMul_ConsolePrint (ARMul_State
* state
,
160 va_start (ap
, format
);
161 vprintf (format
, ap
);
167 ARMul_Debug (ARMul_State
* state ATTRIBUTE_UNUSED
,
168 ARMword pc ATTRIBUTE_UNUSED
,
169 ARMword instr ATTRIBUTE_UNUSED
)
175 sim_write (SIM_DESC sd ATTRIBUTE_UNUSED
,
177 const unsigned char * buffer
,
184 for (i
= 0; i
< size
; i
++)
185 ARMul_SafeWriteByte (state
, addr
+ i
, buffer
[i
]);
191 sim_read (SIM_DESC sd ATTRIBUTE_UNUSED
,
193 unsigned char * buffer
,
200 for (i
= 0; i
< size
; i
++)
201 buffer
[i
] = ARMul_SafeReadByte (state
, addr
+ i
);
207 sim_stop (SIM_DESC sd ATTRIBUTE_UNUSED
)
209 state
->Emulate
= STOP
;
215 sim_resume (SIM_DESC sd ATTRIBUTE_UNUSED
,
217 int siggnal ATTRIBUTE_UNUSED
)
219 state
->EndCondition
= 0;
224 state
->Reg
[15] = ARMul_DoInstr (state
);
225 if (state
->EndCondition
== 0)
226 state
->EndCondition
= RDIError_BreakpointReached
;
230 state
->NextInstr
= RESUME
; /* treat as PC change */
231 state
->Reg
[15] = ARMul_DoProg (state
);
238 sim_create_inferior (SIM_DESC sd ATTRIBUTE_UNUSED
,
251 ARMul_SetPC (state
, bfd_get_start_address (abfd
));
252 mach
= bfd_get_mach (abfd
);
256 ARMul_SetPC (state
, 0); /* ??? */
261 if (abfd
!= NULL
&& (bfd_get_start_address (abfd
) & 1))
268 (*sim_callback
->printf_filtered
)
270 "Unknown machine type '%d'; please update sim_create_inferior.\n",
275 /* We wouldn't set the machine type with earlier toolchains, so we
276 explicitly select a processor capable of supporting all ARMs in
278 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_v6_Prop
);
281 case bfd_mach_arm_XScale
:
282 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_XScale_Prop
| ARM_v6_Prop
);
285 case bfd_mach_arm_iWMMXt2
:
286 case bfd_mach_arm_iWMMXt
:
288 extern int SWI_vector_installed
;
291 if (! SWI_vector_installed
)
293 /* Intialise the hardware vectors to zero. */
294 if (! SWI_vector_installed
)
295 for (i
= ARMul_ResetV
; i
<= ARMFIQV
; i
+= 4)
296 ARMul_WriteWord (state
, i
, 0);
298 /* ARM_WriteWord will have detected the write to the SWI vector,
299 but we want SWI_vector_installed to remain at 0 so that thumb
300 mode breakpoints will work. */
301 SWI_vector_installed
= 0;
304 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_XScale_Prop
| ARM_iWMMXt_Prop
);
307 case bfd_mach_arm_ep9312
:
308 ARMul_SelectProcessor (state
, ARM_v4_Prop
| ARM_ep9312_Prop
);
312 if (bfd_family_coff (abfd
))
314 /* This is a special case in order to support COFF based ARM toolchains.
315 The COFF header does not have enough room to store all the different
316 kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
317 to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5
318 machine type here, we assume it could be any of the above architectures
319 and so select the most feature-full. */
320 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_XScale_Prop
);
323 /* Otherwise drop through. */
325 case bfd_mach_arm_5T
:
326 ARMul_SelectProcessor (state
, ARM_v5_Prop
);
329 case bfd_mach_arm_5TE
:
330 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
);
334 case bfd_mach_arm_4T
:
335 ARMul_SelectProcessor (state
, ARM_v4_Prop
);
339 case bfd_mach_arm_3M
:
340 ARMul_SelectProcessor (state
, ARM_Lock_Prop
);
344 case bfd_mach_arm_2a
:
345 ARMul_SelectProcessor (state
, ARM_Fix26_Prop
);
349 memset (& info
, 0, sizeof (info
));
350 INIT_DISASSEMBLE_INFO (info
, stdout
, op_printf
);
351 info
.read_memory_func
= sim_dis_read
;
352 info
.arch
= bfd_get_arch (abfd
);
353 info
.mach
= bfd_get_mach (abfd
);
354 info
.endian_code
= BFD_ENDIAN_LITTLE
;
356 info
.arch
= bfd_arch_arm
;
357 disassemble_init_for_target (& info
);
361 /* Set up the command line by laboriously stringing together
362 the environment carefully picked apart by our caller. */
364 /* Free any old stuff. */
365 if (state
->CommandLine
!= NULL
)
367 free (state
->CommandLine
);
368 state
->CommandLine
= NULL
;
371 /* See how much we need. */
372 for (arg
= argv
; *arg
!= NULL
; arg
++)
373 argvlen
+= strlen (*arg
) + 1;
376 state
->CommandLine
= malloc (argvlen
+ 1);
377 if (state
->CommandLine
!= NULL
)
380 state
->CommandLine
[0] = '\0';
382 for (arg
= argv
; *arg
!= NULL
; arg
++)
384 strcat (state
->CommandLine
, *arg
);
385 strcat (state
->CommandLine
, " ");
392 /* Now see if there's a MEMSIZE spec in the environment. */
395 if (strncmp (*env
, "MEMSIZE=", sizeof ("MEMSIZE=") - 1) == 0)
399 /* Set up memory limit. */
401 strtoul (*env
+ sizeof ("MEMSIZE=") - 1, &end_of_num
, 0);
411 frommem (struct ARMul_State
*state
, unsigned char *memory
)
413 if (state
->bigendSig
== HIGH
)
414 return (memory
[0] << 24) | (memory
[1] << 16)
415 | (memory
[2] << 8) | (memory
[3] << 0);
417 return (memory
[3] << 24) | (memory
[2] << 16)
418 | (memory
[1] << 8) | (memory
[0] << 0);
422 tomem (struct ARMul_State
*state
,
423 unsigned char *memory
,
426 if (state
->bigendSig
== HIGH
)
428 memory
[0] = val
>> 24;
429 memory
[1] = val
>> 16;
430 memory
[2] = val
>> 8;
431 memory
[3] = val
>> 0;
435 memory
[3] = val
>> 24;
436 memory
[2] = val
>> 16;
437 memory
[1] = val
>> 8;
438 memory
[0] = val
>> 0;
443 sim_store_register (SIM_DESC sd ATTRIBUTE_UNUSED
,
445 unsigned char *memory
,
450 switch ((enum sim_arm_regs
) rn
)
452 case SIM_ARM_R0_REGNUM
:
453 case SIM_ARM_R1_REGNUM
:
454 case SIM_ARM_R2_REGNUM
:
455 case SIM_ARM_R3_REGNUM
:
456 case SIM_ARM_R4_REGNUM
:
457 case SIM_ARM_R5_REGNUM
:
458 case SIM_ARM_R6_REGNUM
:
459 case SIM_ARM_R7_REGNUM
:
460 case SIM_ARM_R8_REGNUM
:
461 case SIM_ARM_R9_REGNUM
:
462 case SIM_ARM_R10_REGNUM
:
463 case SIM_ARM_R11_REGNUM
:
464 case SIM_ARM_R12_REGNUM
:
465 case SIM_ARM_R13_REGNUM
:
466 case SIM_ARM_R14_REGNUM
:
467 case SIM_ARM_R15_REGNUM
: /* PC */
468 case SIM_ARM_FP0_REGNUM
:
469 case SIM_ARM_FP1_REGNUM
:
470 case SIM_ARM_FP2_REGNUM
:
471 case SIM_ARM_FP3_REGNUM
:
472 case SIM_ARM_FP4_REGNUM
:
473 case SIM_ARM_FP5_REGNUM
:
474 case SIM_ARM_FP6_REGNUM
:
475 case SIM_ARM_FP7_REGNUM
:
476 case SIM_ARM_FPS_REGNUM
:
477 ARMul_SetReg (state
, state
->Mode
, rn
, frommem (state
, memory
));
480 case SIM_ARM_PS_REGNUM
:
481 state
->Cpsr
= frommem (state
, memory
);
482 ARMul_CPSRAltered (state
);
485 case SIM_ARM_MAVERIC_COP0R0_REGNUM
:
486 case SIM_ARM_MAVERIC_COP0R1_REGNUM
:
487 case SIM_ARM_MAVERIC_COP0R2_REGNUM
:
488 case SIM_ARM_MAVERIC_COP0R3_REGNUM
:
489 case SIM_ARM_MAVERIC_COP0R4_REGNUM
:
490 case SIM_ARM_MAVERIC_COP0R5_REGNUM
:
491 case SIM_ARM_MAVERIC_COP0R6_REGNUM
:
492 case SIM_ARM_MAVERIC_COP0R7_REGNUM
:
493 case SIM_ARM_MAVERIC_COP0R8_REGNUM
:
494 case SIM_ARM_MAVERIC_COP0R9_REGNUM
:
495 case SIM_ARM_MAVERIC_COP0R10_REGNUM
:
496 case SIM_ARM_MAVERIC_COP0R11_REGNUM
:
497 case SIM_ARM_MAVERIC_COP0R12_REGNUM
:
498 case SIM_ARM_MAVERIC_COP0R13_REGNUM
:
499 case SIM_ARM_MAVERIC_COP0R14_REGNUM
:
500 case SIM_ARM_MAVERIC_COP0R15_REGNUM
:
501 memcpy (& DSPregs
[rn
- SIM_ARM_MAVERIC_COP0R0_REGNUM
],
502 memory
, sizeof (struct maverick_regs
));
503 return sizeof (struct maverick_regs
);
505 case SIM_ARM_MAVERIC_DSPSC_REGNUM
:
506 memcpy (&DSPsc
, memory
, sizeof DSPsc
);
509 case SIM_ARM_IWMMXT_COP0R0_REGNUM
:
510 case SIM_ARM_IWMMXT_COP0R1_REGNUM
:
511 case SIM_ARM_IWMMXT_COP0R2_REGNUM
:
512 case SIM_ARM_IWMMXT_COP0R3_REGNUM
:
513 case SIM_ARM_IWMMXT_COP0R4_REGNUM
:
514 case SIM_ARM_IWMMXT_COP0R5_REGNUM
:
515 case SIM_ARM_IWMMXT_COP0R6_REGNUM
:
516 case SIM_ARM_IWMMXT_COP0R7_REGNUM
:
517 case SIM_ARM_IWMMXT_COP0R8_REGNUM
:
518 case SIM_ARM_IWMMXT_COP0R9_REGNUM
:
519 case SIM_ARM_IWMMXT_COP0R10_REGNUM
:
520 case SIM_ARM_IWMMXT_COP0R11_REGNUM
:
521 case SIM_ARM_IWMMXT_COP0R12_REGNUM
:
522 case SIM_ARM_IWMMXT_COP0R13_REGNUM
:
523 case SIM_ARM_IWMMXT_COP0R14_REGNUM
:
524 case SIM_ARM_IWMMXT_COP0R15_REGNUM
:
525 case SIM_ARM_IWMMXT_COP1R0_REGNUM
:
526 case SIM_ARM_IWMMXT_COP1R1_REGNUM
:
527 case SIM_ARM_IWMMXT_COP1R2_REGNUM
:
528 case SIM_ARM_IWMMXT_COP1R3_REGNUM
:
529 case SIM_ARM_IWMMXT_COP1R4_REGNUM
:
530 case SIM_ARM_IWMMXT_COP1R5_REGNUM
:
531 case SIM_ARM_IWMMXT_COP1R6_REGNUM
:
532 case SIM_ARM_IWMMXT_COP1R7_REGNUM
:
533 case SIM_ARM_IWMMXT_COP1R8_REGNUM
:
534 case SIM_ARM_IWMMXT_COP1R9_REGNUM
:
535 case SIM_ARM_IWMMXT_COP1R10_REGNUM
:
536 case SIM_ARM_IWMMXT_COP1R11_REGNUM
:
537 case SIM_ARM_IWMMXT_COP1R12_REGNUM
:
538 case SIM_ARM_IWMMXT_COP1R13_REGNUM
:
539 case SIM_ARM_IWMMXT_COP1R14_REGNUM
:
540 case SIM_ARM_IWMMXT_COP1R15_REGNUM
:
541 return Store_Iwmmxt_Register (rn
- SIM_ARM_IWMMXT_COP0R0_REGNUM
, memory
);
551 sim_fetch_register (SIM_DESC sd ATTRIBUTE_UNUSED
,
553 unsigned char *memory
,
561 switch ((enum sim_arm_regs
) rn
)
563 case SIM_ARM_R0_REGNUM
:
564 case SIM_ARM_R1_REGNUM
:
565 case SIM_ARM_R2_REGNUM
:
566 case SIM_ARM_R3_REGNUM
:
567 case SIM_ARM_R4_REGNUM
:
568 case SIM_ARM_R5_REGNUM
:
569 case SIM_ARM_R6_REGNUM
:
570 case SIM_ARM_R7_REGNUM
:
571 case SIM_ARM_R8_REGNUM
:
572 case SIM_ARM_R9_REGNUM
:
573 case SIM_ARM_R10_REGNUM
:
574 case SIM_ARM_R11_REGNUM
:
575 case SIM_ARM_R12_REGNUM
:
576 case SIM_ARM_R13_REGNUM
:
577 case SIM_ARM_R14_REGNUM
:
578 case SIM_ARM_R15_REGNUM
: /* PC */
579 regval
= ARMul_GetReg (state
, state
->Mode
, rn
);
582 case SIM_ARM_FP0_REGNUM
:
583 case SIM_ARM_FP1_REGNUM
:
584 case SIM_ARM_FP2_REGNUM
:
585 case SIM_ARM_FP3_REGNUM
:
586 case SIM_ARM_FP4_REGNUM
:
587 case SIM_ARM_FP5_REGNUM
:
588 case SIM_ARM_FP6_REGNUM
:
589 case SIM_ARM_FP7_REGNUM
:
590 case SIM_ARM_FPS_REGNUM
:
591 memset (memory
, 0, length
);
594 case SIM_ARM_PS_REGNUM
:
595 regval
= ARMul_GetCPSR (state
);
598 case SIM_ARM_MAVERIC_COP0R0_REGNUM
:
599 case SIM_ARM_MAVERIC_COP0R1_REGNUM
:
600 case SIM_ARM_MAVERIC_COP0R2_REGNUM
:
601 case SIM_ARM_MAVERIC_COP0R3_REGNUM
:
602 case SIM_ARM_MAVERIC_COP0R4_REGNUM
:
603 case SIM_ARM_MAVERIC_COP0R5_REGNUM
:
604 case SIM_ARM_MAVERIC_COP0R6_REGNUM
:
605 case SIM_ARM_MAVERIC_COP0R7_REGNUM
:
606 case SIM_ARM_MAVERIC_COP0R8_REGNUM
:
607 case SIM_ARM_MAVERIC_COP0R9_REGNUM
:
608 case SIM_ARM_MAVERIC_COP0R10_REGNUM
:
609 case SIM_ARM_MAVERIC_COP0R11_REGNUM
:
610 case SIM_ARM_MAVERIC_COP0R12_REGNUM
:
611 case SIM_ARM_MAVERIC_COP0R13_REGNUM
:
612 case SIM_ARM_MAVERIC_COP0R14_REGNUM
:
613 case SIM_ARM_MAVERIC_COP0R15_REGNUM
:
614 memcpy (memory
, & DSPregs
[rn
- SIM_ARM_MAVERIC_COP0R0_REGNUM
],
615 sizeof (struct maverick_regs
));
616 return sizeof (struct maverick_regs
);
618 case SIM_ARM_MAVERIC_DSPSC_REGNUM
:
619 memcpy (memory
, & DSPsc
, sizeof DSPsc
);
622 case SIM_ARM_IWMMXT_COP0R0_REGNUM
:
623 case SIM_ARM_IWMMXT_COP0R1_REGNUM
:
624 case SIM_ARM_IWMMXT_COP0R2_REGNUM
:
625 case SIM_ARM_IWMMXT_COP0R3_REGNUM
:
626 case SIM_ARM_IWMMXT_COP0R4_REGNUM
:
627 case SIM_ARM_IWMMXT_COP0R5_REGNUM
:
628 case SIM_ARM_IWMMXT_COP0R6_REGNUM
:
629 case SIM_ARM_IWMMXT_COP0R7_REGNUM
:
630 case SIM_ARM_IWMMXT_COP0R8_REGNUM
:
631 case SIM_ARM_IWMMXT_COP0R9_REGNUM
:
632 case SIM_ARM_IWMMXT_COP0R10_REGNUM
:
633 case SIM_ARM_IWMMXT_COP0R11_REGNUM
:
634 case SIM_ARM_IWMMXT_COP0R12_REGNUM
:
635 case SIM_ARM_IWMMXT_COP0R13_REGNUM
:
636 case SIM_ARM_IWMMXT_COP0R14_REGNUM
:
637 case SIM_ARM_IWMMXT_COP0R15_REGNUM
:
638 case SIM_ARM_IWMMXT_COP1R0_REGNUM
:
639 case SIM_ARM_IWMMXT_COP1R1_REGNUM
:
640 case SIM_ARM_IWMMXT_COP1R2_REGNUM
:
641 case SIM_ARM_IWMMXT_COP1R3_REGNUM
:
642 case SIM_ARM_IWMMXT_COP1R4_REGNUM
:
643 case SIM_ARM_IWMMXT_COP1R5_REGNUM
:
644 case SIM_ARM_IWMMXT_COP1R6_REGNUM
:
645 case SIM_ARM_IWMMXT_COP1R7_REGNUM
:
646 case SIM_ARM_IWMMXT_COP1R8_REGNUM
:
647 case SIM_ARM_IWMMXT_COP1R9_REGNUM
:
648 case SIM_ARM_IWMMXT_COP1R10_REGNUM
:
649 case SIM_ARM_IWMMXT_COP1R11_REGNUM
:
650 case SIM_ARM_IWMMXT_COP1R12_REGNUM
:
651 case SIM_ARM_IWMMXT_COP1R13_REGNUM
:
652 case SIM_ARM_IWMMXT_COP1R14_REGNUM
:
653 case SIM_ARM_IWMMXT_COP1R15_REGNUM
:
654 return Fetch_Iwmmxt_Register (rn
- SIM_ARM_IWMMXT_COP0R0_REGNUM
, memory
);
662 tomem (state
, memory
, regval
);
675 unsigned int swi_mask
;
678 #define SWI_SWITCH "--swi-support"
680 static swi_options options
[] =
683 { "demon", SWI_MASK_DEMON
},
684 { "angel", SWI_MASK_ANGEL
},
685 { "redboot", SWI_MASK_REDBOOT
},
688 { "DEMON", SWI_MASK_DEMON
},
689 { "ANGEL", SWI_MASK_ANGEL
},
690 { "REDBOOT", SWI_MASK_REDBOOT
},
696 sim_target_parse_command_line (int argc
, char ** argv
)
700 for (i
= 1; i
< argc
; i
++)
702 char * ptr
= argv
[i
];
705 if ((ptr
== NULL
) || (* ptr
!= '-'))
708 if (strcmp (ptr
, "-t") == 0)
714 if (strcmp (ptr
, "-z") == 0)
716 /* Remove this option from the argv array. */
717 for (arg
= i
; arg
< argc
; arg
++)
718 argv
[arg
] = argv
[arg
+ 1];
725 if (strcmp (ptr
, "-d") == 0)
727 /* Remove this option from the argv array. */
728 for (arg
= i
; arg
< argc
; arg
++)
729 argv
[arg
] = argv
[arg
+ 1];
736 if (strncmp (ptr
, SWI_SWITCH
, sizeof SWI_SWITCH
- 1) != 0)
739 if (ptr
[sizeof SWI_SWITCH
- 1] == 0)
741 /* Remove this option from the argv array. */
742 for (arg
= i
; arg
< argc
; arg
++)
743 argv
[arg
] = argv
[arg
+ 1];
749 ptr
+= sizeof SWI_SWITCH
;
757 for (i
= sizeof options
/ sizeof options
[0]; i
--;)
758 if (strncmp (ptr
, options
[i
].swi_option
,
759 strlen (options
[i
].swi_option
)) == 0)
761 swi_mask
|= options
[i
].swi_mask
;
762 ptr
+= strlen (options
[i
].swi_option
);
775 fprintf (stderr
, "Ignoring swi options: %s\n", ptr
);
777 /* Remove this option from the argv array. */
778 for (arg
= i
; arg
< argc
; arg
++)
779 argv
[arg
] = argv
[arg
+ 1];
787 sim_target_parse_arg_array (char ** argv
)
791 for (i
= 0; argv
[i
]; i
++)
794 sim_target_parse_command_line (i
, argv
);
798 arm_pc_get (sim_cpu
*cpu
)
804 arm_pc_set (sim_cpu
*cpu
, sim_cia pc
)
806 ARMul_SetPC (state
, pc
);
810 free_state (SIM_DESC sd
)
812 if (STATE_MODULES (sd
) != NULL
)
813 sim_module_uninstall (sd
);
814 sim_cpu_free_all (sd
);
819 sim_open (SIM_OPEN_KIND kind
,
825 SIM_DESC sd
= sim_state_alloc (kind
, cb
);
826 SIM_ASSERT (STATE_MAGIC (sd
) == SIM_MAGIC_NUMBER
);
828 /* The cpu data is kept in a separately allocated chunk of memory. */
829 if (sim_cpu_alloc_all (sd
, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK
)
835 if (sim_pre_argv_init (sd
, argv
[0]) != SIM_RC_OK
)
841 /* getopt will print the error message so we just have to exit if this fails.
842 FIXME: Hmmm... in the case of gdb we need getopt to call
844 if (sim_parse_args (sd
, argv
) != SIM_RC_OK
)
850 /* Check for/establish the a reference program image. */
851 if (sim_analyze_program (sd
,
852 (STATE_PROG_ARGV (sd
) != NULL
853 ? *STATE_PROG_ARGV (sd
)
854 : NULL
), abfd
) != SIM_RC_OK
)
860 /* Configure/verify the target byte order and other runtime
861 configuration options. */
862 if (sim_config (sd
) != SIM_RC_OK
)
864 sim_module_uninstall (sd
);
868 if (sim_post_argv_init (sd
) != SIM_RC_OK
)
870 /* Uninstall the modules to avoid memory leaks,
871 file descriptor leaks, etc. */
872 sim_module_uninstall (sd
);
876 /* CPU specific initialization. */
877 for (i
= 0; i
< MAX_NR_PROCESSORS
; ++i
)
879 SIM_CPU
*cpu
= STATE_CPU (sd
, i
);
881 CPU_PC_FETCH (cpu
) = arm_pc_get
;
882 CPU_PC_STORE (cpu
) = arm_pc_set
;
887 sim_target_parse_arg_array (argv
);
893 /* Scan for memory-size switches. */
894 for (i
= 0; (argv
[i
] != NULL
) && (argv
[i
][0] != 0); i
++)
895 if (argv
[i
][0] == '-' && argv
[i
][1] == 'm')
897 if (argv
[i
][2] != '\0')
898 mem_size
= atoi (&argv
[i
][2]);
899 else if (argv
[i
+ 1] != NULL
)
901 mem_size
= atoi (argv
[i
+ 1]);
906 sim_callback
->printf_filtered (sim_callback
,
907 "Missing argument to -m option\n");
917 sim_stop_reason (SIM_DESC sd ATTRIBUTE_UNUSED
,
918 enum sim_stop
*reason
,
923 *reason
= sim_stopped
;
924 *sigrc
= GDB_SIGNAL_INT
;
926 else if (state
->EndCondition
== 0)
928 *reason
= sim_exited
;
929 *sigrc
= state
->Reg
[0] & 255;
933 *reason
= sim_stopped
;
934 if (state
->EndCondition
== RDIError_BreakpointReached
)
935 *sigrc
= GDB_SIGNAL_TRAP
;
936 else if ( state
->EndCondition
== RDIError_DataAbort
937 || state
->EndCondition
== RDIError_AddressException
)
938 *sigrc
= GDB_SIGNAL_BUS
;