1 /* run front end support for arm
2 Copyright (C) 1995-2015 Free Software Foundation, Inc.
4 This file is part of ARM SIM.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 /* This file provides the interface between the simulator and
20 run.c and gdb (when the simulator is linked with gdb).
21 All simulator interaction should go through this file. */
29 #include "gdb/callback.h"
30 #include "gdb/remote-sim.h"
32 #include "sim-options.h"
36 #include "gdb/sim-arm.h"
37 #include "gdb/signals.h"
38 #include "libiberty.h"
41 /* TODO: This should get pulled from the SIM_DESC. */
42 host_callback
*sim_callback
;
44 /* TODO: This should get merged into sim_cpu. */
45 struct ARMul_State
*state
;
47 /* Memory size in bytes. */
48 /* TODO: Memory should be converted to the common memory module. */
49 static int mem_size
= (1 << 21);
55 /* TODO: Tracing should be converted to common tracing module. */
60 static struct disassemble_info info
;
61 static char opbuf
[1000];
64 op_printf (char *buf
, char *fmt
, ...)
70 ret
= vsprintf (opbuf
+ strlen (opbuf
), fmt
, ap
);
76 sim_dis_read (bfd_vma memaddr ATTRIBUTE_UNUSED
,
79 struct disassemble_info
* info
)
81 ARMword val
= (ARMword
) *((ARMword
*) info
->application_data
);
85 * ptr
++ = val
& 0xFF;
92 print_insn (ARMword instr
)
97 info
.application_data
= & instr
;
98 size
= print_insn_little_arm (0, & info
);
99 fprintf (stderr
, " %*s\n", size
, opbuf
);
102 /* Cirrus DSP registers.
104 We need to define these registers outside of maverick.c because
105 maverick.c might not be linked in unless --target=arm9e-* in which
106 case wrapper.c will not compile because it tries to access Cirrus
107 registers. This should all go away once we get the Cirrus and ARM
108 Coprocessor to coexist in armcopro.c-- aldyh. */
125 union maverick_acc_regs
127 long double ld
; /* Acc registers are 72-bits. */
130 struct maverick_regs DSPregs
[16];
131 union maverick_acc_regs DSPacc
[4];
141 ARMul_EmulateInit ();
142 state
= ARMul_NewState ();
143 state
->bigendSig
= (CURRENT_TARGET_BYTE_ORDER
== BIG_ENDIAN
? HIGH
: LOW
);
144 ARMul_MemoryInit (state
, mem_size
);
145 ARMul_OSInit (state
);
152 ARMul_ConsolePrint (ARMul_State
* state
,
160 va_start (ap
, format
);
161 vprintf (format
, ap
);
167 ARMul_Debug (ARMul_State
* state ATTRIBUTE_UNUSED
,
168 ARMword pc ATTRIBUTE_UNUSED
,
169 ARMword instr ATTRIBUTE_UNUSED
)
175 sim_write (SIM_DESC sd ATTRIBUTE_UNUSED
,
177 const unsigned char * buffer
,
184 for (i
= 0; i
< size
; i
++)
185 ARMul_SafeWriteByte (state
, addr
+ i
, buffer
[i
]);
191 sim_read (SIM_DESC sd ATTRIBUTE_UNUSED
,
193 unsigned char * buffer
,
200 for (i
= 0; i
< size
; i
++)
201 buffer
[i
] = ARMul_SafeReadByte (state
, addr
+ i
);
207 sim_stop (SIM_DESC sd ATTRIBUTE_UNUSED
)
209 state
->Emulate
= STOP
;
215 sim_resume (SIM_DESC sd ATTRIBUTE_UNUSED
,
217 int siggnal ATTRIBUTE_UNUSED
)
219 state
->EndCondition
= 0;
224 state
->Reg
[15] = ARMul_DoInstr (state
);
225 if (state
->EndCondition
== 0)
226 state
->EndCondition
= RDIError_BreakpointReached
;
230 state
->NextInstr
= RESUME
; /* treat as PC change */
231 state
->Reg
[15] = ARMul_DoProg (state
);
238 sim_create_inferior (SIM_DESC sd ATTRIBUTE_UNUSED
,
251 ARMul_SetPC (state
, bfd_get_start_address (abfd
));
252 mach
= bfd_get_mach (abfd
);
256 ARMul_SetPC (state
, 0); /* ??? */
263 (*sim_callback
->printf_filtered
)
265 "Unknown machine type '%d'; please update sim_create_inferior.\n",
270 /* We wouldn't set the machine type with earlier toolchains, so we
271 explicitly select a processor capable of supporting all ARMs in
273 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_v6_Prop
);
276 case bfd_mach_arm_XScale
:
277 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_XScale_Prop
| ARM_v6_Prop
);
280 case bfd_mach_arm_iWMMXt2
:
281 case bfd_mach_arm_iWMMXt
:
283 extern int SWI_vector_installed
;
286 if (! SWI_vector_installed
)
288 /* Intialise the hardware vectors to zero. */
289 if (! SWI_vector_installed
)
290 for (i
= ARMul_ResetV
; i
<= ARMFIQV
; i
+= 4)
291 ARMul_WriteWord (state
, i
, 0);
293 /* ARM_WriteWord will have detected the write to the SWI vector,
294 but we want SWI_vector_installed to remain at 0 so that thumb
295 mode breakpoints will work. */
296 SWI_vector_installed
= 0;
299 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_XScale_Prop
| ARM_iWMMXt_Prop
);
302 case bfd_mach_arm_ep9312
:
303 ARMul_SelectProcessor (state
, ARM_v4_Prop
| ARM_ep9312_Prop
);
307 if (bfd_family_coff (abfd
))
309 /* This is a special case in order to support COFF based ARM toolchains.
310 The COFF header does not have enough room to store all the different
311 kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
312 to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5
313 machine type here, we assume it could be any of the above architectures
314 and so select the most feature-full. */
315 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_XScale_Prop
);
318 /* Otherwise drop through. */
320 case bfd_mach_arm_5T
:
321 ARMul_SelectProcessor (state
, ARM_v5_Prop
);
324 case bfd_mach_arm_5TE
:
325 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
);
329 case bfd_mach_arm_4T
:
330 ARMul_SelectProcessor (state
, ARM_v4_Prop
);
334 case bfd_mach_arm_3M
:
335 ARMul_SelectProcessor (state
, ARM_Lock_Prop
);
339 case bfd_mach_arm_2a
:
340 ARMul_SelectProcessor (state
, ARM_Fix26_Prop
);
344 if ( mach
!= bfd_mach_arm_3
345 && mach
!= bfd_mach_arm_3M
346 && mach
!= bfd_mach_arm_2
347 && mach
!= bfd_mach_arm_2a
)
349 /* Reset mode to ARM. A gdb user may rerun a program that had entered
350 THUMB mode from the start and cause the ARM-mode startup code to be
351 executed in THUMB mode. */
352 ARMul_SetCPSR (state
, SVC32MODE
);
355 memset (& info
, 0, sizeof (info
));
356 INIT_DISASSEMBLE_INFO (info
, stdout
, op_printf
);
357 info
.read_memory_func
= sim_dis_read
;
358 info
.arch
= bfd_get_arch (abfd
);
359 info
.mach
= bfd_get_mach (abfd
);
360 info
.endian_code
= BFD_ENDIAN_LITTLE
;
362 info
.arch
= bfd_arch_arm
;
363 disassemble_init_for_target (& info
);
367 /* Set up the command line by laboriously stringing together
368 the environment carefully picked apart by our caller. */
370 /* Free any old stuff. */
371 if (state
->CommandLine
!= NULL
)
373 free (state
->CommandLine
);
374 state
->CommandLine
= NULL
;
377 /* See how much we need. */
378 for (arg
= argv
; *arg
!= NULL
; arg
++)
379 argvlen
+= strlen (*arg
) + 1;
382 state
->CommandLine
= malloc (argvlen
+ 1);
383 if (state
->CommandLine
!= NULL
)
386 state
->CommandLine
[0] = '\0';
388 for (arg
= argv
; *arg
!= NULL
; arg
++)
390 strcat (state
->CommandLine
, *arg
);
391 strcat (state
->CommandLine
, " ");
398 /* Now see if there's a MEMSIZE spec in the environment. */
401 if (strncmp (*env
, "MEMSIZE=", sizeof ("MEMSIZE=") - 1) == 0)
405 /* Set up memory limit. */
407 strtoul (*env
+ sizeof ("MEMSIZE=") - 1, &end_of_num
, 0);
417 frommem (struct ARMul_State
*state
, unsigned char *memory
)
419 if (state
->bigendSig
== HIGH
)
420 return (memory
[0] << 24) | (memory
[1] << 16)
421 | (memory
[2] << 8) | (memory
[3] << 0);
423 return (memory
[3] << 24) | (memory
[2] << 16)
424 | (memory
[1] << 8) | (memory
[0] << 0);
428 tomem (struct ARMul_State
*state
,
429 unsigned char *memory
,
432 if (state
->bigendSig
== HIGH
)
434 memory
[0] = val
>> 24;
435 memory
[1] = val
>> 16;
436 memory
[2] = val
>> 8;
437 memory
[3] = val
>> 0;
441 memory
[3] = val
>> 24;
442 memory
[2] = val
>> 16;
443 memory
[1] = val
>> 8;
444 memory
[0] = val
>> 0;
449 sim_store_register (SIM_DESC sd ATTRIBUTE_UNUSED
,
451 unsigned char *memory
,
456 switch ((enum sim_arm_regs
) rn
)
458 case SIM_ARM_R0_REGNUM
:
459 case SIM_ARM_R1_REGNUM
:
460 case SIM_ARM_R2_REGNUM
:
461 case SIM_ARM_R3_REGNUM
:
462 case SIM_ARM_R4_REGNUM
:
463 case SIM_ARM_R5_REGNUM
:
464 case SIM_ARM_R6_REGNUM
:
465 case SIM_ARM_R7_REGNUM
:
466 case SIM_ARM_R8_REGNUM
:
467 case SIM_ARM_R9_REGNUM
:
468 case SIM_ARM_R10_REGNUM
:
469 case SIM_ARM_R11_REGNUM
:
470 case SIM_ARM_R12_REGNUM
:
471 case SIM_ARM_R13_REGNUM
:
472 case SIM_ARM_R14_REGNUM
:
473 case SIM_ARM_R15_REGNUM
: /* PC */
474 case SIM_ARM_FP0_REGNUM
:
475 case SIM_ARM_FP1_REGNUM
:
476 case SIM_ARM_FP2_REGNUM
:
477 case SIM_ARM_FP3_REGNUM
:
478 case SIM_ARM_FP4_REGNUM
:
479 case SIM_ARM_FP5_REGNUM
:
480 case SIM_ARM_FP6_REGNUM
:
481 case SIM_ARM_FP7_REGNUM
:
482 case SIM_ARM_FPS_REGNUM
:
483 ARMul_SetReg (state
, state
->Mode
, rn
, frommem (state
, memory
));
486 case SIM_ARM_PS_REGNUM
:
487 state
->Cpsr
= frommem (state
, memory
);
488 ARMul_CPSRAltered (state
);
491 case SIM_ARM_MAVERIC_COP0R0_REGNUM
:
492 case SIM_ARM_MAVERIC_COP0R1_REGNUM
:
493 case SIM_ARM_MAVERIC_COP0R2_REGNUM
:
494 case SIM_ARM_MAVERIC_COP0R3_REGNUM
:
495 case SIM_ARM_MAVERIC_COP0R4_REGNUM
:
496 case SIM_ARM_MAVERIC_COP0R5_REGNUM
:
497 case SIM_ARM_MAVERIC_COP0R6_REGNUM
:
498 case SIM_ARM_MAVERIC_COP0R7_REGNUM
:
499 case SIM_ARM_MAVERIC_COP0R8_REGNUM
:
500 case SIM_ARM_MAVERIC_COP0R9_REGNUM
:
501 case SIM_ARM_MAVERIC_COP0R10_REGNUM
:
502 case SIM_ARM_MAVERIC_COP0R11_REGNUM
:
503 case SIM_ARM_MAVERIC_COP0R12_REGNUM
:
504 case SIM_ARM_MAVERIC_COP0R13_REGNUM
:
505 case SIM_ARM_MAVERIC_COP0R14_REGNUM
:
506 case SIM_ARM_MAVERIC_COP0R15_REGNUM
:
507 memcpy (& DSPregs
[rn
- SIM_ARM_MAVERIC_COP0R0_REGNUM
],
508 memory
, sizeof (struct maverick_regs
));
509 return sizeof (struct maverick_regs
);
511 case SIM_ARM_MAVERIC_DSPSC_REGNUM
:
512 memcpy (&DSPsc
, memory
, sizeof DSPsc
);
515 case SIM_ARM_IWMMXT_COP0R0_REGNUM
:
516 case SIM_ARM_IWMMXT_COP0R1_REGNUM
:
517 case SIM_ARM_IWMMXT_COP0R2_REGNUM
:
518 case SIM_ARM_IWMMXT_COP0R3_REGNUM
:
519 case SIM_ARM_IWMMXT_COP0R4_REGNUM
:
520 case SIM_ARM_IWMMXT_COP0R5_REGNUM
:
521 case SIM_ARM_IWMMXT_COP0R6_REGNUM
:
522 case SIM_ARM_IWMMXT_COP0R7_REGNUM
:
523 case SIM_ARM_IWMMXT_COP0R8_REGNUM
:
524 case SIM_ARM_IWMMXT_COP0R9_REGNUM
:
525 case SIM_ARM_IWMMXT_COP0R10_REGNUM
:
526 case SIM_ARM_IWMMXT_COP0R11_REGNUM
:
527 case SIM_ARM_IWMMXT_COP0R12_REGNUM
:
528 case SIM_ARM_IWMMXT_COP0R13_REGNUM
:
529 case SIM_ARM_IWMMXT_COP0R14_REGNUM
:
530 case SIM_ARM_IWMMXT_COP0R15_REGNUM
:
531 case SIM_ARM_IWMMXT_COP1R0_REGNUM
:
532 case SIM_ARM_IWMMXT_COP1R1_REGNUM
:
533 case SIM_ARM_IWMMXT_COP1R2_REGNUM
:
534 case SIM_ARM_IWMMXT_COP1R3_REGNUM
:
535 case SIM_ARM_IWMMXT_COP1R4_REGNUM
:
536 case SIM_ARM_IWMMXT_COP1R5_REGNUM
:
537 case SIM_ARM_IWMMXT_COP1R6_REGNUM
:
538 case SIM_ARM_IWMMXT_COP1R7_REGNUM
:
539 case SIM_ARM_IWMMXT_COP1R8_REGNUM
:
540 case SIM_ARM_IWMMXT_COP1R9_REGNUM
:
541 case SIM_ARM_IWMMXT_COP1R10_REGNUM
:
542 case SIM_ARM_IWMMXT_COP1R11_REGNUM
:
543 case SIM_ARM_IWMMXT_COP1R12_REGNUM
:
544 case SIM_ARM_IWMMXT_COP1R13_REGNUM
:
545 case SIM_ARM_IWMMXT_COP1R14_REGNUM
:
546 case SIM_ARM_IWMMXT_COP1R15_REGNUM
:
547 return Store_Iwmmxt_Register (rn
- SIM_ARM_IWMMXT_COP0R0_REGNUM
, memory
);
557 sim_fetch_register (SIM_DESC sd ATTRIBUTE_UNUSED
,
559 unsigned char *memory
,
567 switch ((enum sim_arm_regs
) rn
)
569 case SIM_ARM_R0_REGNUM
:
570 case SIM_ARM_R1_REGNUM
:
571 case SIM_ARM_R2_REGNUM
:
572 case SIM_ARM_R3_REGNUM
:
573 case SIM_ARM_R4_REGNUM
:
574 case SIM_ARM_R5_REGNUM
:
575 case SIM_ARM_R6_REGNUM
:
576 case SIM_ARM_R7_REGNUM
:
577 case SIM_ARM_R8_REGNUM
:
578 case SIM_ARM_R9_REGNUM
:
579 case SIM_ARM_R10_REGNUM
:
580 case SIM_ARM_R11_REGNUM
:
581 case SIM_ARM_R12_REGNUM
:
582 case SIM_ARM_R13_REGNUM
:
583 case SIM_ARM_R14_REGNUM
:
584 case SIM_ARM_R15_REGNUM
: /* PC */
585 regval
= ARMul_GetReg (state
, state
->Mode
, rn
);
588 case SIM_ARM_FP0_REGNUM
:
589 case SIM_ARM_FP1_REGNUM
:
590 case SIM_ARM_FP2_REGNUM
:
591 case SIM_ARM_FP3_REGNUM
:
592 case SIM_ARM_FP4_REGNUM
:
593 case SIM_ARM_FP5_REGNUM
:
594 case SIM_ARM_FP6_REGNUM
:
595 case SIM_ARM_FP7_REGNUM
:
596 case SIM_ARM_FPS_REGNUM
:
597 memset (memory
, 0, length
);
600 case SIM_ARM_PS_REGNUM
:
601 regval
= ARMul_GetCPSR (state
);
604 case SIM_ARM_MAVERIC_COP0R0_REGNUM
:
605 case SIM_ARM_MAVERIC_COP0R1_REGNUM
:
606 case SIM_ARM_MAVERIC_COP0R2_REGNUM
:
607 case SIM_ARM_MAVERIC_COP0R3_REGNUM
:
608 case SIM_ARM_MAVERIC_COP0R4_REGNUM
:
609 case SIM_ARM_MAVERIC_COP0R5_REGNUM
:
610 case SIM_ARM_MAVERIC_COP0R6_REGNUM
:
611 case SIM_ARM_MAVERIC_COP0R7_REGNUM
:
612 case SIM_ARM_MAVERIC_COP0R8_REGNUM
:
613 case SIM_ARM_MAVERIC_COP0R9_REGNUM
:
614 case SIM_ARM_MAVERIC_COP0R10_REGNUM
:
615 case SIM_ARM_MAVERIC_COP0R11_REGNUM
:
616 case SIM_ARM_MAVERIC_COP0R12_REGNUM
:
617 case SIM_ARM_MAVERIC_COP0R13_REGNUM
:
618 case SIM_ARM_MAVERIC_COP0R14_REGNUM
:
619 case SIM_ARM_MAVERIC_COP0R15_REGNUM
:
620 memcpy (memory
, & DSPregs
[rn
- SIM_ARM_MAVERIC_COP0R0_REGNUM
],
621 sizeof (struct maverick_regs
));
622 return sizeof (struct maverick_regs
);
624 case SIM_ARM_MAVERIC_DSPSC_REGNUM
:
625 memcpy (memory
, & DSPsc
, sizeof DSPsc
);
628 case SIM_ARM_IWMMXT_COP0R0_REGNUM
:
629 case SIM_ARM_IWMMXT_COP0R1_REGNUM
:
630 case SIM_ARM_IWMMXT_COP0R2_REGNUM
:
631 case SIM_ARM_IWMMXT_COP0R3_REGNUM
:
632 case SIM_ARM_IWMMXT_COP0R4_REGNUM
:
633 case SIM_ARM_IWMMXT_COP0R5_REGNUM
:
634 case SIM_ARM_IWMMXT_COP0R6_REGNUM
:
635 case SIM_ARM_IWMMXT_COP0R7_REGNUM
:
636 case SIM_ARM_IWMMXT_COP0R8_REGNUM
:
637 case SIM_ARM_IWMMXT_COP0R9_REGNUM
:
638 case SIM_ARM_IWMMXT_COP0R10_REGNUM
:
639 case SIM_ARM_IWMMXT_COP0R11_REGNUM
:
640 case SIM_ARM_IWMMXT_COP0R12_REGNUM
:
641 case SIM_ARM_IWMMXT_COP0R13_REGNUM
:
642 case SIM_ARM_IWMMXT_COP0R14_REGNUM
:
643 case SIM_ARM_IWMMXT_COP0R15_REGNUM
:
644 case SIM_ARM_IWMMXT_COP1R0_REGNUM
:
645 case SIM_ARM_IWMMXT_COP1R1_REGNUM
:
646 case SIM_ARM_IWMMXT_COP1R2_REGNUM
:
647 case SIM_ARM_IWMMXT_COP1R3_REGNUM
:
648 case SIM_ARM_IWMMXT_COP1R4_REGNUM
:
649 case SIM_ARM_IWMMXT_COP1R5_REGNUM
:
650 case SIM_ARM_IWMMXT_COP1R6_REGNUM
:
651 case SIM_ARM_IWMMXT_COP1R7_REGNUM
:
652 case SIM_ARM_IWMMXT_COP1R8_REGNUM
:
653 case SIM_ARM_IWMMXT_COP1R9_REGNUM
:
654 case SIM_ARM_IWMMXT_COP1R10_REGNUM
:
655 case SIM_ARM_IWMMXT_COP1R11_REGNUM
:
656 case SIM_ARM_IWMMXT_COP1R12_REGNUM
:
657 case SIM_ARM_IWMMXT_COP1R13_REGNUM
:
658 case SIM_ARM_IWMMXT_COP1R14_REGNUM
:
659 case SIM_ARM_IWMMXT_COP1R15_REGNUM
:
660 return Fetch_Iwmmxt_Register (rn
- SIM_ARM_IWMMXT_COP0R0_REGNUM
, memory
);
668 tomem (state
, memory
, regval
);
681 unsigned int swi_mask
;
684 #define SWI_SWITCH "--swi-support"
686 static swi_options options
[] =
689 { "demon", SWI_MASK_DEMON
},
690 { "angel", SWI_MASK_ANGEL
},
691 { "redboot", SWI_MASK_REDBOOT
},
694 { "DEMON", SWI_MASK_DEMON
},
695 { "ANGEL", SWI_MASK_ANGEL
},
696 { "REDBOOT", SWI_MASK_REDBOOT
},
702 sim_target_parse_command_line (int argc
, char ** argv
)
706 for (i
= 1; i
< argc
; i
++)
708 char * ptr
= argv
[i
];
711 if ((ptr
== NULL
) || (* ptr
!= '-'))
714 if (strcmp (ptr
, "-t") == 0)
720 if (strcmp (ptr
, "-z") == 0)
722 /* Remove this option from the argv array. */
723 for (arg
= i
; arg
< argc
; arg
++)
724 argv
[arg
] = argv
[arg
+ 1];
731 if (strcmp (ptr
, "-d") == 0)
733 /* Remove this option from the argv array. */
734 for (arg
= i
; arg
< argc
; arg
++)
735 argv
[arg
] = argv
[arg
+ 1];
742 if (strncmp (ptr
, SWI_SWITCH
, sizeof SWI_SWITCH
- 1) != 0)
745 if (ptr
[sizeof SWI_SWITCH
- 1] == 0)
747 /* Remove this option from the argv array. */
748 for (arg
= i
; arg
< argc
; arg
++)
749 argv
[arg
] = argv
[arg
+ 1];
755 ptr
+= sizeof SWI_SWITCH
;
763 for (i
= sizeof options
/ sizeof options
[0]; i
--;)
764 if (strncmp (ptr
, options
[i
].swi_option
,
765 strlen (options
[i
].swi_option
)) == 0)
767 swi_mask
|= options
[i
].swi_mask
;
768 ptr
+= strlen (options
[i
].swi_option
);
781 fprintf (stderr
, "Ignoring swi options: %s\n", ptr
);
783 /* Remove this option from the argv array. */
784 for (arg
= i
; arg
< argc
; arg
++)
785 argv
[arg
] = argv
[arg
+ 1];
793 sim_target_parse_arg_array (char ** argv
)
797 for (i
= 0; argv
[i
]; i
++)
800 sim_target_parse_command_line (i
, argv
);
804 arm_pc_get (sim_cpu
*cpu
)
810 arm_pc_set (sim_cpu
*cpu
, sim_cia pc
)
812 ARMul_SetPC (state
, pc
);
816 free_state (SIM_DESC sd
)
818 if (STATE_MODULES (sd
) != NULL
)
819 sim_module_uninstall (sd
);
820 sim_cpu_free_all (sd
);
825 sim_open (SIM_OPEN_KIND kind
,
831 SIM_DESC sd
= sim_state_alloc (kind
, cb
);
832 SIM_ASSERT (STATE_MAGIC (sd
) == SIM_MAGIC_NUMBER
);
834 /* The cpu data is kept in a separately allocated chunk of memory. */
835 if (sim_cpu_alloc_all (sd
, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK
)
841 if (sim_pre_argv_init (sd
, argv
[0]) != SIM_RC_OK
)
847 /* getopt will print the error message so we just have to exit if this fails.
848 FIXME: Hmmm... in the case of gdb we need getopt to call
850 if (sim_parse_args (sd
, argv
) != SIM_RC_OK
)
856 /* Check for/establish the a reference program image. */
857 if (sim_analyze_program (sd
,
858 (STATE_PROG_ARGV (sd
) != NULL
859 ? *STATE_PROG_ARGV (sd
)
860 : NULL
), abfd
) != SIM_RC_OK
)
866 /* Configure/verify the target byte order and other runtime
867 configuration options. */
868 if (sim_config (sd
) != SIM_RC_OK
)
870 sim_module_uninstall (sd
);
874 if (sim_post_argv_init (sd
) != SIM_RC_OK
)
876 /* Uninstall the modules to avoid memory leaks,
877 file descriptor leaks, etc. */
878 sim_module_uninstall (sd
);
882 /* CPU specific initialization. */
883 for (i
= 0; i
< MAX_NR_PROCESSORS
; ++i
)
885 SIM_CPU
*cpu
= STATE_CPU (sd
, i
);
887 CPU_PC_FETCH (cpu
) = arm_pc_get
;
888 CPU_PC_STORE (cpu
) = arm_pc_set
;
893 sim_target_parse_arg_array (argv
);
899 /* Scan for memory-size switches. */
900 for (i
= 0; (argv
[i
] != NULL
) && (argv
[i
][0] != 0); i
++)
901 if (argv
[i
][0] == '-' && argv
[i
][1] == 'm')
903 if (argv
[i
][2] != '\0')
904 mem_size
= atoi (&argv
[i
][2]);
905 else if (argv
[i
+ 1] != NULL
)
907 mem_size
= atoi (argv
[i
+ 1]);
912 sim_callback
->printf_filtered (sim_callback
,
913 "Missing argument to -m option\n");
924 sim_close (SIM_DESC sd ATTRIBUTE_UNUSED
,
925 int quitting ATTRIBUTE_UNUSED
)
931 sim_stop_reason (SIM_DESC sd ATTRIBUTE_UNUSED
,
932 enum sim_stop
*reason
,
937 *reason
= sim_stopped
;
938 *sigrc
= GDB_SIGNAL_INT
;
940 else if (state
->EndCondition
== 0)
942 *reason
= sim_exited
;
943 *sigrc
= state
->Reg
[0] & 255;
947 *reason
= sim_stopped
;
948 if (state
->EndCondition
== RDIError_BreakpointReached
)
949 *sigrc
= GDB_SIGNAL_TRAP
;
950 else if ( state
->EndCondition
== RDIError_DataAbort
951 || state
->EndCondition
== RDIError_AddressException
)
952 *sigrc
= GDB_SIGNAL_BUS
;