302externintfrvbf_model_fr550_u_media_4_quad(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintieven*/, INT /*FRintjeven*/, INT /*ACC40Sk*/, INT /*ACC40Uk*/);
303externintfrvbf_model_fr550_u_media_4_add_sub_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
304externintfrvbf_model_fr550_u_media_4_add_sub(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
305externintfrvbf_model_fr550_u_media_4_acc_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
306externintfrvbf_model_fr550_u_media_4_acc(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
307externintfrvbf_model_fr550_u_media_4(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*ACC40Sk*/, INT /*ACC40Uk*/);
308externintfrvbf_model_fr550_u_media_set(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintk*/);
310externintfrvbf_model_fr550_u_media_3_wtacc(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*ACC40Sk*/);
311externintfrvbf_model_fr550_u_media_3_acc_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*FRintkeven*/);
312externintfrvbf_model_fr550_u_media_3_acc(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintj*/, INT /*ACC40Si*/, INT /*FRintk*/);
313externintfrvbf_model_fr550_u_media_3_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintk*/);
314externintfrvbf_model_fr550_u_media_dual_expand(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintkeven*/);
315externintfrvbf_model_fr550_u_media_quad(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintieven*/, INT /*FRintjeven*/, INT /*FRintkeven*/);
316externintfrvbf_model_fr550_u_media(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
317externintfrvbf_model_fr550_u_float_convert(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRj*/, INT /*FRintj*/, INT /*FRdoublej*/, INT /*FRk*/, INT /*FRintk*/, INT /*FRdoublek*/);
318externintfrvbf_model_fr550_u_commit(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRk*/, INT /*FRk*/);
319externintfrvbf_model_fr550_u_dcul(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/);
320externintfrvbf_model_fr550_u_icul(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/);
321externintfrvbf_model_fr550_u_dcpl(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/);
322externintfrvbf_model_fr550_u_icpl(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/);
323externintfrvbf_model_fr550_u_dcf(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/);
324externintfrvbf_model_fr550_u_dci(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/);
325externintfrvbf_model_fr550_u_ici(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/);
326externintfrvbf_model_fr550_u_clrfr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRk*/);
327externintfrvbf_model_fr550_u_clrgr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRk*/);
328externintfrvbf_model_fr550_u_fr2fr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRk*/);
329externintfrvbf_model_fr550_u_swap(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/);
330externintfrvbf_model_fr550_u_fr_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*FRintk*/, INT /*FRdoublek*/);
331externintfrvbf_model_fr550_u_fr_load(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*FRintk*/, INT /*FRdoublek*/);
332externintfrvbf_model_fr550_u_gr_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*GRdoublek*/);
333externintfrvbf_model_fr550_u_gr_load(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*GRdoublek*/);
334externintfrvbf_model_fr550_u_set_hilo(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRkhi*/, INT /*GRklo*/);
335externintfrvbf_model_fr550_u_gr2spr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRj*/, INT /*spr*/);
336externintfrvbf_model_fr550_u_spr2gr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*spr*/, INT /*GRj*/);
337externintfrvbf_model_fr550_u_gr2fr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRj*/, INT /*FRintk*/);
338externintfrvbf_model_fr550_u_fr2gr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintk*/, INT /*GRj*/);
339externintfrvbf_model_fr550_u_float_dual_compare(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FCCi_2*/);
340externintfrvbf_model_fr550_u_float_compare(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FRdoublei*/, INT /*FRdoublej*/, INT /*FCCi_2*/);
341externintfrvbf_model_fr550_u_float_sqrt(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRj*/, INT /*FRdoublej*/, INT /*FRk*/, INT /*FRdoublek*/);
342externintfrvbf_model_fr550_u_float_div(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FRk*/);
343externintfrvbf_model_fr550_u_float_dual_arith(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FRdoublei*/, INT /*FRdoublej*/, INT /*FRk*/, INT /*FRdoublek*/);
344externintfrvbf_model_fr550_u_float_arith(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FRdoublei*/, INT /*FRdoublej*/, INT /*FRk*/, INT /*FRdoublek*/);
345externintfrvbf_model_fr550_u_check(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ICCi_3*/, INT /*FCCi_3*/);
346externintfrvbf_model_fr550_u_trap(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*ICCi_2*/, INT /*FCCi_2*/);
347externintfrvbf_model_fr550_u_branch(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*ICCi_2*/, INT /*FCCi_2*/);
348externintfrvbf_model_fr550_u_idiv(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*ICCi_1*/);
349externintfrvbf_model_fr550_u_imul(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRdoublek*/, INT /*ICCi_1*/);
350externintfrvbf_model_fr550_u_integer(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*ICCi_1*/);
362externintfrvbf_model_fr500_u_media_dual_btohe(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintj*/, INT /*FRintk*/);
363externintfrvbf_model_fr500_u_media_dual_htob(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintj*/, INT /*FRintk*/);
364externintfrvbf_model_fr500_u_media_dual_btoh(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintj*/, INT /*FRintk*/);
365externintfrvbf_model_fr500_u_media_dual_unpack(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintk*/);
366externintfrvbf_model_fr500_u_media_dual_expand(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintk*/);
367externintfrvbf_model_fr500_u_media_quad_complex(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*ACC40Sk*/);
368externintfrvbf_model_fr500_u_media_quad_mul(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*ACC40Sk*/, INT /*ACC40Uk*/);
369externintfrvbf_model_fr500_u_media_dual_mul(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*ACC40Sk*/, INT /*ACC40Uk*/);
370externintfrvbf_model_fr500_u_media_quad_arith(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
371externintfrvbf_model_fr500_u_media(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*ACC40Si*/, INT /*ACCGi*/, INT /*FRintk*/, INT /*ACC40Sk*/, INT /*ACC40Uk*/, INT /*ACCGk*/);
372externintfrvbf_model_fr500_u_float_dual_convert(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRj*/, INT /*FRintj*/, INT /*FRk*/, INT /*FRintk*/);
373externintfrvbf_model_fr500_u_float_convert(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRj*/, INT /*FRintj*/, INT /*FRdoublej*/, INT /*FRk*/, INT /*FRintk*/, INT /*FRdoublek*/);
374externintfrvbf_model_fr500_u_float_dual_compare(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FCCi_2*/);
375externintfrvbf_model_fr500_u_float_compare(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FRdoublei*/, INT /*FRdoublej*/, INT /*FCCi_2*/);
376externintfrvbf_model_fr500_u_float_dual_sqrt(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRj*/, INT /*FRk*/);
377externintfrvbf_model_fr500_u_float_sqrt(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRj*/, INT /*FRdoublej*/, INT /*FRk*/, INT /*FRdoublek*/);
378externintfrvbf_model_fr500_u_float_div(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FRk*/);
379externintfrvbf_model_fr500_u_float_dual_arith(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FRdoublei*/, INT /*FRdoublej*/, INT /*FRk*/, INT /*FRdoublek*/);
380externintfrvbf_model_fr500_u_float_arith(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRj*/, INT /*FRdoublei*/, INT /*FRdoublej*/, INT /*FRk*/, INT /*FRdoublek*/);
381externintfrvbf_model_fr500_u_gr2spr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRj*/, INT /*spr*/);
382externintfrvbf_model_fr500_u_gr2fr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRj*/, INT /*FRintk*/);
383externintfrvbf_model_fr500_u_spr2gr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*spr*/, INT /*GRj*/);
384externintfrvbf_model_fr500_u_fr2gr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintk*/, INT /*GRj*/);
385externintfrvbf_model_fr500_u_fr2fr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRi*/, INT /*FRk*/);
386externintfrvbf_model_fr500_u_swap(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/);
387externintfrvbf_model_fr500_u_fr_r_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*FRintk*/, INT /*FRdoublek*/);
388externintfrvbf_model_fr500_u_fr_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*FRintk*/, INT /*FRdoublek*/);
389externintfrvbf_model_fr500_u_fr_load(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*FRintk*/, INT /*FRdoublek*/);
390externintfrvbf_model_fr500_u_gr_r_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*GRdoublek*/);
391externintfrvbf_model_fr500_u_gr_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*GRdoublek*/);
392externintfrvbf_model_fr500_u_gr_load(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*GRdoublek*/);
393externintfrvbf_model_fr500_u_set_hilo(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRkhi*/, INT /*GRklo*/);
394externintfrvbf_model_fr500_u_clrfr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRk*/);
395externintfrvbf_model_fr500_u_clrgr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRk*/);
396externintfrvbf_model_fr500_u_check(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ICCi_3*/, INT /*FCCi_3*/);
397externintfrvbf_model_fr500_u_trap(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*ICCi_2*/, INT /*FCCi_2*/);
398externintfrvbf_model_fr500_u_branch(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*ICCi_2*/, INT /*FCCi_2*/);
399externintfrvbf_model_fr500_u_idiv(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*ICCi_1*/);
400externintfrvbf_model_fr500_u_imul(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRdoublek*/, INT /*ICCi_1*/);
401externintfrvbf_model_fr500_u_integer(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*ICCi_1*/);
413externintfrvbf_model_fr400_u_media_dual_htob(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintj*/, INT /*FRintk*/);
414externintfrvbf_model_fr400_u_media_dual_expand(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintk*/);
415externintfrvbf_model_fr400_u_media_7(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FCCk*/);
416externintfrvbf_model_fr400_u_media_6(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintk*/);
417externintfrvbf_model_fr400_u_media_4_acc_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*FRintk*/);
418externintfrvbf_model_fr400_u_media_4_accg(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACCGi*/, INT /*FRinti*/, INT /*ACCGk*/, INT /*FRintk*/);
419externintfrvbf_model_fr400_u_media_4(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*FRintj*/, INT /*ACC40Sk*/, INT /*FRintk*/);
420externintfrvbf_model_fr400_u_media_3_quad(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
421externintfrvbf_model_fr400_u_media_3_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintk*/);
422externintfrvbf_model_fr400_u_media_3(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
423externintfrvbf_model_fr400_u_media_2_add_sub_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
424externintfrvbf_model_fr400_u_media_2_add_sub(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
425externintfrvbf_model_fr400_u_media_2_acc_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
426externintfrvbf_model_fr400_u_media_2_acc(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
427externintfrvbf_model_fr400_u_media_2_quad(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*ACC40Sk*/, INT /*ACC40Uk*/);
428externintfrvbf_model_fr400_u_media_2(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*ACC40Sk*/, INT /*ACC40Uk*/);
429externintfrvbf_model_fr400_u_media_hilo(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRkhi*/, INT /*FRklo*/);
430externintfrvbf_model_fr400_u_media_1_quad(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
431externintfrvbf_model_fr400_u_media_1(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
432externintfrvbf_model_fr400_u_gr2spr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRj*/, INT /*spr*/);
433externintfrvbf_model_fr400_u_gr2fr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRj*/, INT /*FRintk*/);
434externintfrvbf_model_fr400_u_spr2gr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*spr*/, INT /*GRj*/);
435externintfrvbf_model_fr400_u_fr2gr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintk*/, INT /*GRj*/);
436externintfrvbf_model_fr400_u_swap(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/);
437externintfrvbf_model_fr400_u_fr_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*FRintk*/, INT /*FRdoublek*/);
438externintfrvbf_model_fr400_u_fr_load(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*FRintk*/, INT /*FRdoublek*/);
439externintfrvbf_model_fr400_u_gr_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*GRdoublek*/);
440externintfrvbf_model_fr400_u_gr_load(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*GRdoublek*/);
441externintfrvbf_model_fr400_u_set_hilo(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRkhi*/, INT /*GRklo*/);
442externintfrvbf_model_fr400_u_check(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ICCi_3*/, INT /*FCCi_3*/);
443externintfrvbf_model_fr400_u_trap(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*ICCi_2*/, INT /*FCCi_2*/);
444externintfrvbf_model_fr400_u_branch(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*ICCi_2*/, INT /*FCCi_2*/);
445externintfrvbf_model_fr400_u_idiv(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*ICCi_1*/);
446externintfrvbf_model_fr400_u_imul(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRdoublek*/, INT /*ICCi_1*/);
447externintfrvbf_model_fr400_u_integer(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*ICCi_1*/);
463externintfrvbf_model_fr450_u_media_4_acc_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*FRintk*/);
464externintfrvbf_model_fr450_u_media_4_accg(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACCGi*/, INT /*FRinti*/, INT /*ACCGk*/, INT /*FRintk*/);
465externintfrvbf_model_fr450_u_media_4(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*FRintj*/, INT /*ACC40Sk*/, INT /*FRintk*/);
466externintfrvbf_model_fr450_u_media_3_quad(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
467externintfrvbf_model_fr450_u_media_3_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintk*/);
468externintfrvbf_model_fr450_u_media_3(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
469externintfrvbf_model_fr450_u_media_2_add_sub_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
470externintfrvbf_model_fr450_u_media_2_add_sub(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
471externintfrvbf_model_fr450_u_media_2_acc_dual(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
472externintfrvbf_model_fr450_u_media_2_acc(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ACC40Si*/, INT /*ACC40Sk*/);
473externintfrvbf_model_fr450_u_media_2_quad(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*ACC40Sk*/, INT /*ACC40Uk*/);
474externintfrvbf_model_fr450_u_media_2(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*ACC40Sk*/, INT /*ACC40Uk*/);
475externintfrvbf_model_fr450_u_media_hilo(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRkhi*/, INT /*FRklo*/);
476externintfrvbf_model_fr450_u_media_1_quad(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
477externintfrvbf_model_fr450_u_media_1(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRinti*/, INT /*FRintj*/, INT /*FRintk*/);
478externintfrvbf_model_fr450_u_gr2spr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRj*/, INT /*spr*/);
479externintfrvbf_model_fr450_u_gr2fr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRj*/, INT /*FRintk*/);
480externintfrvbf_model_fr450_u_spr2gr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*spr*/, INT /*GRj*/);
481externintfrvbf_model_fr450_u_fr2gr(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*FRintk*/, INT /*GRj*/);
482externintfrvbf_model_fr450_u_swap(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/);
483externintfrvbf_model_fr450_u_fr_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*FRintk*/, INT /*FRdoublek*/);
484externintfrvbf_model_fr450_u_fr_load(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*FRintk*/, INT /*FRdoublek*/);
485externintfrvbf_model_fr450_u_gr_store(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*GRdoublek*/);
486externintfrvbf_model_fr450_u_gr_load(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*GRdoublek*/);
487externintfrvbf_model_fr450_u_set_hilo(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRkhi*/, INT /*GRklo*/);
488externintfrvbf_model_fr450_u_check(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*ICCi_3*/, INT /*FCCi_3*/);
489externintfrvbf_model_fr450_u_trap(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*ICCi_2*/, INT /*FCCi_2*/);
490externintfrvbf_model_fr450_u_branch(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*ICCi_2*/, INT /*FCCi_2*/);
491externintfrvbf_model_fr450_u_idiv(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*ICCi_1*/);
492externintfrvbf_model_fr450_u_imul(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRdoublek*/, INT /*ICCi_1*/);
493externintfrvbf_model_fr450_u_integer(SIM_CPU *,const IDESC *,int/*unit_num*/,int/*referenced*/, INT /*GRi*/, INT /*GRj*/, INT /*GRk*/, INT /*ICCi_1*/);