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1 /* gdb.c --- sim interface to GDB.
3 Copyright (C) 2005-2021 Free Software Foundation, Inc.
4 Contributed by Red Hat, Inc.
6 This file is part of the GNU simulators.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
30 #include "libiberty.h"
31 #include "sim/callback.h"
33 #include "gdb/signals.h"
34 #include "gdb/sim-m32c.h"
44 /* I don't want to wrap up all the minisim's data structures in an
45 object and pass that around. That'd be a big change, and neither
46 GDB nor run needs that ability.
48 So we just have one instance, that lives in global variables, and
49 each time we open it, we re-initialize it. */
55 static struct sim_state the_minisim
= {
56 "This is the sole m32c minisim instance. See libsim.a's global variables."
62 sim_open (SIM_OPEN_KIND kind
,
63 struct host_callback_struct
*callback
,
64 struct bfd
*abfd
, char * const *argv
)
68 fprintf (stderr
, "m32c minisim: re-opened sim\n");
70 /* The 'run' interface doesn't use this function, so we don't care
71 about KIND; it's always SIM_OPEN_DEBUG. */
72 if (kind
!= SIM_OPEN_DEBUG
)
73 fprintf (stderr
, "m32c minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n",
77 m32c_set_mach (bfd_get_mach (abfd
));
79 /* We can use ABFD, if non-NULL to select the appropriate
80 architecture. But we only support the r8c right now. */
82 set_callbacks (callback
);
84 /* We don't expect any command-line arguments. */
94 check_desc (SIM_DESC sd
)
96 if (sd
!= &the_minisim
)
97 fprintf (stderr
, "m32c minisim: desc != &the_minisim\n");
101 sim_close (SIM_DESC sd
, int quitting
)
105 /* Not much to do. At least free up our memory. */
112 open_objfile (const char *filename
)
114 bfd
*prog
= bfd_openr (filename
, 0);
118 fprintf (stderr
, "Can't read %s\n", filename
);
122 if (!bfd_check_format (prog
, bfd_object
))
124 fprintf (stderr
, "%s not a m32c program\n", filename
);
133 sim_load (SIM_DESC sd
, const char *prog
, struct bfd
* abfd
, int from_tty
)
138 abfd
= open_objfile (prog
);
148 sim_create_inferior (SIM_DESC sd
, struct bfd
* abfd
,
149 char * const *argv
, char * const *env
)
160 sim_read (SIM_DESC sd
, SIM_ADDR mem
, unsigned char *buf
, int length
)
167 mem_get_blk ((int) mem
, buf
, length
);
173 sim_write (SIM_DESC sd
, SIM_ADDR mem
, const unsigned char *buf
, int length
)
177 mem_put_blk ((int) mem
, buf
, length
);
183 /* Read the LENGTH bytes at BUF as an little-endian value. */
185 get_le (unsigned char *buf
, int length
)
188 while (--length
>= 0)
189 acc
= (acc
<< 8) + buf
[length
];
194 /* Store VAL as a little-endian value in the LENGTH bytes at BUF. */
196 put_le (unsigned char *buf
, int length
, DI val
)
200 for (i
= 0; i
< length
; i
++)
208 check_regno (enum m32c_sim_reg regno
)
210 return 0 <= regno
&& regno
< m32c_sim_reg_num_regs
;
214 mask_size (int addr_mask
)
225 "m32c minisim: addr_mask_size: unexpected mask 0x%x\n",
227 return sizeof (addr_mask
);
232 reg_size (enum m32c_sim_reg regno
)
236 case m32c_sim_reg_r0_bank0
:
237 case m32c_sim_reg_r1_bank0
:
238 case m32c_sim_reg_r2_bank0
:
239 case m32c_sim_reg_r3_bank0
:
240 case m32c_sim_reg_r0_bank1
:
241 case m32c_sim_reg_r1_bank1
:
242 case m32c_sim_reg_r2_bank1
:
243 case m32c_sim_reg_r3_bank1
:
244 case m32c_sim_reg_flg
:
245 case m32c_sim_reg_svf
:
248 case m32c_sim_reg_a0_bank0
:
249 case m32c_sim_reg_a1_bank0
:
250 case m32c_sim_reg_fb_bank0
:
251 case m32c_sim_reg_sb_bank0
:
252 case m32c_sim_reg_a0_bank1
:
253 case m32c_sim_reg_a1_bank1
:
254 case m32c_sim_reg_fb_bank1
:
255 case m32c_sim_reg_sb_bank1
:
256 case m32c_sim_reg_usp
:
257 case m32c_sim_reg_isp
:
258 return mask_size (addr_mask
);
260 case m32c_sim_reg_pc
:
261 case m32c_sim_reg_intb
:
262 case m32c_sim_reg_svp
:
263 case m32c_sim_reg_vct
:
264 return mask_size (membus_mask
);
266 case m32c_sim_reg_dmd0
:
267 case m32c_sim_reg_dmd1
:
270 case m32c_sim_reg_dct0
:
271 case m32c_sim_reg_dct1
:
272 case m32c_sim_reg_drc0
:
273 case m32c_sim_reg_drc1
:
276 case m32c_sim_reg_dma0
:
277 case m32c_sim_reg_dma1
:
278 case m32c_sim_reg_dsa0
:
279 case m32c_sim_reg_dsa1
:
280 case m32c_sim_reg_dra0
:
281 case m32c_sim_reg_dra1
:
285 fprintf (stderr
, "m32c minisim: unrecognized register number: %d\n",
292 sim_fetch_register (SIM_DESC sd
, int regno
, unsigned char *buf
, int length
)
298 if (!check_regno (regno
))
301 size
= reg_size (regno
);
308 case m32c_sim_reg_r0_bank0
:
309 val
= regs
.r
[0].r_r0
;
311 case m32c_sim_reg_r1_bank0
:
312 val
= regs
.r
[0].r_r1
;
314 case m32c_sim_reg_r2_bank0
:
315 val
= regs
.r
[0].r_r2
;
317 case m32c_sim_reg_r3_bank0
:
318 val
= regs
.r
[0].r_r3
;
320 case m32c_sim_reg_a0_bank0
:
321 val
= regs
.r
[0].r_a0
;
323 case m32c_sim_reg_a1_bank0
:
324 val
= regs
.r
[0].r_a1
;
326 case m32c_sim_reg_fb_bank0
:
327 val
= regs
.r
[0].r_fb
;
329 case m32c_sim_reg_sb_bank0
:
330 val
= regs
.r
[0].r_sb
;
332 case m32c_sim_reg_r0_bank1
:
333 val
= regs
.r
[1].r_r0
;
335 case m32c_sim_reg_r1_bank1
:
336 val
= regs
.r
[1].r_r1
;
338 case m32c_sim_reg_r2_bank1
:
339 val
= regs
.r
[1].r_r2
;
341 case m32c_sim_reg_r3_bank1
:
342 val
= regs
.r
[1].r_r3
;
344 case m32c_sim_reg_a0_bank1
:
345 val
= regs
.r
[1].r_a0
;
347 case m32c_sim_reg_a1_bank1
:
348 val
= regs
.r
[1].r_a1
;
350 case m32c_sim_reg_fb_bank1
:
351 val
= regs
.r
[1].r_fb
;
353 case m32c_sim_reg_sb_bank1
:
354 val
= regs
.r
[1].r_sb
;
357 case m32c_sim_reg_usp
:
360 case m32c_sim_reg_isp
:
363 case m32c_sim_reg_pc
:
366 case m32c_sim_reg_intb
:
367 val
= regs
.r_intbl
* 65536 + regs
.r_intbl
;
369 case m32c_sim_reg_flg
:
373 /* These registers aren't implemented by the minisim. */
374 case m32c_sim_reg_svf
:
375 case m32c_sim_reg_svp
:
376 case m32c_sim_reg_vct
:
377 case m32c_sim_reg_dmd0
:
378 case m32c_sim_reg_dmd1
:
379 case m32c_sim_reg_dct0
:
380 case m32c_sim_reg_dct1
:
381 case m32c_sim_reg_drc0
:
382 case m32c_sim_reg_drc1
:
383 case m32c_sim_reg_dma0
:
384 case m32c_sim_reg_dma1
:
385 case m32c_sim_reg_dsa0
:
386 case m32c_sim_reg_dsa1
:
387 case m32c_sim_reg_dra0
:
388 case m32c_sim_reg_dra1
:
392 fprintf (stderr
, "m32c minisim: unrecognized register number: %d\n",
397 put_le (buf
, length
, val
);
404 sim_store_register (SIM_DESC sd
, int regno
, unsigned char *buf
, int length
)
410 if (!check_regno (regno
))
413 size
= reg_size (regno
);
417 DI val
= get_le (buf
, length
);
421 case m32c_sim_reg_r0_bank0
:
422 regs
.r
[0].r_r0
= val
& 0xffff;
424 case m32c_sim_reg_r1_bank0
:
425 regs
.r
[0].r_r1
= val
& 0xffff;
427 case m32c_sim_reg_r2_bank0
:
428 regs
.r
[0].r_r2
= val
& 0xffff;
430 case m32c_sim_reg_r3_bank0
:
431 regs
.r
[0].r_r3
= val
& 0xffff;
433 case m32c_sim_reg_a0_bank0
:
434 regs
.r
[0].r_a0
= val
& addr_mask
;
436 case m32c_sim_reg_a1_bank0
:
437 regs
.r
[0].r_a1
= val
& addr_mask
;
439 case m32c_sim_reg_fb_bank0
:
440 regs
.r
[0].r_fb
= val
& addr_mask
;
442 case m32c_sim_reg_sb_bank0
:
443 regs
.r
[0].r_sb
= val
& addr_mask
;
445 case m32c_sim_reg_r0_bank1
:
446 regs
.r
[1].r_r0
= val
& 0xffff;
448 case m32c_sim_reg_r1_bank1
:
449 regs
.r
[1].r_r1
= val
& 0xffff;
451 case m32c_sim_reg_r2_bank1
:
452 regs
.r
[1].r_r2
= val
& 0xffff;
454 case m32c_sim_reg_r3_bank1
:
455 regs
.r
[1].r_r3
= val
& 0xffff;
457 case m32c_sim_reg_a0_bank1
:
458 regs
.r
[1].r_a0
= val
& addr_mask
;
460 case m32c_sim_reg_a1_bank1
:
461 regs
.r
[1].r_a1
= val
& addr_mask
;
463 case m32c_sim_reg_fb_bank1
:
464 regs
.r
[1].r_fb
= val
& addr_mask
;
466 case m32c_sim_reg_sb_bank1
:
467 regs
.r
[1].r_sb
= val
& addr_mask
;
470 case m32c_sim_reg_usp
:
471 regs
.r_usp
= val
& addr_mask
;
473 case m32c_sim_reg_isp
:
474 regs
.r_isp
= val
& addr_mask
;
476 case m32c_sim_reg_pc
:
477 regs
.r_pc
= val
& membus_mask
;
479 case m32c_sim_reg_intb
:
480 regs
.r_intbl
= (val
& membus_mask
) & 0xffff;
481 regs
.r_intbh
= (val
& membus_mask
) >> 16;
483 case m32c_sim_reg_flg
:
484 regs
.r_flags
= val
& 0xffff;
487 /* These registers aren't implemented by the minisim. */
488 case m32c_sim_reg_svf
:
489 case m32c_sim_reg_svp
:
490 case m32c_sim_reg_vct
:
491 case m32c_sim_reg_dmd0
:
492 case m32c_sim_reg_dmd1
:
493 case m32c_sim_reg_dct0
:
494 case m32c_sim_reg_dct1
:
495 case m32c_sim_reg_drc0
:
496 case m32c_sim_reg_drc1
:
497 case m32c_sim_reg_dma0
:
498 case m32c_sim_reg_dma1
:
499 case m32c_sim_reg_dsa0
:
500 case m32c_sim_reg_dsa1
:
501 case m32c_sim_reg_dra0
:
502 case m32c_sim_reg_dra1
:
506 fprintf (stderr
, "m32c minisim: unrecognized register number: %d\n",
515 static volatile int stop
;
516 static enum sim_stop reason
;
520 /* Given a signal number used by the M32C bsp (that is, newlib),
521 return a target signal number used by GDB. */
523 m32c_signal_to_target (int m32c
)
528 return GDB_SIGNAL_ILL
;
531 return GDB_SIGNAL_TRAP
;
534 return GDB_SIGNAL_BUS
;
537 return GDB_SIGNAL_SEGV
;
540 return GDB_SIGNAL_XCPU
;
543 return GDB_SIGNAL_INT
;
546 return GDB_SIGNAL_FPE
;
549 return GDB_SIGNAL_ABRT
;
556 /* Take a step return code RC and set up the variables consulted by
557 sim_stop_reason appropriately. */
561 if (M32C_STEPPED (rc
) || M32C_HIT_BREAK (rc
))
563 reason
= sim_stopped
;
564 siggnal
= GDB_SIGNAL_TRAP
;
566 else if (M32C_STOPPED (rc
))
568 reason
= sim_stopped
;
569 siggnal
= m32c_signal_to_target (M32C_STOP_SIG (rc
));
573 assert (M32C_EXITED (rc
));
575 siggnal
= M32C_EXIT_STATUS (rc
);
581 sim_resume (SIM_DESC sd
, int step
, int sig_to_deliver
)
585 if (sig_to_deliver
!= 0)
588 "Warning: the m32c minisim does not implement "
589 "signal delivery yet.\n" "Resuming with no signal.\n");
594 handle_step (decode_opcode ());
601 /* We don't clear 'stop' here, because then we would miss
602 interrupts that arrived on the way here. Instead, we clear
603 the flag in sim_stop_reason, after GDB has disabled the
604 interrupt signal handler. */
612 reason
= sim_stopped
;
613 siggnal
= GDB_SIGNAL_INT
;
617 rc
= decode_opcode ();
622 if (!M32C_STEPPED (rc
))
629 m32c_sim_restore_console ();
633 sim_stop (SIM_DESC sd
)
641 sim_stop_reason (SIM_DESC sd
, enum sim_stop
*reason_p
, int *sigrc_p
)
650 sim_do_command (SIM_DESC sd
, const char *cmd
)
653 char **argv
= buildargv (cmd
);
666 if (strcmp (cmd
, "trace") == 0)
668 if (strcmp (arg
, "on") == 0)
670 else if (strcmp (arg
, "off") == 0)
673 printf ("The 'sim trace' command expects 'on' or 'off' "
674 "as an argument.\n");
676 else if (strcmp (cmd
, "verbose") == 0)
678 if (strcmp (arg
, "on") == 0)
680 else if (strcmp (arg
, "off") == 0)
683 printf ("The 'sim verbose' command expects 'on' or 'off'"
684 " as an argument.\n");
687 printf ("The 'sim' command expects either 'trace' or 'verbose'"
688 " as a subcommand.\n");
694 sim_complete_command (SIM_DESC sd
, const char *text
, const char *word
)
700 sim_memory_map (SIM_DESC sd
)
706 sim_info (SIM_DESC sd
, int verbose
)
708 printf ("The m32c minisim doesn't collect any statistics.\n");