1 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
4 * interp.c (sim_create_inferior): Only truncate sign extension
5 bits for 32-bit target models.
7 2021-05-17 Mike Frysinger <vapier@gentoo.org>
9 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
11 2021-05-17 Mike Frysinger <vapier@gentoo.org>
13 * interp.c (sim_open): Switch to sim_state_alloc_extra.
14 * micromips.igen: Change SD to mips_sim_state.
15 * micromipsrun.c (sim_engine_run): Likewise.
16 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
17 (watch_options_install): Delete.
18 (struct swatch): Delete.
19 (struct sim_state): Delete.
20 (struct mips_sim_state): New struct.
21 (MIPS_SIM_STATE): Define.
23 2021-05-16 Mike Frysinger <vapier@gentoo.org>
25 * interp.c: Replace config.h include with defs.h.
26 * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
27 dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
30 2021-05-16 Mike Frysinger <vapier@gentoo.org>
32 * config.in, configure: Regenerate.
34 2021-05-14 Mike Frysinger <vapier@gentoo.org>
36 * interp.c: Update include path.
38 2021-05-04 Mike Frysinger <vapier@gentoo.org>
40 * dv-tx3904sio.c: Include stdlib.h.
42 2021-05-04 Mike Frysinger <vapier@gentoo.org>
44 * configure.ac (hw_extra_devices): Inline contents into
45 SIM_AC_OPTION_HARDWARE and delete.
46 * configure: Regenerate.
48 2021-05-04 Mike Frysinger <vapier@gentoo.org>
50 * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
51 (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
52 * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
53 * configure: Regenerate.
55 2021-05-04 Mike Frysinger <vapier@gentoo.org>
57 * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
59 2021-05-04 Mike Frysinger <vapier@gentoo.org>
61 * configure: Regenerate.
63 2021-05-01 Mike Frysinger <vapier@gentoo.org>
65 * cp1.c (store_fcr): Mark static.
67 2021-05-01 Mike Frysinger <vapier@gentoo.org>
69 * config.in, configure: Regenerate.
71 2021-04-23 Mike Frysinger <vapier@gentoo.org>
73 * configure.ac (hw_enabled): Delete.
74 (SIM_AC_OPTION_HARDWARE): Delete first two args.
75 * configure: Regenerate.
77 2021-04-22 Tom Tromey <tom@tromey.com>
79 * configure, config.in: Rebuild.
81 2021-04-22 Tom Tromey <tom@tromey.com>
83 * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
85 (SIM_EXTRA_DEPS): New variable.
87 2021-04-22 Tom Tromey <tom@tromey.com>
91 2021-04-21 Mike Frysinger <vapier@gentoo.org>
93 * aclocal.m4: Regenerate.
95 2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
97 * configure: Regenerate.
99 2021-04-18 Mike Frysinger <vapier@gentoo.org>
101 * configure: Regenerate.
103 2021-04-12 Mike Frysinger <vapier@gentoo.org>
105 * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
107 2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
109 * Makefile.in: Set ASAN_OPTIONS when running igen.
111 2021-04-04 Steve Ellcey <sellcey@mips.com>
112 Faraz Shahbazker <fshahbazker@wavecomp.com>
114 * interp.c (sim_monitor): Add switch entries for unlink (13),
115 lseek (14), and stat (15).
117 2021-04-02 Mike Frysinger <vapier@gentoo.org>
119 * Makefile.in (../igen/igen): Delete rule.
120 (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
122 2021-04-02 Mike Frysinger <vapier@gentoo.org>
124 * aclocal.m4, configure: Regenerate.
126 2021-02-28 Mike Frysinger <vapier@gentoo.org>
128 * configure: Regenerate.
130 2021-02-27 Mike Frysinger <vapier@gentoo.org>
132 * Makefile.in (SIM_EXTRA_ALL): Delete.
135 2021-02-21 Mike Frysinger <vapier@gentoo.org>
137 * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
138 * aclocal.m4, configure: Regenerate.
140 2021-02-13 Mike Frysinger <vapier@gentoo.org>
142 * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
143 * aclocal.m4, configure: Regenerate.
145 2021-02-06 Mike Frysinger <vapier@gentoo.org>
147 * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
149 2021-02-06 Mike Frysinger <vapier@gentoo.org>
151 * configure: Regenerate.
153 2021-01-30 Mike Frysinger <vapier@gentoo.org>
155 * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
157 2021-01-11 Mike Frysinger <vapier@gentoo.org>
159 * config.in, configure: Regenerate.
160 * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
161 and strings.h include.
163 2021-01-09 Mike Frysinger <vapier@gentoo.org>
165 * configure: Regenerate.
167 2021-01-09 Mike Frysinger <vapier@gentoo.org>
169 * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
170 * configure: Regenerate.
172 2021-01-08 Mike Frysinger <vapier@gentoo.org>
174 * configure: Regenerate.
176 2021-01-04 Mike Frysinger <vapier@gentoo.org>
178 * configure: Regenerate.
180 2020-12-31 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
182 * sim-main.c: Include <stdlib.h>.
184 2020-12-14 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
186 * cp1.c: Include <stdlib.h>.
188 2020-07-29 Simon Marchi <simon.marchi@efficios.com>
190 * configure: Re-generate.
192 2017-09-06 John Baldwin <jhb@FreeBSD.org>
194 * configure: Regenerate.
196 2016-11-11 Mike Frysinger <vapier@gentoo.org>
199 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
202 2016-11-11 Mike Frysinger <vapier@gentoo.org>
205 * mips.igen (check_u64): Enable for `r3900'.
207 2016-02-05 Mike Frysinger <vapier@gentoo.org>
209 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
211 * configure: Regenerate.
213 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
214 Maciej W. Rozycki <macro@imgtec.com>
217 * micromips.igen (delayslot_micromips): Enable for `micromips32',
218 `micromips64' and `micromipsdsp' only.
219 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
220 (do_micromips_jalr, do_micromips_jal): Likewise.
221 (compute_movep_src_reg): Likewise.
222 (compute_andi16_imm): Likewise.
223 (convert_fmt_micromips): Likewise.
224 (convert_fmt_micromips_cvt_d): Likewise.
225 (convert_fmt_micromips_cvt_s): Likewise.
226 (FMT_MICROMIPS): Likewise.
227 (FMT_MICROMIPS_CVT_D): Likewise.
228 (FMT_MICROMIPS_CVT_S): Likewise.
230 2016-01-12 Mike Frysinger <vapier@gentoo.org>
232 * interp.c: Include elf-bfd.h.
233 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
236 2016-01-10 Mike Frysinger <vapier@gentoo.org>
238 * config.in, configure: Regenerate.
240 2016-01-10 Mike Frysinger <vapier@gentoo.org>
242 * configure: Regenerate.
244 2016-01-10 Mike Frysinger <vapier@gentoo.org>
246 * configure: Regenerate.
248 2016-01-10 Mike Frysinger <vapier@gentoo.org>
250 * configure: Regenerate.
252 2016-01-10 Mike Frysinger <vapier@gentoo.org>
254 * configure: Regenerate.
256 2016-01-10 Mike Frysinger <vapier@gentoo.org>
258 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
259 * configure: Regenerate.
261 2016-01-10 Mike Frysinger <vapier@gentoo.org>
263 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
264 * configure: Regenerate.
266 2016-01-10 Mike Frysinger <vapier@gentoo.org>
268 * configure: Regenerate.
270 2016-01-10 Mike Frysinger <vapier@gentoo.org>
272 * configure: Regenerate.
274 2016-01-09 Mike Frysinger <vapier@gentoo.org>
276 * config.in, configure: Regenerate.
278 2016-01-06 Mike Frysinger <vapier@gentoo.org>
280 * interp.c (sim_open): Mark argv const.
281 (sim_create_inferior): Mark argv and env const.
283 2016-01-04 Mike Frysinger <vapier@gentoo.org>
285 * configure: Regenerate.
287 2016-01-03 Mike Frysinger <vapier@gentoo.org>
289 * interp.c (sim_open): Update sim_parse_args comment.
291 2016-01-03 Mike Frysinger <vapier@gentoo.org>
293 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
294 * configure: Regenerate.
296 2016-01-02 Mike Frysinger <vapier@gentoo.org>
298 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
299 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
300 * configure: Regenerate.
301 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
303 2016-01-02 Mike Frysinger <vapier@gentoo.org>
305 * dv-tx3904cpu.c (CPU, SD): Delete.
307 2015-12-30 Mike Frysinger <vapier@gentoo.org>
309 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
310 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
311 (sim_store_register): Rename to ...
312 (mips_reg_store): ... this. Delete local cpu var.
313 Update sim_io_eprintf calls.
314 (sim_fetch_register): Rename to ...
315 (mips_reg_fetch): ... this. Delete local cpu var.
316 Update sim_io_eprintf calls.
318 2015-12-27 Mike Frysinger <vapier@gentoo.org>
320 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
322 2015-12-26 Mike Frysinger <vapier@gentoo.org>
324 * config.in, configure: Regenerate.
326 2015-12-26 Mike Frysinger <vapier@gentoo.org>
328 * interp.c (sim_write, sim_read): Delete.
329 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
330 (load_word): Likewise.
331 * micromips.igen (cache): Likewise.
332 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
333 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
334 do_store_left, do_store_right, do_load_double, do_store_double):
336 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
337 (do_prefx): Likewise.
338 * sim-main.c (address_translation, prefetch): Delete.
339 (ifetch32, ifetch16): Delete call to AddressTranslation and set
341 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
342 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
343 (LoadMemory, StoreMemory): Delete CCA arg.
345 2015-12-24 Mike Frysinger <vapier@gentoo.org>
347 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
348 * configure: Regenerated.
350 2015-12-24 Mike Frysinger <vapier@gentoo.org>
352 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
355 2015-12-24 Mike Frysinger <vapier@gentoo.org>
357 * tconfig.h (SIM_HANDLES_LMA): Delete.
359 2015-12-24 Mike Frysinger <vapier@gentoo.org>
361 * sim-main.h (WITH_WATCHPOINTS): Delete.
363 2015-12-24 Mike Frysinger <vapier@gentoo.org>
365 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
367 2015-12-24 Mike Frysinger <vapier@gentoo.org>
369 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
371 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
373 * micromips.igen (process_isa_mode): Fix left shift of negative
376 2015-11-17 Mike Frysinger <vapier@gentoo.org>
378 * sim-main.h (WITH_MODULO_MEMORY): Delete.
380 2015-11-15 Mike Frysinger <vapier@gentoo.org>
382 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
384 2015-11-14 Mike Frysinger <vapier@gentoo.org>
386 * interp.c (sim_close): Rename to ...
387 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
389 * sim-main.h (mips_sim_close): Declare.
390 (SIM_CLOSE_HOOK): Define.
392 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
393 Ali Lown <ali.lown@imgtec.com>
395 * Makefile.in (tmp-micromips): New rule.
396 (tmp-mach-multi): Add support for micromips.
397 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
398 that works for both mips64 and micromips64.
399 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
401 Add build support for micromips.
402 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
403 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
404 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
405 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
406 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
407 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
408 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
409 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
410 Refactored instruction code to use these functions.
411 * dsp2.igen: Refactored instruction code to use the new functions.
412 * interp.c (decode_coproc): Refactored to work with any instruction
414 (isa_mode): New variable
415 (RSVD_INSTRUCTION): Changed to 0x00000039.
416 * m16.igen (BREAK16): Refactored instruction to use do_break16.
417 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
418 * micromips.dc: New file.
419 * micromips.igen: New file.
420 * micromips16.dc: New file.
421 * micromipsdsp.igen: New file.
422 * micromipsrun.c: New file.
423 * mips.igen (do_swc1): Changed to work with any instruction encoding.
424 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
425 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
426 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
427 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
428 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
429 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
430 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
431 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
432 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
433 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
434 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
435 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
436 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
437 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
438 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
439 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
440 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
441 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
443 Refactored instruction code to use these functions.
444 (RSVD): Changed to use new reserved instruction.
445 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
446 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
447 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
448 do_store_double): Added micromips32 and micromips64 models.
449 Added include for micromips.igen and micromipsdsp.igen
450 Add micromips32 and micromips64 models.
451 (DecodeCoproc): Updated to use new macro definition.
452 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
453 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
454 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
455 Refactored instruction code to use these functions.
456 * sim-main.h (CP0_operation): New enum.
457 (DecodeCoproc): Updated macro.
458 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
459 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
460 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
461 ISA_MODE_MICROMIPS): New defines.
462 (sim_state): Add isa_mode field.
464 2015-06-23 Mike Frysinger <vapier@gentoo.org>
466 * configure: Regenerate.
468 2015-06-12 Mike Frysinger <vapier@gentoo.org>
470 * configure.ac: Change configure.in to configure.ac.
471 * configure: Regenerate.
473 2015-06-12 Mike Frysinger <vapier@gentoo.org>
475 * configure: Regenerate.
477 2015-06-12 Mike Frysinger <vapier@gentoo.org>
479 * interp.c [TRACE]: Delete.
480 (TRACE): Change to WITH_TRACE_ANY_P.
481 [!WITH_TRACE_ANY_P] (open_trace): Define.
482 (mips_option_handler, open_trace, sim_close, dotrace):
483 Change defined(TRACE) to WITH_TRACE_ANY_P.
484 (sim_open): Delete TRACE ifdef check.
485 * sim-main.c (load_memory): Delete TRACE ifdef check.
486 (store_memory): Likewise.
487 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
488 [!WITH_TRACE_ANY_P] (dotrace): Define.
490 2015-04-18 Mike Frysinger <vapier@gentoo.org>
492 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
495 2015-04-18 Mike Frysinger <vapier@gentoo.org>
497 * sim-main.h (SIM_CPU): Delete.
499 2015-04-18 Mike Frysinger <vapier@gentoo.org>
501 * sim-main.h (sim_cia): Delete.
503 2015-04-17 Mike Frysinger <vapier@gentoo.org>
505 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
507 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
508 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
509 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
510 CIA_SET to CPU_PC_SET.
511 * sim-main.h (CIA_GET, CIA_SET): Delete.
513 2015-04-15 Mike Frysinger <vapier@gentoo.org>
515 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
516 * sim-main.h (STATE_CPU): Delete.
518 2015-04-13 Mike Frysinger <vapier@gentoo.org>
520 * configure: Regenerate.
522 2015-04-13 Mike Frysinger <vapier@gentoo.org>
524 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
525 * interp.c (mips_pc_get, mips_pc_set): New functions.
526 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
527 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
528 (sim_pc_get): Delete.
529 * sim-main.h (SIM_CPU): Define.
530 (struct sim_state): Change cpu to an array of pointers.
533 2015-04-13 Mike Frysinger <vapier@gentoo.org>
535 * interp.c (mips_option_handler, open_trace, sim_close,
536 sim_write, sim_read, sim_store_register, sim_fetch_register,
537 sim_create_inferior, pr_addr, pr_uword64): Convert old style
539 (sim_open): Convert old style prototype. Change casts with
540 sim_write to unsigned char *.
541 (fetch_str): Change null to unsigned char, and change cast to
543 (sim_monitor): Change c & ch to unsigned char. Change cast to
546 2015-04-12 Mike Frysinger <vapier@gentoo.org>
548 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
550 2015-04-06 Mike Frysinger <vapier@gentoo.org>
552 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
554 2015-04-01 Mike Frysinger <vapier@gentoo.org>
556 * tconfig.h (SIM_HAVE_PROFILE): Delete.
558 2015-03-31 Mike Frysinger <vapier@gentoo.org>
560 * config.in, configure: Regenerate.
562 2015-03-24 Mike Frysinger <vapier@gentoo.org>
564 * interp.c (sim_pc_get): New function.
566 2015-03-24 Mike Frysinger <vapier@gentoo.org>
568 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
569 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
571 2015-03-24 Mike Frysinger <vapier@gentoo.org>
573 * configure: Regenerate.
575 2015-03-23 Mike Frysinger <vapier@gentoo.org>
577 * configure: Regenerate.
579 2015-03-23 Mike Frysinger <vapier@gentoo.org>
581 * configure: Regenerate.
582 * configure.ac (mips_extra_objs): Delete.
583 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
584 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
586 2015-03-23 Mike Frysinger <vapier@gentoo.org>
588 * configure: Regenerate.
589 * configure.ac: Delete sim_hw checks for dv-sockser.
591 2015-03-16 Mike Frysinger <vapier@gentoo.org>
593 * config.in, configure: Regenerate.
594 * tconfig.in: Rename file ...
595 * tconfig.h: ... here.
597 2015-03-15 Mike Frysinger <vapier@gentoo.org>
599 * tconfig.in: Delete includes.
600 [HAVE_DV_SOCKSER]: Delete.
602 2015-03-14 Mike Frysinger <vapier@gentoo.org>
604 * Makefile.in (SIM_RUN_OBJS): Delete.
606 2015-03-14 Mike Frysinger <vapier@gentoo.org>
608 * configure.ac (AC_CHECK_HEADERS): Delete.
609 * aclocal.m4, configure: Regenerate.
611 2014-08-19 Alan Modra <amodra@gmail.com>
613 * configure: Regenerate.
615 2014-08-15 Roland McGrath <mcgrathr@google.com>
617 * configure: Regenerate.
618 * config.in: Regenerate.
620 2014-03-04 Mike Frysinger <vapier@gentoo.org>
622 * configure: Regenerate.
624 2013-09-23 Alan Modra <amodra@gmail.com>
626 * configure: Regenerate.
628 2013-06-03 Mike Frysinger <vapier@gentoo.org>
630 * aclocal.m4, configure: Regenerate.
632 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
634 * configure: Rebuild.
636 2013-03-26 Mike Frysinger <vapier@gentoo.org>
638 * configure: Regenerate.
640 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
642 * configure.ac: Address use of dv-sockser.o.
643 * tconfig.in: Conditionalize use of dv_sockser_install.
644 * configure: Regenerated.
645 * config.in: Regenerated.
647 2012-10-04 Chao-ying Fu <fu@mips.com>
648 Steve Ellcey <sellcey@mips.com>
650 * mips/mips3264r2.igen (rdhwr): New.
652 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
654 * configure.ac: Always link against dv-sockser.o.
655 * configure: Regenerate.
657 2012-06-15 Joel Brobecker <brobecker@adacore.com>
659 * config.in, configure: Regenerate.
661 2012-05-18 Nick Clifton <nickc@redhat.com>
664 * interp.c: Include config.h before system header files.
666 2012-03-24 Mike Frysinger <vapier@gentoo.org>
668 * aclocal.m4, config.in, configure: Regenerate.
670 2011-12-03 Mike Frysinger <vapier@gentoo.org>
672 * aclocal.m4: New file.
673 * configure: Regenerate.
675 2011-10-19 Mike Frysinger <vapier@gentoo.org>
677 * configure: Regenerate after common/acinclude.m4 update.
679 2011-10-17 Mike Frysinger <vapier@gentoo.org>
681 * configure.ac: Change include to common/acinclude.m4.
683 2011-10-17 Mike Frysinger <vapier@gentoo.org>
685 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
686 call. Replace common.m4 include with SIM_AC_COMMON.
687 * configure: Regenerate.
689 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
691 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
693 (tmp-mach-multi): Exit early when igen fails.
695 2011-07-05 Mike Frysinger <vapier@gentoo.org>
697 * interp.c (sim_do_command): Delete.
699 2011-02-14 Mike Frysinger <vapier@gentoo.org>
701 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
702 (tx3904sio_fifo_reset): Likewise.
703 * interp.c (sim_monitor): Likewise.
705 2010-04-14 Mike Frysinger <vapier@gentoo.org>
707 * interp.c (sim_write): Add const to buffer arg.
709 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
711 * interp.c: Don't include sysdep.h
713 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
715 * configure: Regenerate.
717 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
719 * config.in: Regenerate.
720 * configure: Likewise.
722 * configure: Regenerate.
724 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
726 * configure: Regenerate to track ../common/common.m4 changes.
729 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
730 Daniel Jacobowitz <dan@codesourcery.com>
731 Joseph Myers <joseph@codesourcery.com>
733 * configure: Regenerate.
735 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
737 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
738 that unconditionally allows fmt_ps.
739 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
740 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
741 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
742 filter from 64,f to 32,f.
743 (PREFX): Change filter from 64 to 32.
744 (LDXC1, LUXC1): Provide separate mips32r2 implementations
745 that use do_load_double instead of do_load. Make both LUXC1
746 versions unpredictable if SizeFGR () != 64.
747 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
748 instead of do_store. Remove unused variable. Make both SUXC1
749 versions unpredictable if SizeFGR () != 64.
751 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
753 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
754 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
755 shifts for that case.
757 2007-09-04 Nick Clifton <nickc@redhat.com>
759 * interp.c (options enum): Add OPTION_INFO_MEMORY.
760 (display_mem_info): New static variable.
761 (mips_option_handler): Handle OPTION_INFO_MEMORY.
762 (mips_options): Add info-memory and memory-info.
763 (sim_open): After processing the command line and board
764 specification, check display_mem_info. If it is set then
765 call the real handler for the --memory-info command line
768 2007-08-24 Joel Brobecker <brobecker@adacore.com>
770 * configure.ac: Change license of multi-run.c to GPL version 3.
771 * configure: Regenerate.
773 2007-06-28 Richard Sandiford <richard@codesourcery.com>
775 * configure.ac, configure: Revert last patch.
777 2007-06-26 Richard Sandiford <richard@codesourcery.com>
779 * configure.ac (sim_mipsisa3264_configs): New variable.
780 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
781 every configuration support all four targets, using the triplet to
782 determine the default.
783 * configure: Regenerate.
785 2007-06-25 Richard Sandiford <richard@codesourcery.com>
787 * Makefile.in (m16run.o): New rule.
789 2007-05-15 Thiemo Seufer <ths@mips.com>
791 * mips3264r2.igen (DSHD): Fix compile warning.
793 2007-05-14 Thiemo Seufer <ths@mips.com>
795 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
796 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
797 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
798 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
801 2007-03-01 Thiemo Seufer <ths@mips.com>
803 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
806 2007-02-20 Thiemo Seufer <ths@mips.com>
808 * dsp.igen: Update copyright notice.
809 * dsp2.igen: Fix copyright notice.
811 2007-02-20 Thiemo Seufer <ths@mips.com>
812 Chao-Ying Fu <fu@mips.com>
814 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
815 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
816 Add dsp2 to sim_igen_machine.
817 * configure: Regenerate.
818 * dsp.igen (do_ph_op): Add MUL support when op = 2.
819 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
820 (mulq_rs.ph): Use do_ph_mulq.
821 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
822 * mips.igen: Add dsp2 model and include dsp2.igen.
823 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
824 for *mips32r2, *mips64r2, *dsp.
825 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
826 for *mips32r2, *mips64r2, *dsp2.
827 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
829 2007-02-19 Thiemo Seufer <ths@mips.com>
830 Nigel Stephens <nigel@mips.com>
832 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
833 jumps with hazard barrier.
835 2007-02-19 Thiemo Seufer <ths@mips.com>
836 Nigel Stephens <nigel@mips.com>
838 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
839 after each call to sim_io_write.
841 2007-02-19 Thiemo Seufer <ths@mips.com>
842 Nigel Stephens <nigel@mips.com>
844 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
845 supported by this simulator.
846 (decode_coproc): Recognise additional CP0 Config registers
849 2007-02-19 Thiemo Seufer <ths@mips.com>
850 Nigel Stephens <nigel@mips.com>
851 David Ung <davidu@mips.com>
853 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
854 uninterpreted formats. If fmt is one of the uninterpreted types
855 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
856 fmt_word, and fmt_uninterpreted_64 like fmt_long.
857 (store_fpr): When writing an invalid odd register, set the
858 matching even register to fmt_unknown, not the following register.
859 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
860 the the memory window at offset 0 set by --memory-size command
862 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
864 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
866 (sim_monitor): When returning the memory size to the MIPS
867 application, use the value in STATE_MEM_SIZE, not an arbitrary
869 (cop_lw): Don' mess around with FPR_STATE, just pass
870 fmt_uninterpreted_32 to StoreFPR.
872 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
874 * mips.igen (not_word_value): Single version for mips32, mips64
877 2007-02-19 Thiemo Seufer <ths@mips.com>
878 Nigel Stephens <nigel@mips.com>
880 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
883 2007-02-17 Thiemo Seufer <ths@mips.com>
885 * configure.ac (mips*-sde-elf*): Move in front of generic machine
887 * configure: Regenerate.
889 2007-02-17 Thiemo Seufer <ths@mips.com>
891 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
892 Add mdmx to sim_igen_machine.
893 (mipsisa64*-*-*): Likewise. Remove dsp.
894 (mipsisa32*-*-*): Remove dsp.
895 * configure: Regenerate.
897 2007-02-13 Thiemo Seufer <ths@mips.com>
899 * configure.ac: Add mips*-sde-elf* target.
900 * configure: Regenerate.
902 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
904 * acconfig.h: Remove.
905 * config.in, configure: Regenerate.
907 2006-11-07 Thiemo Seufer <ths@mips.com>
909 * dsp.igen (do_w_op): Fix compiler warning.
911 2006-08-29 Thiemo Seufer <ths@mips.com>
912 David Ung <davidu@mips.com>
914 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
916 * configure: Regenerate.
917 * mips.igen (model): Add smartmips.
918 (MADDU): Increment ACX if carry.
919 (do_mult): Clear ACX.
920 (ROR,RORV): Add smartmips.
921 (include): Include smartmips.igen.
922 * sim-main.h (ACX): Set to REGISTERS[89].
923 * smartmips.igen: New file.
925 2006-08-29 Thiemo Seufer <ths@mips.com>
926 David Ung <davidu@mips.com>
928 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
929 mips3264r2.igen. Add missing dependency rules.
930 * m16e.igen: Support for mips16e save/restore instructions.
932 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
934 * configure: Regenerated.
936 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
938 * configure: Regenerated.
940 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
942 * configure: Regenerated.
944 2006-05-15 Chao-ying Fu <fu@mips.com>
946 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
948 2006-04-18 Nick Clifton <nickc@redhat.com>
950 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
953 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
955 * configure: Regenerate.
957 2005-12-14 Chao-ying Fu <fu@mips.com>
959 * Makefile.in (SIM_OBJS): Add dsp.o.
960 (dsp.o): New dependency.
961 (IGEN_INCLUDE): Add dsp.igen.
962 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
963 mipsisa64*-*-*): Add dsp to sim_igen_machine.
964 * configure: Regenerate.
965 * mips.igen: Add dsp model and include dsp.igen.
966 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
967 because these instructions are extended in DSP ASE.
968 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
969 adding 6 DSP accumulator registers and 1 DSP control register.
970 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
971 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
972 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
973 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
974 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
975 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
976 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
977 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
978 DSPCR_CCOND_SMASK): New define.
979 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
980 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
982 2005-07-08 Ian Lance Taylor <ian@airs.com>
984 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
986 2005-06-16 David Ung <davidu@mips.com>
987 Nigel Stephens <nigel@mips.com>
989 * mips.igen: New mips16e model and include m16e.igen.
990 (check_u64): Add mips16e tag.
991 * m16e.igen: New file for MIPS16e instructions.
992 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
993 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
995 * configure: Regenerate.
997 2005-05-26 David Ung <davidu@mips.com>
999 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
1000 tags to all instructions which are applicable to the new ISAs.
1001 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1003 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1005 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1007 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1008 * configure: Regenerate.
1010 2005-03-23 Mark Kettenis <kettenis@gnu.org>
1012 * configure: Regenerate.
1014 2005-01-14 Andrew Cagney <cagney@gnu.org>
1016 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
1017 explicit call to AC_CONFIG_HEADER.
1018 * configure: Regenerate.
1020 2005-01-12 Andrew Cagney <cagney@gnu.org>
1022 * configure.ac: Update to use ../common/common.m4.
1023 * configure: Re-generate.
1025 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
1027 * configure: Regenerated to track ../common/aclocal.m4 changes.
1029 2005-01-07 Andrew Cagney <cagney@gnu.org>
1031 * configure.ac: Rename configure.in, require autoconf 2.59.
1032 * configure: Re-generate.
1034 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
1036 * configure: Regenerate for ../common/aclocal.m4 update.
1038 2004-09-24 Monika Chaddha <monika@acmet.com>
1040 Committed by Andrew Cagney.
1041 * m16.igen (CMP, CMPI): Fix assembler.
1043 2004-08-18 Chris Demetriou <cgd@broadcom.com>
1045 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1046 * configure: Regenerate.
1048 2004-06-25 Chris Demetriou <cgd@broadcom.com>
1050 * configure.in (sim_m16_machine): Include mipsIII.
1051 * configure: Regenerate.
1053 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
1055 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1057 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1059 2004-04-10 Chris Demetriou <cgd@broadcom.com>
1061 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1063 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1065 * mips.igen (check_fmt): Remove.
1066 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1067 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1068 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1069 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1070 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1071 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1072 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1073 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1074 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1075 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1077 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1079 * sb1.igen (check_sbx): New function.
1080 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1082 2004-03-29 Chris Demetriou <cgd@broadcom.com>
1083 Richard Sandiford <rsandifo@redhat.com>
1085 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1086 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1087 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1088 separate implementations for mipsIV and mipsV. Use new macros to
1089 determine whether the restrictions apply.
1091 2004-01-19 Chris Demetriou <cgd@broadcom.com>
1093 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1094 (check_mult_hilo): Improve comments.
1095 (check_div_hilo): Likewise. Also, fork off a new version
1096 to handle mips32/mips64 (since there are no hazards to check
1099 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
1101 * mips.igen (do_dmultx): Fix check for negative operands.
1103 2003-05-16 Ian Lance Taylor <ian@airs.com>
1105 * Makefile.in (SHELL): Make sure this is defined.
1106 (various): Use $(SHELL) whenever we invoke move-if-change.
1108 2003-05-03 Chris Demetriou <cgd@broadcom.com>
1110 * cp1.c: Tweak attribution slightly.
1113 * mdmx.igen: Likewise.
1114 * mips3d.igen: Likewise.
1115 * sb1.igen: Likewise.
1117 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
1119 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1122 2003-02-27 Andrew Cagney <cagney@redhat.com>
1124 * interp.c (sim_open): Rename _bfd to bfd.
1125 (sim_create_inferior): Ditto.
1127 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1129 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1131 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1133 * mips.igen (EI, DI): Remove.
1135 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
1137 * Makefile.in (tmp-run-multi): Fix mips16 filter.
1139 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
1140 Andrew Cagney <ac131313@redhat.com>
1141 Gavin Romig-Koch <gavin@redhat.com>
1142 Graydon Hoare <graydon@redhat.com>
1143 Aldy Hernandez <aldyh@redhat.com>
1144 Dave Brolley <brolley@redhat.com>
1145 Chris Demetriou <cgd@broadcom.com>
1147 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1148 (sim_mach_default): New variable.
1149 (mips64vr-*-*, mips64vrel-*-*): New configurations.
1150 Add a new simulator generator, MULTI.
1151 * configure: Regenerate.
1152 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1153 (multi-run.o): New dependency.
1154 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1155 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1156 (tmp-multi): Combine them.
1157 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
1158 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1159 (distclean-extra): New rule.
1160 * sim-main.h: Include bfd.h.
1161 (MIPS_MACH): New macro.
1162 * mips.igen (vr4120, vr5400, vr5500): New models.
1163 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1164 * vr.igen: Replace with new version.
1166 2003-01-04 Chris Demetriou <cgd@broadcom.com>
1168 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1169 * configure: Regenerate.
1171 2002-12-31 Chris Demetriou <cgd@broadcom.com>
1173 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1174 * mips.igen: Remove all invocations of check_branch_bug and
1177 2002-12-16 Chris Demetriou <cgd@broadcom.com>
1179 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1181 2002-07-30 Chris Demetriou <cgd@broadcom.com>
1183 * mips.igen (do_load_double, do_store_double): New functions.
1184 (LDC1, SDC1): Rename to...
1185 (LDC1b, SDC1b): respectively.
1186 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1188 2002-07-29 Michael Snyder <msnyder@redhat.com>
1190 * cp1.c (fp_recip2): Modify initialization expression so that
1191 GCC will recognize it as constant.
1193 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1195 * mdmx.c (SD_): Delete.
1196 (Unpredictable): Re-define, for now, to directly invoke
1197 unpredictable_action().
1198 (mdmx_acc_op): Fix error in .ob immediate handling.
1200 2002-06-18 Andrew Cagney <cagney@redhat.com>
1202 * interp.c (sim_firmware_command): Initialize `address'.
1204 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1206 * configure: Regenerated to track ../common/aclocal.m4 changes.
1208 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1209 Ed Satterthwaite <ehs@broadcom.com>
1211 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1212 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1213 * mips.igen: Include mips3d.igen.
1214 (mips3d): New model name for MIPS-3D ASE instructions.
1215 (CVT.W.fmt): Don't use this instruction for word (source) format
1217 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1218 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1219 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1220 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1221 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1222 (RSquareRoot1, RSquareRoot2): New macros.
1223 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1224 (fp_rsqrt2): New functions.
1225 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1226 * configure: Regenerate.
1228 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1229 Ed Satterthwaite <ehs@broadcom.com>
1231 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1232 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1233 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1234 (convert): Note that this function is not used for paired-single
1236 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1237 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1238 (check_fmt_p): Enable paired-single support.
1239 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1240 (PUU.PS): New instructions.
1241 (CVT.S.fmt): Don't use this instruction for paired-single format
1243 * sim-main.h (FP_formats): New value 'fmt_ps.'
1244 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1245 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1247 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1249 * mips.igen: Fix formatting of function calls in
1252 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1254 * mips.igen (MOVN, MOVZ): Trace result.
1255 (TNEI): Print "tnei" as the opcode name in traces.
1256 (CEIL.W): Add disassembly string for traces.
1257 (RSQRT.fmt): Make location of disassembly string consistent
1258 with other instructions.
1260 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1262 * mips.igen (X): Delete unused function.
1264 2002-06-08 Andrew Cagney <cagney@redhat.com>
1266 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1268 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1269 Ed Satterthwaite <ehs@broadcom.com>
1271 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1272 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1273 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1274 (fp_nmsub): New prototypes.
1275 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1276 (NegMultiplySub): New defines.
1277 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1278 (MADD.D, MADD.S): Replace with...
1279 (MADD.fmt): New instruction.
1280 (MSUB.D, MSUB.S): Replace with...
1281 (MSUB.fmt): New instruction.
1282 (NMADD.D, NMADD.S): Replace with...
1283 (NMADD.fmt): New instruction.
1284 (NMSUB.D, MSUB.S): Replace with...
1285 (NMSUB.fmt): New instruction.
1287 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1288 Ed Satterthwaite <ehs@broadcom.com>
1290 * cp1.c: Fix more comment spelling and formatting.
1291 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1292 (denorm_mode): New function.
1293 (fpu_unary, fpu_binary): Round results after operation, collect
1294 status from rounding operations, and update the FCSR.
1295 (convert): Collect status from integer conversions and rounding
1296 operations, and update the FCSR. Adjust NaN values that result
1297 from conversions. Convert to use sim_io_eprintf rather than
1298 fprintf, and remove some debugging code.
1299 * cp1.h (fenr_FS): New define.
1301 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1303 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1304 rounding mode to sim FP rounding mode flag conversion code into...
1305 (rounding_mode): New function.
1307 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1309 * cp1.c: Clean up formatting of a few comments.
1310 (value_fpr): Reformat switch statement.
1312 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1313 Ed Satterthwaite <ehs@broadcom.com>
1316 * sim-main.h: Include cp1.h.
1317 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1318 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1319 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1320 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1321 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1322 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1323 * cp1.c: Don't include sim-fpu.h; already included by
1324 sim-main.h. Clean up formatting of some comments.
1325 (NaN, Equal, Less): Remove.
1326 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1327 (fp_cmp): New functions.
1328 * mips.igen (do_c_cond_fmt): Remove.
1329 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1330 Compare. Add result tracing.
1331 (CxC1): Remove, replace with...
1332 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1333 (DMxC1): Remove, replace with...
1334 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1335 (MxC1): Remove, replace with...
1336 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1338 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1340 * sim-main.h (FGRIDX): Remove, replace all uses with...
1341 (FGR_BASE): New macro.
1342 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1343 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1344 (NR_FGR, FGR): Likewise.
1345 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1346 * mips.igen: Likewise.
1348 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1350 * cp1.c: Add an FSF Copyright notice to this file.
1352 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1353 Ed Satterthwaite <ehs@broadcom.com>
1355 * cp1.c (Infinity): Remove.
1356 * sim-main.h (Infinity): Likewise.
1358 * cp1.c (fp_unary, fp_binary): New functions.
1359 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1360 (fp_sqrt): New functions, implemented in terms of the above.
1361 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1362 (Recip, SquareRoot): Remove (replaced by functions above).
1363 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1364 (fp_recip, fp_sqrt): New prototypes.
1365 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1366 (Recip, SquareRoot): Replace prototypes with #defines which
1367 invoke the functions above.
1369 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1371 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1372 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1373 file, remove PARAMS from prototypes.
1374 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1375 simulator state arguments.
1376 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1377 pass simulator state arguments.
1378 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1379 (store_fpr, convert): Remove 'sd' argument.
1380 (value_fpr): Likewise. Convert to use 'SD' instead.
1382 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1384 * cp1.c (Min, Max): Remove #if 0'd functions.
1385 * sim-main.h (Min, Max): Remove.
1387 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1389 * cp1.c: fix formatting of switch case and default labels.
1390 * interp.c: Likewise.
1391 * sim-main.c: Likewise.
1393 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1395 * cp1.c: Clean up comments which describe FP formats.
1396 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1398 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1399 Ed Satterthwaite <ehs@broadcom.com>
1401 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1402 Broadcom SiByte SB-1 processor configurations.
1403 * configure: Regenerate.
1404 * sb1.igen: New file.
1405 * mips.igen: Include sb1.igen.
1407 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1408 * mdmx.igen: Add "sb1" model to all appropriate functions and
1410 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1411 (ob_func, ob_acc): Reference the above.
1412 (qh_acc): Adjust to keep the same size as ob_acc.
1413 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1414 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1416 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1418 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1420 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1421 Ed Satterthwaite <ehs@broadcom.com>
1423 * mips.igen (mdmx): New (pseudo-)model.
1424 * mdmx.c, mdmx.igen: New files.
1425 * Makefile.in (SIM_OBJS): Add mdmx.o.
1426 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1428 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1429 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1430 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1431 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1432 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1433 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1434 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1435 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1436 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1437 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1438 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1439 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1440 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1441 (qh_fmtsel): New macros.
1442 (_sim_cpu): New member "acc".
1443 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1444 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1446 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1448 * interp.c: Use 'deprecated' rather than 'depreciated.'
1449 * sim-main.h: Likewise.
1451 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1453 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1454 which wouldn't compile anyway.
1455 * sim-main.h (unpredictable_action): New function prototype.
1456 (Unpredictable): Define to call igen function unpredictable().
1457 (NotWordValue): New macro to call igen function not_word_value().
1458 (UndefinedResult): Remove.
1459 * interp.c (undefined_result): Remove.
1460 (unpredictable_action): New function.
1461 * mips.igen (not_word_value, unpredictable): New functions.
1462 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1463 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1464 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1465 NotWordValue() to check for unpredictable inputs, then
1466 Unpredictable() to handle them.
1468 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1470 * mips.igen: Fix formatting of calls to Unpredictable().
1472 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1474 * interp.c (sim_open): Revert previous change.
1476 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1478 * interp.c (sim_open): Disable chunk of code that wrote code in
1479 vector table entries.
1481 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1483 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1484 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1487 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1489 * cp1.c: Fix many formatting issues.
1491 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1493 * cp1.c (fpu_format_name): New function to replace...
1494 (DOFMT): This. Delete, and update all callers.
1495 (fpu_rounding_mode_name): New function to replace...
1496 (RMMODE): This. Delete, and update all callers.
1498 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1500 * interp.c: Move FPU support routines from here to...
1501 * cp1.c: Here. New file.
1502 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1503 (cp1.o): New target.
1505 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1507 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1508 * mips.igen (mips32, mips64): New models, add to all instructions
1509 and functions as appropriate.
1510 (loadstore_ea, check_u64): New variant for model mips64.
1511 (check_fmt_p): New variant for models mipsV and mips64, remove
1512 mipsV model marking fro other variant.
1515 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1516 for mips32 and mips64.
1517 (DCLO, DCLZ): New instructions for mips64.
1519 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1521 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1522 immediate or code as a hex value with the "%#lx" format.
1523 (ANDI): Likewise, and fix printed instruction name.
1525 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1527 * sim-main.h (UndefinedResult, Unpredictable): New macros
1528 which currently do nothing.
1530 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1532 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1533 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1534 (status_CU3): New definitions.
1536 * sim-main.h (ExceptionCause): Add new values for MIPS32
1537 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1538 for DebugBreakPoint and NMIReset to note their status in
1540 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1541 (SignalExceptionCacheErr): New exception macros.
1543 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1545 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1546 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1548 (SignalExceptionCoProcessorUnusable): Take as argument the
1549 unusable coprocessor number.
1551 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1553 * mips.igen: Fix formatting of all SignalException calls.
1555 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1557 * sim-main.h (SIGNEXTEND): Remove.
1559 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1561 * mips.igen: Remove gencode comment from top of file, fix
1562 spelling in another comment.
1564 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1566 * mips.igen (check_fmt, check_fmt_p): New functions to check
1567 whether specific floating point formats are usable.
1568 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1569 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1570 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1571 Use the new functions.
1572 (do_c_cond_fmt): Remove format checks...
1573 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1575 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1577 * mips.igen: Fix formatting of check_fpu calls.
1579 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1581 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1583 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1585 * mips.igen: Remove whitespace at end of lines.
1587 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1589 * mips.igen (loadstore_ea): New function to do effective
1590 address calculations.
1591 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1592 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1593 CACHE): Use loadstore_ea to do effective address computations.
1595 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1597 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1598 * mips.igen (LL, CxC1, MxC1): Likewise.
1600 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1602 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1603 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1604 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1605 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1606 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1607 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1608 Don't split opcode fields by hand, use the opcode field values
1611 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1613 * mips.igen (do_divu): Fix spacing.
1615 * mips.igen (do_dsllv): Move to be right before DSLLV,
1616 to match the rest of the do_<shift> functions.
1618 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1620 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1621 DSRL32, do_dsrlv): Trace inputs and results.
1623 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1625 * mips.igen (CACHE): Provide instruction-printing string.
1627 * interp.c (signal_exception): Comment tokens after #endif.
1629 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1631 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1632 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1633 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1634 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1635 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1636 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1637 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1638 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1640 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1642 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1643 instruction-printing string.
1644 (LWU): Use '64' as the filter flag.
1646 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1648 * mips.igen (SDXC1): Fix instruction-printing string.
1650 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1652 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1653 filter flags "32,f".
1655 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1657 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1660 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1662 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1663 add a comma) so that it more closely match the MIPS ISA
1664 documentation opcode partitioning.
1665 (PREF): Put useful names on opcode fields, and include
1666 instruction-printing string.
1668 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1670 * mips.igen (check_u64): New function which in the future will
1671 check whether 64-bit instructions are usable and signal an
1672 exception if not. Currently a no-op.
1673 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1674 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1675 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1676 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1678 * mips.igen (check_fpu): New function which in the future will
1679 check whether FPU instructions are usable and signal an exception
1680 if not. Currently a no-op.
1681 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1682 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1683 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1684 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1685 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1686 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1687 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1688 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1690 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1692 * mips.igen (do_load_left, do_load_right): Move to be immediately
1694 (do_store_left, do_store_right): Move to be immediately following
1697 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1699 * mips.igen (mipsV): New model name. Also, add it to
1700 all instructions and functions where it is appropriate.
1702 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1704 * mips.igen: For all functions and instructions, list model
1705 names that support that instruction one per line.
1707 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1709 * mips.igen: Add some additional comments about supported
1710 models, and about which instructions go where.
1711 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1712 order as is used in the rest of the file.
1714 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1716 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1717 indicating that ALU32_END or ALU64_END are there to check
1719 (DADD): Likewise, but also remove previous comment about
1722 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1724 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1725 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1726 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1727 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1728 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1729 fields (i.e., add and move commas) so that they more closely
1730 match the MIPS ISA documentation opcode partitioning.
1732 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1734 * mips.igen (ADDI): Print immediate value.
1735 (BREAK): Print code.
1736 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1737 (SLL): Print "nop" specially, and don't run the code
1738 that does the shift for the "nop" case.
1740 2001-11-17 Fred Fish <fnf@redhat.com>
1742 * sim-main.h (float_operation): Move enum declaration outside
1743 of _sim_cpu struct declaration.
1745 2001-04-12 Jim Blandy <jimb@redhat.com>
1747 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1748 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1750 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1751 PENDING_FILL, and you can get the intended effect gracefully by
1752 calling PENDING_SCHED directly.
1754 2001-02-23 Ben Elliston <bje@redhat.com>
1756 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1757 already defined elsewhere.
1759 2001-02-19 Ben Elliston <bje@redhat.com>
1761 * sim-main.h (sim_monitor): Return an int.
1762 * interp.c (sim_monitor): Add return values.
1763 (signal_exception): Handle error conditions from sim_monitor.
1765 2001-02-08 Ben Elliston <bje@redhat.com>
1767 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1768 (store_memory): Likewise, pass cia to sim_core_write*.
1770 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1772 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1773 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1775 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1777 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1778 * Makefile.in: Don't delete *.igen when cleaning directory.
1780 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1782 * m16.igen (break): Call SignalException not sim_engine_halt.
1784 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1786 From Jason Eckhardt:
1787 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1789 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1791 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1793 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1795 * mips.igen (do_dmultx): Fix typo.
1797 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1799 * configure: Regenerated to track ../common/aclocal.m4 changes.
1801 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1803 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1805 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1807 * sim-main.h (GPR_CLEAR): Define macro.
1809 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1811 * interp.c (decode_coproc): Output long using %lx and not %s.
1813 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1815 * interp.c (sim_open): Sort & extend dummy memory regions for
1816 --board=jmr3904 for eCos.
1818 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1820 * configure: Regenerated.
1822 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1824 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1825 calls, conditional on the simulator being in verbose mode.
1827 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1829 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1830 cache don't get ReservedInstruction traps.
1832 1999-11-29 Mark Salter <msalter@cygnus.com>
1834 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1835 to clear status bits in sdisr register. This is how the hardware works.
1837 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1838 being used by cygmon.
1840 1999-11-11 Andrew Haley <aph@cygnus.com>
1842 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1845 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1847 * mips.igen (MULT): Correct previous mis-applied patch.
1849 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1851 * mips.igen (delayslot32): Handle sequence like
1852 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1853 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1854 (MULT): Actually pass the third register...
1856 1999-09-03 Mark Salter <msalter@cygnus.com>
1858 * interp.c (sim_open): Added more memory aliases for additional
1859 hardware being touched by cygmon on jmr3904 board.
1861 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1863 * configure: Regenerated to track ../common/aclocal.m4 changes.
1865 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1867 * interp.c (sim_store_register): Handle case where client - GDB -
1868 specifies that a 4 byte register is 8 bytes in size.
1869 (sim_fetch_register): Ditto.
1871 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1873 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1874 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1875 (idt_monitor_base): Base address for IDT monitor traps.
1876 (pmon_monitor_base): Ditto for PMON.
1877 (lsipmon_monitor_base): Ditto for LSI PMON.
1878 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1879 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1880 (sim_firmware_command): New function.
1881 (mips_option_handler): Call it for OPTION_FIRMWARE.
1882 (sim_open): Allocate memory for idt_monitor region. If "--board"
1883 option was given, add no monitor by default. Add BREAK hooks only if
1884 monitors are also there.
1886 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1888 * interp.c (sim_monitor): Flush output before reading input.
1890 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1892 * tconfig.in (SIM_HANDLES_LMA): Always define.
1894 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1896 From Mark Salter <msalter@cygnus.com>:
1897 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1898 (sim_open): Add setup for BSP board.
1900 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1902 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1903 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1904 them as unimplemented.
1906 1999-05-08 Felix Lee <flee@cygnus.com>
1908 * configure: Regenerated to track ../common/aclocal.m4 changes.
1910 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1912 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1914 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1916 * configure.in: Any mips64vr5*-*-* target should have
1917 -DTARGET_ENABLE_FR=1.
1918 (default_endian): Any mips64vr*el-*-* target should default to
1920 * configure: Re-generate.
1922 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1924 * mips.igen (ldl): Extend from _16_, not 32.
1926 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1928 * interp.c (sim_store_register): Force registers written to by GDB
1929 into an un-interpreted state.
1931 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1933 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1934 CPU, start periodic background I/O polls.
1935 (tx3904sio_poll): New function: periodic I/O poller.
1937 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1939 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1941 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1943 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1946 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1948 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1949 (load_word): Call SIM_CORE_SIGNAL hook on error.
1950 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1951 starting. For exception dispatching, pass PC instead of NULL_CIA.
1952 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1953 * sim-main.h (COP0_BADVADDR): Define.
1954 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1955 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1956 (_sim_cpu): Add exc_* fields to store register value snapshots.
1957 * mips.igen (*): Replace memory-related SignalException* calls
1958 with references to SIM_CORE_SIGNAL hook.
1960 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1962 * sim-main.c (*): Minor warning cleanups.
1964 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1966 * m16.igen (DADDIU5): Correct type-o.
1968 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1970 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1973 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1975 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1977 (interp.o): Add dependency on itable.h
1978 (oengine.c, gencode): Delete remaining references.
1979 (BUILT_SRC_FROM_GEN): Clean up.
1981 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1984 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1985 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1986 tmp-run-hack) : New.
1987 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1988 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1989 Drop the "64" qualifier to get the HACK generator working.
1990 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1991 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1992 qualifier to get the hack generator working.
1993 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1994 (DSLL): Use do_dsll.
1995 (DSLLV): Use do_dsllv.
1996 (DSRA): Use do_dsra.
1997 (DSRL): Use do_dsrl.
1998 (DSRLV): Use do_dsrlv.
1999 (BC1): Move *vr4100 to get the HACK generator working.
2000 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2001 get the HACK generator working.
2002 (MACC) Rename to get the HACK generator working.
2003 (DMACC,MACCS,DMACCS): Add the 64.
2005 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
2007 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2008 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2010 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
2012 * mips/interp.c (DEBUG): Cleanups.
2014 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
2016 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2017 (tx3904sio_tickle): fflush after a stdout character output.
2019 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
2021 * interp.c (sim_close): Uninstall modules.
2023 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
2025 * sim-main.h, interp.c (sim_monitor): Change to global
2028 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2030 * configure.in (vr4100): Only include vr4100 instructions in
2032 * configure: Re-generate.
2033 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2035 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2037 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2038 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2041 * configure.in (sim_default_gen, sim_use_gen): Replace with
2043 (--enable-sim-igen): Delete config option. Always using IGEN.
2044 * configure: Re-generate.
2046 * Makefile.in (gencode): Kill, kill, kill.
2049 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2051 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2052 bit mips16 igen simulator.
2053 * configure: Re-generate.
2055 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2056 as part of vr4100 ISA.
2057 * vr.igen: Mark all instructions as 64 bit only.
2059 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2061 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2064 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
2066 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2067 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
2068 * configure: Re-generate.
2070 * m16.igen (BREAK): Define breakpoint instruction.
2071 (JALX32): Mark instruction as mips16 and not r3900.
2072 * mips.igen (C.cond.fmt): Fix typo in instruction format.
2074 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2076 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2078 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2079 insn as a debug breakpoint.
2081 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2083 (PENDING_SCHED): Clean up trace statement.
2084 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2085 (PENDING_FILL): Delay write by only one cycle.
2086 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2088 * sim-main.c (pending_tick): Clean up trace statements. Add trace
2090 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2092 (pending_tick): Move incrementing of index to FOR statement.
2093 (pending_tick): Only update PENDING_OUT after a write has occured.
2095 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2097 * configure: Re-generate.
2099 * interp.c (sim_engine_run OLD): Delete explicit call to
2100 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2102 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
2104 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2105 interrupt level number to match changed SignalExceptionInterrupt
2108 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
2110 * interp.c: #include "itable.h" if WITH_IGEN.
2111 (get_insn_name): New function.
2112 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2113 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2115 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
2117 * configure: Rebuilt to inhale new common/aclocal.m4.
2119 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
2121 * dv-tx3904sio.c: Include sim-assert.h.
2123 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
2125 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2126 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2127 Reorganize target-specific sim-hardware checks.
2128 * configure: rebuilt.
2129 * interp.c (sim_open): For tx39 target boards, set
2130 OPERATING_ENVIRONMENT, add tx3904sio devices.
2131 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2132 ROM executables. Install dv-sockser into sim-modules list.
2134 * dv-tx3904irc.c: Compiler warning clean-up.
2135 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
2136 frequent hw-trace messages.
2138 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2140 * vr.igen (MulAcc): Identify as a vr4100 specific function.
2142 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2144 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2146 * vr.igen: New file.
2147 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2148 * mips.igen: Define vr4100 model. Include vr.igen.
2149 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
2151 * mips.igen (check_mf_hilo): Correct check.
2153 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2155 * sim-main.h (interrupt_event): Add prototype.
2157 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2158 register_ptr, register_value.
2159 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2161 * sim-main.h (tracefh): Make extern.
2163 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
2165 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2166 Reduce unnecessarily high timer event frequency.
2167 * dv-tx3904cpu.c: Ditto for interrupt event.
2169 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
2171 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2173 (interrupt_event): Made non-static.
2175 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2176 interchange of configuration values for external vs. internal
2179 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
2181 * mips.igen (BREAK): Moved code to here for
2182 simulator-reserved break instructions.
2183 * gencode.c (build_instruction): Ditto.
2184 * interp.c (signal_exception): Code moved from here. Non-
2185 reserved instructions now use exception vector, rather
2187 * sim-main.h: Moved magic constants to here.
2189 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
2191 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2192 register upon non-zero interrupt event level, clear upon zero
2194 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2195 by passing zero event value.
2196 (*_io_{read,write}_buffer): Endianness fixes.
2197 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2198 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2200 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2201 serial I/O and timer module at base address 0xFFFF0000.
2203 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2205 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2208 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2210 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2212 * configure: Update.
2214 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2216 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2217 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2218 * configure.in: Include tx3904tmr in hw_device list.
2219 * configure: Rebuilt.
2220 * interp.c (sim_open): Instantiate three timer instances.
2221 Fix address typo of tx3904irc instance.
2223 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2225 * interp.c (signal_exception): SystemCall exception now uses
2226 the exception vector.
2228 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2230 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2233 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2235 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2237 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2239 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2241 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2242 sim-main.h. Declare a struct hw_descriptor instead of struct
2243 hw_device_descriptor.
2245 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2247 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2248 right bits and then re-align left hand bytes to correct byte
2249 lanes. Fix incorrect computation in do_store_left when loading
2250 bytes from second word.
2252 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2254 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2255 * interp.c (sim_open): Only create a device tree when HW is
2258 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2259 * interp.c (signal_exception): Ditto.
2261 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2263 * gencode.c: Mark BEGEZALL as LIKELY.
2265 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2267 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2268 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2270 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2272 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2273 modules. Recognize TX39 target with "mips*tx39" pattern.
2274 * configure: Rebuilt.
2275 * sim-main.h (*): Added many macros defining bits in
2276 TX39 control registers.
2277 (SignalInterrupt): Send actual PC instead of NULL.
2278 (SignalNMIReset): New exception type.
2279 * interp.c (board): New variable for future use to identify
2280 a particular board being simulated.
2281 (mips_option_handler,mips_options): Added "--board" option.
2282 (interrupt_event): Send actual PC.
2283 (sim_open): Make memory layout conditional on board setting.
2284 (signal_exception): Initial implementation of hardware interrupt
2285 handling. Accept another break instruction variant for simulator
2287 (decode_coproc): Implement RFE instruction for TX39.
2288 (mips.igen): Decode RFE instruction as such.
2289 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2290 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2291 bbegin to implement memory map.
2292 * dv-tx3904cpu.c: New file.
2293 * dv-tx3904irc.c: New file.
2295 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2297 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2299 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2301 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2302 with calls to check_div_hilo.
2304 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2306 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2307 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2308 Add special r3900 version of do_mult_hilo.
2309 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2310 with calls to check_mult_hilo.
2311 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2312 with calls to check_div_hilo.
2314 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2316 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2317 Document a replacement.
2319 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2321 * interp.c (sim_monitor): Make mon_printf work.
2323 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2325 * sim-main.h (INSN_NAME): New arg `cpu'.
2327 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2329 * configure: Regenerated to track ../common/aclocal.m4 changes.
2331 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2333 * configure: Regenerated to track ../common/aclocal.m4 changes.
2336 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2338 * acconfig.h: New file.
2339 * configure.in: Reverted change of Apr 24; use sinclude again.
2341 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2343 * configure: Regenerated to track ../common/aclocal.m4 changes.
2346 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2348 * configure.in: Don't call sinclude.
2350 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2352 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2354 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2356 * mips.igen (ERET): Implement.
2358 * interp.c (decode_coproc): Return sign-extended EPC.
2360 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2362 * interp.c (signal_exception): Do not ignore Trap.
2363 (signal_exception): On TRAP, restart at exception address.
2364 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2365 (signal_exception): Update.
2366 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2367 so that TRAP instructions are caught.
2369 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2371 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2372 contains HI/LO access history.
2373 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2374 (HIACCESS, LOACCESS): Delete, replace with
2375 (HIHISTORY, LOHISTORY): New macros.
2376 (CHECKHILO): Delete all, moved to mips.igen
2378 * gencode.c (build_instruction): Do not generate checks for
2379 correct HI/LO register usage.
2381 * interp.c (old_engine_run): Delete checks for correct HI/LO
2384 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2385 check_mf_cycles): New functions.
2386 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2387 do_divu, domultx, do_mult, do_multu): Use.
2389 * tx.igen ("madd", "maddu"): Use.
2391 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2393 * mips.igen (DSRAV): Use function do_dsrav.
2394 (SRAV): Use new function do_srav.
2396 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2397 (B): Sign extend 11 bit immediate.
2398 (EXT-B*): Shift 16 bit immediate left by 1.
2399 (ADDIU*): Don't sign extend immediate value.
2401 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2403 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2405 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2408 * mips.igen (delayslot32, nullify_next_insn): New functions.
2409 (m16.igen): Always include.
2410 (do_*): Add more tracing.
2412 * m16.igen (delayslot16): Add NIA argument, could be called by a
2413 32 bit MIPS16 instruction.
2415 * interp.c (ifetch16): Move function from here.
2416 * sim-main.c (ifetch16): To here.
2418 * sim-main.c (ifetch16, ifetch32): Update to match current
2419 implementations of LH, LW.
2420 (signal_exception): Don't print out incorrect hex value of illegal
2423 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2425 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2428 * m16.igen: Implement MIPS16 instructions.
2430 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2431 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2432 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2433 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2434 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2435 bodies of corresponding code from 32 bit insn to these. Also used
2436 by MIPS16 versions of functions.
2438 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2439 (IMEM16): Drop NR argument from macro.
2441 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2443 * Makefile.in (SIM_OBJS): Add sim-main.o.
2445 * sim-main.h (address_translation, load_memory, store_memory,
2446 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2448 (pr_addr, pr_uword64): Declare.
2449 (sim-main.c): Include when H_REVEALS_MODULE_P.
2451 * interp.c (address_translation, load_memory, store_memory,
2452 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2454 * sim-main.c: To here. Fix compilation problems.
2456 * configure.in: Enable inlining.
2457 * configure: Re-config.
2459 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2461 * configure: Regenerated to track ../common/aclocal.m4 changes.
2463 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2465 * mips.igen: Include tx.igen.
2466 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2467 * tx.igen: New file, contains MADD and MADDU.
2469 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2470 the hardwired constant `7'.
2471 (store_memory): Ditto.
2472 (LOADDRMASK): Move definition to sim-main.h.
2474 mips.igen (MTC0): Enable for r3900.
2477 mips.igen (do_load_byte): Delete.
2478 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2479 do_store_right): New functions.
2480 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2482 configure.in: Let the tx39 use igen again.
2485 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2487 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2488 not an address sized quantity. Return zero for cache sizes.
2490 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2492 * mips.igen (r3900): r3900 does not support 64 bit integer
2495 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2497 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2499 * configure : Rebuild.
2501 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2503 * configure: Regenerated to track ../common/aclocal.m4 changes.
2505 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2507 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2509 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2511 * configure: Regenerated to track ../common/aclocal.m4 changes.
2512 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2514 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2516 * configure: Regenerated to track ../common/aclocal.m4 changes.
2518 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2520 * interp.c (Max, Min): Comment out functions. Not yet used.
2522 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2524 * configure: Regenerated to track ../common/aclocal.m4 changes.
2526 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2528 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2529 configurable settings for stand-alone simulator.
2531 * configure.in: Added X11 search, just in case.
2533 * configure: Regenerated.
2535 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2537 * interp.c (sim_write, sim_read, load_memory, store_memory):
2538 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2540 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2542 * sim-main.h (GETFCC): Return an unsigned value.
2544 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2546 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2547 (DADD): Result destination is RD not RT.
2549 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2551 * sim-main.h (HIACCESS, LOACCESS): Always define.
2553 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2555 * interp.c (sim_info): Delete.
2557 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2559 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2560 (mips_option_handler): New argument `cpu'.
2561 (sim_open): Update call to sim_add_option_table.
2563 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2565 * mips.igen (CxC1): Add tracing.
2567 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2569 * sim-main.h (Max, Min): Declare.
2571 * interp.c (Max, Min): New functions.
2573 * mips.igen (BC1): Add tracing.
2575 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2577 * interp.c Added memory map for stack in vr4100
2579 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2581 * interp.c (load_memory): Add missing "break"'s.
2583 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2585 * interp.c (sim_store_register, sim_fetch_register): Pass in
2586 length parameter. Return -1.
2588 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2590 * interp.c: Added hardware init hook, fixed warnings.
2592 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2594 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2596 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2598 * interp.c (ifetch16): New function.
2600 * sim-main.h (IMEM32): Rename IMEM.
2601 (IMEM16_IMMED): Define.
2603 (DELAY_SLOT): Update.
2605 * m16run.c (sim_engine_run): New file.
2607 * m16.igen: All instructions except LB.
2608 (LB): Call do_load_byte.
2609 * mips.igen (do_load_byte): New function.
2610 (LB): Call do_load_byte.
2612 * mips.igen: Move spec for insn bit size and high bit from here.
2613 * Makefile.in (tmp-igen, tmp-m16): To here.
2615 * m16.dc: New file, decode mips16 instructions.
2617 * Makefile.in (SIM_NO_ALL): Define.
2618 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2620 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2622 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2623 point unit to 32 bit registers.
2624 * configure: Re-generate.
2626 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2628 * configure.in (sim_use_gen): Make IGEN the default simulator
2629 generator for generic 32 and 64 bit mips targets.
2630 * configure: Re-generate.
2632 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2634 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2637 * interp.c (sim_fetch_register, sim_store_register): Read/write
2638 FGR from correct location.
2639 (sim_open): Set size of FGR's according to
2640 WITH_TARGET_FLOATING_POINT_BITSIZE.
2642 * sim-main.h (FGR): Store floating point registers in a separate
2645 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2647 * configure: Regenerated to track ../common/aclocal.m4 changes.
2649 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2651 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2653 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2655 * interp.c (pending_tick): New function. Deliver pending writes.
2657 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2658 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2659 it can handle mixed sized quantites and single bits.
2661 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2663 * interp.c (oengine.h): Do not include when building with IGEN.
2664 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2665 (sim_info): Ditto for PROCESSOR_64BIT.
2666 (sim_monitor): Replace ut_reg with unsigned_word.
2667 (*): Ditto for t_reg.
2668 (LOADDRMASK): Define.
2669 (sim_open): Remove defunct check that host FP is IEEE compliant,
2670 using software to emulate floating point.
2671 (value_fpr, ...): Always compile, was conditional on HASFPU.
2673 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2675 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2678 * interp.c (SD, CPU): Define.
2679 (mips_option_handler): Set flags in each CPU.
2680 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2681 (sim_close): Do not clear STATE, deleted anyway.
2682 (sim_write, sim_read): Assume CPU zero's vm should be used for
2684 (sim_create_inferior): Set the PC for all processors.
2685 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2687 (mips16_entry): Pass correct nr of args to store_word, load_word.
2688 (ColdReset): Cold reset all cpu's.
2689 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2690 (sim_monitor, load_memory, store_memory, signal_exception): Use
2691 `CPU' instead of STATE_CPU.
2694 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2697 * sim-main.h (signal_exception): Add sim_cpu arg.
2698 (SignalException*): Pass both SD and CPU to signal_exception.
2699 * interp.c (signal_exception): Update.
2701 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2703 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2704 address_translation): Ditto
2705 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2707 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2709 * configure: Regenerated to track ../common/aclocal.m4 changes.
2711 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2713 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2715 * mips.igen (model): Map processor names onto BFD name.
2717 * sim-main.h (CPU_CIA): Delete.
2718 (SET_CIA, GET_CIA): Define
2720 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2722 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2725 * configure.in (default_endian): Configure a big-endian simulator
2727 * configure: Re-generate.
2729 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2731 * configure: Regenerated to track ../common/aclocal.m4 changes.
2733 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2735 * interp.c (sim_monitor): Handle Densan monitor outbyte
2736 and inbyte functions.
2738 1997-12-29 Felix Lee <flee@cygnus.com>
2740 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2742 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2744 * Makefile.in (tmp-igen): Arrange for $zero to always be
2745 reset to zero after every instruction.
2747 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2749 * configure: Regenerated to track ../common/aclocal.m4 changes.
2752 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2754 * mips.igen (MSUB): Fix to work like MADD.
2755 * gencode.c (MSUB): Similarly.
2757 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2759 * configure: Regenerated to track ../common/aclocal.m4 changes.
2761 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2763 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2765 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2767 * sim-main.h (sim-fpu.h): Include.
2769 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2770 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2771 using host independant sim_fpu module.
2773 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2775 * interp.c (signal_exception): Report internal errors with SIGABRT
2778 * sim-main.h (C0_CONFIG): New register.
2779 (signal.h): No longer include.
2781 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2783 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2785 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2787 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2789 * mips.igen: Tag vr5000 instructions.
2790 (ANDI): Was missing mipsIV model, fix assembler syntax.
2791 (do_c_cond_fmt): New function.
2792 (C.cond.fmt): Handle mips I-III which do not support CC field
2794 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2795 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2797 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2798 vr5000 which saves LO in a GPR separatly.
2800 * configure.in (enable-sim-igen): For vr5000, select vr5000
2801 specific instructions.
2802 * configure: Re-generate.
2804 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2806 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2808 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2809 fmt_uninterpreted_64 bit cases to switch. Convert to
2812 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2814 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2815 as specified in IV3.2 spec.
2816 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2818 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2820 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2821 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2822 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2823 PENDING_FILL versions of instructions. Simplify.
2825 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2827 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2829 (MTHI, MFHI): Disable code checking HI-LO.
2831 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2833 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2835 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2837 * gencode.c (build_mips16_operands): Replace IPC with cia.
2839 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2840 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2842 (UndefinedResult): Replace function with macro/function
2844 (sim_engine_run): Don't save PC in IPC.
2846 * sim-main.h (IPC): Delete.
2849 * interp.c (signal_exception, store_word, load_word,
2850 address_translation, load_memory, store_memory, cache_op,
2851 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2852 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2853 current instruction address - cia - argument.
2854 (sim_read, sim_write): Call address_translation directly.
2855 (sim_engine_run): Rename variable vaddr to cia.
2856 (signal_exception): Pass cia to sim_monitor
2858 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2859 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2860 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2862 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2863 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2866 * interp.c (signal_exception): Pass restart address to
2869 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2870 idecode.o): Add dependency.
2872 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2874 (DELAY_SLOT): Update NIA not PC with branch address.
2875 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2877 * mips.igen: Use CIA not PC in branch calculations.
2878 (illegal): Call SignalException.
2879 (BEQ, ADDIU): Fix assembler.
2881 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2883 * m16.igen (JALX): Was missing.
2885 * configure.in (enable-sim-igen): New configuration option.
2886 * configure: Re-generate.
2888 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2890 * interp.c (load_memory, store_memory): Delete parameter RAW.
2891 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2892 bypassing {load,store}_memory.
2894 * sim-main.h (ByteSwapMem): Delete definition.
2896 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2898 * interp.c (sim_do_command, sim_commands): Delete mips specific
2899 commands. Handled by module sim-options.
2901 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2902 (WITH_MODULO_MEMORY): Define.
2904 * interp.c (sim_info): Delete code printing memory size.
2906 * interp.c (mips_size): Nee sim_size, delete function.
2908 (monitor, monitor_base, monitor_size): Delete global variables.
2909 (sim_open, sim_close): Delete code creating monitor and other
2910 memory regions. Use sim-memopts module, via sim_do_commandf, to
2911 manage memory regions.
2912 (load_memory, store_memory): Use sim-core for memory model.
2914 * interp.c (address_translation): Delete all memory map code
2915 except line forcing 32 bit addresses.
2917 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2919 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2922 * interp.c (logfh, logfile): Delete globals.
2923 (sim_open, sim_close): Delete code opening & closing log file.
2924 (mips_option_handler): Delete -l and -n options.
2925 (OPTION mips_options): Ditto.
2927 * interp.c (OPTION mips_options): Rename option trace to dinero.
2928 (mips_option_handler): Update.
2930 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2932 * interp.c (fetch_str): New function.
2933 (sim_monitor): Rewrite using sim_read & sim_write.
2934 (sim_open): Check magic number.
2935 (sim_open): Write monitor vectors into memory using sim_write.
2936 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2937 (sim_read, sim_write): Simplify - transfer data one byte at a
2939 (load_memory, store_memory): Clarify meaning of parameter RAW.
2941 * sim-main.h (isHOST): Defete definition.
2942 (isTARGET): Mark as depreciated.
2943 (address_translation): Delete parameter HOST.
2945 * interp.c (address_translation): Delete parameter HOST.
2947 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2951 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2952 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2954 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2956 * mips.igen: Add model filter field to records.
2958 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2960 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2962 interp.c (sim_engine_run): Do not compile function sim_engine_run
2963 when WITH_IGEN == 1.
2965 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2966 target architecture.
2968 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2969 igen. Replace with configuration variables sim_igen_flags /
2972 * m16.igen: New file. Copy mips16 insns here.
2973 * mips.igen: From here.
2975 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2977 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2979 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2981 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2983 * gencode.c (build_instruction): Follow sim_write's lead in using
2984 BigEndianMem instead of !ByteSwapMem.
2986 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2988 * configure.in (sim_gen): Dependent on target, select type of
2989 generator. Always select old style generator.
2991 configure: Re-generate.
2993 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2995 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2996 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2997 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2998 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2999 SIM_@sim_gen@_*, set by autoconf.
3001 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3003 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3005 * interp.c (ColdReset): Remove #ifdef HASFPU, check
3006 CURRENT_FLOATING_POINT instead.
3008 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3009 (address_translation): Raise exception InstructionFetch when
3010 translation fails and isINSTRUCTION.
3012 * interp.c (sim_open, sim_write, sim_monitor, store_word,
3013 sim_engine_run): Change type of of vaddr and paddr to
3015 (address_translation, prefetch, load_memory, store_memory,
3016 cache_op): Change type of vAddr and pAddr to address_word.
3018 * gencode.c (build_instruction): Change type of vaddr and paddr to
3021 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
3023 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3024 macro to obtain result of ALU op.
3026 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3028 * interp.c (sim_info): Call profile_print.
3030 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3032 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3034 * sim-main.h (WITH_PROFILE): Do not define, defined in
3035 common/sim-config.h. Use sim-profile module.
3036 (simPROFILE): Delete defintion.
3038 * interp.c (PROFILE): Delete definition.
3039 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3040 (sim_close): Delete code writing profile histogram.
3041 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3043 (sim_engine_run): Delete code profiling the PC.
3045 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3047 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3049 * interp.c (sim_monitor): Make register pointers of type
3052 * sim-main.h: Make registers of type unsigned_word not
3055 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3057 * interp.c (sync_operation): Rename from SyncOperation, make
3058 global, add SD argument.
3059 (prefetch): Rename from Prefetch, make global, add SD argument.
3060 (decode_coproc): Make global.
3062 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3064 * gencode.c (build_instruction): Generate DecodeCoproc not
3065 decode_coproc calls.
3067 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3068 (SizeFGR): Move to sim-main.h
3069 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3070 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3071 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3073 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3074 FP_RM_TOMINF, GETRM): Move to sim-main.h.
3075 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3076 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3077 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3078 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3080 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3082 (sim-alu.h): Include.
3083 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3084 (sim_cia): Typedef to instruction_address.
3086 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
3088 * Makefile.in (interp.o): Rename generated file engine.c to
3093 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
3095 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3097 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3099 * gencode.c (build_instruction): For "FPSQRT", output correct
3100 number of arguments to Recip.
3102 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
3104 * Makefile.in (interp.o): Depends on sim-main.h
3106 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3108 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3109 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3110 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3111 STATE, DSSTATE): Define
3112 (GPR, FGRIDX, ..): Define.
3114 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3115 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3116 (GPR, FGRIDX, ...): Delete macros.
3118 * interp.c: Update names to match defines from sim-main.h
3120 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
3122 * interp.c (sim_monitor): Add SD argument.
3123 (sim_warning): Delete. Replace calls with calls to
3125 (sim_error): Delete. Replace calls with sim_io_error.
3126 (open_trace, writeout32, writeout16, getnum): Add SD argument.
3127 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3128 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3130 (mips_size): Rename from sim_size. Add SD argument.
3132 * interp.c (simulator): Delete global variable.
3133 (callback): Delete global variable.
3134 (mips_option_handler, sim_open, sim_write, sim_read,
3135 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3136 sim_size,sim_monitor): Use sim_io_* not callback->*.
3137 (sim_open): ZALLOC simulator struct.
3138 (PROFILE): Do not define.
3140 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3142 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3143 support.h with corresponding code.
3145 * sim-main.h (word64, uword64), support.h: Move definition to
3147 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3150 * Makefile.in: Update dependencies
3151 * interp.c: Do not include.
3153 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3155 * interp.c (address_translation, load_memory, store_memory,
3156 cache_op): Rename to from AddressTranslation et.al., make global,
3159 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3162 * interp.c (SignalException): Rename to signal_exception, make
3165 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3167 * sim-main.h (SignalException, SignalExceptionInterrupt,
3168 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3169 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3170 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3173 * interp.c, support.h: Use.
3175 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3177 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3178 to value_fpr / store_fpr. Add SD argument.
3179 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3180 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3182 * sim-main.h (ValueFPR, StoreFPR): Define.
3184 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3186 * interp.c (sim_engine_run): Check consistency between configure
3187 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3190 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3191 (mips_fpu): Configure WITH_FLOATING_POINT.
3192 (mips_endian): Configure WITH_TARGET_ENDIAN.
3193 * configure: Update.
3195 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3197 * configure: Regenerated to track ../common/aclocal.m4 changes.
3199 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3201 * configure: Regenerated.
3203 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3205 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3207 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3209 * gencode.c (print_igen_insn_models): Assume certain architectures
3210 include all mips* instructions.
3211 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3214 * Makefile.in (tmp.igen): Add target. Generate igen input from
3217 * gencode.c (FEATURE_IGEN): Define.
3218 (main): Add --igen option. Generate output in igen format.
3219 (process_instructions): Format output according to igen option.
3220 (print_igen_insn_format): New function.
3221 (print_igen_insn_models): New function.
3222 (process_instructions): Only issue warnings and ignore
3223 instructions when no FEATURE_IGEN.
3225 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3227 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3230 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3232 * configure: Regenerated to track ../common/aclocal.m4 changes.
3234 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3236 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3237 SIM_RESERVED_BITS): Delete, moved to common.
3238 (SIM_EXTRA_CFLAGS): Update.
3240 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3242 * configure.in: Configure non-strict memory alignment.
3243 * configure: Regenerated to track ../common/aclocal.m4 changes.
3245 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3247 * configure: Regenerated to track ../common/aclocal.m4 changes.
3249 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3251 * gencode.c (SDBBP,DERET): Added (3900) insns.
3252 (RFE): Turn on for 3900.
3253 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3254 (dsstate): Made global.
3255 (SUBTARGET_R3900): Added.
3256 (CANCELDELAYSLOT): New.
3257 (SignalException): Ignore SystemCall rather than ignore and
3258 terminate. Add DebugBreakPoint handling.
3259 (decode_coproc): New insns RFE, DERET; and new registers Debug
3260 and DEPC protected by SUBTARGET_R3900.
3261 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3263 * Makefile.in,configure.in: Add mips subtarget option.
3264 * configure: Update.
3266 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3268 * gencode.c: Add r3900 (tx39).
3271 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3273 * gencode.c (build_instruction): Don't need to subtract 4 for
3276 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3278 * interp.c: Correct some HASFPU problems.
3280 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3282 * configure: Regenerated to track ../common/aclocal.m4 changes.
3284 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3286 * interp.c (mips_options): Fix samples option short form, should
3289 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3291 * interp.c (sim_info): Enable info code. Was just returning.
3293 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3295 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3298 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3300 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3302 (build_instruction): Ditto for LL.
3304 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3306 * configure: Regenerated to track ../common/aclocal.m4 changes.
3308 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3310 * configure: Regenerated to track ../common/aclocal.m4 changes.
3313 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3315 * interp.c (sim_open): Add call to sim_analyze_program, update
3318 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3320 * interp.c (sim_kill): Delete.
3321 (sim_create_inferior): Add ABFD argument. Set PC from same.
3322 (sim_load): Move code initializing trap handlers from here.
3323 (sim_open): To here.
3324 (sim_load): Delete, use sim-hload.c.
3326 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3328 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3330 * configure: Regenerated to track ../common/aclocal.m4 changes.
3333 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3335 * interp.c (sim_open): Add ABFD argument.
3336 (sim_load): Move call to sim_config from here.
3337 (sim_open): To here. Check return status.
3339 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3341 * gencode.c (build_instruction): Two arg MADD should
3342 not assign result to $0.
3344 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3346 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3347 * sim/mips/configure.in: Regenerate.
3349 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3351 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3352 signed8, unsigned8 et.al. types.
3354 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3355 hosts when selecting subreg.
3357 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3359 * interp.c (sim_engine_run): Reset the ZERO register to zero
3360 regardless of FEATURE_WARN_ZERO.
3361 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3363 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3365 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3366 (SignalException): For BreakPoints ignore any mode bits and just
3368 (SignalException): Always set the CAUSE register.
3370 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3372 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3373 exception has been taken.
3375 * interp.c: Implement the ERET and mt/f sr instructions.
3377 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3379 * interp.c (SignalException): Don't bother restarting an
3382 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3384 * interp.c (SignalException): Really take an interrupt.
3385 (interrupt_event): Only deliver interrupts when enabled.
3387 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3389 * interp.c (sim_info): Only print info when verbose.
3390 (sim_info) Use sim_io_printf for output.
3392 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3394 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3397 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3399 * interp.c (sim_do_command): Check for common commands if a
3400 simulator specific command fails.
3402 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3404 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3405 and simBE when DEBUG is defined.
3407 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3409 * interp.c (interrupt_event): New function. Pass exception event
3410 onto exception handler.
3412 * configure.in: Check for stdlib.h.
3413 * configure: Regenerate.
3415 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3416 variable declaration.
3417 (build_instruction): Initialize memval1.
3418 (build_instruction): Add UNUSED attribute to byte, bigend,
3420 (build_operands): Ditto.
3422 * interp.c: Fix GCC warnings.
3423 (sim_get_quit_code): Delete.
3425 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3426 * Makefile.in: Ditto.
3427 * configure: Re-generate.
3429 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3431 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3433 * interp.c (mips_option_handler): New function parse argumes using
3435 (myname): Replace with STATE_MY_NAME.
3436 (sim_open): Delete check for host endianness - performed by
3438 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3439 (sim_open): Move much of the initialization from here.
3440 (sim_load): To here. After the image has been loaded and
3442 (sim_open): Move ColdReset from here.
3443 (sim_create_inferior): To here.
3444 (sim_open): Make FP check less dependant on host endianness.
3446 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3448 * interp.c (sim_set_callbacks): Delete.
3450 * interp.c (membank, membank_base, membank_size): Replace with
3451 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3452 (sim_open): Remove call to callback->init. gdb/run do this.
3456 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3458 * interp.c (big_endian_p): Delete, replaced by
3459 current_target_byte_order.
3461 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3463 * interp.c (host_read_long, host_read_word, host_swap_word,
3464 host_swap_long): Delete. Using common sim-endian.
3465 (sim_fetch_register, sim_store_register): Use H2T.
3466 (pipeline_ticks): Delete. Handled by sim-events.
3468 (sim_engine_run): Update.
3470 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3472 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3474 (SignalException): To here. Signal using sim_engine_halt.
3475 (sim_stop_reason): Delete, moved to common.
3477 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3479 * interp.c (sim_open): Add callback argument.
3480 (sim_set_callbacks): Delete SIM_DESC argument.
3483 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3485 * Makefile.in (SIM_OBJS): Add common modules.
3487 * interp.c (sim_set_callbacks): Also set SD callback.
3488 (set_endianness, xfer_*, swap_*): Delete.
3489 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3490 Change to functions using sim-endian macros.
3491 (control_c, sim_stop): Delete, use common version.
3492 (simulate): Convert into.
3493 (sim_engine_run): This function.
3494 (sim_resume): Delete.
3496 * interp.c (simulation): New variable - the simulator object.
3497 (sim_kind): Delete global - merged into simulation.
3498 (sim_load): Cleanup. Move PC assignment from here.
3499 (sim_create_inferior): To here.
3501 * sim-main.h: New file.
3502 * interp.c (sim-main.h): Include.
3504 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3506 * configure: Regenerated to track ../common/aclocal.m4 changes.
3508 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3510 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3512 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3514 * gencode.c (build_instruction): DIV instructions: check
3515 for division by zero and integer overflow before using
3516 host's division operation.
3518 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3520 * Makefile.in (SIM_OBJS): Add sim-load.o.
3521 * interp.c: #include bfd.h.
3522 (target_byte_order): Delete.
3523 (sim_kind, myname, big_endian_p): New static locals.
3524 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3525 after argument parsing. Recognize -E arg, set endianness accordingly.
3526 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3527 load file into simulator. Set PC from bfd.
3528 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3529 (set_endianness): Use big_endian_p instead of target_byte_order.
3531 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3533 * interp.c (sim_size): Delete prototype - conflicts with
3534 definition in remote-sim.h. Correct definition.
3536 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3538 * configure: Regenerated to track ../common/aclocal.m4 changes.
3541 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3543 * interp.c (sim_open): New arg `kind'.
3545 * configure: Regenerated to track ../common/aclocal.m4 changes.
3547 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3549 * configure: Regenerated to track ../common/aclocal.m4 changes.
3551 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3553 * interp.c (sim_open): Set optind to 0 before calling getopt.
3555 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3557 * configure: Regenerated to track ../common/aclocal.m4 changes.
3559 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3561 * interp.c : Replace uses of pr_addr with pr_uword64
3562 where the bit length is always 64 independent of SIM_ADDR.
3563 (pr_uword64) : added.
3565 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3567 * configure: Re-generate.
3569 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3571 * configure: Regenerate to track ../common/aclocal.m4 changes.
3573 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3575 * interp.c (sim_open): New SIM_DESC result. Argument is now
3577 (other sim_*): New SIM_DESC argument.
3579 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3581 * interp.c: Fix printing of addresses for non-64-bit targets.
3582 (pr_addr): Add function to print address based on size.
3584 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3586 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3588 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3590 * gencode.c (build_mips16_operands): Correct computation of base
3591 address for extended PC relative instruction.
3593 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3595 * interp.c (mips16_entry): Add support for floating point cases.
3596 (SignalException): Pass floating point cases to mips16_entry.
3597 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3599 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3601 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3602 and then set the state to fmt_uninterpreted.
3603 (COP_SW): Temporarily set the state to fmt_word while calling
3606 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3608 * gencode.c (build_instruction): The high order may be set in the
3609 comparison flags at any ISA level, not just ISA 4.
3611 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3613 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3614 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3615 * configure.in: sinclude ../common/aclocal.m4.
3616 * configure: Regenerated.
3618 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3620 * configure: Rebuild after change to aclocal.m4.
3622 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3624 * configure configure.in Makefile.in: Update to new configure
3625 scheme which is more compatible with WinGDB builds.
3626 * configure.in: Improve comment on how to run autoconf.
3627 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3628 * Makefile.in: Use autoconf substitution to install common
3631 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3633 * gencode.c (build_instruction): Use BigEndianCPU instead of
3636 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3638 * interp.c (sim_monitor): Make output to stdout visible in
3639 wingdb's I/O log window.
3641 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3643 * support.h: Undo previous change to SIGTRAP
3646 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3648 * interp.c (store_word, load_word): New static functions.
3649 (mips16_entry): New static function.
3650 (SignalException): Look for mips16 entry and exit instructions.
3651 (simulate): Use the correct index when setting fpr_state after
3652 doing a pending move.
3654 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3656 * interp.c: Fix byte-swapping code throughout to work on
3657 both little- and big-endian hosts.
3659 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3661 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3662 with gdb/config/i386/xm-windows.h.
3664 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3666 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3667 that messes up arithmetic shifts.
3669 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3671 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3672 SIGTRAP and SIGQUIT for _WIN32.
3674 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3676 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3677 force a 64 bit multiplication.
3678 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3679 destination register is 0, since that is the default mips16 nop
3682 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3684 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3685 (build_endian_shift): Don't check proc64.
3686 (build_instruction): Always set memval to uword64. Cast op2 to
3687 uword64 when shifting it left in memory instructions. Always use
3688 the same code for stores--don't special case proc64.
3690 * gencode.c (build_mips16_operands): Fix base PC value for PC
3692 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3694 * interp.c (simJALDELAYSLOT): Define.
3695 (JALDELAYSLOT): Define.
3696 (INDELAYSLOT, INJALDELAYSLOT): Define.
3697 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3699 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3701 * interp.c (sim_open): add flush_cache as a PMON routine
3702 (sim_monitor): handle flush_cache by ignoring it
3704 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3706 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3708 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3709 (BigEndianMem): Rename to ByteSwapMem and change sense.
3710 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3711 BigEndianMem references to !ByteSwapMem.
3712 (set_endianness): New function, with prototype.
3713 (sim_open): Call set_endianness.
3714 (sim_info): Use simBE instead of BigEndianMem.
3715 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3716 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3717 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3718 ifdefs, keeping the prototype declaration.
3719 (swap_word): Rewrite correctly.
3720 (ColdReset): Delete references to CONFIG. Delete endianness related
3721 code; moved to set_endianness.
3723 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3725 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3726 * interp.c (CHECKHILO): Define away.
3727 (simSIGINT): New macro.
3728 (membank_size): Increase from 1MB to 2MB.
3729 (control_c): New function.
3730 (sim_resume): Rename parameter signal to signal_number. Add local
3731 variable prev. Call signal before and after simulate.
3732 (sim_stop_reason): Add simSIGINT support.
3733 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3735 (sim_warning): Delete call to SignalException. Do call printf_filtered
3737 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3738 a call to sim_warning.
3740 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3742 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3743 16 bit instructions.
3745 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3747 Add support for mips16 (16 bit MIPS implementation):
3748 * gencode.c (inst_type): Add mips16 instruction encoding types.
3749 (GETDATASIZEINSN): Define.
3750 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3751 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3753 (MIPS16_DECODE): New table, for mips16 instructions.
3754 (bitmap_val): New static function.
3755 (struct mips16_op): Define.
3756 (mips16_op_table): New table, for mips16 operands.
3757 (build_mips16_operands): New static function.
3758 (process_instructions): If PC is odd, decode a mips16
3759 instruction. Break out instruction handling into new
3760 build_instruction function.
3761 (build_instruction): New static function, broken out of
3762 process_instructions. Check modifiers rather than flags for SHIFT
3763 bit count and m[ft]{hi,lo} direction.
3764 (usage): Pass program name to fprintf.
3765 (main): Remove unused variable this_option_optind. Change
3766 ``*loptarg++'' to ``loptarg++''.
3767 (my_strtoul): Parenthesize && within ||.
3768 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3769 (simulate): If PC is odd, fetch a 16 bit instruction, and
3770 increment PC by 2 rather than 4.
3771 * configure.in: Add case for mips16*-*-*.
3772 * configure: Rebuild.
3774 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3776 * interp.c: Allow -t to enable tracing in standalone simulator.
3777 Fix garbage output in trace file and error messages.
3779 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3781 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3782 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3783 * configure.in: Simplify using macros in ../common/aclocal.m4.
3784 * configure: Regenerated.
3785 * tconfig.in: New file.
3787 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3789 * interp.c: Fix bugs in 64-bit port.
3790 Use ansi function declarations for msvc compiler.
3791 Initialize and test file pointer in trace code.
3792 Prevent duplicate definition of LAST_EMED_REGNUM.
3794 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3796 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3798 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3800 * interp.c (SignalException): Check for explicit terminating
3802 * gencode.c: Pass instruction value through SignalException()
3803 calls for Trap, Breakpoint and Syscall.
3805 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3807 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3808 only used on those hosts that provide it.
3809 * configure.in: Add sqrt() to list of functions to be checked for.
3810 * config.in: Re-generated.
3811 * configure: Re-generated.
3813 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3815 * gencode.c (process_instructions): Call build_endian_shift when
3816 expanding STORE RIGHT, to fix swr.
3817 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3818 clear the high bits.
3819 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3820 Fix float to int conversions to produce signed values.
3822 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3824 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3825 (process_instructions): Correct handling of nor instruction.
3826 Correct shift count for 32 bit shift instructions. Correct sign
3827 extension for arithmetic shifts to not shift the number of bits in
3828 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3829 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3831 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3832 It's OK to have a mult follow a mult. What's not OK is to have a
3833 mult follow an mfhi.
3834 (Convert): Comment out incorrect rounding code.
3836 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3838 * interp.c (sim_monitor): Improved monitor printf
3839 simulation. Tidied up simulator warnings, and added "--log" option
3840 for directing warning message output.
3841 * gencode.c: Use sim_warning() rather than WARNING macro.
3843 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3845 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3846 getopt1.o, rather than on gencode.c. Link objects together.
3847 Don't link against -liberty.
3848 (gencode.o, getopt.o, getopt1.o): New targets.
3849 * gencode.c: Include <ctype.h> and "ansidecl.h".
3850 (AND): Undefine after including "ansidecl.h".
3851 (ULONG_MAX): Define if not defined.
3852 (OP_*): Don't define macros; now defined in opcode/mips.h.
3853 (main): Call my_strtoul rather than strtoul.
3854 (my_strtoul): New static function.
3856 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3858 * gencode.c (process_instructions): Generate word64 and uword64
3859 instead of `long long' and `unsigned long long' data types.
3860 * interp.c: #include sysdep.h to get signals, and define default
3862 * (Convert): Work around for Visual-C++ compiler bug with type
3864 * support.h: Make things compile under Visual-C++ by using
3865 __int64 instead of `long long'. Change many refs to long long
3866 into word64/uword64 typedefs.
3868 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3870 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3871 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3873 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3874 (AC_PROG_INSTALL): Added.
3875 (AC_PROG_CC): Moved to before configure.host call.
3876 * configure: Rebuilt.
3878 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3880 * configure.in: Define @SIMCONF@ depending on mips target.
3881 * configure: Rebuild.
3882 * Makefile.in (run): Add @SIMCONF@ to control simulator
3884 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3885 * interp.c: Remove some debugging, provide more detailed error
3886 messages, update memory accesses to use LOADDRMASK.
3888 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3890 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3891 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3893 * configure: Rebuild.
3894 * config.in: New file, generated by autoheader.
3895 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3896 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3897 HAVE_ANINT and HAVE_AINT, as appropriate.
3898 * Makefile.in (run): Use @LIBS@ rather than -lm.
3899 (interp.o): Depend upon config.h.
3900 (Makefile): Just rebuild Makefile.
3901 (clean): Remove stamp-h.
3902 (mostlyclean): Make the same as clean, not as distclean.
3903 (config.h, stamp-h): New targets.
3905 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3907 * interp.c (ColdReset): Fix boolean test. Make all simulator
3910 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3912 * interp.c (xfer_direct_word, xfer_direct_long,
3913 swap_direct_word, swap_direct_long, xfer_big_word,
3914 xfer_big_long, xfer_little_word, xfer_little_long,
3915 swap_word,swap_long): Added.
3916 * interp.c (ColdReset): Provide function indirection to
3917 host<->simulated_target transfer routines.
3918 * interp.c (sim_store_register, sim_fetch_register): Updated to
3919 make use of indirected transfer routines.
3921 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3923 * gencode.c (process_instructions): Ensure FP ABS instruction
3925 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3926 system call support.
3928 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3930 * interp.c (sim_do_command): Complain if callback structure not
3933 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3935 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3936 support for Sun hosts.
3937 * Makefile.in (gencode): Ensure the host compiler and libraries
3938 used for cross-hosted build.
3940 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3942 * interp.c, gencode.c: Some more (TODO) tidying.
3944 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3946 * gencode.c, interp.c: Replaced explicit long long references with
3947 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3948 * support.h (SET64LO, SET64HI): Macros added.
3950 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3952 * configure: Regenerate with autoconf 2.7.
3954 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3956 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3957 * support.h: Remove superfluous "1" from #if.
3958 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3960 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3962 * interp.c (StoreFPR): Control UndefinedResult() call on
3963 WARN_RESULT manifest.
3965 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3967 * gencode.c: Tidied instruction decoding, and added FP instruction
3970 * interp.c: Added dineroIII, and BSD profiling support. Also
3971 run-time FP handling.
3973 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3975 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3976 gencode.c, interp.c, support.h: created.
projects / thirdparty / binutils-gdb.git / blob