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[thirdparty/binutils-gdb.git] / sim / mips / ChangeLog
1 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2
3 * configure: Regenerated to track ../common/aclocal.m4 changes.
4
5 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
6
7 * interp.c (sim_monitor): Handle Densan monitor outbyte
8 and inbyte functions.
9
10 1997-12-29 Felix Lee <flee@cygnus.com>
11
12 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
13
14 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
15
16 * Makefile.in (tmp-igen): Arrange for $zero to always be
17 reset to zero after every instruction.
18
19 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
20
21 * configure: Regenerated to track ../common/aclocal.m4 changes.
22 * config.in: Ditto.
23
24 start-sanitize-vr5400
25 Sat Dec 13 15:18:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
26
27 * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
28 bit values.
29
30 end-sanitize-vr5400
31 start-sanitize-vr5400
32 Fri Dec 12 12:26:07 1997 Jeffrey A Law (law@cygnus.com)
33
34 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
35 vr5400 with the vr5000 as the default.
36
37 end-sanitize-vr5400
38 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
39
40 * mips.igen (MSUB): Fix to work like MADD.
41 * gencode.c (MSUB): Similarly.
42
43 start-sanitize-vr5400
44 Tue Dec 9 12:02:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
45
46 * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
47 vr5400.
48
49 end-sanitize-vr5400
50 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
51
52 * configure: Regenerated to track ../common/aclocal.m4 changes.
53
54 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
55
56 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
57
58 start-sanitize-vr5400
59 * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
60 (value_cc, store_cc): Implement.
61
62 * sim-main.h: Add 8*3*8 bit accumulator.
63
64 * vr5400.igen: Move mdmx instructins from here
65 * mdmx.igen: To here - new file. Add/fix missing instructions.
66 * mips.igen: Include mdmx.igen.
67 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
68
69 end-sanitize-vr5400
70 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
71
72 * sim-main.h (sim-fpu.h): Include.
73
74 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
75 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
76 using host independant sim_fpu module.
77
78 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
79
80 * interp.c (signal_exception): Report internal errors with SIGABRT
81 not SIGQUIT.
82
83 * sim-main.h (C0_CONFIG): New register.
84 (signal.h): No longer include.
85
86 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
87
88 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
89
90 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
91
92 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
93
94 * mips.igen: Tag vr5000 instructions.
95 (ANDI): Was missing mipsIV model, fix assembler syntax.
96 (do_c_cond_fmt): New function.
97 (C.cond.fmt): Handle mips I-III which do not support CC field
98 separatly.
99 (bc1): Handle mips IV which do not have a delaed FCC separatly.
100 (SDR): Mask paddr when BigEndianMem, not the converse as specified
101 in IV3.2 spec.
102 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
103 vr5000 which saves LO in a GPR separatly.
104
105 * configure.in (enable-sim-igen): For vr5000, select vr5000
106 specific instructions.
107 * configure: Re-generate.
108
109 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
110
111 * Makefile.in (SIM_OBJS): Add sim-fpu module.
112
113 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
114 fmt_uninterpreted_64 bit cases to switch. Convert to
115 fmt_formatted,
116
117 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
118
119 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
120 as specified in IV3.2 spec.
121 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
122
123 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
124
125 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
126 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
127 (start-sanitize-r5900):
128 (LWXC1, SWXC1): Delete from r5900 instruction set.
129 (end-sanitize-r5900):
130 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
131 PENDING_FILL versions of instructions. Simplify.
132 (X): New function.
133 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
134 instructions.
135 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
136 a signed value.
137 (MTHI, MFHI): Disable code checking HI-LO.
138
139 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
140 global.
141 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
142
143 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
144
145 * gencode.c (build_mips16_operands): Replace IPC with cia.
146
147 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
148 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
149 IPC to `cia'.
150 (UndefinedResult): Replace function with macro/function
151 combination.
152 (sim_engine_run): Don't save PC in IPC.
153
154 * sim-main.h (IPC): Delete.
155
156 start-sanitize-vr5400
157 * vr5400.igen (vr): Add missing cia argument to value_fpr.
158 (do_select): Rename function select.
159 end-sanitize-vr5400
160
161 * interp.c (signal_exception, store_word, load_word,
162 address_translation, load_memory, store_memory, cache_op,
163 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
164 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
165 current instruction address - cia - argument.
166 (sim_read, sim_write): Call address_translation directly.
167 (sim_engine_run): Rename variable vaddr to cia.
168 (signal_exception): Pass cia to sim_monitor
169
170 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
171 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
172 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
173
174 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
175 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
176 SIM_ASSERT.
177
178 * interp.c (signal_exception): Pass restart address to
179 sim_engine_restart.
180
181 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
182 idecode.o): Add dependency.
183
184 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
185 Delete definitions
186 (DELAY_SLOT): Update NIA not PC with branch address.
187 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
188
189 * mips.igen: Use CIA not PC in branch calculations.
190 (illegal): Call SignalException.
191 (BEQ, ADDIU): Fix assembler.
192
193 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
194
195 * m16.igen (JALX): Was missing.
196
197 * configure.in (enable-sim-igen): New configuration option.
198 * configure: Re-generate.
199
200 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
201
202 * interp.c (load_memory, store_memory): Delete parameter RAW.
203 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
204 bypassing {load,store}_memory.
205
206 * sim-main.h (ByteSwapMem): Delete definition.
207
208 * Makefile.in (SIM_OBJS): Add sim-memopt module.
209
210 * interp.c (sim_do_command, sim_commands): Delete mips specific
211 commands. Handled by module sim-options.
212
213 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
214 (WITH_MODULO_MEMORY): Define.
215
216 * interp.c (sim_info): Delete code printing memory size.
217
218 * interp.c (mips_size): Nee sim_size, delete function.
219 (power2): Delete.
220 (monitor, monitor_base, monitor_size): Delete global variables.
221 (sim_open, sim_close): Delete code creating monitor and other
222 memory regions. Use sim-memopts module, via sim_do_commandf, to
223 manage memory regions.
224 (load_memory, store_memory): Use sim-core for memory model.
225
226 * interp.c (address_translation): Delete all memory map code
227 except line forcing 32 bit addresses.
228
229 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
230
231 * sim-main.h (WITH_TRACE): Delete definition. Enables common
232 trace options.
233
234 * interp.c (logfh, logfile): Delete globals.
235 (sim_open, sim_close): Delete code opening & closing log file.
236 (mips_option_handler): Delete -l and -n options.
237 (OPTION mips_options): Ditto.
238
239 * interp.c (OPTION mips_options): Rename option trace to dinero.
240 (mips_option_handler): Update.
241
242 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
243
244 * interp.c (fetch_str): New function.
245 (sim_monitor): Rewrite using sim_read & sim_write.
246 (sim_open): Check magic number.
247 (sim_open): Write monitor vectors into memory using sim_write.
248 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
249 (sim_read, sim_write): Simplify - transfer data one byte at a
250 time.
251 (load_memory, store_memory): Clarify meaning of parameter RAW.
252
253 * sim-main.h (isHOST): Defete definition.
254 (isTARGET): Mark as depreciated.
255 (address_translation): Delete parameter HOST.
256
257 * interp.c (address_translation): Delete parameter HOST.
258
259 start-sanitize-tx49
260 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
261
262 * gencode.c: Add tx49 configury and insns.
263 * configure.in: Add tx49 configury.
264 * configure: Update.
265
266 end-sanitize-tx49
267 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
268
269 * mips.igen:
270
271 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
272 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
273
274 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
275
276 * mips.igen: Add model filter field to records.
277
278 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
279
280 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
281
282 interp.c (sim_engine_run): Do not compile function sim_engine_run
283 when WITH_IGEN == 1.
284
285 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
286 target architecture.
287
288 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
289 igen. Replace with configuration variables sim_igen_flags /
290 sim_m16_flags.
291
292 start-sanitize-r5900
293 * r5900.igen: New file. Copy r5900 insns here.
294 end-sanitize-r5900
295 start-sanitize-vr5400
296 * vr5400.igen: New file.
297 end-sanitize-vr5400
298 * m16.igen: New file. Copy mips16 insns here.
299 * mips.igen: From here.
300
301 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
302
303 start-sanitize-vr5400
304 * mips.igen: Tag all mipsIV instructions with vr5400 model.
305
306 * configure.in: Add mips64vr5400 target.
307 * configure: Re-generate.
308
309 end-sanitize-vr5400
310 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
311 to top.
312 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
313
314 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
315
316 * gencode.c (build_instruction): Follow sim_write's lead in using
317 BigEndianMem instead of !ByteSwapMem.
318
319 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
320
321 * configure.in (sim_gen): Dependent on target, select type of
322 generator. Always select old style generator.
323
324 configure: Re-generate.
325
326 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
327 targets.
328 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
329 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
330 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
331 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
332 SIM_@sim_gen@_*, set by autoconf.
333
334 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
335
336 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
337
338 * interp.c (ColdReset): Remove #ifdef HASFPU, check
339 CURRENT_FLOATING_POINT instead.
340
341 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
342 (address_translation): Raise exception InstructionFetch when
343 translation fails and isINSTRUCTION.
344
345 * interp.c (sim_open, sim_write, sim_monitor, store_word,
346 sim_engine_run): Change type of of vaddr and paddr to
347 address_word.
348 (address_translation, prefetch, load_memory, store_memory,
349 cache_op): Change type of vAddr and pAddr to address_word.
350
351 * gencode.c (build_instruction): Change type of vaddr and paddr to
352 address_word.
353
354 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
355
356 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
357 macro to obtain result of ALU op.
358
359 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
360
361 * interp.c (sim_info): Call profile_print.
362
363 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
364
365 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
366
367 * sim-main.h (WITH_PROFILE): Do not define, defined in
368 common/sim-config.h. Use sim-profile module.
369 (simPROFILE): Delete defintion.
370
371 * interp.c (PROFILE): Delete definition.
372 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
373 (sim_close): Delete code writing profile histogram.
374 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
375 Delete.
376 (sim_engine_run): Delete code profiling the PC.
377
378 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
379
380 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
381
382 * interp.c (sim_monitor): Make register pointers of type
383 unsigned_word*.
384
385 * sim-main.h: Make registers of type unsigned_word not
386 signed_word.
387
388 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
389
390 start-sanitize-r5900
391 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
392 ...): Move to sim-main.h
393
394 end-sanitize-r5900
395 * interp.c (sync_operation): Rename from SyncOperation, make
396 global, add SD argument.
397 (prefetch): Rename from Prefetch, make global, add SD argument.
398 (decode_coproc): Make global.
399
400 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
401
402 * gencode.c (build_instruction): Generate DecodeCoproc not
403 decode_coproc calls.
404
405 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
406 (SizeFGR): Move to sim-main.h
407 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
408 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
409 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
410 sim-main.h.
411 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
412 FP_RM_TOMINF, GETRM): Move to sim-main.h.
413 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
414 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
415 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
416 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
417
418 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
419 exception.
420 (sim-alu.h): Include.
421 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
422 (sim_cia): Typedef to instruction_address.
423
424 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
425
426 * Makefile.in (interp.o): Rename generated file engine.c to
427 oengine.c.
428
429 * interp.c: Update.
430
431 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
432
433 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
434
435 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
436
437 * gencode.c (build_instruction): For "FPSQRT", output correct
438 number of arguments to Recip.
439
440 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
441
442 * Makefile.in (interp.o): Depends on sim-main.h
443
444 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
445
446 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
447 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
448 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
449 STATE, DSSTATE): Define
450 (GPR, FGRIDX, ..): Define.
451
452 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
453 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
454 (GPR, FGRIDX, ...): Delete macros.
455
456 * interp.c: Update names to match defines from sim-main.h
457
458 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
459
460 * interp.c (sim_monitor): Add SD argument.
461 (sim_warning): Delete. Replace calls with calls to
462 sim_io_eprintf.
463 (sim_error): Delete. Replace calls with sim_io_error.
464 (open_trace, writeout32, writeout16, getnum): Add SD argument.
465 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
466 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
467 argument.
468 (mips_size): Rename from sim_size. Add SD argument.
469
470 * interp.c (simulator): Delete global variable.
471 (callback): Delete global variable.
472 (mips_option_handler, sim_open, sim_write, sim_read,
473 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
474 sim_size,sim_monitor): Use sim_io_* not callback->*.
475 (sim_open): ZALLOC simulator struct.
476 (PROFILE): Do not define.
477
478 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
479
480 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
481 support.h with corresponding code.
482
483 * sim-main.h (word64, uword64), support.h: Move definition to
484 sim-main.h.
485 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
486
487 * support.h: Delete
488 * Makefile.in: Update dependencies
489 * interp.c: Do not include.
490
491 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
492
493 * interp.c (address_translation, load_memory, store_memory,
494 cache_op): Rename to from AddressTranslation et.al., make global,
495 add SD argument
496
497 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
498 CacheOp): Define.
499
500 * interp.c (SignalException): Rename to signal_exception, make
501 global.
502
503 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
504
505 * sim-main.h (SignalException, SignalExceptionInterrupt,
506 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
507 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
508 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
509 Define.
510
511 * interp.c, support.h: Use.
512
513 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
514
515 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
516 to value_fpr / store_fpr. Add SD argument.
517 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
518 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
519
520 * sim-main.h (ValueFPR, StoreFPR): Define.
521
522 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
523
524 * interp.c (sim_engine_run): Check consistency between configure
525 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
526 and HASFPU.
527
528 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
529 (mips_fpu): Configure WITH_FLOATING_POINT.
530 (mips_endian): Configure WITH_TARGET_ENDIAN.
531 * configure: Update.
532
533 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
534
535 * configure: Regenerated to track ../common/aclocal.m4 changes.
536
537 start-sanitize-r5900
538 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
539
540 * interp.c (MAX_REG): Allow up-to 128 registers.
541 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
542 (REGISTER_SA): Ditto.
543 (sim_open): Initialize register_widths for r5900 specific
544 registers.
545 (sim_fetch_register, sim_store_register): Check for request of
546 r5900 specific SA register. Check for request for hi 64 bits of
547 r5900 specific registers.
548
549 end-sanitize-r5900
550 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
551
552 * configure: Regenerated.
553
554 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
555
556 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
557
558 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
559
560 * gencode.c (print_igen_insn_models): Assume certain architectures
561 include all mips* instructions.
562 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
563 instruction.
564
565 * Makefile.in (tmp.igen): Add target. Generate igen input from
566 gencode file.
567
568 * gencode.c (FEATURE_IGEN): Define.
569 (main): Add --igen option. Generate output in igen format.
570 (process_instructions): Format output according to igen option.
571 (print_igen_insn_format): New function.
572 (print_igen_insn_models): New function.
573 (process_instructions): Only issue warnings and ignore
574 instructions when no FEATURE_IGEN.
575
576 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
577
578 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
579 MIPS targets.
580
581 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
582
583 * configure: Regenerated to track ../common/aclocal.m4 changes.
584
585 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
586
587 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
588 SIM_RESERVED_BITS): Delete, moved to common.
589 (SIM_EXTRA_CFLAGS): Update.
590
591 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
592
593 * configure.in: Configure non-strict memory alignment.
594 * configure: Regenerated to track ../common/aclocal.m4 changes.
595
596 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
597
598 * configure: Regenerated to track ../common/aclocal.m4 changes.
599
600 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
601
602 * gencode.c (SDBBP,DERET): Added (3900) insns.
603 (RFE): Turn on for 3900.
604 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
605 (dsstate): Made global.
606 (SUBTARGET_R3900): Added.
607 (CANCELDELAYSLOT): New.
608 (SignalException): Ignore SystemCall rather than ignore and
609 terminate. Add DebugBreakPoint handling.
610 (decode_coproc): New insns RFE, DERET; and new registers Debug
611 and DEPC protected by SUBTARGET_R3900.
612 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
613 bits explicitly.
614 * Makefile.in,configure.in: Add mips subtarget option.
615 * configure: Update.
616
617 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
618
619 * gencode.c: Add r3900 (tx39).
620
621 start-sanitize-tx19
622 * gencode.c: Fix some configuration problems by improving
623 the relationship between tx19 and tx39.
624 end-sanitize-tx19
625
626 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
627
628 * gencode.c (build_instruction): Don't need to subtract 4 for
629 JALR, just 2.
630
631 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
632
633 * interp.c: Correct some HASFPU problems.
634
635 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
636
637 * configure: Regenerated to track ../common/aclocal.m4 changes.
638
639 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
640
641 * interp.c (mips_options): Fix samples option short form, should
642 be `x'.
643
644 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
645
646 * interp.c (sim_info): Enable info code. Was just returning.
647
648 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
649
650 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
651 MFC0.
652
653 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
654
655 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
656 constants.
657 (build_instruction): Ditto for LL.
658
659 start-sanitize-tx19
660 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
661
662 * mips/configure.in, mips/gencode: Add tx19/r1900.
663
664 end-sanitize-tx19
665 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
666
667 * configure: Regenerated to track ../common/aclocal.m4 changes.
668
669 start-sanitize-r5900
670 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
671
672 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
673 for overflow due to ABS of MININT, set result to MAXINT.
674 (build_instruction): For "psrlvw", signextend bit 31.
675
676 end-sanitize-r5900
677 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
678
679 * configure: Regenerated to track ../common/aclocal.m4 changes.
680 * config.in: Ditto.
681
682 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
683
684 * interp.c (sim_open): Add call to sim_analyze_program, update
685 call to sim_config.
686
687 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
688
689 * interp.c (sim_kill): Delete.
690 (sim_create_inferior): Add ABFD argument. Set PC from same.
691 (sim_load): Move code initializing trap handlers from here.
692 (sim_open): To here.
693 (sim_load): Delete, use sim-hload.c.
694
695 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
696
697 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
698
699 * configure: Regenerated to track ../common/aclocal.m4 changes.
700 * config.in: Ditto.
701
702 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
703
704 * interp.c (sim_open): Add ABFD argument.
705 (sim_load): Move call to sim_config from here.
706 (sim_open): To here. Check return status.
707
708 start-sanitize-r5900
709 * gencode.c (build_instruction): Do not define x8000000000000000,
710 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
711
712 end-sanitize-r5900
713 start-sanitize-r5900
714 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
715
716 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
717 "pdivuw" check for overflow due to signed divide by -1.
718
719 end-sanitize-r5900
720 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
721
722 * gencode.c (build_instruction): Two arg MADD should
723 not assign result to $0.
724
725 start-sanitize-r5900
726 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
727
728 * gencode.c (build_instruction): For "ppac5" use unsigned
729 arrithmetic so that the sign bit doesn't smear when right shifted.
730 (build_instruction): For "pdiv" perform sign extension when
731 storing results in HI and LO.
732 (build_instructions): For "pdiv" and "pdivbw" check for
733 divide-by-zero.
734 (build_instruction): For "pmfhl.slw" update hi part of dest
735 register as well as low part.
736 (build_instruction): For "pmfhl" portably handle long long values.
737 (build_instruction): For "pmfhl.sh" correctly negative values.
738 Store half words 2 and three in the correct place.
739 (build_instruction): For "psllvw", sign extend value after shift.
740
741 end-sanitize-r5900
742 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
743
744 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
745 * sim/mips/configure.in: Regenerate.
746
747 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
748
749 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
750 signed8, unsigned8 et.al. types.
751
752 start-sanitize-r5900
753 * gencode.c (build_instruction): For PMULTU* do not sign extend
754 registers. Make generated code easier to debug.
755
756 end-sanitize-r5900
757 * interp.c (SUB_REG_FETCH): Handle both little and big endian
758 hosts when selecting subreg.
759
760 start-sanitize-r5900
761 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
762
763 * gencode.c (type_for_data_len): For 32bit operations concerned
764 with overflow, perform op using 64bits.
765 (build_instruction): For PADD, always compute operation using type
766 returned by type_for_data_len.
767 (build_instruction): For PSUBU, when overflow, saturate to zero as
768 actually underflow.
769
770 end-sanitize-r5900
771 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
772
773 start-sanitize-r5900
774 * gencode.c (build_instruction): Handle "pext5" according to
775 version 1.95 of the r5900 ISA.
776
777 * gencode.c (build_instruction): Handle "ppac5" according to
778 version 1.95 of the r5900 ISA.
779
780 end-sanitize-r5900
781 * interp.c (sim_engine_run): Reset the ZERO register to zero
782 regardless of FEATURE_WARN_ZERO.
783 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
784
785 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
786
787 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
788 (SignalException): For BreakPoints ignore any mode bits and just
789 save the PC.
790 (SignalException): Always set the CAUSE register.
791
792 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
793
794 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
795 exception has been taken.
796
797 * interp.c: Implement the ERET and mt/f sr instructions.
798
799 start-sanitize-r5900
800 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
801
802 * gencode.c (build_instruction): For paddu, extract unsigned
803 sub-fields.
804
805 * gencode.c (build_instruction): Saturate padds instead of padd
806 instructions.
807
808 end-sanitize-r5900
809 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
810
811 * interp.c (SignalException): Don't bother restarting an
812 interrupt.
813
814 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
815
816 * interp.c (SignalException): Really take an interrupt.
817 (interrupt_event): Only deliver interrupts when enabled.
818
819 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
820
821 * interp.c (sim_info): Only print info when verbose.
822 (sim_info) Use sim_io_printf for output.
823
824 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
825
826 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
827 mips architectures.
828
829 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
830
831 * interp.c (sim_do_command): Check for common commands if a
832 simulator specific command fails.
833
834 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
835
836 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
837 and simBE when DEBUG is defined.
838
839 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
840
841 * interp.c (interrupt_event): New function. Pass exception event
842 onto exception handler.
843
844 * configure.in: Check for stdlib.h.
845 * configure: Regenerate.
846
847 * gencode.c (build_instruction): Add UNUSED attribute to tempS
848 variable declaration.
849 (build_instruction): Initialize memval1.
850 (build_instruction): Add UNUSED attribute to byte, bigend,
851 reverse.
852 (build_operands): Ditto.
853
854 * interp.c: Fix GCC warnings.
855 (sim_get_quit_code): Delete.
856
857 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
858 * Makefile.in: Ditto.
859 * configure: Re-generate.
860
861 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
862
863 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
864
865 * interp.c (mips_option_handler): New function parse argumes using
866 sim-options.
867 (myname): Replace with STATE_MY_NAME.
868 (sim_open): Delete check for host endianness - performed by
869 sim_config.
870 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
871 (sim_open): Move much of the initialization from here.
872 (sim_load): To here. After the image has been loaded and
873 endianness set.
874 (sim_open): Move ColdReset from here.
875 (sim_create_inferior): To here.
876 (sim_open): Make FP check less dependant on host endianness.
877
878 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
879 run.
880 * interp.c (sim_set_callbacks): Delete.
881
882 * interp.c (membank, membank_base, membank_size): Replace with
883 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
884 (sim_open): Remove call to callback->init. gdb/run do this.
885
886 * interp.c: Update
887
888 * sim-main.h (SIM_HAVE_FLATMEM): Define.
889
890 * interp.c (big_endian_p): Delete, replaced by
891 current_target_byte_order.
892
893 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
894
895 * interp.c (host_read_long, host_read_word, host_swap_word,
896 host_swap_long): Delete. Using common sim-endian.
897 (sim_fetch_register, sim_store_register): Use H2T.
898 (pipeline_ticks): Delete. Handled by sim-events.
899 (sim_info): Update.
900 (sim_engine_run): Update.
901
902 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
903
904 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
905 reason from here.
906 (SignalException): To here. Signal using sim_engine_halt.
907 (sim_stop_reason): Delete, moved to common.
908
909 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
910
911 * interp.c (sim_open): Add callback argument.
912 (sim_set_callbacks): Delete SIM_DESC argument.
913 (sim_size): Ditto.
914
915 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
916
917 * Makefile.in (SIM_OBJS): Add common modules.
918
919 * interp.c (sim_set_callbacks): Also set SD callback.
920 (set_endianness, xfer_*, swap_*): Delete.
921 (host_read_word, host_read_long, host_swap_word, host_swap_long):
922 Change to functions using sim-endian macros.
923 (control_c, sim_stop): Delete, use common version.
924 (simulate): Convert into.
925 (sim_engine_run): This function.
926 (sim_resume): Delete.
927
928 * interp.c (simulation): New variable - the simulator object.
929 (sim_kind): Delete global - merged into simulation.
930 (sim_load): Cleanup. Move PC assignment from here.
931 (sim_create_inferior): To here.
932
933 * sim-main.h: New file.
934 * interp.c (sim-main.h): Include.
935
936 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
937
938 * configure: Regenerated to track ../common/aclocal.m4 changes.
939
940 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
941
942 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
943
944 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
945
946 * gencode.c (build_instruction): DIV instructions: check
947 for division by zero and integer overflow before using
948 host's division operation.
949
950 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
951
952 * Makefile.in (SIM_OBJS): Add sim-load.o.
953 * interp.c: #include bfd.h.
954 (target_byte_order): Delete.
955 (sim_kind, myname, big_endian_p): New static locals.
956 (sim_open): Set sim_kind, myname. Move call to set_endianness to
957 after argument parsing. Recognize -E arg, set endianness accordingly.
958 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
959 load file into simulator. Set PC from bfd.
960 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
961 (set_endianness): Use big_endian_p instead of target_byte_order.
962
963 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
964
965 * interp.c (sim_size): Delete prototype - conflicts with
966 definition in remote-sim.h. Correct definition.
967
968 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
969
970 * configure: Regenerated to track ../common/aclocal.m4 changes.
971 * config.in: Ditto.
972
973 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
974
975 * interp.c (sim_open): New arg `kind'.
976
977 * configure: Regenerated to track ../common/aclocal.m4 changes.
978
979 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
980
981 * configure: Regenerated to track ../common/aclocal.m4 changes.
982
983 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
984
985 * interp.c (sim_open): Set optind to 0 before calling getopt.
986
987 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
988
989 * configure: Regenerated to track ../common/aclocal.m4 changes.
990
991 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
992
993 * interp.c : Replace uses of pr_addr with pr_uword64
994 where the bit length is always 64 independent of SIM_ADDR.
995 (pr_uword64) : added.
996
997 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
998
999 * configure: Re-generate.
1000
1001 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1002
1003 * configure: Regenerate to track ../common/aclocal.m4 changes.
1004
1005 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1006
1007 * interp.c (sim_open): New SIM_DESC result. Argument is now
1008 in argv form.
1009 (other sim_*): New SIM_DESC argument.
1010
1011 start-sanitize-r5900
1012 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
1013
1014 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1015 Change values to avoid overloading DOUBLEWORD which is tested
1016 for all insns.
1017 * gencode.c: reinstate "offending code".
1018
1019 end-sanitize-r5900
1020 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1021
1022 * interp.c: Fix printing of addresses for non-64-bit targets.
1023 (pr_addr): Add function to print address based on size.
1024 start-sanitize-r5900
1025 * gencode.c: #ifdef out offending code until a permanent fix
1026 can be added. Code is causing build errors for non-5900 mips targets.
1027 end-sanitize-r5900
1028
1029 start-sanitize-r5900
1030 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
1031
1032 * gencode.c (process_instructions): Correct test for ISA dependent
1033 architecture bits in isa field of MIPS_DECODE.
1034
1035 end-sanitize-r5900
1036 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1037
1038 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1039
1040 start-sanitize-r5900
1041 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
1042
1043 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1044 PMADDUW.
1045
1046 end-sanitize-r5900
1047 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1048
1049 * gencode.c (build_mips16_operands): Correct computation of base
1050 address for extended PC relative instruction.
1051
1052 start-sanitize-r5900
1053 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
1054
1055 * Makefile.in, configure, configure.in, gencode.c,
1056 interp.c, support.h: add r5900.
1057
1058 end-sanitize-r5900
1059 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1060
1061 * interp.c (mips16_entry): Add support for floating point cases.
1062 (SignalException): Pass floating point cases to mips16_entry.
1063 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1064 registers.
1065 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1066 or fmt_word.
1067 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1068 and then set the state to fmt_uninterpreted.
1069 (COP_SW): Temporarily set the state to fmt_word while calling
1070 ValueFPR.
1071
1072 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1073
1074 * gencode.c (build_instruction): The high order may be set in the
1075 comparison flags at any ISA level, not just ISA 4.
1076
1077 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1078
1079 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1080 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1081 * configure.in: sinclude ../common/aclocal.m4.
1082 * configure: Regenerated.
1083
1084 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1085
1086 * configure: Rebuild after change to aclocal.m4.
1087
1088 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1089
1090 * configure configure.in Makefile.in: Update to new configure
1091 scheme which is more compatible with WinGDB builds.
1092 * configure.in: Improve comment on how to run autoconf.
1093 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1094 * Makefile.in: Use autoconf substitution to install common
1095 makefile fragment.
1096
1097 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1098
1099 * gencode.c (build_instruction): Use BigEndianCPU instead of
1100 ByteSwapMem.
1101
1102 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1103
1104 * interp.c (sim_monitor): Make output to stdout visible in
1105 wingdb's I/O log window.
1106
1107 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1108
1109 * support.h: Undo previous change to SIGTRAP
1110 and SIGQUIT values.
1111
1112 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1113
1114 * interp.c (store_word, load_word): New static functions.
1115 (mips16_entry): New static function.
1116 (SignalException): Look for mips16 entry and exit instructions.
1117 (simulate): Use the correct index when setting fpr_state after
1118 doing a pending move.
1119
1120 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1121
1122 * interp.c: Fix byte-swapping code throughout to work on
1123 both little- and big-endian hosts.
1124
1125 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1126
1127 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1128 with gdb/config/i386/xm-windows.h.
1129
1130 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1131
1132 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1133 that messes up arithmetic shifts.
1134
1135 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1136
1137 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1138 SIGTRAP and SIGQUIT for _WIN32.
1139
1140 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1141
1142 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1143 force a 64 bit multiplication.
1144 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1145 destination register is 0, since that is the default mips16 nop
1146 instruction.
1147
1148 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1149
1150 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1151 (build_endian_shift): Don't check proc64.
1152 (build_instruction): Always set memval to uword64. Cast op2 to
1153 uword64 when shifting it left in memory instructions. Always use
1154 the same code for stores--don't special case proc64.
1155
1156 * gencode.c (build_mips16_operands): Fix base PC value for PC
1157 relative operands.
1158 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1159 jal instruction.
1160 * interp.c (simJALDELAYSLOT): Define.
1161 (JALDELAYSLOT): Define.
1162 (INDELAYSLOT, INJALDELAYSLOT): Define.
1163 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1164
1165 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1166
1167 * interp.c (sim_open): add flush_cache as a PMON routine
1168 (sim_monitor): handle flush_cache by ignoring it
1169
1170 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1171
1172 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1173 BigEndianMem.
1174 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1175 (BigEndianMem): Rename to ByteSwapMem and change sense.
1176 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1177 BigEndianMem references to !ByteSwapMem.
1178 (set_endianness): New function, with prototype.
1179 (sim_open): Call set_endianness.
1180 (sim_info): Use simBE instead of BigEndianMem.
1181 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1182 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1183 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1184 ifdefs, keeping the prototype declaration.
1185 (swap_word): Rewrite correctly.
1186 (ColdReset): Delete references to CONFIG. Delete endianness related
1187 code; moved to set_endianness.
1188
1189 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1190
1191 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1192 * interp.c (CHECKHILO): Define away.
1193 (simSIGINT): New macro.
1194 (membank_size): Increase from 1MB to 2MB.
1195 (control_c): New function.
1196 (sim_resume): Rename parameter signal to signal_number. Add local
1197 variable prev. Call signal before and after simulate.
1198 (sim_stop_reason): Add simSIGINT support.
1199 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1200 functions always.
1201 (sim_warning): Delete call to SignalException. Do call printf_filtered
1202 if logfh is NULL.
1203 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1204 a call to sim_warning.
1205
1206 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1207
1208 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1209 16 bit instructions.
1210
1211 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1212
1213 Add support for mips16 (16 bit MIPS implementation):
1214 * gencode.c (inst_type): Add mips16 instruction encoding types.
1215 (GETDATASIZEINSN): Define.
1216 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1217 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1218 mtlo.
1219 (MIPS16_DECODE): New table, for mips16 instructions.
1220 (bitmap_val): New static function.
1221 (struct mips16_op): Define.
1222 (mips16_op_table): New table, for mips16 operands.
1223 (build_mips16_operands): New static function.
1224 (process_instructions): If PC is odd, decode a mips16
1225 instruction. Break out instruction handling into new
1226 build_instruction function.
1227 (build_instruction): New static function, broken out of
1228 process_instructions. Check modifiers rather than flags for SHIFT
1229 bit count and m[ft]{hi,lo} direction.
1230 (usage): Pass program name to fprintf.
1231 (main): Remove unused variable this_option_optind. Change
1232 ``*loptarg++'' to ``loptarg++''.
1233 (my_strtoul): Parenthesize && within ||.
1234 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1235 (simulate): If PC is odd, fetch a 16 bit instruction, and
1236 increment PC by 2 rather than 4.
1237 * configure.in: Add case for mips16*-*-*.
1238 * configure: Rebuild.
1239
1240 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1241
1242 * interp.c: Allow -t to enable tracing in standalone simulator.
1243 Fix garbage output in trace file and error messages.
1244
1245 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1246
1247 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1248 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1249 * configure.in: Simplify using macros in ../common/aclocal.m4.
1250 * configure: Regenerated.
1251 * tconfig.in: New file.
1252
1253 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1254
1255 * interp.c: Fix bugs in 64-bit port.
1256 Use ansi function declarations for msvc compiler.
1257 Initialize and test file pointer in trace code.
1258 Prevent duplicate definition of LAST_EMED_REGNUM.
1259
1260 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1261
1262 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1263
1264 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1265
1266 * interp.c (SignalException): Check for explicit terminating
1267 breakpoint value.
1268 * gencode.c: Pass instruction value through SignalException()
1269 calls for Trap, Breakpoint and Syscall.
1270
1271 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1272
1273 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1274 only used on those hosts that provide it.
1275 * configure.in: Add sqrt() to list of functions to be checked for.
1276 * config.in: Re-generated.
1277 * configure: Re-generated.
1278
1279 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1280
1281 * gencode.c (process_instructions): Call build_endian_shift when
1282 expanding STORE RIGHT, to fix swr.
1283 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1284 clear the high bits.
1285 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1286 Fix float to int conversions to produce signed values.
1287
1288 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1289
1290 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1291 (process_instructions): Correct handling of nor instruction.
1292 Correct shift count for 32 bit shift instructions. Correct sign
1293 extension for arithmetic shifts to not shift the number of bits in
1294 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1295 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1296 Fix madd.
1297 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1298 It's OK to have a mult follow a mult. What's not OK is to have a
1299 mult follow an mfhi.
1300 (Convert): Comment out incorrect rounding code.
1301
1302 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1303
1304 * interp.c (sim_monitor): Improved monitor printf
1305 simulation. Tidied up simulator warnings, and added "--log" option
1306 for directing warning message output.
1307 * gencode.c: Use sim_warning() rather than WARNING macro.
1308
1309 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1310
1311 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1312 getopt1.o, rather than on gencode.c. Link objects together.
1313 Don't link against -liberty.
1314 (gencode.o, getopt.o, getopt1.o): New targets.
1315 * gencode.c: Include <ctype.h> and "ansidecl.h".
1316 (AND): Undefine after including "ansidecl.h".
1317 (ULONG_MAX): Define if not defined.
1318 (OP_*): Don't define macros; now defined in opcode/mips.h.
1319 (main): Call my_strtoul rather than strtoul.
1320 (my_strtoul): New static function.
1321
1322 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1323
1324 * gencode.c (process_instructions): Generate word64 and uword64
1325 instead of `long long' and `unsigned long long' data types.
1326 * interp.c: #include sysdep.h to get signals, and define default
1327 for SIGBUS.
1328 * (Convert): Work around for Visual-C++ compiler bug with type
1329 conversion.
1330 * support.h: Make things compile under Visual-C++ by using
1331 __int64 instead of `long long'. Change many refs to long long
1332 into word64/uword64 typedefs.
1333
1334 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1335
1336 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1337 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1338 (docdir): Removed.
1339 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1340 (AC_PROG_INSTALL): Added.
1341 (AC_PROG_CC): Moved to before configure.host call.
1342 * configure: Rebuilt.
1343
1344 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1345
1346 * configure.in: Define @SIMCONF@ depending on mips target.
1347 * configure: Rebuild.
1348 * Makefile.in (run): Add @SIMCONF@ to control simulator
1349 construction.
1350 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1351 * interp.c: Remove some debugging, provide more detailed error
1352 messages, update memory accesses to use LOADDRMASK.
1353
1354 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1355
1356 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1357 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1358 stamp-h.
1359 * configure: Rebuild.
1360 * config.in: New file, generated by autoheader.
1361 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1362 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1363 HAVE_ANINT and HAVE_AINT, as appropriate.
1364 * Makefile.in (run): Use @LIBS@ rather than -lm.
1365 (interp.o): Depend upon config.h.
1366 (Makefile): Just rebuild Makefile.
1367 (clean): Remove stamp-h.
1368 (mostlyclean): Make the same as clean, not as distclean.
1369 (config.h, stamp-h): New targets.
1370
1371 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1372
1373 * interp.c (ColdReset): Fix boolean test. Make all simulator
1374 globals static.
1375
1376 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1377
1378 * interp.c (xfer_direct_word, xfer_direct_long,
1379 swap_direct_word, swap_direct_long, xfer_big_word,
1380 xfer_big_long, xfer_little_word, xfer_little_long,
1381 swap_word,swap_long): Added.
1382 * interp.c (ColdReset): Provide function indirection to
1383 host<->simulated_target transfer routines.
1384 * interp.c (sim_store_register, sim_fetch_register): Updated to
1385 make use of indirected transfer routines.
1386
1387 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1388
1389 * gencode.c (process_instructions): Ensure FP ABS instruction
1390 recognised.
1391 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1392 system call support.
1393
1394 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1395
1396 * interp.c (sim_do_command): Complain if callback structure not
1397 initialised.
1398
1399 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1400
1401 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1402 support for Sun hosts.
1403 * Makefile.in (gencode): Ensure the host compiler and libraries
1404 used for cross-hosted build.
1405
1406 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1407
1408 * interp.c, gencode.c: Some more (TODO) tidying.
1409
1410 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1411
1412 * gencode.c, interp.c: Replaced explicit long long references with
1413 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1414 * support.h (SET64LO, SET64HI): Macros added.
1415
1416 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1417
1418 * configure: Regenerate with autoconf 2.7.
1419
1420 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1421
1422 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1423 * support.h: Remove superfluous "1" from #if.
1424 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1425
1426 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1427
1428 * interp.c (StoreFPR): Control UndefinedResult() call on
1429 WARN_RESULT manifest.
1430
1431 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1432
1433 * gencode.c: Tidied instruction decoding, and added FP instruction
1434 support.
1435
1436 * interp.c: Added dineroIII, and BSD profiling support. Also
1437 run-time FP handling.
1438
1439 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1440
1441 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1442 gencode.c, interp.c, support.h: created.