1 2021-06-12 Mike Frysinger <vapier@gentoo.org>
3 * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
5 2021-06-12 Mike Frysinger <vapier@gentoo.org>
7 * aclocal.m4, config.in, configure: Regenerate.
9 2021-06-12 Mike Frysinger <vapier@gentoo.org>
11 * configure.ac: Delete call to AC_CHECK_FUNCS.
12 * config.in, configure: Regenerate.
14 2021-06-08 Mike Frysinger <vapier@gentoo.org>
16 * Makefile.in: Replace $(IGEN) with $(IGEN_RUN) and ../igen/igen
19 2021-05-29 Mike Frysinger <vapier@gentoo.org>
21 * interp.c [!HAVE_DV_SOCKSER] (sockser_addr): Define to NULL.
23 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
25 * interp.c (sim_open): Add shadow mappings from 32-bit
26 address space to 64-bit sign-extended address space.
28 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
30 * interp.c (sim_create_inferior): Only truncate sign extension
31 bits for 32-bit target models.
33 2021-05-17 Mike Frysinger <vapier@gentoo.org>
35 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
37 2021-05-17 Mike Frysinger <vapier@gentoo.org>
39 * interp.c (sim_open): Switch to sim_state_alloc_extra.
40 * micromips.igen: Change SD to mips_sim_state.
41 * micromipsrun.c (sim_engine_run): Likewise.
42 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
43 (watch_options_install): Delete.
44 (struct swatch): Delete.
45 (struct sim_state): Delete.
46 (struct mips_sim_state): New struct.
47 (MIPS_SIM_STATE): Define.
49 2021-05-16 Mike Frysinger <vapier@gentoo.org>
51 * interp.c: Replace config.h include with defs.h.
52 * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
53 dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
56 2021-05-16 Mike Frysinger <vapier@gentoo.org>
58 * config.in, configure: Regenerate.
60 2021-05-14 Mike Frysinger <vapier@gentoo.org>
62 * interp.c: Update include path.
64 2021-05-04 Mike Frysinger <vapier@gentoo.org>
66 * dv-tx3904sio.c: Include stdlib.h.
68 2021-05-04 Mike Frysinger <vapier@gentoo.org>
70 * configure.ac (hw_extra_devices): Inline contents into
71 SIM_AC_OPTION_HARDWARE and delete.
72 * configure: Regenerate.
74 2021-05-04 Mike Frysinger <vapier@gentoo.org>
76 * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
77 (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
78 * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
79 * configure: Regenerate.
81 2021-05-04 Mike Frysinger <vapier@gentoo.org>
83 * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
85 2021-05-04 Mike Frysinger <vapier@gentoo.org>
87 * configure: Regenerate.
89 2021-05-01 Mike Frysinger <vapier@gentoo.org>
91 * cp1.c (store_fcr): Mark static.
93 2021-05-01 Mike Frysinger <vapier@gentoo.org>
95 * config.in, configure: Regenerate.
97 2021-04-23 Mike Frysinger <vapier@gentoo.org>
99 * configure.ac (hw_enabled): Delete.
100 (SIM_AC_OPTION_HARDWARE): Delete first two args.
101 * configure: Regenerate.
103 2021-04-22 Tom Tromey <tom@tromey.com>
105 * configure, config.in: Rebuild.
107 2021-04-22 Tom Tromey <tom@tromey.com>
109 * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
111 (SIM_EXTRA_DEPS): New variable.
113 2021-04-22 Tom Tromey <tom@tromey.com>
115 * configure: Rebuild.
117 2021-04-21 Mike Frysinger <vapier@gentoo.org>
119 * aclocal.m4: Regenerate.
121 2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
123 * configure: Regenerate.
125 2021-04-18 Mike Frysinger <vapier@gentoo.org>
127 * configure: Regenerate.
129 2021-04-12 Mike Frysinger <vapier@gentoo.org>
131 * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
133 2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
135 * Makefile.in: Set ASAN_OPTIONS when running igen.
137 2021-04-04 Steve Ellcey <sellcey@mips.com>
138 Faraz Shahbazker <fshahbazker@wavecomp.com>
140 * interp.c (sim_monitor): Add switch entries for unlink (13),
141 lseek (14), and stat (15).
143 2021-04-02 Mike Frysinger <vapier@gentoo.org>
145 * Makefile.in (../igen/igen): Delete rule.
146 (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
148 2021-04-02 Mike Frysinger <vapier@gentoo.org>
150 * aclocal.m4, configure: Regenerate.
152 2021-02-28 Mike Frysinger <vapier@gentoo.org>
154 * configure: Regenerate.
156 2021-02-27 Mike Frysinger <vapier@gentoo.org>
158 * Makefile.in (SIM_EXTRA_ALL): Delete.
161 2021-02-21 Mike Frysinger <vapier@gentoo.org>
163 * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
164 * aclocal.m4, configure: Regenerate.
166 2021-02-13 Mike Frysinger <vapier@gentoo.org>
168 * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
169 * aclocal.m4, configure: Regenerate.
171 2021-02-06 Mike Frysinger <vapier@gentoo.org>
173 * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
175 2021-02-06 Mike Frysinger <vapier@gentoo.org>
177 * configure: Regenerate.
179 2021-01-30 Mike Frysinger <vapier@gentoo.org>
181 * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
183 2021-01-11 Mike Frysinger <vapier@gentoo.org>
185 * config.in, configure: Regenerate.
186 * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
187 and strings.h include.
189 2021-01-09 Mike Frysinger <vapier@gentoo.org>
191 * configure: Regenerate.
193 2021-01-09 Mike Frysinger <vapier@gentoo.org>
195 * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
196 * configure: Regenerate.
198 2021-01-08 Mike Frysinger <vapier@gentoo.org>
200 * configure: Regenerate.
202 2021-01-04 Mike Frysinger <vapier@gentoo.org>
204 * configure: Regenerate.
206 2020-12-31 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
208 * sim-main.c: Include <stdlib.h>.
210 2020-12-14 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
212 * cp1.c: Include <stdlib.h>.
214 2020-07-29 Simon Marchi <simon.marchi@efficios.com>
216 * configure: Re-generate.
218 2017-09-06 John Baldwin <jhb@FreeBSD.org>
220 * configure: Regenerate.
222 2016-11-11 Mike Frysinger <vapier@gentoo.org>
225 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
228 2016-11-11 Mike Frysinger <vapier@gentoo.org>
231 * mips.igen (check_u64): Enable for `r3900'.
233 2016-02-05 Mike Frysinger <vapier@gentoo.org>
235 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
237 * configure: Regenerate.
239 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
240 Maciej W. Rozycki <macro@imgtec.com>
243 * micromips.igen (delayslot_micromips): Enable for `micromips32',
244 `micromips64' and `micromipsdsp' only.
245 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
246 (do_micromips_jalr, do_micromips_jal): Likewise.
247 (compute_movep_src_reg): Likewise.
248 (compute_andi16_imm): Likewise.
249 (convert_fmt_micromips): Likewise.
250 (convert_fmt_micromips_cvt_d): Likewise.
251 (convert_fmt_micromips_cvt_s): Likewise.
252 (FMT_MICROMIPS): Likewise.
253 (FMT_MICROMIPS_CVT_D): Likewise.
254 (FMT_MICROMIPS_CVT_S): Likewise.
256 2016-01-12 Mike Frysinger <vapier@gentoo.org>
258 * interp.c: Include elf-bfd.h.
259 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
262 2016-01-10 Mike Frysinger <vapier@gentoo.org>
264 * config.in, configure: Regenerate.
266 2016-01-10 Mike Frysinger <vapier@gentoo.org>
268 * configure: Regenerate.
270 2016-01-10 Mike Frysinger <vapier@gentoo.org>
272 * configure: Regenerate.
274 2016-01-10 Mike Frysinger <vapier@gentoo.org>
276 * configure: Regenerate.
278 2016-01-10 Mike Frysinger <vapier@gentoo.org>
280 * configure: Regenerate.
282 2016-01-10 Mike Frysinger <vapier@gentoo.org>
284 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
285 * configure: Regenerate.
287 2016-01-10 Mike Frysinger <vapier@gentoo.org>
289 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
290 * configure: Regenerate.
292 2016-01-10 Mike Frysinger <vapier@gentoo.org>
294 * configure: Regenerate.
296 2016-01-10 Mike Frysinger <vapier@gentoo.org>
298 * configure: Regenerate.
300 2016-01-09 Mike Frysinger <vapier@gentoo.org>
302 * config.in, configure: Regenerate.
304 2016-01-06 Mike Frysinger <vapier@gentoo.org>
306 * interp.c (sim_open): Mark argv const.
307 (sim_create_inferior): Mark argv and env const.
309 2016-01-04 Mike Frysinger <vapier@gentoo.org>
311 * configure: Regenerate.
313 2016-01-03 Mike Frysinger <vapier@gentoo.org>
315 * interp.c (sim_open): Update sim_parse_args comment.
317 2016-01-03 Mike Frysinger <vapier@gentoo.org>
319 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
320 * configure: Regenerate.
322 2016-01-02 Mike Frysinger <vapier@gentoo.org>
324 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
325 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
326 * configure: Regenerate.
327 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
329 2016-01-02 Mike Frysinger <vapier@gentoo.org>
331 * dv-tx3904cpu.c (CPU, SD): Delete.
333 2015-12-30 Mike Frysinger <vapier@gentoo.org>
335 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
336 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
337 (sim_store_register): Rename to ...
338 (mips_reg_store): ... this. Delete local cpu var.
339 Update sim_io_eprintf calls.
340 (sim_fetch_register): Rename to ...
341 (mips_reg_fetch): ... this. Delete local cpu var.
342 Update sim_io_eprintf calls.
344 2015-12-27 Mike Frysinger <vapier@gentoo.org>
346 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
348 2015-12-26 Mike Frysinger <vapier@gentoo.org>
350 * config.in, configure: Regenerate.
352 2015-12-26 Mike Frysinger <vapier@gentoo.org>
354 * interp.c (sim_write, sim_read): Delete.
355 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
356 (load_word): Likewise.
357 * micromips.igen (cache): Likewise.
358 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
359 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
360 do_store_left, do_store_right, do_load_double, do_store_double):
362 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
363 (do_prefx): Likewise.
364 * sim-main.c (address_translation, prefetch): Delete.
365 (ifetch32, ifetch16): Delete call to AddressTranslation and set
367 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
368 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
369 (LoadMemory, StoreMemory): Delete CCA arg.
371 2015-12-24 Mike Frysinger <vapier@gentoo.org>
373 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
374 * configure: Regenerated.
376 2015-12-24 Mike Frysinger <vapier@gentoo.org>
378 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
381 2015-12-24 Mike Frysinger <vapier@gentoo.org>
383 * tconfig.h (SIM_HANDLES_LMA): Delete.
385 2015-12-24 Mike Frysinger <vapier@gentoo.org>
387 * sim-main.h (WITH_WATCHPOINTS): Delete.
389 2015-12-24 Mike Frysinger <vapier@gentoo.org>
391 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
393 2015-12-24 Mike Frysinger <vapier@gentoo.org>
395 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
397 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
399 * micromips.igen (process_isa_mode): Fix left shift of negative
402 2015-11-17 Mike Frysinger <vapier@gentoo.org>
404 * sim-main.h (WITH_MODULO_MEMORY): Delete.
406 2015-11-15 Mike Frysinger <vapier@gentoo.org>
408 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
410 2015-11-14 Mike Frysinger <vapier@gentoo.org>
412 * interp.c (sim_close): Rename to ...
413 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
415 * sim-main.h (mips_sim_close): Declare.
416 (SIM_CLOSE_HOOK): Define.
418 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
419 Ali Lown <ali.lown@imgtec.com>
421 * Makefile.in (tmp-micromips): New rule.
422 (tmp-mach-multi): Add support for micromips.
423 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
424 that works for both mips64 and micromips64.
425 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
427 Add build support for micromips.
428 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
429 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
430 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
431 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
432 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
433 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
434 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
435 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
436 Refactored instruction code to use these functions.
437 * dsp2.igen: Refactored instruction code to use the new functions.
438 * interp.c (decode_coproc): Refactored to work with any instruction
440 (isa_mode): New variable
441 (RSVD_INSTRUCTION): Changed to 0x00000039.
442 * m16.igen (BREAK16): Refactored instruction to use do_break16.
443 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
444 * micromips.dc: New file.
445 * micromips.igen: New file.
446 * micromips16.dc: New file.
447 * micromipsdsp.igen: New file.
448 * micromipsrun.c: New file.
449 * mips.igen (do_swc1): Changed to work with any instruction encoding.
450 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
451 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
452 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
453 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
454 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
455 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
456 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
457 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
458 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
459 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
460 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
461 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
462 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
463 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
464 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
465 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
466 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
467 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
469 Refactored instruction code to use these functions.
470 (RSVD): Changed to use new reserved instruction.
471 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
472 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
473 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
474 do_store_double): Added micromips32 and micromips64 models.
475 Added include for micromips.igen and micromipsdsp.igen
476 Add micromips32 and micromips64 models.
477 (DecodeCoproc): Updated to use new macro definition.
478 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
479 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
480 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
481 Refactored instruction code to use these functions.
482 * sim-main.h (CP0_operation): New enum.
483 (DecodeCoproc): Updated macro.
484 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
485 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
486 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
487 ISA_MODE_MICROMIPS): New defines.
488 (sim_state): Add isa_mode field.
490 2015-06-23 Mike Frysinger <vapier@gentoo.org>
492 * configure: Regenerate.
494 2015-06-12 Mike Frysinger <vapier@gentoo.org>
496 * configure.ac: Change configure.in to configure.ac.
497 * configure: Regenerate.
499 2015-06-12 Mike Frysinger <vapier@gentoo.org>
501 * configure: Regenerate.
503 2015-06-12 Mike Frysinger <vapier@gentoo.org>
505 * interp.c [TRACE]: Delete.
506 (TRACE): Change to WITH_TRACE_ANY_P.
507 [!WITH_TRACE_ANY_P] (open_trace): Define.
508 (mips_option_handler, open_trace, sim_close, dotrace):
509 Change defined(TRACE) to WITH_TRACE_ANY_P.
510 (sim_open): Delete TRACE ifdef check.
511 * sim-main.c (load_memory): Delete TRACE ifdef check.
512 (store_memory): Likewise.
513 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
514 [!WITH_TRACE_ANY_P] (dotrace): Define.
516 2015-04-18 Mike Frysinger <vapier@gentoo.org>
518 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
521 2015-04-18 Mike Frysinger <vapier@gentoo.org>
523 * sim-main.h (SIM_CPU): Delete.
525 2015-04-18 Mike Frysinger <vapier@gentoo.org>
527 * sim-main.h (sim_cia): Delete.
529 2015-04-17 Mike Frysinger <vapier@gentoo.org>
531 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
533 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
534 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
535 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
536 CIA_SET to CPU_PC_SET.
537 * sim-main.h (CIA_GET, CIA_SET): Delete.
539 2015-04-15 Mike Frysinger <vapier@gentoo.org>
541 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
542 * sim-main.h (STATE_CPU): Delete.
544 2015-04-13 Mike Frysinger <vapier@gentoo.org>
546 * configure: Regenerate.
548 2015-04-13 Mike Frysinger <vapier@gentoo.org>
550 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
551 * interp.c (mips_pc_get, mips_pc_set): New functions.
552 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
553 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
554 (sim_pc_get): Delete.
555 * sim-main.h (SIM_CPU): Define.
556 (struct sim_state): Change cpu to an array of pointers.
559 2015-04-13 Mike Frysinger <vapier@gentoo.org>
561 * interp.c (mips_option_handler, open_trace, sim_close,
562 sim_write, sim_read, sim_store_register, sim_fetch_register,
563 sim_create_inferior, pr_addr, pr_uword64): Convert old style
565 (sim_open): Convert old style prototype. Change casts with
566 sim_write to unsigned char *.
567 (fetch_str): Change null to unsigned char, and change cast to
569 (sim_monitor): Change c & ch to unsigned char. Change cast to
572 2015-04-12 Mike Frysinger <vapier@gentoo.org>
574 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
576 2015-04-06 Mike Frysinger <vapier@gentoo.org>
578 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
580 2015-04-01 Mike Frysinger <vapier@gentoo.org>
582 * tconfig.h (SIM_HAVE_PROFILE): Delete.
584 2015-03-31 Mike Frysinger <vapier@gentoo.org>
586 * config.in, configure: Regenerate.
588 2015-03-24 Mike Frysinger <vapier@gentoo.org>
590 * interp.c (sim_pc_get): New function.
592 2015-03-24 Mike Frysinger <vapier@gentoo.org>
594 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
595 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
597 2015-03-24 Mike Frysinger <vapier@gentoo.org>
599 * configure: Regenerate.
601 2015-03-23 Mike Frysinger <vapier@gentoo.org>
603 * configure: Regenerate.
605 2015-03-23 Mike Frysinger <vapier@gentoo.org>
607 * configure: Regenerate.
608 * configure.ac (mips_extra_objs): Delete.
609 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
610 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
612 2015-03-23 Mike Frysinger <vapier@gentoo.org>
614 * configure: Regenerate.
615 * configure.ac: Delete sim_hw checks for dv-sockser.
617 2015-03-16 Mike Frysinger <vapier@gentoo.org>
619 * config.in, configure: Regenerate.
620 * tconfig.in: Rename file ...
621 * tconfig.h: ... here.
623 2015-03-15 Mike Frysinger <vapier@gentoo.org>
625 * tconfig.in: Delete includes.
626 [HAVE_DV_SOCKSER]: Delete.
628 2015-03-14 Mike Frysinger <vapier@gentoo.org>
630 * Makefile.in (SIM_RUN_OBJS): Delete.
632 2015-03-14 Mike Frysinger <vapier@gentoo.org>
634 * configure.ac (AC_CHECK_HEADERS): Delete.
635 * aclocal.m4, configure: Regenerate.
637 2014-08-19 Alan Modra <amodra@gmail.com>
639 * configure: Regenerate.
641 2014-08-15 Roland McGrath <mcgrathr@google.com>
643 * configure: Regenerate.
644 * config.in: Regenerate.
646 2014-03-04 Mike Frysinger <vapier@gentoo.org>
648 * configure: Regenerate.
650 2013-09-23 Alan Modra <amodra@gmail.com>
652 * configure: Regenerate.
654 2013-06-03 Mike Frysinger <vapier@gentoo.org>
656 * aclocal.m4, configure: Regenerate.
658 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
660 * configure: Rebuild.
662 2013-03-26 Mike Frysinger <vapier@gentoo.org>
664 * configure: Regenerate.
666 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
668 * configure.ac: Address use of dv-sockser.o.
669 * tconfig.in: Conditionalize use of dv_sockser_install.
670 * configure: Regenerated.
671 * config.in: Regenerated.
673 2012-10-04 Chao-ying Fu <fu@mips.com>
674 Steve Ellcey <sellcey@mips.com>
676 * mips/mips3264r2.igen (rdhwr): New.
678 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
680 * configure.ac: Always link against dv-sockser.o.
681 * configure: Regenerate.
683 2012-06-15 Joel Brobecker <brobecker@adacore.com>
685 * config.in, configure: Regenerate.
687 2012-05-18 Nick Clifton <nickc@redhat.com>
690 * interp.c: Include config.h before system header files.
692 2012-03-24 Mike Frysinger <vapier@gentoo.org>
694 * aclocal.m4, config.in, configure: Regenerate.
696 2011-12-03 Mike Frysinger <vapier@gentoo.org>
698 * aclocal.m4: New file.
699 * configure: Regenerate.
701 2011-10-19 Mike Frysinger <vapier@gentoo.org>
703 * configure: Regenerate after common/acinclude.m4 update.
705 2011-10-17 Mike Frysinger <vapier@gentoo.org>
707 * configure.ac: Change include to common/acinclude.m4.
709 2011-10-17 Mike Frysinger <vapier@gentoo.org>
711 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
712 call. Replace common.m4 include with SIM_AC_COMMON.
713 * configure: Regenerate.
715 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
717 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
719 (tmp-mach-multi): Exit early when igen fails.
721 2011-07-05 Mike Frysinger <vapier@gentoo.org>
723 * interp.c (sim_do_command): Delete.
725 2011-02-14 Mike Frysinger <vapier@gentoo.org>
727 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
728 (tx3904sio_fifo_reset): Likewise.
729 * interp.c (sim_monitor): Likewise.
731 2010-04-14 Mike Frysinger <vapier@gentoo.org>
733 * interp.c (sim_write): Add const to buffer arg.
735 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
737 * interp.c: Don't include sysdep.h
739 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
741 * configure: Regenerate.
743 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
745 * config.in: Regenerate.
746 * configure: Likewise.
748 * configure: Regenerate.
750 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
752 * configure: Regenerate to track ../common/common.m4 changes.
755 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
756 Daniel Jacobowitz <dan@codesourcery.com>
757 Joseph Myers <joseph@codesourcery.com>
759 * configure: Regenerate.
761 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
763 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
764 that unconditionally allows fmt_ps.
765 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
766 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
767 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
768 filter from 64,f to 32,f.
769 (PREFX): Change filter from 64 to 32.
770 (LDXC1, LUXC1): Provide separate mips32r2 implementations
771 that use do_load_double instead of do_load. Make both LUXC1
772 versions unpredictable if SizeFGR () != 64.
773 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
774 instead of do_store. Remove unused variable. Make both SUXC1
775 versions unpredictable if SizeFGR () != 64.
777 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
779 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
780 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
781 shifts for that case.
783 2007-09-04 Nick Clifton <nickc@redhat.com>
785 * interp.c (options enum): Add OPTION_INFO_MEMORY.
786 (display_mem_info): New static variable.
787 (mips_option_handler): Handle OPTION_INFO_MEMORY.
788 (mips_options): Add info-memory and memory-info.
789 (sim_open): After processing the command line and board
790 specification, check display_mem_info. If it is set then
791 call the real handler for the --memory-info command line
794 2007-08-24 Joel Brobecker <brobecker@adacore.com>
796 * configure.ac: Change license of multi-run.c to GPL version 3.
797 * configure: Regenerate.
799 2007-06-28 Richard Sandiford <richard@codesourcery.com>
801 * configure.ac, configure: Revert last patch.
803 2007-06-26 Richard Sandiford <richard@codesourcery.com>
805 * configure.ac (sim_mipsisa3264_configs): New variable.
806 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
807 every configuration support all four targets, using the triplet to
808 determine the default.
809 * configure: Regenerate.
811 2007-06-25 Richard Sandiford <richard@codesourcery.com>
813 * Makefile.in (m16run.o): New rule.
815 2007-05-15 Thiemo Seufer <ths@mips.com>
817 * mips3264r2.igen (DSHD): Fix compile warning.
819 2007-05-14 Thiemo Seufer <ths@mips.com>
821 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
822 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
823 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
824 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
827 2007-03-01 Thiemo Seufer <ths@mips.com>
829 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
832 2007-02-20 Thiemo Seufer <ths@mips.com>
834 * dsp.igen: Update copyright notice.
835 * dsp2.igen: Fix copyright notice.
837 2007-02-20 Thiemo Seufer <ths@mips.com>
838 Chao-Ying Fu <fu@mips.com>
840 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
841 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
842 Add dsp2 to sim_igen_machine.
843 * configure: Regenerate.
844 * dsp.igen (do_ph_op): Add MUL support when op = 2.
845 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
846 (mulq_rs.ph): Use do_ph_mulq.
847 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
848 * mips.igen: Add dsp2 model and include dsp2.igen.
849 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
850 for *mips32r2, *mips64r2, *dsp.
851 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
852 for *mips32r2, *mips64r2, *dsp2.
853 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
855 2007-02-19 Thiemo Seufer <ths@mips.com>
856 Nigel Stephens <nigel@mips.com>
858 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
859 jumps with hazard barrier.
861 2007-02-19 Thiemo Seufer <ths@mips.com>
862 Nigel Stephens <nigel@mips.com>
864 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
865 after each call to sim_io_write.
867 2007-02-19 Thiemo Seufer <ths@mips.com>
868 Nigel Stephens <nigel@mips.com>
870 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
871 supported by this simulator.
872 (decode_coproc): Recognise additional CP0 Config registers
875 2007-02-19 Thiemo Seufer <ths@mips.com>
876 Nigel Stephens <nigel@mips.com>
877 David Ung <davidu@mips.com>
879 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
880 uninterpreted formats. If fmt is one of the uninterpreted types
881 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
882 fmt_word, and fmt_uninterpreted_64 like fmt_long.
883 (store_fpr): When writing an invalid odd register, set the
884 matching even register to fmt_unknown, not the following register.
885 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
886 the the memory window at offset 0 set by --memory-size command
888 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
890 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
892 (sim_monitor): When returning the memory size to the MIPS
893 application, use the value in STATE_MEM_SIZE, not an arbitrary
895 (cop_lw): Don' mess around with FPR_STATE, just pass
896 fmt_uninterpreted_32 to StoreFPR.
898 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
900 * mips.igen (not_word_value): Single version for mips32, mips64
903 2007-02-19 Thiemo Seufer <ths@mips.com>
904 Nigel Stephens <nigel@mips.com>
906 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
909 2007-02-17 Thiemo Seufer <ths@mips.com>
911 * configure.ac (mips*-sde-elf*): Move in front of generic machine
913 * configure: Regenerate.
915 2007-02-17 Thiemo Seufer <ths@mips.com>
917 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
918 Add mdmx to sim_igen_machine.
919 (mipsisa64*-*-*): Likewise. Remove dsp.
920 (mipsisa32*-*-*): Remove dsp.
921 * configure: Regenerate.
923 2007-02-13 Thiemo Seufer <ths@mips.com>
925 * configure.ac: Add mips*-sde-elf* target.
926 * configure: Regenerate.
928 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
930 * acconfig.h: Remove.
931 * config.in, configure: Regenerate.
933 2006-11-07 Thiemo Seufer <ths@mips.com>
935 * dsp.igen (do_w_op): Fix compiler warning.
937 2006-08-29 Thiemo Seufer <ths@mips.com>
938 David Ung <davidu@mips.com>
940 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
942 * configure: Regenerate.
943 * mips.igen (model): Add smartmips.
944 (MADDU): Increment ACX if carry.
945 (do_mult): Clear ACX.
946 (ROR,RORV): Add smartmips.
947 (include): Include smartmips.igen.
948 * sim-main.h (ACX): Set to REGISTERS[89].
949 * smartmips.igen: New file.
951 2006-08-29 Thiemo Seufer <ths@mips.com>
952 David Ung <davidu@mips.com>
954 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
955 mips3264r2.igen. Add missing dependency rules.
956 * m16e.igen: Support for mips16e save/restore instructions.
958 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
960 * configure: Regenerated.
962 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
964 * configure: Regenerated.
966 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
968 * configure: Regenerated.
970 2006-05-15 Chao-ying Fu <fu@mips.com>
972 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
974 2006-04-18 Nick Clifton <nickc@redhat.com>
976 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
979 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
981 * configure: Regenerate.
983 2005-12-14 Chao-ying Fu <fu@mips.com>
985 * Makefile.in (SIM_OBJS): Add dsp.o.
986 (dsp.o): New dependency.
987 (IGEN_INCLUDE): Add dsp.igen.
988 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
989 mipsisa64*-*-*): Add dsp to sim_igen_machine.
990 * configure: Regenerate.
991 * mips.igen: Add dsp model and include dsp.igen.
992 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
993 because these instructions are extended in DSP ASE.
994 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
995 adding 6 DSP accumulator registers and 1 DSP control register.
996 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
997 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
998 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
999 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
1000 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
1001 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
1002 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
1003 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
1004 DSPCR_CCOND_SMASK): New define.
1005 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
1006 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
1008 2005-07-08 Ian Lance Taylor <ian@airs.com>
1010 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
1012 2005-06-16 David Ung <davidu@mips.com>
1013 Nigel Stephens <nigel@mips.com>
1015 * mips.igen: New mips16e model and include m16e.igen.
1016 (check_u64): Add mips16e tag.
1017 * m16e.igen: New file for MIPS16e instructions.
1018 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
1019 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
1021 * configure: Regenerate.
1023 2005-05-26 David Ung <davidu@mips.com>
1025 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
1026 tags to all instructions which are applicable to the new ISAs.
1027 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1029 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1031 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1033 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1034 * configure: Regenerate.
1036 2005-03-23 Mark Kettenis <kettenis@gnu.org>
1038 * configure: Regenerate.
1040 2005-01-14 Andrew Cagney <cagney@gnu.org>
1042 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
1043 explicit call to AC_CONFIG_HEADER.
1044 * configure: Regenerate.
1046 2005-01-12 Andrew Cagney <cagney@gnu.org>
1048 * configure.ac: Update to use ../common/common.m4.
1049 * configure: Re-generate.
1051 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
1053 * configure: Regenerated to track ../common/aclocal.m4 changes.
1055 2005-01-07 Andrew Cagney <cagney@gnu.org>
1057 * configure.ac: Rename configure.in, require autoconf 2.59.
1058 * configure: Re-generate.
1060 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
1062 * configure: Regenerate for ../common/aclocal.m4 update.
1064 2004-09-24 Monika Chaddha <monika@acmet.com>
1066 Committed by Andrew Cagney.
1067 * m16.igen (CMP, CMPI): Fix assembler.
1069 2004-08-18 Chris Demetriou <cgd@broadcom.com>
1071 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1072 * configure: Regenerate.
1074 2004-06-25 Chris Demetriou <cgd@broadcom.com>
1076 * configure.in (sim_m16_machine): Include mipsIII.
1077 * configure: Regenerate.
1079 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
1081 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1083 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1085 2004-04-10 Chris Demetriou <cgd@broadcom.com>
1087 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1089 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1091 * mips.igen (check_fmt): Remove.
1092 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1093 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1094 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1095 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1096 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1097 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1098 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1099 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1100 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1101 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1103 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1105 * sb1.igen (check_sbx): New function.
1106 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1108 2004-03-29 Chris Demetriou <cgd@broadcom.com>
1109 Richard Sandiford <rsandifo@redhat.com>
1111 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1112 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1113 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1114 separate implementations for mipsIV and mipsV. Use new macros to
1115 determine whether the restrictions apply.
1117 2004-01-19 Chris Demetriou <cgd@broadcom.com>
1119 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1120 (check_mult_hilo): Improve comments.
1121 (check_div_hilo): Likewise. Also, fork off a new version
1122 to handle mips32/mips64 (since there are no hazards to check
1125 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
1127 * mips.igen (do_dmultx): Fix check for negative operands.
1129 2003-05-16 Ian Lance Taylor <ian@airs.com>
1131 * Makefile.in (SHELL): Make sure this is defined.
1132 (various): Use $(SHELL) whenever we invoke move-if-change.
1134 2003-05-03 Chris Demetriou <cgd@broadcom.com>
1136 * cp1.c: Tweak attribution slightly.
1139 * mdmx.igen: Likewise.
1140 * mips3d.igen: Likewise.
1141 * sb1.igen: Likewise.
1143 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
1145 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1148 2003-02-27 Andrew Cagney <cagney@redhat.com>
1150 * interp.c (sim_open): Rename _bfd to bfd.
1151 (sim_create_inferior): Ditto.
1153 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1155 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1157 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1159 * mips.igen (EI, DI): Remove.
1161 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
1163 * Makefile.in (tmp-run-multi): Fix mips16 filter.
1165 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
1166 Andrew Cagney <ac131313@redhat.com>
1167 Gavin Romig-Koch <gavin@redhat.com>
1168 Graydon Hoare <graydon@redhat.com>
1169 Aldy Hernandez <aldyh@redhat.com>
1170 Dave Brolley <brolley@redhat.com>
1171 Chris Demetriou <cgd@broadcom.com>
1173 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1174 (sim_mach_default): New variable.
1175 (mips64vr-*-*, mips64vrel-*-*): New configurations.
1176 Add a new simulator generator, MULTI.
1177 * configure: Regenerate.
1178 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1179 (multi-run.o): New dependency.
1180 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1181 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1182 (tmp-multi): Combine them.
1183 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
1184 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1185 (distclean-extra): New rule.
1186 * sim-main.h: Include bfd.h.
1187 (MIPS_MACH): New macro.
1188 * mips.igen (vr4120, vr5400, vr5500): New models.
1189 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1190 * vr.igen: Replace with new version.
1192 2003-01-04 Chris Demetriou <cgd@broadcom.com>
1194 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1195 * configure: Regenerate.
1197 2002-12-31 Chris Demetriou <cgd@broadcom.com>
1199 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1200 * mips.igen: Remove all invocations of check_branch_bug and
1203 2002-12-16 Chris Demetriou <cgd@broadcom.com>
1205 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1207 2002-07-30 Chris Demetriou <cgd@broadcom.com>
1209 * mips.igen (do_load_double, do_store_double): New functions.
1210 (LDC1, SDC1): Rename to...
1211 (LDC1b, SDC1b): respectively.
1212 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1214 2002-07-29 Michael Snyder <msnyder@redhat.com>
1216 * cp1.c (fp_recip2): Modify initialization expression so that
1217 GCC will recognize it as constant.
1219 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1221 * mdmx.c (SD_): Delete.
1222 (Unpredictable): Re-define, for now, to directly invoke
1223 unpredictable_action().
1224 (mdmx_acc_op): Fix error in .ob immediate handling.
1226 2002-06-18 Andrew Cagney <cagney@redhat.com>
1228 * interp.c (sim_firmware_command): Initialize `address'.
1230 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1232 * configure: Regenerated to track ../common/aclocal.m4 changes.
1234 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1235 Ed Satterthwaite <ehs@broadcom.com>
1237 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1238 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1239 * mips.igen: Include mips3d.igen.
1240 (mips3d): New model name for MIPS-3D ASE instructions.
1241 (CVT.W.fmt): Don't use this instruction for word (source) format
1243 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1244 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1245 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1246 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1247 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1248 (RSquareRoot1, RSquareRoot2): New macros.
1249 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1250 (fp_rsqrt2): New functions.
1251 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1252 * configure: Regenerate.
1254 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1255 Ed Satterthwaite <ehs@broadcom.com>
1257 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1258 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1259 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1260 (convert): Note that this function is not used for paired-single
1262 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1263 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1264 (check_fmt_p): Enable paired-single support.
1265 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1266 (PUU.PS): New instructions.
1267 (CVT.S.fmt): Don't use this instruction for paired-single format
1269 * sim-main.h (FP_formats): New value 'fmt_ps.'
1270 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1271 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1273 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1275 * mips.igen: Fix formatting of function calls in
1278 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1280 * mips.igen (MOVN, MOVZ): Trace result.
1281 (TNEI): Print "tnei" as the opcode name in traces.
1282 (CEIL.W): Add disassembly string for traces.
1283 (RSQRT.fmt): Make location of disassembly string consistent
1284 with other instructions.
1286 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1288 * mips.igen (X): Delete unused function.
1290 2002-06-08 Andrew Cagney <cagney@redhat.com>
1292 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1294 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1295 Ed Satterthwaite <ehs@broadcom.com>
1297 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1298 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1299 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1300 (fp_nmsub): New prototypes.
1301 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1302 (NegMultiplySub): New defines.
1303 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1304 (MADD.D, MADD.S): Replace with...
1305 (MADD.fmt): New instruction.
1306 (MSUB.D, MSUB.S): Replace with...
1307 (MSUB.fmt): New instruction.
1308 (NMADD.D, NMADD.S): Replace with...
1309 (NMADD.fmt): New instruction.
1310 (NMSUB.D, MSUB.S): Replace with...
1311 (NMSUB.fmt): New instruction.
1313 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1314 Ed Satterthwaite <ehs@broadcom.com>
1316 * cp1.c: Fix more comment spelling and formatting.
1317 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1318 (denorm_mode): New function.
1319 (fpu_unary, fpu_binary): Round results after operation, collect
1320 status from rounding operations, and update the FCSR.
1321 (convert): Collect status from integer conversions and rounding
1322 operations, and update the FCSR. Adjust NaN values that result
1323 from conversions. Convert to use sim_io_eprintf rather than
1324 fprintf, and remove some debugging code.
1325 * cp1.h (fenr_FS): New define.
1327 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1329 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1330 rounding mode to sim FP rounding mode flag conversion code into...
1331 (rounding_mode): New function.
1333 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1335 * cp1.c: Clean up formatting of a few comments.
1336 (value_fpr): Reformat switch statement.
1338 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1339 Ed Satterthwaite <ehs@broadcom.com>
1342 * sim-main.h: Include cp1.h.
1343 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1344 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1345 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1346 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1347 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1348 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1349 * cp1.c: Don't include sim-fpu.h; already included by
1350 sim-main.h. Clean up formatting of some comments.
1351 (NaN, Equal, Less): Remove.
1352 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1353 (fp_cmp): New functions.
1354 * mips.igen (do_c_cond_fmt): Remove.
1355 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1356 Compare. Add result tracing.
1357 (CxC1): Remove, replace with...
1358 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1359 (DMxC1): Remove, replace with...
1360 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1361 (MxC1): Remove, replace with...
1362 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1364 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1366 * sim-main.h (FGRIDX): Remove, replace all uses with...
1367 (FGR_BASE): New macro.
1368 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1369 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1370 (NR_FGR, FGR): Likewise.
1371 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1372 * mips.igen: Likewise.
1374 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1376 * cp1.c: Add an FSF Copyright notice to this file.
1378 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1379 Ed Satterthwaite <ehs@broadcom.com>
1381 * cp1.c (Infinity): Remove.
1382 * sim-main.h (Infinity): Likewise.
1384 * cp1.c (fp_unary, fp_binary): New functions.
1385 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1386 (fp_sqrt): New functions, implemented in terms of the above.
1387 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1388 (Recip, SquareRoot): Remove (replaced by functions above).
1389 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1390 (fp_recip, fp_sqrt): New prototypes.
1391 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1392 (Recip, SquareRoot): Replace prototypes with #defines which
1393 invoke the functions above.
1395 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1397 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1398 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1399 file, remove PARAMS from prototypes.
1400 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1401 simulator state arguments.
1402 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1403 pass simulator state arguments.
1404 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1405 (store_fpr, convert): Remove 'sd' argument.
1406 (value_fpr): Likewise. Convert to use 'SD' instead.
1408 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1410 * cp1.c (Min, Max): Remove #if 0'd functions.
1411 * sim-main.h (Min, Max): Remove.
1413 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1415 * cp1.c: fix formatting of switch case and default labels.
1416 * interp.c: Likewise.
1417 * sim-main.c: Likewise.
1419 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1421 * cp1.c: Clean up comments which describe FP formats.
1422 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1424 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1425 Ed Satterthwaite <ehs@broadcom.com>
1427 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1428 Broadcom SiByte SB-1 processor configurations.
1429 * configure: Regenerate.
1430 * sb1.igen: New file.
1431 * mips.igen: Include sb1.igen.
1433 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1434 * mdmx.igen: Add "sb1" model to all appropriate functions and
1436 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1437 (ob_func, ob_acc): Reference the above.
1438 (qh_acc): Adjust to keep the same size as ob_acc.
1439 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1440 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1442 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1444 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1446 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1447 Ed Satterthwaite <ehs@broadcom.com>
1449 * mips.igen (mdmx): New (pseudo-)model.
1450 * mdmx.c, mdmx.igen: New files.
1451 * Makefile.in (SIM_OBJS): Add mdmx.o.
1452 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1454 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1455 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1456 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1457 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1458 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1459 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1460 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1461 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1462 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1463 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1464 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1465 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1466 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1467 (qh_fmtsel): New macros.
1468 (_sim_cpu): New member "acc".
1469 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1470 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1472 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1474 * interp.c: Use 'deprecated' rather than 'depreciated.'
1475 * sim-main.h: Likewise.
1477 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1479 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1480 which wouldn't compile anyway.
1481 * sim-main.h (unpredictable_action): New function prototype.
1482 (Unpredictable): Define to call igen function unpredictable().
1483 (NotWordValue): New macro to call igen function not_word_value().
1484 (UndefinedResult): Remove.
1485 * interp.c (undefined_result): Remove.
1486 (unpredictable_action): New function.
1487 * mips.igen (not_word_value, unpredictable): New functions.
1488 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1489 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1490 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1491 NotWordValue() to check for unpredictable inputs, then
1492 Unpredictable() to handle them.
1494 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1496 * mips.igen: Fix formatting of calls to Unpredictable().
1498 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1500 * interp.c (sim_open): Revert previous change.
1502 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1504 * interp.c (sim_open): Disable chunk of code that wrote code in
1505 vector table entries.
1507 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1509 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1510 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1513 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1515 * cp1.c: Fix many formatting issues.
1517 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1519 * cp1.c (fpu_format_name): New function to replace...
1520 (DOFMT): This. Delete, and update all callers.
1521 (fpu_rounding_mode_name): New function to replace...
1522 (RMMODE): This. Delete, and update all callers.
1524 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1526 * interp.c: Move FPU support routines from here to...
1527 * cp1.c: Here. New file.
1528 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1529 (cp1.o): New target.
1531 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1533 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1534 * mips.igen (mips32, mips64): New models, add to all instructions
1535 and functions as appropriate.
1536 (loadstore_ea, check_u64): New variant for model mips64.
1537 (check_fmt_p): New variant for models mipsV and mips64, remove
1538 mipsV model marking fro other variant.
1541 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1542 for mips32 and mips64.
1543 (DCLO, DCLZ): New instructions for mips64.
1545 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1547 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1548 immediate or code as a hex value with the "%#lx" format.
1549 (ANDI): Likewise, and fix printed instruction name.
1551 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1553 * sim-main.h (UndefinedResult, Unpredictable): New macros
1554 which currently do nothing.
1556 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1558 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1559 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1560 (status_CU3): New definitions.
1562 * sim-main.h (ExceptionCause): Add new values for MIPS32
1563 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1564 for DebugBreakPoint and NMIReset to note their status in
1566 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1567 (SignalExceptionCacheErr): New exception macros.
1569 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1571 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1572 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1574 (SignalExceptionCoProcessorUnusable): Take as argument the
1575 unusable coprocessor number.
1577 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1579 * mips.igen: Fix formatting of all SignalException calls.
1581 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1583 * sim-main.h (SIGNEXTEND): Remove.
1585 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1587 * mips.igen: Remove gencode comment from top of file, fix
1588 spelling in another comment.
1590 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1592 * mips.igen (check_fmt, check_fmt_p): New functions to check
1593 whether specific floating point formats are usable.
1594 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1595 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1596 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1597 Use the new functions.
1598 (do_c_cond_fmt): Remove format checks...
1599 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1601 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1603 * mips.igen: Fix formatting of check_fpu calls.
1605 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1607 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1609 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1611 * mips.igen: Remove whitespace at end of lines.
1613 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1615 * mips.igen (loadstore_ea): New function to do effective
1616 address calculations.
1617 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1618 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1619 CACHE): Use loadstore_ea to do effective address computations.
1621 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1623 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1624 * mips.igen (LL, CxC1, MxC1): Likewise.
1626 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1628 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1629 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1630 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1631 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1632 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1633 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1634 Don't split opcode fields by hand, use the opcode field values
1637 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1639 * mips.igen (do_divu): Fix spacing.
1641 * mips.igen (do_dsllv): Move to be right before DSLLV,
1642 to match the rest of the do_<shift> functions.
1644 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1646 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1647 DSRL32, do_dsrlv): Trace inputs and results.
1649 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1651 * mips.igen (CACHE): Provide instruction-printing string.
1653 * interp.c (signal_exception): Comment tokens after #endif.
1655 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1657 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1658 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1659 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1660 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1661 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1662 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1663 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1664 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1666 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1668 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1669 instruction-printing string.
1670 (LWU): Use '64' as the filter flag.
1672 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1674 * mips.igen (SDXC1): Fix instruction-printing string.
1676 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1678 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1679 filter flags "32,f".
1681 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1683 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1686 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1688 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1689 add a comma) so that it more closely match the MIPS ISA
1690 documentation opcode partitioning.
1691 (PREF): Put useful names on opcode fields, and include
1692 instruction-printing string.
1694 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1696 * mips.igen (check_u64): New function which in the future will
1697 check whether 64-bit instructions are usable and signal an
1698 exception if not. Currently a no-op.
1699 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1700 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1701 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1702 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1704 * mips.igen (check_fpu): New function which in the future will
1705 check whether FPU instructions are usable and signal an exception
1706 if not. Currently a no-op.
1707 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1708 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1709 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1710 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1711 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1712 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1713 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1714 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1716 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1718 * mips.igen (do_load_left, do_load_right): Move to be immediately
1720 (do_store_left, do_store_right): Move to be immediately following
1723 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1725 * mips.igen (mipsV): New model name. Also, add it to
1726 all instructions and functions where it is appropriate.
1728 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1730 * mips.igen: For all functions and instructions, list model
1731 names that support that instruction one per line.
1733 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1735 * mips.igen: Add some additional comments about supported
1736 models, and about which instructions go where.
1737 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1738 order as is used in the rest of the file.
1740 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1742 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1743 indicating that ALU32_END or ALU64_END are there to check
1745 (DADD): Likewise, but also remove previous comment about
1748 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1750 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1751 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1752 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1753 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1754 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1755 fields (i.e., add and move commas) so that they more closely
1756 match the MIPS ISA documentation opcode partitioning.
1758 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1760 * mips.igen (ADDI): Print immediate value.
1761 (BREAK): Print code.
1762 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1763 (SLL): Print "nop" specially, and don't run the code
1764 that does the shift for the "nop" case.
1766 2001-11-17 Fred Fish <fnf@redhat.com>
1768 * sim-main.h (float_operation): Move enum declaration outside
1769 of _sim_cpu struct declaration.
1771 2001-04-12 Jim Blandy <jimb@redhat.com>
1773 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1774 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1776 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1777 PENDING_FILL, and you can get the intended effect gracefully by
1778 calling PENDING_SCHED directly.
1780 2001-02-23 Ben Elliston <bje@redhat.com>
1782 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1783 already defined elsewhere.
1785 2001-02-19 Ben Elliston <bje@redhat.com>
1787 * sim-main.h (sim_monitor): Return an int.
1788 * interp.c (sim_monitor): Add return values.
1789 (signal_exception): Handle error conditions from sim_monitor.
1791 2001-02-08 Ben Elliston <bje@redhat.com>
1793 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1794 (store_memory): Likewise, pass cia to sim_core_write*.
1796 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1798 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1799 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1801 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1803 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1804 * Makefile.in: Don't delete *.igen when cleaning directory.
1806 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1808 * m16.igen (break): Call SignalException not sim_engine_halt.
1810 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1812 From Jason Eckhardt:
1813 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1815 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1817 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1819 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1821 * mips.igen (do_dmultx): Fix typo.
1823 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1825 * configure: Regenerated to track ../common/aclocal.m4 changes.
1827 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1829 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1831 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1833 * sim-main.h (GPR_CLEAR): Define macro.
1835 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1837 * interp.c (decode_coproc): Output long using %lx and not %s.
1839 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1841 * interp.c (sim_open): Sort & extend dummy memory regions for
1842 --board=jmr3904 for eCos.
1844 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1846 * configure: Regenerated.
1848 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1850 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1851 calls, conditional on the simulator being in verbose mode.
1853 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1855 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1856 cache don't get ReservedInstruction traps.
1858 1999-11-29 Mark Salter <msalter@cygnus.com>
1860 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1861 to clear status bits in sdisr register. This is how the hardware works.
1863 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1864 being used by cygmon.
1866 1999-11-11 Andrew Haley <aph@cygnus.com>
1868 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1871 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1873 * mips.igen (MULT): Correct previous mis-applied patch.
1875 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1877 * mips.igen (delayslot32): Handle sequence like
1878 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1879 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1880 (MULT): Actually pass the third register...
1882 1999-09-03 Mark Salter <msalter@cygnus.com>
1884 * interp.c (sim_open): Added more memory aliases for additional
1885 hardware being touched by cygmon on jmr3904 board.
1887 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1889 * configure: Regenerated to track ../common/aclocal.m4 changes.
1891 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1893 * interp.c (sim_store_register): Handle case where client - GDB -
1894 specifies that a 4 byte register is 8 bytes in size.
1895 (sim_fetch_register): Ditto.
1897 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1899 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1900 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1901 (idt_monitor_base): Base address for IDT monitor traps.
1902 (pmon_monitor_base): Ditto for PMON.
1903 (lsipmon_monitor_base): Ditto for LSI PMON.
1904 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1905 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1906 (sim_firmware_command): New function.
1907 (mips_option_handler): Call it for OPTION_FIRMWARE.
1908 (sim_open): Allocate memory for idt_monitor region. If "--board"
1909 option was given, add no monitor by default. Add BREAK hooks only if
1910 monitors are also there.
1912 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1914 * interp.c (sim_monitor): Flush output before reading input.
1916 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1918 * tconfig.in (SIM_HANDLES_LMA): Always define.
1920 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1922 From Mark Salter <msalter@cygnus.com>:
1923 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1924 (sim_open): Add setup for BSP board.
1926 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1928 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1929 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1930 them as unimplemented.
1932 1999-05-08 Felix Lee <flee@cygnus.com>
1934 * configure: Regenerated to track ../common/aclocal.m4 changes.
1936 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1938 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1940 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1942 * configure.in: Any mips64vr5*-*-* target should have
1943 -DTARGET_ENABLE_FR=1.
1944 (default_endian): Any mips64vr*el-*-* target should default to
1946 * configure: Re-generate.
1948 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1950 * mips.igen (ldl): Extend from _16_, not 32.
1952 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1954 * interp.c (sim_store_register): Force registers written to by GDB
1955 into an un-interpreted state.
1957 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1959 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1960 CPU, start periodic background I/O polls.
1961 (tx3904sio_poll): New function: periodic I/O poller.
1963 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1965 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1967 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1969 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1972 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1974 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1975 (load_word): Call SIM_CORE_SIGNAL hook on error.
1976 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1977 starting. For exception dispatching, pass PC instead of NULL_CIA.
1978 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1979 * sim-main.h (COP0_BADVADDR): Define.
1980 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1981 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1982 (_sim_cpu): Add exc_* fields to store register value snapshots.
1983 * mips.igen (*): Replace memory-related SignalException* calls
1984 with references to SIM_CORE_SIGNAL hook.
1986 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1988 * sim-main.c (*): Minor warning cleanups.
1990 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1992 * m16.igen (DADDIU5): Correct type-o.
1994 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1996 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1999 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
2001 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
2003 (interp.o): Add dependency on itable.h
2004 (oengine.c, gencode): Delete remaining references.
2005 (BUILT_SRC_FROM_GEN): Clean up.
2007 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
2010 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
2011 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
2012 tmp-run-hack) : New.
2013 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
2014 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
2015 Drop the "64" qualifier to get the HACK generator working.
2016 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
2017 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
2018 qualifier to get the hack generator working.
2019 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
2020 (DSLL): Use do_dsll.
2021 (DSLLV): Use do_dsllv.
2022 (DSRA): Use do_dsra.
2023 (DSRL): Use do_dsrl.
2024 (DSRLV): Use do_dsrlv.
2025 (BC1): Move *vr4100 to get the HACK generator working.
2026 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2027 get the HACK generator working.
2028 (MACC) Rename to get the HACK generator working.
2029 (DMACC,MACCS,DMACCS): Add the 64.
2031 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
2033 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2034 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2036 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
2038 * mips/interp.c (DEBUG): Cleanups.
2040 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
2042 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2043 (tx3904sio_tickle): fflush after a stdout character output.
2045 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
2047 * interp.c (sim_close): Uninstall modules.
2049 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
2051 * sim-main.h, interp.c (sim_monitor): Change to global
2054 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2056 * configure.in (vr4100): Only include vr4100 instructions in
2058 * configure: Re-generate.
2059 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2061 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2063 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2064 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2067 * configure.in (sim_default_gen, sim_use_gen): Replace with
2069 (--enable-sim-igen): Delete config option. Always using IGEN.
2070 * configure: Re-generate.
2072 * Makefile.in (gencode): Kill, kill, kill.
2075 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2077 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2078 bit mips16 igen simulator.
2079 * configure: Re-generate.
2081 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2082 as part of vr4100 ISA.
2083 * vr.igen: Mark all instructions as 64 bit only.
2085 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2087 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2090 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
2092 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2093 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
2094 * configure: Re-generate.
2096 * m16.igen (BREAK): Define breakpoint instruction.
2097 (JALX32): Mark instruction as mips16 and not r3900.
2098 * mips.igen (C.cond.fmt): Fix typo in instruction format.
2100 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2102 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2104 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2105 insn as a debug breakpoint.
2107 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2109 (PENDING_SCHED): Clean up trace statement.
2110 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2111 (PENDING_FILL): Delay write by only one cycle.
2112 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2114 * sim-main.c (pending_tick): Clean up trace statements. Add trace
2116 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2118 (pending_tick): Move incrementing of index to FOR statement.
2119 (pending_tick): Only update PENDING_OUT after a write has occured.
2121 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2123 * configure: Re-generate.
2125 * interp.c (sim_engine_run OLD): Delete explicit call to
2126 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2128 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
2130 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2131 interrupt level number to match changed SignalExceptionInterrupt
2134 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
2136 * interp.c: #include "itable.h" if WITH_IGEN.
2137 (get_insn_name): New function.
2138 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2139 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2141 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
2143 * configure: Rebuilt to inhale new common/aclocal.m4.
2145 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
2147 * dv-tx3904sio.c: Include sim-assert.h.
2149 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
2151 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2152 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2153 Reorganize target-specific sim-hardware checks.
2154 * configure: rebuilt.
2155 * interp.c (sim_open): For tx39 target boards, set
2156 OPERATING_ENVIRONMENT, add tx3904sio devices.
2157 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2158 ROM executables. Install dv-sockser into sim-modules list.
2160 * dv-tx3904irc.c: Compiler warning clean-up.
2161 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
2162 frequent hw-trace messages.
2164 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2166 * vr.igen (MulAcc): Identify as a vr4100 specific function.
2168 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2170 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2172 * vr.igen: New file.
2173 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2174 * mips.igen: Define vr4100 model. Include vr.igen.
2175 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
2177 * mips.igen (check_mf_hilo): Correct check.
2179 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2181 * sim-main.h (interrupt_event): Add prototype.
2183 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2184 register_ptr, register_value.
2185 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2187 * sim-main.h (tracefh): Make extern.
2189 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
2191 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2192 Reduce unnecessarily high timer event frequency.
2193 * dv-tx3904cpu.c: Ditto for interrupt event.
2195 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
2197 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2199 (interrupt_event): Made non-static.
2201 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2202 interchange of configuration values for external vs. internal
2205 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
2207 * mips.igen (BREAK): Moved code to here for
2208 simulator-reserved break instructions.
2209 * gencode.c (build_instruction): Ditto.
2210 * interp.c (signal_exception): Code moved from here. Non-
2211 reserved instructions now use exception vector, rather
2213 * sim-main.h: Moved magic constants to here.
2215 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
2217 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2218 register upon non-zero interrupt event level, clear upon zero
2220 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2221 by passing zero event value.
2222 (*_io_{read,write}_buffer): Endianness fixes.
2223 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2224 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2226 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2227 serial I/O and timer module at base address 0xFFFF0000.
2229 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2231 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2234 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2236 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2238 * configure: Update.
2240 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2242 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2243 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2244 * configure.in: Include tx3904tmr in hw_device list.
2245 * configure: Rebuilt.
2246 * interp.c (sim_open): Instantiate three timer instances.
2247 Fix address typo of tx3904irc instance.
2249 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2251 * interp.c (signal_exception): SystemCall exception now uses
2252 the exception vector.
2254 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2256 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2259 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2261 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2263 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2265 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2267 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2268 sim-main.h. Declare a struct hw_descriptor instead of struct
2269 hw_device_descriptor.
2271 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2273 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2274 right bits and then re-align left hand bytes to correct byte
2275 lanes. Fix incorrect computation in do_store_left when loading
2276 bytes from second word.
2278 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2280 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2281 * interp.c (sim_open): Only create a device tree when HW is
2284 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2285 * interp.c (signal_exception): Ditto.
2287 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2289 * gencode.c: Mark BEGEZALL as LIKELY.
2291 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2293 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2294 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2296 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2298 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2299 modules. Recognize TX39 target with "mips*tx39" pattern.
2300 * configure: Rebuilt.
2301 * sim-main.h (*): Added many macros defining bits in
2302 TX39 control registers.
2303 (SignalInterrupt): Send actual PC instead of NULL.
2304 (SignalNMIReset): New exception type.
2305 * interp.c (board): New variable for future use to identify
2306 a particular board being simulated.
2307 (mips_option_handler,mips_options): Added "--board" option.
2308 (interrupt_event): Send actual PC.
2309 (sim_open): Make memory layout conditional on board setting.
2310 (signal_exception): Initial implementation of hardware interrupt
2311 handling. Accept another break instruction variant for simulator
2313 (decode_coproc): Implement RFE instruction for TX39.
2314 (mips.igen): Decode RFE instruction as such.
2315 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2316 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2317 bbegin to implement memory map.
2318 * dv-tx3904cpu.c: New file.
2319 * dv-tx3904irc.c: New file.
2321 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2323 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2325 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2327 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2328 with calls to check_div_hilo.
2330 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2332 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2333 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2334 Add special r3900 version of do_mult_hilo.
2335 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2336 with calls to check_mult_hilo.
2337 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2338 with calls to check_div_hilo.
2340 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2342 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2343 Document a replacement.
2345 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2347 * interp.c (sim_monitor): Make mon_printf work.
2349 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2351 * sim-main.h (INSN_NAME): New arg `cpu'.
2353 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2355 * configure: Regenerated to track ../common/aclocal.m4 changes.
2357 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2359 * configure: Regenerated to track ../common/aclocal.m4 changes.
2362 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2364 * acconfig.h: New file.
2365 * configure.in: Reverted change of Apr 24; use sinclude again.
2367 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2369 * configure: Regenerated to track ../common/aclocal.m4 changes.
2372 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2374 * configure.in: Don't call sinclude.
2376 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2378 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2380 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2382 * mips.igen (ERET): Implement.
2384 * interp.c (decode_coproc): Return sign-extended EPC.
2386 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2388 * interp.c (signal_exception): Do not ignore Trap.
2389 (signal_exception): On TRAP, restart at exception address.
2390 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2391 (signal_exception): Update.
2392 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2393 so that TRAP instructions are caught.
2395 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2397 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2398 contains HI/LO access history.
2399 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2400 (HIACCESS, LOACCESS): Delete, replace with
2401 (HIHISTORY, LOHISTORY): New macros.
2402 (CHECKHILO): Delete all, moved to mips.igen
2404 * gencode.c (build_instruction): Do not generate checks for
2405 correct HI/LO register usage.
2407 * interp.c (old_engine_run): Delete checks for correct HI/LO
2410 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2411 check_mf_cycles): New functions.
2412 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2413 do_divu, domultx, do_mult, do_multu): Use.
2415 * tx.igen ("madd", "maddu"): Use.
2417 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2419 * mips.igen (DSRAV): Use function do_dsrav.
2420 (SRAV): Use new function do_srav.
2422 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2423 (B): Sign extend 11 bit immediate.
2424 (EXT-B*): Shift 16 bit immediate left by 1.
2425 (ADDIU*): Don't sign extend immediate value.
2427 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2429 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2431 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2434 * mips.igen (delayslot32, nullify_next_insn): New functions.
2435 (m16.igen): Always include.
2436 (do_*): Add more tracing.
2438 * m16.igen (delayslot16): Add NIA argument, could be called by a
2439 32 bit MIPS16 instruction.
2441 * interp.c (ifetch16): Move function from here.
2442 * sim-main.c (ifetch16): To here.
2444 * sim-main.c (ifetch16, ifetch32): Update to match current
2445 implementations of LH, LW.
2446 (signal_exception): Don't print out incorrect hex value of illegal
2449 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2451 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2454 * m16.igen: Implement MIPS16 instructions.
2456 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2457 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2458 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2459 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2460 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2461 bodies of corresponding code from 32 bit insn to these. Also used
2462 by MIPS16 versions of functions.
2464 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2465 (IMEM16): Drop NR argument from macro.
2467 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2469 * Makefile.in (SIM_OBJS): Add sim-main.o.
2471 * sim-main.h (address_translation, load_memory, store_memory,
2472 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2474 (pr_addr, pr_uword64): Declare.
2475 (sim-main.c): Include when H_REVEALS_MODULE_P.
2477 * interp.c (address_translation, load_memory, store_memory,
2478 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2480 * sim-main.c: To here. Fix compilation problems.
2482 * configure.in: Enable inlining.
2483 * configure: Re-config.
2485 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2487 * configure: Regenerated to track ../common/aclocal.m4 changes.
2489 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2491 * mips.igen: Include tx.igen.
2492 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2493 * tx.igen: New file, contains MADD and MADDU.
2495 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2496 the hardwired constant `7'.
2497 (store_memory): Ditto.
2498 (LOADDRMASK): Move definition to sim-main.h.
2500 mips.igen (MTC0): Enable for r3900.
2503 mips.igen (do_load_byte): Delete.
2504 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2505 do_store_right): New functions.
2506 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2508 configure.in: Let the tx39 use igen again.
2511 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2513 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2514 not an address sized quantity. Return zero for cache sizes.
2516 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2518 * mips.igen (r3900): r3900 does not support 64 bit integer
2521 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2523 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2525 * configure : Rebuild.
2527 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2529 * configure: Regenerated to track ../common/aclocal.m4 changes.
2531 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2533 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2535 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2537 * configure: Regenerated to track ../common/aclocal.m4 changes.
2538 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2540 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2542 * configure: Regenerated to track ../common/aclocal.m4 changes.
2544 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2546 * interp.c (Max, Min): Comment out functions. Not yet used.
2548 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2550 * configure: Regenerated to track ../common/aclocal.m4 changes.
2552 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2554 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2555 configurable settings for stand-alone simulator.
2557 * configure.in: Added X11 search, just in case.
2559 * configure: Regenerated.
2561 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2563 * interp.c (sim_write, sim_read, load_memory, store_memory):
2564 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2566 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2568 * sim-main.h (GETFCC): Return an unsigned value.
2570 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2572 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2573 (DADD): Result destination is RD not RT.
2575 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2577 * sim-main.h (HIACCESS, LOACCESS): Always define.
2579 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2581 * interp.c (sim_info): Delete.
2583 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2585 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2586 (mips_option_handler): New argument `cpu'.
2587 (sim_open): Update call to sim_add_option_table.
2589 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2591 * mips.igen (CxC1): Add tracing.
2593 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2595 * sim-main.h (Max, Min): Declare.
2597 * interp.c (Max, Min): New functions.
2599 * mips.igen (BC1): Add tracing.
2601 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2603 * interp.c Added memory map for stack in vr4100
2605 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2607 * interp.c (load_memory): Add missing "break"'s.
2609 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2611 * interp.c (sim_store_register, sim_fetch_register): Pass in
2612 length parameter. Return -1.
2614 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2616 * interp.c: Added hardware init hook, fixed warnings.
2618 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2620 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2622 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2624 * interp.c (ifetch16): New function.
2626 * sim-main.h (IMEM32): Rename IMEM.
2627 (IMEM16_IMMED): Define.
2629 (DELAY_SLOT): Update.
2631 * m16run.c (sim_engine_run): New file.
2633 * m16.igen: All instructions except LB.
2634 (LB): Call do_load_byte.
2635 * mips.igen (do_load_byte): New function.
2636 (LB): Call do_load_byte.
2638 * mips.igen: Move spec for insn bit size and high bit from here.
2639 * Makefile.in (tmp-igen, tmp-m16): To here.
2641 * m16.dc: New file, decode mips16 instructions.
2643 * Makefile.in (SIM_NO_ALL): Define.
2644 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2646 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2648 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2649 point unit to 32 bit registers.
2650 * configure: Re-generate.
2652 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2654 * configure.in (sim_use_gen): Make IGEN the default simulator
2655 generator for generic 32 and 64 bit mips targets.
2656 * configure: Re-generate.
2658 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2660 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2663 * interp.c (sim_fetch_register, sim_store_register): Read/write
2664 FGR from correct location.
2665 (sim_open): Set size of FGR's according to
2666 WITH_TARGET_FLOATING_POINT_BITSIZE.
2668 * sim-main.h (FGR): Store floating point registers in a separate
2671 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2673 * configure: Regenerated to track ../common/aclocal.m4 changes.
2675 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2677 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2679 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2681 * interp.c (pending_tick): New function. Deliver pending writes.
2683 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2684 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2685 it can handle mixed sized quantites and single bits.
2687 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2689 * interp.c (oengine.h): Do not include when building with IGEN.
2690 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2691 (sim_info): Ditto for PROCESSOR_64BIT.
2692 (sim_monitor): Replace ut_reg with unsigned_word.
2693 (*): Ditto for t_reg.
2694 (LOADDRMASK): Define.
2695 (sim_open): Remove defunct check that host FP is IEEE compliant,
2696 using software to emulate floating point.
2697 (value_fpr, ...): Always compile, was conditional on HASFPU.
2699 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2701 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2704 * interp.c (SD, CPU): Define.
2705 (mips_option_handler): Set flags in each CPU.
2706 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2707 (sim_close): Do not clear STATE, deleted anyway.
2708 (sim_write, sim_read): Assume CPU zero's vm should be used for
2710 (sim_create_inferior): Set the PC for all processors.
2711 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2713 (mips16_entry): Pass correct nr of args to store_word, load_word.
2714 (ColdReset): Cold reset all cpu's.
2715 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2716 (sim_monitor, load_memory, store_memory, signal_exception): Use
2717 `CPU' instead of STATE_CPU.
2720 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2723 * sim-main.h (signal_exception): Add sim_cpu arg.
2724 (SignalException*): Pass both SD and CPU to signal_exception.
2725 * interp.c (signal_exception): Update.
2727 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2729 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2730 address_translation): Ditto
2731 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2733 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2735 * configure: Regenerated to track ../common/aclocal.m4 changes.
2737 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2739 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2741 * mips.igen (model): Map processor names onto BFD name.
2743 * sim-main.h (CPU_CIA): Delete.
2744 (SET_CIA, GET_CIA): Define
2746 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2748 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2751 * configure.in (default_endian): Configure a big-endian simulator
2753 * configure: Re-generate.
2755 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2757 * configure: Regenerated to track ../common/aclocal.m4 changes.
2759 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2761 * interp.c (sim_monitor): Handle Densan monitor outbyte
2762 and inbyte functions.
2764 1997-12-29 Felix Lee <flee@cygnus.com>
2766 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2768 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2770 * Makefile.in (tmp-igen): Arrange for $zero to always be
2771 reset to zero after every instruction.
2773 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2775 * configure: Regenerated to track ../common/aclocal.m4 changes.
2778 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2780 * mips.igen (MSUB): Fix to work like MADD.
2781 * gencode.c (MSUB): Similarly.
2783 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2785 * configure: Regenerated to track ../common/aclocal.m4 changes.
2787 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2789 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2791 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * sim-main.h (sim-fpu.h): Include.
2795 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2796 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2797 using host independant sim_fpu module.
2799 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2801 * interp.c (signal_exception): Report internal errors with SIGABRT
2804 * sim-main.h (C0_CONFIG): New register.
2805 (signal.h): No longer include.
2807 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2809 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2811 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2813 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2815 * mips.igen: Tag vr5000 instructions.
2816 (ANDI): Was missing mipsIV model, fix assembler syntax.
2817 (do_c_cond_fmt): New function.
2818 (C.cond.fmt): Handle mips I-III which do not support CC field
2820 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2821 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2823 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2824 vr5000 which saves LO in a GPR separatly.
2826 * configure.in (enable-sim-igen): For vr5000, select vr5000
2827 specific instructions.
2828 * configure: Re-generate.
2830 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2832 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2834 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2835 fmt_uninterpreted_64 bit cases to switch. Convert to
2838 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2840 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2841 as specified in IV3.2 spec.
2842 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2844 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2846 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2847 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2848 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2849 PENDING_FILL versions of instructions. Simplify.
2851 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2853 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2855 (MTHI, MFHI): Disable code checking HI-LO.
2857 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2859 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2861 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2863 * gencode.c (build_mips16_operands): Replace IPC with cia.
2865 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2866 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2868 (UndefinedResult): Replace function with macro/function
2870 (sim_engine_run): Don't save PC in IPC.
2872 * sim-main.h (IPC): Delete.
2875 * interp.c (signal_exception, store_word, load_word,
2876 address_translation, load_memory, store_memory, cache_op,
2877 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2878 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2879 current instruction address - cia - argument.
2880 (sim_read, sim_write): Call address_translation directly.
2881 (sim_engine_run): Rename variable vaddr to cia.
2882 (signal_exception): Pass cia to sim_monitor
2884 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2885 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2886 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2888 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2889 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2892 * interp.c (signal_exception): Pass restart address to
2895 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2896 idecode.o): Add dependency.
2898 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2900 (DELAY_SLOT): Update NIA not PC with branch address.
2901 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2903 * mips.igen: Use CIA not PC in branch calculations.
2904 (illegal): Call SignalException.
2905 (BEQ, ADDIU): Fix assembler.
2907 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2909 * m16.igen (JALX): Was missing.
2911 * configure.in (enable-sim-igen): New configuration option.
2912 * configure: Re-generate.
2914 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2916 * interp.c (load_memory, store_memory): Delete parameter RAW.
2917 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2918 bypassing {load,store}_memory.
2920 * sim-main.h (ByteSwapMem): Delete definition.
2922 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2924 * interp.c (sim_do_command, sim_commands): Delete mips specific
2925 commands. Handled by module sim-options.
2927 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2928 (WITH_MODULO_MEMORY): Define.
2930 * interp.c (sim_info): Delete code printing memory size.
2932 * interp.c (mips_size): Nee sim_size, delete function.
2934 (monitor, monitor_base, monitor_size): Delete global variables.
2935 (sim_open, sim_close): Delete code creating monitor and other
2936 memory regions. Use sim-memopts module, via sim_do_commandf, to
2937 manage memory regions.
2938 (load_memory, store_memory): Use sim-core for memory model.
2940 * interp.c (address_translation): Delete all memory map code
2941 except line forcing 32 bit addresses.
2943 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2945 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2948 * interp.c (logfh, logfile): Delete globals.
2949 (sim_open, sim_close): Delete code opening & closing log file.
2950 (mips_option_handler): Delete -l and -n options.
2951 (OPTION mips_options): Ditto.
2953 * interp.c (OPTION mips_options): Rename option trace to dinero.
2954 (mips_option_handler): Update.
2956 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2958 * interp.c (fetch_str): New function.
2959 (sim_monitor): Rewrite using sim_read & sim_write.
2960 (sim_open): Check magic number.
2961 (sim_open): Write monitor vectors into memory using sim_write.
2962 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2963 (sim_read, sim_write): Simplify - transfer data one byte at a
2965 (load_memory, store_memory): Clarify meaning of parameter RAW.
2967 * sim-main.h (isHOST): Defete definition.
2968 (isTARGET): Mark as depreciated.
2969 (address_translation): Delete parameter HOST.
2971 * interp.c (address_translation): Delete parameter HOST.
2973 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2977 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2978 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2980 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2982 * mips.igen: Add model filter field to records.
2984 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2986 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2988 interp.c (sim_engine_run): Do not compile function sim_engine_run
2989 when WITH_IGEN == 1.
2991 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2992 target architecture.
2994 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2995 igen. Replace with configuration variables sim_igen_flags /
2998 * m16.igen: New file. Copy mips16 insns here.
2999 * mips.igen: From here.
3001 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3003 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
3005 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
3007 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
3009 * gencode.c (build_instruction): Follow sim_write's lead in using
3010 BigEndianMem instead of !ByteSwapMem.
3012 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
3014 * configure.in (sim_gen): Dependent on target, select type of
3015 generator. Always select old style generator.
3017 configure: Re-generate.
3019 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
3021 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
3022 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
3023 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
3024 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
3025 SIM_@sim_gen@_*, set by autoconf.
3027 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3029 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3031 * interp.c (ColdReset): Remove #ifdef HASFPU, check
3032 CURRENT_FLOATING_POINT instead.
3034 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3035 (address_translation): Raise exception InstructionFetch when
3036 translation fails and isINSTRUCTION.
3038 * interp.c (sim_open, sim_write, sim_monitor, store_word,
3039 sim_engine_run): Change type of of vaddr and paddr to
3041 (address_translation, prefetch, load_memory, store_memory,
3042 cache_op): Change type of vAddr and pAddr to address_word.
3044 * gencode.c (build_instruction): Change type of vaddr and paddr to
3047 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
3049 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3050 macro to obtain result of ALU op.
3052 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3054 * interp.c (sim_info): Call profile_print.
3056 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3058 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3060 * sim-main.h (WITH_PROFILE): Do not define, defined in
3061 common/sim-config.h. Use sim-profile module.
3062 (simPROFILE): Delete defintion.
3064 * interp.c (PROFILE): Delete definition.
3065 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3066 (sim_close): Delete code writing profile histogram.
3067 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3069 (sim_engine_run): Delete code profiling the PC.
3071 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3073 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3075 * interp.c (sim_monitor): Make register pointers of type
3078 * sim-main.h: Make registers of type unsigned_word not
3081 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3083 * interp.c (sync_operation): Rename from SyncOperation, make
3084 global, add SD argument.
3085 (prefetch): Rename from Prefetch, make global, add SD argument.
3086 (decode_coproc): Make global.
3088 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3090 * gencode.c (build_instruction): Generate DecodeCoproc not
3091 decode_coproc calls.
3093 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3094 (SizeFGR): Move to sim-main.h
3095 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3096 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3097 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3099 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3100 FP_RM_TOMINF, GETRM): Move to sim-main.h.
3101 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3102 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3103 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3104 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3106 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3108 (sim-alu.h): Include.
3109 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3110 (sim_cia): Typedef to instruction_address.
3112 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
3114 * Makefile.in (interp.o): Rename generated file engine.c to
3119 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
3121 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3123 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3125 * gencode.c (build_instruction): For "FPSQRT", output correct
3126 number of arguments to Recip.
3128 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
3130 * Makefile.in (interp.o): Depends on sim-main.h
3132 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3134 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3135 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3136 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3137 STATE, DSSTATE): Define
3138 (GPR, FGRIDX, ..): Define.
3140 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3141 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3142 (GPR, FGRIDX, ...): Delete macros.
3144 * interp.c: Update names to match defines from sim-main.h
3146 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
3148 * interp.c (sim_monitor): Add SD argument.
3149 (sim_warning): Delete. Replace calls with calls to
3151 (sim_error): Delete. Replace calls with sim_io_error.
3152 (open_trace, writeout32, writeout16, getnum): Add SD argument.
3153 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3154 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3156 (mips_size): Rename from sim_size. Add SD argument.
3158 * interp.c (simulator): Delete global variable.
3159 (callback): Delete global variable.
3160 (mips_option_handler, sim_open, sim_write, sim_read,
3161 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3162 sim_size,sim_monitor): Use sim_io_* not callback->*.
3163 (sim_open): ZALLOC simulator struct.
3164 (PROFILE): Do not define.
3166 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3168 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3169 support.h with corresponding code.
3171 * sim-main.h (word64, uword64), support.h: Move definition to
3173 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3176 * Makefile.in: Update dependencies
3177 * interp.c: Do not include.
3179 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3181 * interp.c (address_translation, load_memory, store_memory,
3182 cache_op): Rename to from AddressTranslation et.al., make global,
3185 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3188 * interp.c (SignalException): Rename to signal_exception, make
3191 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3193 * sim-main.h (SignalException, SignalExceptionInterrupt,
3194 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3195 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3196 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3199 * interp.c, support.h: Use.
3201 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3203 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3204 to value_fpr / store_fpr. Add SD argument.
3205 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3206 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3208 * sim-main.h (ValueFPR, StoreFPR): Define.
3210 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3212 * interp.c (sim_engine_run): Check consistency between configure
3213 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3216 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3217 (mips_fpu): Configure WITH_FLOATING_POINT.
3218 (mips_endian): Configure WITH_TARGET_ENDIAN.
3219 * configure: Update.
3221 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3223 * configure: Regenerated to track ../common/aclocal.m4 changes.
3225 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3227 * configure: Regenerated.
3229 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3231 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3233 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3235 * gencode.c (print_igen_insn_models): Assume certain architectures
3236 include all mips* instructions.
3237 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3240 * Makefile.in (tmp.igen): Add target. Generate igen input from
3243 * gencode.c (FEATURE_IGEN): Define.
3244 (main): Add --igen option. Generate output in igen format.
3245 (process_instructions): Format output according to igen option.
3246 (print_igen_insn_format): New function.
3247 (print_igen_insn_models): New function.
3248 (process_instructions): Only issue warnings and ignore
3249 instructions when no FEATURE_IGEN.
3251 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3253 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3256 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3258 * configure: Regenerated to track ../common/aclocal.m4 changes.
3260 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3262 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3263 SIM_RESERVED_BITS): Delete, moved to common.
3264 (SIM_EXTRA_CFLAGS): Update.
3266 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3268 * configure.in: Configure non-strict memory alignment.
3269 * configure: Regenerated to track ../common/aclocal.m4 changes.
3271 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3273 * configure: Regenerated to track ../common/aclocal.m4 changes.
3275 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3277 * gencode.c (SDBBP,DERET): Added (3900) insns.
3278 (RFE): Turn on for 3900.
3279 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3280 (dsstate): Made global.
3281 (SUBTARGET_R3900): Added.
3282 (CANCELDELAYSLOT): New.
3283 (SignalException): Ignore SystemCall rather than ignore and
3284 terminate. Add DebugBreakPoint handling.
3285 (decode_coproc): New insns RFE, DERET; and new registers Debug
3286 and DEPC protected by SUBTARGET_R3900.
3287 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3289 * Makefile.in,configure.in: Add mips subtarget option.
3290 * configure: Update.
3292 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3294 * gencode.c: Add r3900 (tx39).
3297 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3299 * gencode.c (build_instruction): Don't need to subtract 4 for
3302 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3304 * interp.c: Correct some HASFPU problems.
3306 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3308 * configure: Regenerated to track ../common/aclocal.m4 changes.
3310 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3312 * interp.c (mips_options): Fix samples option short form, should
3315 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3317 * interp.c (sim_info): Enable info code. Was just returning.
3319 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3321 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3324 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3326 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3328 (build_instruction): Ditto for LL.
3330 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3332 * configure: Regenerated to track ../common/aclocal.m4 changes.
3334 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3336 * configure: Regenerated to track ../common/aclocal.m4 changes.
3339 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3341 * interp.c (sim_open): Add call to sim_analyze_program, update
3344 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3346 * interp.c (sim_kill): Delete.
3347 (sim_create_inferior): Add ABFD argument. Set PC from same.
3348 (sim_load): Move code initializing trap handlers from here.
3349 (sim_open): To here.
3350 (sim_load): Delete, use sim-hload.c.
3352 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3354 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3356 * configure: Regenerated to track ../common/aclocal.m4 changes.
3359 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3361 * interp.c (sim_open): Add ABFD argument.
3362 (sim_load): Move call to sim_config from here.
3363 (sim_open): To here. Check return status.
3365 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3367 * gencode.c (build_instruction): Two arg MADD should
3368 not assign result to $0.
3370 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3372 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3373 * sim/mips/configure.in: Regenerate.
3375 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3377 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3378 signed8, unsigned8 et.al. types.
3380 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3381 hosts when selecting subreg.
3383 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3385 * interp.c (sim_engine_run): Reset the ZERO register to zero
3386 regardless of FEATURE_WARN_ZERO.
3387 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3389 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3391 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3392 (SignalException): For BreakPoints ignore any mode bits and just
3394 (SignalException): Always set the CAUSE register.
3396 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3398 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3399 exception has been taken.
3401 * interp.c: Implement the ERET and mt/f sr instructions.
3403 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3405 * interp.c (SignalException): Don't bother restarting an
3408 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3410 * interp.c (SignalException): Really take an interrupt.
3411 (interrupt_event): Only deliver interrupts when enabled.
3413 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3415 * interp.c (sim_info): Only print info when verbose.
3416 (sim_info) Use sim_io_printf for output.
3418 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3420 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3423 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3425 * interp.c (sim_do_command): Check for common commands if a
3426 simulator specific command fails.
3428 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3430 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3431 and simBE when DEBUG is defined.
3433 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3435 * interp.c (interrupt_event): New function. Pass exception event
3436 onto exception handler.
3438 * configure.in: Check for stdlib.h.
3439 * configure: Regenerate.
3441 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3442 variable declaration.
3443 (build_instruction): Initialize memval1.
3444 (build_instruction): Add UNUSED attribute to byte, bigend,
3446 (build_operands): Ditto.
3448 * interp.c: Fix GCC warnings.
3449 (sim_get_quit_code): Delete.
3451 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3452 * Makefile.in: Ditto.
3453 * configure: Re-generate.
3455 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3457 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3459 * interp.c (mips_option_handler): New function parse argumes using
3461 (myname): Replace with STATE_MY_NAME.
3462 (sim_open): Delete check for host endianness - performed by
3464 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3465 (sim_open): Move much of the initialization from here.
3466 (sim_load): To here. After the image has been loaded and
3468 (sim_open): Move ColdReset from here.
3469 (sim_create_inferior): To here.
3470 (sim_open): Make FP check less dependant on host endianness.
3472 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3474 * interp.c (sim_set_callbacks): Delete.
3476 * interp.c (membank, membank_base, membank_size): Replace with
3477 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3478 (sim_open): Remove call to callback->init. gdb/run do this.
3482 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3484 * interp.c (big_endian_p): Delete, replaced by
3485 current_target_byte_order.
3487 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3489 * interp.c (host_read_long, host_read_word, host_swap_word,
3490 host_swap_long): Delete. Using common sim-endian.
3491 (sim_fetch_register, sim_store_register): Use H2T.
3492 (pipeline_ticks): Delete. Handled by sim-events.
3494 (sim_engine_run): Update.
3496 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3498 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3500 (SignalException): To here. Signal using sim_engine_halt.
3501 (sim_stop_reason): Delete, moved to common.
3503 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3505 * interp.c (sim_open): Add callback argument.
3506 (sim_set_callbacks): Delete SIM_DESC argument.
3509 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3511 * Makefile.in (SIM_OBJS): Add common modules.
3513 * interp.c (sim_set_callbacks): Also set SD callback.
3514 (set_endianness, xfer_*, swap_*): Delete.
3515 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3516 Change to functions using sim-endian macros.
3517 (control_c, sim_stop): Delete, use common version.
3518 (simulate): Convert into.
3519 (sim_engine_run): This function.
3520 (sim_resume): Delete.
3522 * interp.c (simulation): New variable - the simulator object.
3523 (sim_kind): Delete global - merged into simulation.
3524 (sim_load): Cleanup. Move PC assignment from here.
3525 (sim_create_inferior): To here.
3527 * sim-main.h: New file.
3528 * interp.c (sim-main.h): Include.
3530 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3532 * configure: Regenerated to track ../common/aclocal.m4 changes.
3534 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3536 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3538 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3540 * gencode.c (build_instruction): DIV instructions: check
3541 for division by zero and integer overflow before using
3542 host's division operation.
3544 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3546 * Makefile.in (SIM_OBJS): Add sim-load.o.
3547 * interp.c: #include bfd.h.
3548 (target_byte_order): Delete.
3549 (sim_kind, myname, big_endian_p): New static locals.
3550 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3551 after argument parsing. Recognize -E arg, set endianness accordingly.
3552 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3553 load file into simulator. Set PC from bfd.
3554 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3555 (set_endianness): Use big_endian_p instead of target_byte_order.
3557 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3559 * interp.c (sim_size): Delete prototype - conflicts with
3560 definition in remote-sim.h. Correct definition.
3562 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3564 * configure: Regenerated to track ../common/aclocal.m4 changes.
3567 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3569 * interp.c (sim_open): New arg `kind'.
3571 * configure: Regenerated to track ../common/aclocal.m4 changes.
3573 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3575 * configure: Regenerated to track ../common/aclocal.m4 changes.
3577 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3579 * interp.c (sim_open): Set optind to 0 before calling getopt.
3581 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3583 * configure: Regenerated to track ../common/aclocal.m4 changes.
3585 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3587 * interp.c : Replace uses of pr_addr with pr_uword64
3588 where the bit length is always 64 independent of SIM_ADDR.
3589 (pr_uword64) : added.
3591 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3593 * configure: Re-generate.
3595 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3597 * configure: Regenerate to track ../common/aclocal.m4 changes.
3599 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3601 * interp.c (sim_open): New SIM_DESC result. Argument is now
3603 (other sim_*): New SIM_DESC argument.
3605 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3607 * interp.c: Fix printing of addresses for non-64-bit targets.
3608 (pr_addr): Add function to print address based on size.
3610 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3612 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3614 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3616 * gencode.c (build_mips16_operands): Correct computation of base
3617 address for extended PC relative instruction.
3619 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3621 * interp.c (mips16_entry): Add support for floating point cases.
3622 (SignalException): Pass floating point cases to mips16_entry.
3623 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3625 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3627 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3628 and then set the state to fmt_uninterpreted.
3629 (COP_SW): Temporarily set the state to fmt_word while calling
3632 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3634 * gencode.c (build_instruction): The high order may be set in the
3635 comparison flags at any ISA level, not just ISA 4.
3637 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3639 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3640 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3641 * configure.in: sinclude ../common/aclocal.m4.
3642 * configure: Regenerated.
3644 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3646 * configure: Rebuild after change to aclocal.m4.
3648 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3650 * configure configure.in Makefile.in: Update to new configure
3651 scheme which is more compatible with WinGDB builds.
3652 * configure.in: Improve comment on how to run autoconf.
3653 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3654 * Makefile.in: Use autoconf substitution to install common
3657 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3659 * gencode.c (build_instruction): Use BigEndianCPU instead of
3662 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3664 * interp.c (sim_monitor): Make output to stdout visible in
3665 wingdb's I/O log window.
3667 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3669 * support.h: Undo previous change to SIGTRAP
3672 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3674 * interp.c (store_word, load_word): New static functions.
3675 (mips16_entry): New static function.
3676 (SignalException): Look for mips16 entry and exit instructions.
3677 (simulate): Use the correct index when setting fpr_state after
3678 doing a pending move.
3680 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3682 * interp.c: Fix byte-swapping code throughout to work on
3683 both little- and big-endian hosts.
3685 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3687 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3688 with gdb/config/i386/xm-windows.h.
3690 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3692 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3693 that messes up arithmetic shifts.
3695 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3697 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3698 SIGTRAP and SIGQUIT for _WIN32.
3700 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3702 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3703 force a 64 bit multiplication.
3704 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3705 destination register is 0, since that is the default mips16 nop
3708 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3710 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3711 (build_endian_shift): Don't check proc64.
3712 (build_instruction): Always set memval to uword64. Cast op2 to
3713 uword64 when shifting it left in memory instructions. Always use
3714 the same code for stores--don't special case proc64.
3716 * gencode.c (build_mips16_operands): Fix base PC value for PC
3718 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3720 * interp.c (simJALDELAYSLOT): Define.
3721 (JALDELAYSLOT): Define.
3722 (INDELAYSLOT, INJALDELAYSLOT): Define.
3723 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3725 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3727 * interp.c (sim_open): add flush_cache as a PMON routine
3728 (sim_monitor): handle flush_cache by ignoring it
3730 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3732 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3734 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3735 (BigEndianMem): Rename to ByteSwapMem and change sense.
3736 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3737 BigEndianMem references to !ByteSwapMem.
3738 (set_endianness): New function, with prototype.
3739 (sim_open): Call set_endianness.
3740 (sim_info): Use simBE instead of BigEndianMem.
3741 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3742 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3743 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3744 ifdefs, keeping the prototype declaration.
3745 (swap_word): Rewrite correctly.
3746 (ColdReset): Delete references to CONFIG. Delete endianness related
3747 code; moved to set_endianness.
3749 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3751 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3752 * interp.c (CHECKHILO): Define away.
3753 (simSIGINT): New macro.
3754 (membank_size): Increase from 1MB to 2MB.
3755 (control_c): New function.
3756 (sim_resume): Rename parameter signal to signal_number. Add local
3757 variable prev. Call signal before and after simulate.
3758 (sim_stop_reason): Add simSIGINT support.
3759 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3761 (sim_warning): Delete call to SignalException. Do call printf_filtered
3763 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3764 a call to sim_warning.
3766 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3768 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3769 16 bit instructions.
3771 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3773 Add support for mips16 (16 bit MIPS implementation):
3774 * gencode.c (inst_type): Add mips16 instruction encoding types.
3775 (GETDATASIZEINSN): Define.
3776 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3777 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3779 (MIPS16_DECODE): New table, for mips16 instructions.
3780 (bitmap_val): New static function.
3781 (struct mips16_op): Define.
3782 (mips16_op_table): New table, for mips16 operands.
3783 (build_mips16_operands): New static function.
3784 (process_instructions): If PC is odd, decode a mips16
3785 instruction. Break out instruction handling into new
3786 build_instruction function.
3787 (build_instruction): New static function, broken out of
3788 process_instructions. Check modifiers rather than flags for SHIFT
3789 bit count and m[ft]{hi,lo} direction.
3790 (usage): Pass program name to fprintf.
3791 (main): Remove unused variable this_option_optind. Change
3792 ``*loptarg++'' to ``loptarg++''.
3793 (my_strtoul): Parenthesize && within ||.
3794 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3795 (simulate): If PC is odd, fetch a 16 bit instruction, and
3796 increment PC by 2 rather than 4.
3797 * configure.in: Add case for mips16*-*-*.
3798 * configure: Rebuild.
3800 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3802 * interp.c: Allow -t to enable tracing in standalone simulator.
3803 Fix garbage output in trace file and error messages.
3805 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3807 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3808 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3809 * configure.in: Simplify using macros in ../common/aclocal.m4.
3810 * configure: Regenerated.
3811 * tconfig.in: New file.
3813 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3815 * interp.c: Fix bugs in 64-bit port.
3816 Use ansi function declarations for msvc compiler.
3817 Initialize and test file pointer in trace code.
3818 Prevent duplicate definition of LAST_EMED_REGNUM.
3820 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3822 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3824 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3826 * interp.c (SignalException): Check for explicit terminating
3828 * gencode.c: Pass instruction value through SignalException()
3829 calls for Trap, Breakpoint and Syscall.
3831 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3833 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3834 only used on those hosts that provide it.
3835 * configure.in: Add sqrt() to list of functions to be checked for.
3836 * config.in: Re-generated.
3837 * configure: Re-generated.
3839 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3841 * gencode.c (process_instructions): Call build_endian_shift when
3842 expanding STORE RIGHT, to fix swr.
3843 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3844 clear the high bits.
3845 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3846 Fix float to int conversions to produce signed values.
3848 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3850 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3851 (process_instructions): Correct handling of nor instruction.
3852 Correct shift count for 32 bit shift instructions. Correct sign
3853 extension for arithmetic shifts to not shift the number of bits in
3854 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3855 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3857 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3858 It's OK to have a mult follow a mult. What's not OK is to have a
3859 mult follow an mfhi.
3860 (Convert): Comment out incorrect rounding code.
3862 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3864 * interp.c (sim_monitor): Improved monitor printf
3865 simulation. Tidied up simulator warnings, and added "--log" option
3866 for directing warning message output.
3867 * gencode.c: Use sim_warning() rather than WARNING macro.
3869 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3871 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3872 getopt1.o, rather than on gencode.c. Link objects together.
3873 Don't link against -liberty.
3874 (gencode.o, getopt.o, getopt1.o): New targets.
3875 * gencode.c: Include <ctype.h> and "ansidecl.h".
3876 (AND): Undefine after including "ansidecl.h".
3877 (ULONG_MAX): Define if not defined.
3878 (OP_*): Don't define macros; now defined in opcode/mips.h.
3879 (main): Call my_strtoul rather than strtoul.
3880 (my_strtoul): New static function.
3882 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3884 * gencode.c (process_instructions): Generate word64 and uword64
3885 instead of `long long' and `unsigned long long' data types.
3886 * interp.c: #include sysdep.h to get signals, and define default
3888 * (Convert): Work around for Visual-C++ compiler bug with type
3890 * support.h: Make things compile under Visual-C++ by using
3891 __int64 instead of `long long'. Change many refs to long long
3892 into word64/uword64 typedefs.
3894 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3896 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3897 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3899 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3900 (AC_PROG_INSTALL): Added.
3901 (AC_PROG_CC): Moved to before configure.host call.
3902 * configure: Rebuilt.
3904 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3906 * configure.in: Define @SIMCONF@ depending on mips target.
3907 * configure: Rebuild.
3908 * Makefile.in (run): Add @SIMCONF@ to control simulator
3910 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3911 * interp.c: Remove some debugging, provide more detailed error
3912 messages, update memory accesses to use LOADDRMASK.
3914 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3916 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3917 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3919 * configure: Rebuild.
3920 * config.in: New file, generated by autoheader.
3921 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3922 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3923 HAVE_ANINT and HAVE_AINT, as appropriate.
3924 * Makefile.in (run): Use @LIBS@ rather than -lm.
3925 (interp.o): Depend upon config.h.
3926 (Makefile): Just rebuild Makefile.
3927 (clean): Remove stamp-h.
3928 (mostlyclean): Make the same as clean, not as distclean.
3929 (config.h, stamp-h): New targets.
3931 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3933 * interp.c (ColdReset): Fix boolean test. Make all simulator
3936 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3938 * interp.c (xfer_direct_word, xfer_direct_long,
3939 swap_direct_word, swap_direct_long, xfer_big_word,
3940 xfer_big_long, xfer_little_word, xfer_little_long,
3941 swap_word,swap_long): Added.
3942 * interp.c (ColdReset): Provide function indirection to
3943 host<->simulated_target transfer routines.
3944 * interp.c (sim_store_register, sim_fetch_register): Updated to
3945 make use of indirected transfer routines.
3947 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3949 * gencode.c (process_instructions): Ensure FP ABS instruction
3951 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3952 system call support.
3954 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3956 * interp.c (sim_do_command): Complain if callback structure not
3959 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3961 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3962 support for Sun hosts.
3963 * Makefile.in (gencode): Ensure the host compiler and libraries
3964 used for cross-hosted build.
3966 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3968 * interp.c, gencode.c: Some more (TODO) tidying.
3970 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3972 * gencode.c, interp.c: Replaced explicit long long references with
3973 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3974 * support.h (SET64LO, SET64HI): Macros added.
3976 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3978 * configure: Regenerate with autoconf 2.7.
3980 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3982 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3983 * support.h: Remove superfluous "1" from #if.
3984 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3986 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3988 * interp.c (StoreFPR): Control UndefinedResult() call on
3989 WARN_RESULT manifest.
3991 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3993 * gencode.c: Tidied instruction decoding, and added FP instruction
3996 * interp.c: Added dineroIII, and BSD profiling support. Also
3997 run-time FP handling.
3999 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
4001 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
4002 gencode.c, interp.c, support.h: created.