sim/mips/ChangeLog

   1 2021-04-08  Simon Marchi  <simon.marchi@polymtl.ca>
   2
   3         * Makefile.in: Set ASAN_OPTIONS when running igen.
   4
   5 2021-04-04  Steve Ellcey  <sellcey@mips.com>
   6             Faraz Shahbazker  <fshahbazker@wavecomp.com>
   7
   8         * interp.c (sim_monitor): Add switch entries for unlink (13),
   9         lseek (14), and stat (15).
  10
  11 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  12
  13         * Makefile.in (../igen/igen): Delete rule.
  14         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
  15
  16 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  17
  18         * aclocal.m4, configure: Regenerate.
  19
  20 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
  21
  22         * configure: Regenerate.
  23
  24 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * Makefile.in (SIM_EXTRA_ALL): Delete.
  27         (all): New target.
  28
  29 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
  30
  31         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
  32         * aclocal.m4, configure: Regenerate.
  33
  34 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
  35
  36         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
  37         * aclocal.m4, configure: Regenerate.
  38
  39 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  40
  41         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
  42
  43 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  44
  45         * configure: Regenerate.
  46
  47 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  48
  49         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  50
  51 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  52
  53         * config.in, configure: Regenerate.
  54         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  55         and strings.h include.
  56
  57 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  58
  59         * configure: Regenerate.
  60
  61 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  62
  63         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  64         * configure: Regenerate.
  65
  66 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  67
  68         * configure: Regenerate.
  69
  70 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
  71
  72         * configure: Regenerate.
  73
  74 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  75
  76         *  sim-main.c: Include <stdlib.h>.
  77
  78 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  79
  80         * cp1.c: Include <stdlib.h>.
  81
  82 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
  83
  84         * configure: Re-generate.
  85
  86 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
  87
  88         * configure: Regenerate.
  89
  90 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  91
  92         PR sim/20808
  93         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
  94         and SD to sd.
  95
  96 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  97
  98         PR sim/20809
  99         * mips.igen (check_u64): Enable for `r3900'.
 100
 101 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
 102
 103         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
 104         STATE_PROG_BFD (sd).
 105         * configure: Regenerate.
 106
 107 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
 108             Maciej W. Rozycki  <macro@imgtec.com>
 109
 110         PR sim/19441
 111         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 112         `micromips64' and `micromipsdsp' only.
 113         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 114         (do_micromips_jalr, do_micromips_jal): Likewise.
 115         (compute_movep_src_reg): Likewise.
 116         (compute_andi16_imm): Likewise.
 117         (convert_fmt_micromips): Likewise.
 118         (convert_fmt_micromips_cvt_d): Likewise.
 119         (convert_fmt_micromips_cvt_s): Likewise.
 120         (FMT_MICROMIPS): Likewise.
 121         (FMT_MICROMIPS_CVT_D): Likewise.
 122         (FMT_MICROMIPS_CVT_S): Likewise.
 123
 124 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 125
 126         * interp.c: Include elf-bfd.h.
 127         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 128         ELFCLASS32.
 129
 130 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 131
 132         * config.in, configure: Regenerate.
 133
 134 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 135
 136         * configure: Regenerate.
 137
 138 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 139
 140         * configure: Regenerate.
 141
 142 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 143
 144         * configure: Regenerate.
 145
 146 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 147
 148         * configure: Regenerate.
 149
 150 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 151
 152         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 153         * configure: Regenerate.
 154
 155 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 156
 157         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 158         * configure: Regenerate.
 159
 160 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 161
 162         * configure: Regenerate.
 163
 164 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 165
 166         * configure: Regenerate.
 167
 168 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 169
 170         * config.in, configure: Regenerate.
 171
 172 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 173
 174         * interp.c (sim_open): Mark argv const.
 175         (sim_create_inferior): Mark argv and env const.
 176
 177 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 178
 179         * configure: Regenerate.
 180
 181 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 182
 183         * interp.c (sim_open): Update sim_parse_args comment.
 184
 185 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 186
 187         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 188         * configure: Regenerate.
 189
 190 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 191
 192         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 193         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 194         * configure: Regenerate.
 195         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 196
 197 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 198
 199         * dv-tx3904cpu.c (CPU, SD): Delete.
 200
 201 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 202
 203         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 204         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 205         (sim_store_register): Rename to ...
 206         (mips_reg_store): ... this.  Delete local cpu var.
 207         Update sim_io_eprintf calls.
 208         (sim_fetch_register): Rename to ...
 209         (mips_reg_fetch): ... this.  Delete local cpu var.
 210         Update sim_io_eprintf calls.
 211
 212 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 213
 214         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 215
 216 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 217
 218         * config.in, configure: Regenerate.
 219
 220 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 221
 222         * interp.c (sim_write, sim_read): Delete.
 223         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 224         (load_word): Likewise.
 225         * micromips.igen (cache): Likewise.
 226         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 227         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 228         do_store_left, do_store_right, do_load_double, do_store_double):
 229         Likewise.
 230         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 231         (do_prefx): Likewise.
 232         * sim-main.c (address_translation, prefetch): Delete.
 233         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 234         paddr=vaddr.
 235         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 236         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 237         (LoadMemory, StoreMemory): Delete CCA arg.
 238
 239 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 240
 241         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 242         * configure: Regenerated.
 243
 244 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 245
 246         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 247         * tconfig.h: Delete.
 248
 249 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 250
 251         * tconfig.h (SIM_HANDLES_LMA): Delete.
 252
 253 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 254
 255         * sim-main.h (WITH_WATCHPOINTS): Delete.
 256
 257 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 258
 259         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 260
 261 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 262
 263         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 264
 265 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 266
 267         * micromips.igen (process_isa_mode): Fix left shift of negative
 268         value.
 269
 270 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 271
 272         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 273
 274 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 275
 276         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 277
 278 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 279
 280         * interp.c (sim_close): Rename to ...
 281         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 282         sim_io_shutdown.
 283         * sim-main.h (mips_sim_close): Declare.
 284         (SIM_CLOSE_HOOK): Define.
 285
 286 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 287             Ali Lown  <ali.lown@imgtec.com>
 288
 289         * Makefile.in (tmp-micromips): New rule.
 290         (tmp-mach-multi): Add support for micromips.
 291         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 292         that works for both mips64 and micromips64.
 293         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 294         micromips32.
 295         Add build support for micromips.
 296         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 297         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 298         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 299         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 300         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 301         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 302         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 303         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 304         Refactored instruction code to use these functions.
 305         * dsp2.igen: Refactored instruction code to use the new functions.
 306         * interp.c (decode_coproc): Refactored to work with any instruction
 307         encoding.
 308         (isa_mode): New variable
 309         (RSVD_INSTRUCTION): Changed to 0x00000039.
 310         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 311         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 312         * micromips.dc: New file.
 313         * micromips.igen: New file.
 314         * micromips16.dc: New file.
 315         * micromipsdsp.igen: New file.
 316         * micromipsrun.c: New file.
 317         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 318         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 319         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 320         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 321         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 322         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 323         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 324         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 325         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 326         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 327         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 328         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 329         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 330         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 331         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 332         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 333         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 334         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 335         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 336         instructions.
 337         Refactored instruction code to use these functions.
 338         (RSVD): Changed to use new reserved instruction.
 339         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 340         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 341         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 342         do_store_double):  Added micromips32 and micromips64 models.
 343         Added include for micromips.igen and micromipsdsp.igen
 344         Add micromips32 and micromips64 models.
 345         (DecodeCoproc): Updated to use new macro definition.
 346         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 347         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 348         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 349         Refactored instruction code to use these functions.
 350         * sim-main.h (CP0_operation): New enum.
 351         (DecodeCoproc): Updated macro.
 352         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 353         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 354         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 355         ISA_MODE_MICROMIPS): New defines.
 356         (sim_state): Add isa_mode field.
 357
 358 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 359
 360         * configure: Regenerate.
 361
 362 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 363
 364         * configure.ac: Change configure.in to configure.ac.
 365         * configure: Regenerate.
 366
 367 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 368
 369         * configure: Regenerate.
 370
 371 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 372
 373         * interp.c [TRACE]: Delete.
 374         (TRACE): Change to WITH_TRACE_ANY_P.
 375         [!WITH_TRACE_ANY_P] (open_trace): Define.
 376         (mips_option_handler, open_trace, sim_close, dotrace):
 377         Change defined(TRACE) to WITH_TRACE_ANY_P.
 378         (sim_open): Delete TRACE ifdef check.
 379         * sim-main.c (load_memory): Delete TRACE ifdef check.
 380         (store_memory): Likewise.
 381         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 382         [!WITH_TRACE_ANY_P] (dotrace): Define.
 383
 384 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 385
 386         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 387         comments.
 388
 389 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 390
 391         * sim-main.h (SIM_CPU): Delete.
 392
 393 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 394
 395         * sim-main.h (sim_cia): Delete.
 396
 397 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 398
 399         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 400         PU_PC_GET.
 401         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 402         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 403         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 404         CIA_SET to CPU_PC_SET.
 405         * sim-main.h (CIA_GET, CIA_SET): Delete.
 406
 407 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 408
 409         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 410         * sim-main.h (STATE_CPU): Delete.
 411
 412 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 413
 414         * configure: Regenerate.
 415
 416 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 417
 418         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 419         * interp.c (mips_pc_get, mips_pc_set): New functions.
 420         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 421         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 422         (sim_pc_get): Delete.
 423         * sim-main.h (SIM_CPU): Define.
 424         (struct sim_state): Change cpu to an array of pointers.
 425         (STATE_CPU): Drop &.
 426
 427 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 428
 429         * interp.c (mips_option_handler, open_trace, sim_close,
 430         sim_write, sim_read, sim_store_register, sim_fetch_register,
 431         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 432         prototypes.
 433         (sim_open): Convert old style prototype.  Change casts with
 434         sim_write to unsigned char *.
 435         (fetch_str): Change null to unsigned char, and change cast to
 436         unsigned char *.
 437         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 438         unsigned char *.
 439
 440 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 441
 442         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 443
 444 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 445
 446         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 447
 448 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 449
 450         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 451
 452 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 453
 454         * config.in, configure: Regenerate.
 455
 456 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 457
 458         * interp.c (sim_pc_get): New function.
 459
 460 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 461
 462         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 463         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 464
 465 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 466
 467         * configure: Regenerate.
 468
 469 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 470
 471         * configure: Regenerate.
 472
 473 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 474
 475         * configure: Regenerate.
 476         * configure.ac (mips_extra_objs): Delete.
 477         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 478         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 479
 480 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 481
 482         * configure: Regenerate.
 483         * configure.ac: Delete sim_hw checks for dv-sockser.
 484
 485 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 486
 487         * config.in, configure: Regenerate.
 488         * tconfig.in: Rename file ...
 489         * tconfig.h: ... here.
 490
 491 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 492
 493         * tconfig.in: Delete includes.
 494         [HAVE_DV_SOCKSER]: Delete.
 495
 496 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 497
 498         * Makefile.in (SIM_RUN_OBJS): Delete.
 499
 500 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 501
 502         * configure.ac (AC_CHECK_HEADERS): Delete.
 503         * aclocal.m4, configure: Regenerate.
 504
 505 2014-08-19  Alan Modra  <amodra@gmail.com>
 506
 507         * configure: Regenerate.
 508
 509 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 510
 511         * configure: Regenerate.
 512         * config.in: Regenerate.
 513
 514 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 515
 516         * configure: Regenerate.
 517
 518 2013-09-23  Alan Modra  <amodra@gmail.com>
 519
 520         * configure: Regenerate.
 521
 522 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 523
 524         * aclocal.m4, configure: Regenerate.
 525
 526 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 527
 528         * configure: Rebuild.
 529
 530 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 531
 532         * configure: Regenerate.
 533
 534 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 535
 536         * configure.ac: Address use of dv-sockser.o.
 537         * tconfig.in: Conditionalize use of dv_sockser_install.
 538         * configure: Regenerated.
 539         * config.in: Regenerated.
 540
 541 2012-10-04  Chao-ying Fu  <fu@mips.com>
 542             Steve Ellcey  <sellcey@mips.com>
 543
 544         * mips/mips3264r2.igen (rdhwr): New.
 545
 546 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 547
 548         * configure.ac: Always link against dv-sockser.o.
 549         * configure: Regenerate.
 550
 551 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 552
 553         * config.in, configure: Regenerate.
 554
 555 2012-05-18  Nick Clifton  <nickc@redhat.com>
 556
 557         PR 14072
 558         * interp.c: Include config.h before system header files.
 559
 560 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 561
 562         * aclocal.m4, config.in, configure: Regenerate.
 563
 564 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 565
 566         * aclocal.m4: New file.
 567         * configure: Regenerate.
 568
 569 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 570
 571         * configure: Regenerate after common/acinclude.m4 update.
 572
 573 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 574
 575         * configure.ac: Change include to common/acinclude.m4.
 576
 577 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 578
 579         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 580         call.  Replace common.m4 include with SIM_AC_COMMON.
 581         * configure: Regenerate.
 582
 583 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 584
 585         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 586         $(SIM_EXTRA_DEPS).
 587         (tmp-mach-multi): Exit early when igen fails.
 588
 589 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 590
 591         * interp.c (sim_do_command): Delete.
 592
 593 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 594
 595         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 596         (tx3904sio_fifo_reset): Likewise.
 597         * interp.c (sim_monitor): Likewise.
 598
 599 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 600
 601         * interp.c (sim_write): Add const to buffer arg.
 602
 603 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 604
 605         * interp.c: Don't include sysdep.h
 606
 607 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 608
 609         * configure: Regenerate.
 610
 611 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 612
 613         * config.in: Regenerate.
 614         * configure: Likewise.
 615
 616         * configure: Regenerate.
 617
 618 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 619
 620         * configure: Regenerate to track ../common/common.m4 changes.
 621         * config.in: Ditto.
 622
 623 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 624             Daniel Jacobowitz  <dan@codesourcery.com>
 625             Joseph Myers  <joseph@codesourcery.com>
 626
 627         * configure: Regenerate.
 628
 629 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 630
 631         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 632         that unconditionally allows fmt_ps.
 633         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 634         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 635         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 636         filter from 64,f to 32,f.
 637         (PREFX): Change filter from 64 to 32.
 638         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 639         that use do_load_double instead of do_load.  Make both LUXC1
 640         versions unpredictable if SizeFGR () != 64.
 641         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 642         instead of do_store.  Remove unused variable.  Make both SUXC1
 643         versions unpredictable if SizeFGR () != 64.
 644
 645 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 646
 647         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 648         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 649         shifts for that case.
 650
 651 2007-09-04  Nick Clifton  <nickc@redhat.com>
 652
 653         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 654         (display_mem_info): New static variable.
 655         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 656         (mips_options): Add info-memory and memory-info.
 657         (sim_open): After processing the command line and board
 658         specification, check display_mem_info.  If it is set then
 659         call the real handler for the --memory-info command line
 660         switch.
 661
 662 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 663
 664         * configure.ac: Change license of multi-run.c to GPL version 3.
 665         * configure: Regenerate.
 666
 667 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 668
 669         * configure.ac, configure: Revert last patch.
 670
 671 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 672
 673         * configure.ac (sim_mipsisa3264_configs): New variable.
 674         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 675         every configuration support all four targets, using the triplet to
 676         determine the default.
 677         * configure: Regenerate.
 678
 679 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 680
 681         * Makefile.in (m16run.o): New rule.
 682
 683 2007-05-15  Thiemo Seufer  <ths@mips.com>
 684
 685         * mips3264r2.igen (DSHD): Fix compile warning.
 686
 687 2007-05-14  Thiemo Seufer  <ths@mips.com>
 688
 689         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 690         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 691         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 692         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 693         for mips32r2.
 694
 695 2007-03-01  Thiemo Seufer  <ths@mips.com>
 696
 697         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 698         and mips64.
 699
 700 2007-02-20  Thiemo Seufer  <ths@mips.com>
 701
 702         * dsp.igen: Update copyright notice.
 703         * dsp2.igen: Fix copyright notice.
 704
 705 2007-02-20  Thiemo Seufer  <ths@mips.com>
 706             Chao-Ying Fu  <fu@mips.com>
 707
 708         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 709         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 710         Add dsp2 to sim_igen_machine.
 711         * configure: Regenerate.
 712         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 713         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 714         (mulq_rs.ph): Use do_ph_mulq.
 715         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 716         * mips.igen: Add dsp2 model and include dsp2.igen.
 717         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 718         for *mips32r2, *mips64r2, *dsp.
 719         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 720         for *mips32r2, *mips64r2, *dsp2.
 721         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 722
 723 2007-02-19  Thiemo Seufer  <ths@mips.com>
 724             Nigel Stephens  <nigel@mips.com>
 725
 726         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 727         jumps with hazard barrier.
 728
 729 2007-02-19  Thiemo Seufer  <ths@mips.com>
 730             Nigel Stephens  <nigel@mips.com>
 731
 732         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 733         after each call to sim_io_write.
 734
 735 2007-02-19  Thiemo Seufer  <ths@mips.com>
 736             Nigel Stephens  <nigel@mips.com>
 737
 738         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 739         supported by this simulator.
 740         (decode_coproc): Recognise additional CP0 Config registers
 741         correctly.
 742
 743 2007-02-19  Thiemo Seufer  <ths@mips.com>
 744             Nigel Stephens  <nigel@mips.com>
 745             David Ung  <davidu@mips.com>
 746
 747         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 748         uninterpreted formats. If fmt is one of the uninterpreted types
 749         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 750         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 751         (store_fpr): When writing an invalid odd register, set the
 752         matching even register to fmt_unknown, not the following register.
 753         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 754         the the memory window at offset 0 set by --memory-size command
 755         line option.
 756         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 757         point register.
 758         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 759         register.
 760         (sim_monitor): When returning the memory size to the MIPS
 761         application, use the value in STATE_MEM_SIZE, not an arbitrary
 762         hardcoded value.
 763         (cop_lw): Don' mess around with FPR_STATE, just pass
 764         fmt_uninterpreted_32 to StoreFPR.
 765         (cop_sw): Similarly.
 766         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 767         (cop_sd): Similarly.
 768         * mips.igen (not_word_value): Single version for mips32, mips64
 769         and mips16.
 770
 771 2007-02-19  Thiemo Seufer <ths@mips.com>
 772             Nigel Stephens  <nigel@mips.com>
 773
 774         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 775         MBytes.
 776
 777 2007-02-17  Thiemo Seufer  <ths@mips.com>
 778
 779         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 780         configuration.
 781         * configure: Regenerate.
 782
 783 2007-02-17  Thiemo Seufer  <ths@mips.com>
 784
 785         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 786         Add mdmx to sim_igen_machine.
 787         (mipsisa64*-*-*): Likewise. Remove dsp.
 788         (mipsisa32*-*-*): Remove dsp.
 789         * configure: Regenerate.
 790
 791 2007-02-13  Thiemo Seufer  <ths@mips.com>
 792
 793         * configure.ac: Add mips*-sde-elf* target.
 794         * configure: Regenerate.
 795
 796 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 797
 798         * acconfig.h: Remove.
 799         * config.in, configure: Regenerate.
 800
 801 2006-11-07  Thiemo Seufer  <ths@mips.com>
 802
 803         * dsp.igen (do_w_op): Fix compiler warning.
 804
 805 2006-08-29  Thiemo Seufer  <ths@mips.com>
 806             David Ung  <davidu@mips.com>
 807
 808         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 809         sim_igen_machine.
 810         * configure: Regenerate.
 811         * mips.igen (model): Add smartmips.
 812         (MADDU): Increment ACX if carry.
 813         (do_mult): Clear ACX.
 814         (ROR,RORV): Add smartmips.
 815         (include): Include smartmips.igen.
 816         * sim-main.h (ACX): Set to REGISTERS[89].
 817         * smartmips.igen: New file.
 818
 819 2006-08-29  Thiemo Seufer  <ths@mips.com>
 820             David Ung  <davidu@mips.com>
 821
 822         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 823         mips3264r2.igen. Add missing dependency rules.
 824         * m16e.igen: Support for mips16e save/restore instructions.
 825
 826 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 827
 828         * configure: Regenerated.
 829
 830 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 831
 832         * configure: Regenerated.
 833
 834 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 835
 836         * configure: Regenerated.
 837
 838 2006-05-15 Chao-ying Fu  <fu@mips.com>
 839
 840         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 841
 842 2006-04-18  Nick Clifton  <nickc@redhat.com>
 843
 844         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 845         statement.
 846
 847 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 848
 849         * configure: Regenerate.
 850
 851 2005-12-14  Chao-ying Fu  <fu@mips.com>
 852
 853         * Makefile.in (SIM_OBJS): Add dsp.o.
 854         (dsp.o): New dependency.
 855         (IGEN_INCLUDE): Add dsp.igen.
 856         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 857         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 858         * configure: Regenerate.
 859         * mips.igen: Add dsp model and include dsp.igen.
 860         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 861         because these instructions are extended in DSP ASE.
 862         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 863         adding 6 DSP accumulator registers and 1 DSP control register.
 864         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 865         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 866         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 867         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 868         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 869         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 870         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 871         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 872         DSPCR_CCOND_SMASK): New define.
 873         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 874         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 875
 876 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 877
 878         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 879
 880 2005-06-16  David Ung  <davidu@mips.com>
 881             Nigel Stephens  <nigel@mips.com>
 882
 883         * mips.igen: New mips16e model and include m16e.igen.
 884         (check_u64): Add mips16e tag.
 885         * m16e.igen: New file for MIPS16e instructions.
 886         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 887         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 888         models.
 889         * configure: Regenerate.
 890
 891 2005-05-26  David Ung  <davidu@mips.com>
 892
 893         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 894         tags to all instructions which are applicable to the new ISAs.
 895         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 896         vr.igen.
 897         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 898         instructions.
 899         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 900         to mips.igen.
 901         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 902         * configure: Regenerate.
 903
 904 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 905
 906         * configure: Regenerate.
 907
 908 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 909
 910         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 911         explicit call to AC_CONFIG_HEADER.
 912         * configure: Regenerate.
 913
 914 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 915
 916         * configure.ac: Update to use ../common/common.m4.
 917         * configure: Re-generate.
 918
 919 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 920
 921         * configure: Regenerated to track ../common/aclocal.m4 changes.
 922
 923 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 924
 925         * configure.ac: Rename configure.in, require autoconf 2.59.
 926         * configure: Re-generate.
 927
 928 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 929
 930         * configure: Regenerate for ../common/aclocal.m4 update.
 931
 932 2004-09-24  Monika Chaddha  <monika@acmet.com>
 933
 934         Committed by Andrew Cagney.
 935         * m16.igen (CMP, CMPI): Fix assembler.
 936
 937 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 938
 939         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 940         * configure: Regenerate.
 941
 942 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 943
 944         * configure.in (sim_m16_machine): Include mipsIII.
 945         * configure: Regenerate.
 946
 947 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 948
 949         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 950         from COP0_BADVADDR.
 951         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 952
 953 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 954
 955         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 956
 957 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 958
 959         * mips.igen (check_fmt): Remove.
 960         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 961         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 962         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 963         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 964         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 965         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 966         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 967         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 968         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 969         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 970
 971 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 972
 973         * sb1.igen (check_sbx): New function.
 974         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 975
 976 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 977             Richard Sandiford  <rsandifo@redhat.com>
 978
 979         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 980         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 981         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 982         separate implementations for mipsIV and mipsV.  Use new macros to
 983         determine whether the restrictions apply.
 984
 985 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 986
 987         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 988         (check_mult_hilo): Improve comments.
 989         (check_div_hilo): Likewise.  Also, fork off a new version
 990         to handle mips32/mips64 (since there are no hazards to check
 991         in MIPS32/MIPS64).
 992
 993 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 994
 995         * mips.igen (do_dmultx): Fix check for negative operands.
 996
 997 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 998
 999         * Makefile.in (SHELL): Make sure this is defined.
1000         (various): Use $(SHELL) whenever we invoke move-if-change.
1001
1002 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
1003
1004         * cp1.c: Tweak attribution slightly.
1005         * cp1.h: Likewise.
1006         * mdmx.c: Likewise.
1007         * mdmx.igen: Likewise.
1008         * mips3d.igen: Likewise.
1009         * sb1.igen: Likewise.
1010
1011 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1012
1013         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1014         unsigned operands.
1015
1016 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1017
1018         * interp.c (sim_open): Rename _bfd to bfd.
1019         (sim_create_inferior): Ditto.
1020
1021 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1022
1023         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1024
1025 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1026
1027         * mips.igen (EI, DI): Remove.
1028
1029 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1030
1031         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1032
1033 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1034             Andrew Cagney  <ac131313@redhat.com>
1035             Gavin Romig-Koch  <gavin@redhat.com>
1036             Graydon Hoare  <graydon@redhat.com>
1037             Aldy Hernandez  <aldyh@redhat.com>
1038             Dave Brolley  <brolley@redhat.com>
1039             Chris Demetriou  <cgd@broadcom.com>
1040
1041         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1042         (sim_mach_default): New variable.
1043         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1044         Add a new simulator generator, MULTI.
1045         * configure: Regenerate.
1046         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1047         (multi-run.o): New dependency.
1048         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1049         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1050         (tmp-multi): Combine them.
1051         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1052         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1053         (distclean-extra): New rule.
1054         * sim-main.h: Include bfd.h.
1055         (MIPS_MACH): New macro.
1056         * mips.igen (vr4120, vr5400, vr5500): New models.
1057         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1058         * vr.igen: Replace with new version.
1059
1060 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1061
1062         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1063         * configure: Regenerate.
1064
1065 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1066
1067         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1068         * mips.igen: Remove all invocations of check_branch_bug and
1069         mark_branch_bug.
1070
1071 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1072
1073         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1074
1075 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1076
1077         * mips.igen (do_load_double, do_store_double): New functions.
1078         (LDC1, SDC1): Rename to...
1079         (LDC1b, SDC1b): respectively.
1080         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1081
1082 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1083
1084         * cp1.c (fp_recip2): Modify initialization expression so that
1085         GCC will recognize it as constant.
1086
1087 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1088
1089         * mdmx.c (SD_): Delete.
1090         (Unpredictable): Re-define, for now, to directly invoke
1091         unpredictable_action().
1092         (mdmx_acc_op): Fix error in .ob immediate handling.
1093
1094 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1095
1096         * interp.c (sim_firmware_command): Initialize `address'.
1097
1098 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1099
1100         * configure: Regenerated to track ../common/aclocal.m4 changes.
1101
1102 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1103             Ed Satterthwaite  <ehs@broadcom.com>
1104
1105         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1106         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1107         * mips.igen: Include mips3d.igen.
1108         (mips3d): New model name for MIPS-3D ASE instructions.
1109         (CVT.W.fmt): Don't use this instruction for word (source) format
1110         instructions.
1111         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1112         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1113         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1114         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1115         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1116         (RSquareRoot1, RSquareRoot2): New macros.
1117         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1118         (fp_rsqrt2): New functions.
1119         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1120         * configure: Regenerate.
1121
1122 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1123             Ed Satterthwaite  <ehs@broadcom.com>
1124
1125         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1126         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1127         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1128         (convert): Note that this function is not used for paired-single
1129         format conversions.
1130         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1131         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1132         (check_fmt_p): Enable paired-single support.
1133         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1134         (PUU.PS): New instructions.
1135         (CVT.S.fmt): Don't use this instruction for paired-single format
1136         destinations.
1137         * sim-main.h (FP_formats): New value 'fmt_ps.'
1138         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1139         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1140
1141 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1142
1143         * mips.igen: Fix formatting of function calls in
1144         many FP operations.
1145
1146 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1147
1148         * mips.igen (MOVN, MOVZ): Trace result.
1149         (TNEI): Print "tnei" as the opcode name in traces.
1150         (CEIL.W): Add disassembly string for traces.
1151         (RSQRT.fmt): Make location of disassembly string consistent
1152         with other instructions.
1153
1154 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1155
1156         * mips.igen (X): Delete unused function.
1157
1158 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1159
1160         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1161
1162 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1163             Ed Satterthwaite  <ehs@broadcom.com>
1164
1165         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1166         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1167         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1168         (fp_nmsub): New prototypes.
1169         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1170         (NegMultiplySub): New defines.
1171         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1172         (MADD.D, MADD.S): Replace with...
1173         (MADD.fmt): New instruction.
1174         (MSUB.D, MSUB.S): Replace with...
1175         (MSUB.fmt): New instruction.
1176         (NMADD.D, NMADD.S): Replace with...
1177         (NMADD.fmt): New instruction.
1178         (NMSUB.D, MSUB.S): Replace with...
1179         (NMSUB.fmt): New instruction.
1180
1181 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1182             Ed Satterthwaite  <ehs@broadcom.com>
1183
1184         * cp1.c: Fix more comment spelling and formatting.
1185         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1186         (denorm_mode): New function.
1187         (fpu_unary, fpu_binary): Round results after operation, collect
1188         status from rounding operations, and update the FCSR.
1189         (convert): Collect status from integer conversions and rounding
1190         operations, and update the FCSR.  Adjust NaN values that result
1191         from conversions.  Convert to use sim_io_eprintf rather than
1192         fprintf, and remove some debugging code.
1193         * cp1.h (fenr_FS): New define.
1194
1195 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1196
1197         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1198         rounding mode to sim FP rounding mode flag conversion code into...
1199         (rounding_mode): New function.
1200
1201 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1202
1203         * cp1.c: Clean up formatting of a few comments.
1204         (value_fpr): Reformat switch statement.
1205
1206 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1207             Ed Satterthwaite  <ehs@broadcom.com>
1208
1209         * cp1.h: New file.
1210         * sim-main.h: Include cp1.h.
1211         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1212         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1213         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1214         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1215         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1216         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1217         * cp1.c: Don't include sim-fpu.h; already included by
1218         sim-main.h.  Clean up formatting of some comments.
1219         (NaN, Equal, Less): Remove.
1220         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1221         (fp_cmp): New functions.
1222         * mips.igen (do_c_cond_fmt): Remove.
1223         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1224         Compare.  Add result tracing.
1225         (CxC1): Remove, replace with...
1226         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1227         (DMxC1): Remove, replace with...
1228         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1229         (MxC1): Remove, replace with...
1230         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1231
1232 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1233
1234         * sim-main.h (FGRIDX): Remove, replace all uses with...
1235         (FGR_BASE): New macro.
1236         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1237         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1238         (NR_FGR, FGR): Likewise.
1239         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1240         * mips.igen: Likewise.
1241
1242 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1243
1244         * cp1.c: Add an FSF Copyright notice to this file.
1245
1246 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1247             Ed Satterthwaite  <ehs@broadcom.com>
1248
1249         * cp1.c (Infinity): Remove.
1250         * sim-main.h (Infinity): Likewise.
1251
1252         * cp1.c (fp_unary, fp_binary): New functions.
1253         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1254         (fp_sqrt): New functions, implemented in terms of the above.
1255         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1256         (Recip, SquareRoot): Remove (replaced by functions above).
1257         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1258         (fp_recip, fp_sqrt): New prototypes.
1259         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1260         (Recip, SquareRoot): Replace prototypes with #defines which
1261         invoke the functions above.
1262
1263 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1264
1265         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1266         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1267         file, remove PARAMS from prototypes.
1268         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1269         simulator state arguments.
1270         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1271         pass simulator state arguments.
1272         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1273         (store_fpr, convert): Remove 'sd' argument.
1274         (value_fpr): Likewise.  Convert to use 'SD' instead.
1275
1276 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1277
1278         * cp1.c (Min, Max): Remove #if 0'd functions.
1279         * sim-main.h (Min, Max): Remove.
1280
1281 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1282
1283         * cp1.c: fix formatting of switch case and default labels.
1284         * interp.c: Likewise.
1285         * sim-main.c: Likewise.
1286
1287 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1288
1289         * cp1.c: Clean up comments which describe FP formats.
1290          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1291
1292 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1293             Ed Satterthwaite  <ehs@broadcom.com>
1294
1295         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1296         Broadcom SiByte SB-1 processor configurations.
1297         * configure: Regenerate.
1298         * sb1.igen: New file.
1299         * mips.igen: Include sb1.igen.
1300         (sb1): New model.
1301         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1302         * mdmx.igen: Add "sb1" model to all appropriate functions and
1303         instructions.
1304         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1305         (ob_func, ob_acc): Reference the above.
1306         (qh_acc): Adjust to keep the same size as ob_acc.
1307         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1308         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1309
1310 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1311
1312         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1313
1314 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1315             Ed Satterthwaite  <ehs@broadcom.com>
1316
1317         * mips.igen (mdmx): New (pseudo-)model.
1318         * mdmx.c, mdmx.igen: New files.
1319         * Makefile.in (SIM_OBJS): Add mdmx.o.
1320         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1321         New typedefs.
1322         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1323         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1324         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1325         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1326         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1327         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1328         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1329         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1330         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1331         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1332         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1333         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1334         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1335         (qh_fmtsel): New macros.
1336         (_sim_cpu): New member "acc".
1337         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1338         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1339
1340 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1341
1342         * interp.c: Use 'deprecated' rather than 'depreciated.'
1343         * sim-main.h: Likewise.
1344
1345 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1346
1347         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1348         which wouldn't compile anyway.
1349         * sim-main.h (unpredictable_action): New function prototype.
1350         (Unpredictable): Define to call igen function unpredictable().
1351         (NotWordValue): New macro to call igen function not_word_value().
1352         (UndefinedResult): Remove.
1353         * interp.c (undefined_result): Remove.
1354         (unpredictable_action): New function.
1355         * mips.igen (not_word_value, unpredictable): New functions.
1356         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1357         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1358         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1359         NotWordValue() to check for unpredictable inputs, then
1360         Unpredictable() to handle them.
1361
1362 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1363
1364         * mips.igen: Fix formatting of calls to Unpredictable().
1365
1366 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1367
1368         * interp.c (sim_open): Revert previous change.
1369
1370 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1371
1372         * interp.c (sim_open): Disable chunk of code that wrote code in
1373         vector table entries.
1374
1375 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1376
1377         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1378         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1379         unused definitions.
1380
1381 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1382
1383         * cp1.c: Fix many formatting issues.
1384
1385 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1386
1387         * cp1.c (fpu_format_name): New function to replace...
1388         (DOFMT): This.  Delete, and update all callers.
1389         (fpu_rounding_mode_name): New function to replace...
1390         (RMMODE): This.  Delete, and update all callers.
1391
1392 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1393
1394         * interp.c: Move FPU support routines from here to...
1395         * cp1.c: Here.  New file.
1396         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1397         (cp1.o): New target.
1398
1399 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1400
1401         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1402         * mips.igen (mips32, mips64): New models, add to all instructions
1403         and functions as appropriate.
1404         (loadstore_ea, check_u64): New variant for model mips64.
1405         (check_fmt_p): New variant for models mipsV and mips64, remove
1406         mipsV model marking fro other variant.
1407         (SLL) Rename to...
1408         (SLLa) this.
1409         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1410         for mips32 and mips64.
1411         (DCLO, DCLZ): New instructions for mips64.
1412
1413 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1414
1415         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1416         immediate or code as a hex value with the "%#lx" format.
1417         (ANDI): Likewise, and fix printed instruction name.
1418
1419 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1420
1421         * sim-main.h (UndefinedResult, Unpredictable): New macros
1422         which currently do nothing.
1423
1424 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1425
1426         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1427         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1428         (status_CU3): New definitions.
1429
1430         * sim-main.h (ExceptionCause): Add new values for MIPS32
1431         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1432         for DebugBreakPoint and NMIReset to note their status in
1433         MIPS32 and MIPS64.
1434         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1435         (SignalExceptionCacheErr): New exception macros.
1436
1437 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1438
1439         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1440         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1441         is always enabled.
1442         (SignalExceptionCoProcessorUnusable): Take as argument the
1443         unusable coprocessor number.
1444
1445 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1446
1447         * mips.igen: Fix formatting of all SignalException calls.
1448
1449 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1450
1451         * sim-main.h (SIGNEXTEND): Remove.
1452
1453 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1454
1455         * mips.igen: Remove gencode comment from top of file, fix
1456         spelling in another comment.
1457
1458 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1459
1460         * mips.igen (check_fmt, check_fmt_p): New functions to check
1461         whether specific floating point formats are usable.
1462         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1463         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1464         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1465         Use the new functions.
1466         (do_c_cond_fmt): Remove format checks...
1467         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1468
1469 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1470
1471         * mips.igen: Fix formatting of check_fpu calls.
1472
1473 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1474
1475         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1476
1477 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1478
1479         * mips.igen: Remove whitespace at end of lines.
1480
1481 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1482
1483         * mips.igen (loadstore_ea): New function to do effective
1484         address calculations.
1485         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1486         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1487         CACHE): Use loadstore_ea to do effective address computations.
1488
1489 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1490
1491         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1492         * mips.igen (LL, CxC1, MxC1): Likewise.
1493
1494 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1495
1496         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1497         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1498         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1499         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1500         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1501         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1502         Don't split opcode fields by hand, use the opcode field values
1503         provided by igen.
1504
1505 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1506
1507         * mips.igen (do_divu): Fix spacing.
1508
1509         * mips.igen (do_dsllv): Move to be right before DSLLV,
1510         to match the rest of the do_<shift> functions.
1511
1512 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1513
1514         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1515         DSRL32, do_dsrlv): Trace inputs and results.
1516
1517 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1518
1519         * mips.igen (CACHE): Provide instruction-printing string.
1520
1521         * interp.c (signal_exception): Comment tokens after #endif.
1522
1523 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1524
1525         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1526         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1527         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1528         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1529         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1530         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1531         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1532         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1533
1534 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1535
1536         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1537         instruction-printing string.
1538         (LWU): Use '64' as the filter flag.
1539
1540 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1541
1542         * mips.igen (SDXC1): Fix instruction-printing string.
1543
1544 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1545
1546         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1547         filter flags "32,f".
1548
1549 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1550
1551         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1552         as the filter flag.
1553
1554 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1555
1556         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1557         add a comma) so that it more closely match the MIPS ISA
1558         documentation opcode partitioning.
1559         (PREF): Put useful names on opcode fields, and include
1560         instruction-printing string.
1561
1562 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1563
1564         * mips.igen (check_u64): New function which in the future will
1565         check whether 64-bit instructions are usable and signal an
1566         exception if not.  Currently a no-op.
1567         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1568         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1569         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1570         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1571
1572         * mips.igen (check_fpu): New function which in the future will
1573         check whether FPU instructions are usable and signal an exception
1574         if not.  Currently a no-op.
1575         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1576         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1577         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1578         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1579         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1580         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1581         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1582         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1583
1584 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1585
1586         * mips.igen (do_load_left, do_load_right): Move to be immediately
1587         following do_load.
1588         (do_store_left, do_store_right): Move to be immediately following
1589         do_store.
1590
1591 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1592
1593         * mips.igen (mipsV): New model name.  Also, add it to
1594         all instructions and functions where it is appropriate.
1595
1596 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1597
1598         * mips.igen: For all functions and instructions, list model
1599         names that support that instruction one per line.
1600
1601 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1602
1603         * mips.igen: Add some additional comments about supported
1604         models, and about which instructions go where.
1605         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1606         order as is used in the rest of the file.
1607
1608 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1609
1610         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1611         indicating that ALU32_END or ALU64_END are there to check
1612         for overflow.
1613         (DADD): Likewise, but also remove previous comment about
1614         overflow checking.
1615
1616 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1617
1618         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1619         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1620         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1621         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1622         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1623         fields (i.e., add and move commas) so that they more closely
1624         match the MIPS ISA documentation opcode partitioning.
1625
1626 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1627
1628         * mips.igen (ADDI): Print immediate value.
1629         (BREAK): Print code.
1630         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1631         (SLL): Print "nop" specially, and don't run the code
1632         that does the shift for the "nop" case.
1633
1634 2001-11-17  Fred Fish  <fnf@redhat.com>
1635
1636         * sim-main.h (float_operation): Move enum declaration outside
1637         of _sim_cpu struct declaration.
1638
1639 2001-04-12  Jim Blandy  <jimb@redhat.com>
1640
1641         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1642         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1643         set of the FCSR.
1644         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1645         PENDING_FILL, and you can get the intended effect gracefully by
1646         calling PENDING_SCHED directly.
1647
1648 2001-02-23  Ben Elliston  <bje@redhat.com>
1649
1650         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1651         already defined elsewhere.
1652
1653 2001-02-19  Ben Elliston  <bje@redhat.com>
1654
1655         * sim-main.h (sim_monitor): Return an int.
1656         * interp.c (sim_monitor): Add return values.
1657         (signal_exception): Handle error conditions from sim_monitor.
1658
1659 2001-02-08  Ben Elliston  <bje@redhat.com>
1660
1661         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1662         (store_memory): Likewise, pass cia to sim_core_write*.
1663
1664 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1665
1666         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1667         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1668
1669 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1670
1671         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1672         * Makefile.in: Don't delete *.igen when cleaning directory.
1673
1674 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1675
1676         * m16.igen (break): Call SignalException not sim_engine_halt.
1677
1678 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1679
1680         From Jason Eckhardt:
1681         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1682
1683 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1684
1685         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1686
1687 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1688
1689         * mips.igen (do_dmultx): Fix typo.
1690
1691 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1692
1693         * configure: Regenerated to track ../common/aclocal.m4 changes.
1694
1695 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1696
1697         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1698
1699 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1700
1701         * sim-main.h (GPR_CLEAR): Define macro.
1702
1703 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1704
1705         * interp.c (decode_coproc): Output long using %lx and not %s.
1706
1707 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1708
1709         * interp.c (sim_open): Sort & extend dummy memory regions for
1710         --board=jmr3904 for eCos.
1711
1712 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1713
1714         * configure: Regenerated.
1715
1716 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1717
1718         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1719         calls, conditional on the simulator being in verbose mode.
1720
1721 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1722
1723         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1724         cache don't get ReservedInstruction traps.
1725
1726 1999-11-29  Mark Salter  <msalter@cygnus.com>
1727
1728         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1729         to clear status bits in sdisr register. This is how the hardware works.
1730
1731         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1732         being used by cygmon.
1733
1734 1999-11-11  Andrew Haley  <aph@cygnus.com>
1735
1736         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1737         instructions.
1738
1739 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1740
1741         * mips.igen (MULT): Correct previous mis-applied patch.
1742
1743 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1744
1745         * mips.igen (delayslot32): Handle sequence like
1746         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1747         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1748         (MULT): Actually pass the third register...
1749
1750 1999-09-03  Mark Salter  <msalter@cygnus.com>
1751
1752         * interp.c (sim_open): Added more memory aliases for additional
1753         hardware being touched by cygmon on jmr3904 board.
1754
1755 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1756
1757         * configure: Regenerated to track ../common/aclocal.m4 changes.
1758
1759 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1760
1761         * interp.c (sim_store_register): Handle case where client - GDB -
1762         specifies that a 4 byte register is 8 bytes in size.
1763         (sim_fetch_register): Ditto.
1764
1765 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1766
1767         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1768         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1769         (idt_monitor_base): Base address for IDT monitor traps.
1770         (pmon_monitor_base): Ditto for PMON.
1771         (lsipmon_monitor_base): Ditto for LSI PMON.
1772         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1773         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1774         (sim_firmware_command): New function.
1775         (mips_option_handler): Call it for OPTION_FIRMWARE.
1776         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1777         option was given, add no monitor by default.  Add BREAK hooks only if
1778         monitors are also there.
1779
1780 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1781
1782         * interp.c (sim_monitor): Flush output before reading input.
1783
1784 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1785
1786         * tconfig.in (SIM_HANDLES_LMA): Always define.
1787
1788 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1789
1790         From Mark Salter <msalter@cygnus.com>:
1791         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1792         (sim_open): Add setup for BSP board.
1793
1794 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1795
1796         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1797         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1798         them as unimplemented.
1799
1800 1999-05-08  Felix Lee  <flee@cygnus.com>
1801
1802         * configure: Regenerated to track ../common/aclocal.m4 changes.
1803
1804 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1805
1806         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1807
1808 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1809
1810         * configure.in: Any mips64vr5*-*-* target should have
1811         -DTARGET_ENABLE_FR=1.
1812         (default_endian): Any mips64vr*el-*-* target should default to
1813         LITTLE_ENDIAN.
1814         * configure: Re-generate.
1815
1816 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1817
1818         * mips.igen (ldl): Extend from _16_, not 32.
1819
1820 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1821
1822         * interp.c (sim_store_register): Force registers written to by GDB
1823         into an un-interpreted state.
1824
1825 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1826
1827         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1828         CPU, start periodic background I/O polls.
1829         (tx3904sio_poll): New function: periodic I/O poller.
1830
1831 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1832
1833         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1834
1835 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1836
1837         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1838         case statement.
1839
1840 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1841
1842         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1843         (load_word): Call SIM_CORE_SIGNAL hook on error.
1844         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1845         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1846         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1847         * sim-main.h (COP0_BADVADDR): Define.
1848         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1849         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1850         (_sim_cpu): Add exc_* fields to store register value snapshots.
1851         * mips.igen (*): Replace memory-related SignalException* calls
1852         with references to SIM_CORE_SIGNAL hook.
1853
1854         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1855         fix.
1856         * sim-main.c (*): Minor warning cleanups.
1857
1858 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1859
1860         * m16.igen (DADDIU5): Correct type-o.
1861
1862 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1863
1864         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1865         variables.
1866
1867 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1868
1869         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1870         to include path.
1871         (interp.o): Add dependency on itable.h
1872         (oengine.c, gencode): Delete remaining references.
1873         (BUILT_SRC_FROM_GEN): Clean up.
1874
1875 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1876
1877         * vr4run.c: New.
1878         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1879         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1880         tmp-run-hack) : New.
1881         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1882         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1883         Drop the "64" qualifier to get the HACK generator working.
1884         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1885         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1886         qualifier to get the hack generator working.
1887         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1888         (DSLL): Use do_dsll.
1889         (DSLLV): Use do_dsllv.
1890         (DSRA): Use do_dsra.
1891         (DSRL): Use do_dsrl.
1892         (DSRLV): Use do_dsrlv.
1893         (BC1): Move *vr4100 to get the HACK generator working.
1894         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1895         get the HACK generator working.
1896         (MACC) Rename to get the HACK generator working.
1897         (DMACC,MACCS,DMACCS): Add the 64.
1898
1899 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1900
1901         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1902         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1903
1904 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1905
1906     * mips/interp.c (DEBUG): Cleanups.
1907
1908 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1909
1910         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1911         (tx3904sio_tickle): fflush after a stdout character output.
1912
1913 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1914
1915         * interp.c (sim_close): Uninstall modules.
1916
1917 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1918
1919         * sim-main.h, interp.c (sim_monitor): Change to global
1920         function.
1921
1922 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1923
1924         * configure.in (vr4100): Only include vr4100 instructions in
1925         simulator.
1926         * configure: Re-generate.
1927         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1928
1929 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1930
1931         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1932         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1933         true alternative.
1934
1935         * configure.in (sim_default_gen, sim_use_gen): Replace with
1936         sim_gen.
1937         (--enable-sim-igen): Delete config option. Always using IGEN.
1938         * configure: Re-generate.
1939
1940         * Makefile.in (gencode): Kill, kill, kill.
1941         * gencode.c: Ditto.
1942
1943 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1944
1945         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1946         bit mips16 igen simulator.
1947         * configure: Re-generate.
1948
1949         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1950         as part of vr4100 ISA.
1951         * vr.igen: Mark all instructions as 64 bit only.
1952
1953 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1954
1955         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1956         Pacify GCC.
1957
1958 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1959
1960         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1961         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1962         * configure: Re-generate.
1963
1964         * m16.igen (BREAK): Define breakpoint instruction.
1965         (JALX32): Mark instruction as mips16 and not r3900.
1966         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1967
1968         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1969
1970 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1971
1972         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1973         insn as a debug breakpoint.
1974
1975         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1976         pending.slot_size.
1977         (PENDING_SCHED): Clean up trace statement.
1978         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1979         (PENDING_FILL): Delay write by only one cycle.
1980         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1981
1982         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1983         of pending writes.
1984         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1985         32 & 64.
1986         (pending_tick): Move incrementing of index to FOR statement.
1987         (pending_tick): Only update PENDING_OUT after a write has occured.
1988
1989         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1990         build simulator.
1991         * configure: Re-generate.
1992
1993         * interp.c (sim_engine_run OLD): Delete explicit call to
1994         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1995
1996 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1997
1998         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1999         interrupt level number to match changed SignalExceptionInterrupt
2000         macro.
2001
2002 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
2003
2004         * interp.c: #include "itable.h" if WITH_IGEN.
2005         (get_insn_name): New function.
2006         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2007         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2008
2009 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2010
2011         * configure: Rebuilt to inhale new common/aclocal.m4.
2012
2013 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2014
2015         * dv-tx3904sio.c: Include sim-assert.h.
2016
2017 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2018
2019         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2020         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2021         Reorganize target-specific sim-hardware checks.
2022         * configure: rebuilt.
2023         * interp.c (sim_open): For tx39 target boards, set
2024         OPERATING_ENVIRONMENT, add tx3904sio devices.
2025         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2026         ROM executables.  Install dv-sockser into sim-modules list.
2027
2028         * dv-tx3904irc.c: Compiler warning clean-up.
2029         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2030         frequent hw-trace messages.
2031
2032 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2033
2034         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2035
2036 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2037
2038         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2039
2040         * vr.igen: New file.
2041         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2042         * mips.igen: Define vr4100 model. Include vr.igen.
2043 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2044
2045         * mips.igen (check_mf_hilo): Correct check.
2046
2047 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2048
2049         * sim-main.h (interrupt_event): Add prototype.
2050
2051         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2052         register_ptr, register_value.
2053         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2054
2055         * sim-main.h (tracefh): Make extern.
2056
2057 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2058
2059         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2060         Reduce unnecessarily high timer event frequency.
2061         * dv-tx3904cpu.c: Ditto for interrupt event.
2062
2063 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2064
2065         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2066         to allay warnings.
2067         (interrupt_event): Made non-static.
2068
2069         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2070         interchange of configuration values for external vs. internal
2071         clock dividers.
2072
2073 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2074
2075         * mips.igen (BREAK): Moved code to here for
2076         simulator-reserved break instructions.
2077         * gencode.c (build_instruction): Ditto.
2078         * interp.c (signal_exception): Code moved from here.  Non-
2079         reserved instructions now use exception vector, rather
2080         than halting sim.
2081         * sim-main.h: Moved magic constants to here.
2082
2083 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2084
2085         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2086         register upon non-zero interrupt event level, clear upon zero
2087         event value.
2088         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2089         by passing zero event value.
2090         (*_io_{read,write}_buffer): Endianness fixes.
2091         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2092         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2093
2094         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2095         serial I/O and timer module at base address 0xFFFF0000.
2096
2097 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2098
2099         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2100         and BigEndianCPU.
2101
2102 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2103
2104         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2105         parts.
2106         * configure: Update.
2107
2108 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2109
2110         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2111         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2112         * configure.in: Include tx3904tmr in hw_device list.
2113         * configure: Rebuilt.
2114         * interp.c (sim_open): Instantiate three timer instances.
2115         Fix address typo of tx3904irc instance.
2116
2117 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2118
2119         * interp.c (signal_exception): SystemCall exception now uses
2120         the exception vector.
2121
2122 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2123
2124         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2125         to allay warnings.
2126
2127 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2128
2129         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2130
2131 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2132
2133         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2134
2135         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2136         sim-main.h. Declare a struct hw_descriptor instead of struct
2137         hw_device_descriptor.
2138
2139 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2140
2141         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2142         right bits and then re-align left hand bytes to correct byte
2143         lanes.  Fix incorrect computation in do_store_left when loading
2144         bytes from second word.
2145
2146 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2147
2148         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2149         * interp.c (sim_open): Only create a device tree when HW is
2150         enabled.
2151
2152         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2153         * interp.c (signal_exception): Ditto.
2154
2155 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2156
2157         * gencode.c: Mark BEGEZALL as LIKELY.
2158
2159 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2160
2161         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2162         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2163
2164 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2165
2166         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2167         modules.  Recognize TX39 target with "mips*tx39" pattern.
2168         * configure: Rebuilt.
2169         * sim-main.h (*): Added many macros defining bits in
2170         TX39 control registers.
2171         (SignalInterrupt): Send actual PC instead of NULL.
2172         (SignalNMIReset): New exception type.
2173         * interp.c (board): New variable for future use to identify
2174         a particular board being simulated.
2175         (mips_option_handler,mips_options): Added "--board" option.
2176         (interrupt_event): Send actual PC.
2177         (sim_open): Make memory layout conditional on board setting.
2178         (signal_exception): Initial implementation of hardware interrupt
2179         handling.  Accept another break instruction variant for simulator
2180         exit.
2181         (decode_coproc): Implement RFE instruction for TX39.
2182         (mips.igen): Decode RFE instruction as such.
2183         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2184         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2185         bbegin to implement memory map.
2186         * dv-tx3904cpu.c: New file.
2187         * dv-tx3904irc.c: New file.
2188
2189 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2190
2191         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2192
2193 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2194
2195         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2196         with calls to check_div_hilo.
2197
2198 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2199
2200         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2201         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2202         Add special r3900 version of do_mult_hilo.
2203         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2204         with calls to check_mult_hilo.
2205         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2206         with calls to check_div_hilo.
2207
2208 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2209
2210         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2211         Document a replacement.
2212
2213 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2214
2215         * interp.c (sim_monitor): Make mon_printf work.
2216
2217 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2218
2219         * sim-main.h (INSN_NAME): New arg `cpu'.
2220
2221 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2222
2223         * configure: Regenerated to track ../common/aclocal.m4 changes.
2224
2225 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2226
2227         * configure: Regenerated to track ../common/aclocal.m4 changes.
2228         * config.in: Ditto.
2229
2230 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2231
2232         * acconfig.h: New file.
2233         * configure.in: Reverted change of Apr 24; use sinclude again.
2234
2235 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2236
2237         * configure: Regenerated to track ../common/aclocal.m4 changes.
2238         * config.in: Ditto.
2239
2240 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2241
2242         * configure.in: Don't call sinclude.
2243
2244 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2245
2246         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2247
2248 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2249
2250         * mips.igen (ERET): Implement.
2251
2252         * interp.c (decode_coproc): Return sign-extended EPC.
2253
2254         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2255
2256         * interp.c (signal_exception): Do not ignore Trap.
2257         (signal_exception): On TRAP, restart at exception address.
2258         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2259         (signal_exception): Update.
2260         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2261         so that TRAP instructions are caught.
2262
2263 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2264
2265         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2266         contains HI/LO access history.
2267         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2268         (HIACCESS, LOACCESS): Delete, replace with
2269         (HIHISTORY, LOHISTORY): New macros.
2270         (CHECKHILO): Delete all, moved to mips.igen
2271
2272         * gencode.c (build_instruction): Do not generate checks for
2273         correct HI/LO register usage.
2274
2275         * interp.c (old_engine_run): Delete checks for correct HI/LO
2276         register usage.
2277
2278         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2279         check_mf_cycles): New functions.
2280         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2281         do_divu, domultx, do_mult, do_multu): Use.
2282
2283         * tx.igen ("madd", "maddu"): Use.
2284
2285 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2286
2287         * mips.igen (DSRAV): Use function do_dsrav.
2288         (SRAV): Use new function do_srav.
2289
2290         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2291         (B): Sign extend 11 bit immediate.
2292         (EXT-B*): Shift 16 bit immediate left by 1.
2293         (ADDIU*): Don't sign extend immediate value.
2294
2295 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2296
2297         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2298
2299         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2300         functions.
2301
2302         * mips.igen (delayslot32, nullify_next_insn): New functions.
2303         (m16.igen): Always include.
2304         (do_*): Add more tracing.
2305
2306         * m16.igen (delayslot16): Add NIA argument, could be called by a
2307         32 bit MIPS16 instruction.
2308
2309         * interp.c (ifetch16): Move function from here.
2310         * sim-main.c (ifetch16): To here.
2311
2312         * sim-main.c (ifetch16, ifetch32): Update to match current
2313         implementations of LH, LW.
2314         (signal_exception): Don't print out incorrect hex value of illegal
2315         instruction.
2316
2317 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2318
2319         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2320         instruction.
2321
2322         * m16.igen: Implement MIPS16 instructions.
2323
2324         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2325         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2326         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2327         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2328         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2329         bodies of corresponding code from 32 bit insn to these.  Also used
2330         by MIPS16 versions of functions.
2331
2332         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2333         (IMEM16): Drop NR argument from macro.
2334
2335 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2336
2337         * Makefile.in (SIM_OBJS): Add sim-main.o.
2338
2339         * sim-main.h (address_translation, load_memory, store_memory,
2340         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2341         as INLINE_SIM_MAIN.
2342         (pr_addr, pr_uword64): Declare.
2343         (sim-main.c): Include when H_REVEALS_MODULE_P.
2344
2345         * interp.c (address_translation, load_memory, store_memory,
2346         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2347         from here.
2348         * sim-main.c: To here. Fix compilation problems.
2349
2350         * configure.in: Enable inlining.
2351         * configure: Re-config.
2352
2353 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2354
2355         * configure: Regenerated to track ../common/aclocal.m4 changes.
2356
2357 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2358
2359         * mips.igen: Include tx.igen.
2360         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2361         * tx.igen: New file, contains MADD and MADDU.
2362
2363         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2364         the hardwired constant `7'.
2365         (store_memory): Ditto.
2366         (LOADDRMASK): Move definition to sim-main.h.
2367
2368         mips.igen (MTC0): Enable for r3900.
2369         (ADDU): Add trace.
2370
2371         mips.igen (do_load_byte): Delete.
2372         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2373         do_store_right): New functions.
2374         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2375
2376         configure.in: Let the tx39 use igen again.
2377         configure: Update.
2378
2379 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2380
2381         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2382         not an address sized quantity.  Return zero for cache sizes.
2383
2384 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2385
2386         * mips.igen (r3900): r3900 does not support 64 bit integer
2387         operations.
2388
2389 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2390
2391         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2392         than igen one.
2393         * configure : Rebuild.
2394
2395 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2396
2397         * configure: Regenerated to track ../common/aclocal.m4 changes.
2398
2399 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2400
2401         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2402
2403 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2404
2405         * configure: Regenerated to track ../common/aclocal.m4 changes.
2406         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2407
2408 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2409
2410         * configure: Regenerated to track ../common/aclocal.m4 changes.
2411
2412 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2413
2414         * interp.c (Max, Min): Comment out functions. Not yet used.
2415
2416 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2417
2418         * configure: Regenerated to track ../common/aclocal.m4 changes.
2419
2420 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2421
2422         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2423         configurable settings for stand-alone simulator.
2424
2425         * configure.in: Added X11 search, just in case.
2426
2427         * configure: Regenerated.
2428
2429 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2430
2431         * interp.c (sim_write, sim_read, load_memory, store_memory):
2432         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2433
2434 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2435
2436         * sim-main.h (GETFCC): Return an unsigned value.
2437
2438 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2439
2440         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2441         (DADD): Result destination is RD not RT.
2442
2443 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2444
2445         * sim-main.h (HIACCESS, LOACCESS): Always define.
2446
2447         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2448
2449         * interp.c (sim_info): Delete.
2450
2451 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2452
2453         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2454         (mips_option_handler): New argument `cpu'.
2455         (sim_open): Update call to sim_add_option_table.
2456
2457 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2458
2459         * mips.igen (CxC1): Add tracing.
2460
2461 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2462
2463         * sim-main.h (Max, Min): Declare.
2464
2465         * interp.c (Max, Min): New functions.
2466
2467         * mips.igen (BC1): Add tracing.
2468
2469 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2470
2471         * interp.c Added memory map for stack in vr4100
2472
2473 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2474
2475         * interp.c (load_memory): Add missing "break"'s.
2476
2477 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2478
2479         * interp.c (sim_store_register, sim_fetch_register): Pass in
2480         length parameter.  Return -1.
2481
2482 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2483
2484         * interp.c: Added hardware init hook, fixed warnings.
2485
2486 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2487
2488         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2489
2490 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2491
2492         * interp.c (ifetch16): New function.
2493
2494         * sim-main.h (IMEM32): Rename IMEM.
2495         (IMEM16_IMMED): Define.
2496         (IMEM16): Define.
2497         (DELAY_SLOT): Update.
2498
2499         * m16run.c (sim_engine_run): New file.
2500
2501         * m16.igen: All instructions except LB.
2502         (LB): Call do_load_byte.
2503         * mips.igen (do_load_byte): New function.
2504         (LB): Call do_load_byte.
2505
2506         * mips.igen: Move spec for insn bit size and high bit from here.
2507         * Makefile.in (tmp-igen, tmp-m16): To here.
2508
2509         * m16.dc: New file, decode mips16 instructions.
2510
2511         * Makefile.in (SIM_NO_ALL): Define.
2512         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2513
2514 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2515
2516         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2517         point unit to 32 bit registers.
2518         * configure: Re-generate.
2519
2520 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2521
2522         * configure.in (sim_use_gen): Make IGEN the default simulator
2523         generator for generic 32 and 64 bit mips targets.
2524         * configure: Re-generate.
2525
2526 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2527
2528         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2529         bitsize.
2530
2531         * interp.c (sim_fetch_register, sim_store_register): Read/write
2532         FGR from correct location.
2533         (sim_open): Set size of FGR's according to
2534         WITH_TARGET_FLOATING_POINT_BITSIZE.
2535
2536         * sim-main.h (FGR): Store floating point registers in a separate
2537         array.
2538
2539 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2540
2541         * configure: Regenerated to track ../common/aclocal.m4 changes.
2542
2543 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2544
2545         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2546
2547         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2548
2549         * interp.c (pending_tick): New function.  Deliver pending writes.
2550
2551         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2552         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2553         it can handle mixed sized quantites and single bits.
2554
2555 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2556
2557         * interp.c (oengine.h): Do not include when building with IGEN.
2558         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2559         (sim_info): Ditto for PROCESSOR_64BIT.
2560         (sim_monitor): Replace ut_reg with unsigned_word.
2561         (*): Ditto for t_reg.
2562         (LOADDRMASK): Define.
2563         (sim_open): Remove defunct check that host FP is IEEE compliant,
2564         using software to emulate floating point.
2565         (value_fpr, ...): Always compile, was conditional on HASFPU.
2566
2567 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2568
2569         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2570         size.
2571
2572         * interp.c (SD, CPU): Define.
2573         (mips_option_handler): Set flags in each CPU.
2574         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2575         (sim_close): Do not clear STATE, deleted anyway.
2576         (sim_write, sim_read): Assume CPU zero's vm should be used for
2577         data transfers.
2578         (sim_create_inferior): Set the PC for all processors.
2579         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2580         argument.
2581         (mips16_entry): Pass correct nr of args to store_word, load_word.
2582         (ColdReset): Cold reset all cpu's.
2583         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2584         (sim_monitor, load_memory, store_memory, signal_exception): Use
2585         `CPU' instead of STATE_CPU.
2586
2587
2588         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2589         SD or CPU_.
2590
2591         * sim-main.h (signal_exception): Add sim_cpu arg.
2592         (SignalException*): Pass both SD and CPU to signal_exception.
2593         * interp.c (signal_exception): Update.
2594
2595         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2596         Ditto
2597         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2598         address_translation): Ditto
2599         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2600
2601 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2602
2603         * configure: Regenerated to track ../common/aclocal.m4 changes.
2604
2605 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2606
2607         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2608
2609         * mips.igen (model): Map processor names onto BFD name.
2610
2611         * sim-main.h (CPU_CIA): Delete.
2612         (SET_CIA, GET_CIA): Define
2613
2614 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2615
2616         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2617         regiser.
2618
2619         * configure.in (default_endian): Configure a big-endian simulator
2620         by default.
2621         * configure: Re-generate.
2622
2623 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2624
2625         * configure: Regenerated to track ../common/aclocal.m4 changes.
2626
2627 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2628
2629         * interp.c (sim_monitor): Handle Densan monitor outbyte
2630         and inbyte functions.
2631
2632 1997-12-29  Felix Lee  <flee@cygnus.com>
2633
2634         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2635
2636 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2637
2638         * Makefile.in (tmp-igen): Arrange for $zero to always be
2639         reset to zero after every instruction.
2640
2641 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2642
2643         * configure: Regenerated to track ../common/aclocal.m4 changes.
2644         * config.in: Ditto.
2645
2646 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2647
2648         * mips.igen (MSUB): Fix to work like MADD.
2649         * gencode.c (MSUB): Similarly.
2650
2651 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2652
2653         * configure: Regenerated to track ../common/aclocal.m4 changes.
2654
2655 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2656
2657         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2658
2659 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2660
2661         * sim-main.h (sim-fpu.h): Include.
2662
2663         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2664         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2665         using host independant sim_fpu module.
2666
2667 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2668
2669         * interp.c (signal_exception): Report internal errors with SIGABRT
2670         not SIGQUIT.
2671
2672         * sim-main.h (C0_CONFIG): New register.
2673         (signal.h): No longer include.
2674
2675         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2676
2677 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2678
2679         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2680
2681 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2682
2683         * mips.igen: Tag vr5000 instructions.
2684         (ANDI): Was missing mipsIV model, fix assembler syntax.
2685         (do_c_cond_fmt): New function.
2686         (C.cond.fmt): Handle mips I-III which do not support CC field
2687         separatly.
2688         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2689         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2690         in IV3.2 spec.
2691         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2692         vr5000 which saves LO in a GPR separatly.
2693
2694         * configure.in (enable-sim-igen): For vr5000, select vr5000
2695         specific instructions.
2696         * configure: Re-generate.
2697
2698 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2699
2700         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2701
2702         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2703         fmt_uninterpreted_64 bit cases to switch.  Convert to
2704         fmt_formatted,
2705
2706         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2707
2708         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2709         as specified in IV3.2 spec.
2710         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2711
2712 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2713
2714         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2715         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2716         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2717         PENDING_FILL versions of instructions.  Simplify.
2718         (X): New function.
2719         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2720         instructions.
2721         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2722         a signed value.
2723         (MTHI, MFHI): Disable code checking HI-LO.
2724
2725         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2726         global.
2727         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2728
2729 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2730
2731         * gencode.c (build_mips16_operands): Replace IPC with cia.
2732
2733         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2734         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2735         IPC to `cia'.
2736         (UndefinedResult): Replace function with macro/function
2737         combination.
2738         (sim_engine_run): Don't save PC in IPC.
2739
2740         * sim-main.h (IPC): Delete.
2741
2742
2743         * interp.c (signal_exception, store_word, load_word,
2744         address_translation, load_memory, store_memory, cache_op,
2745         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2746         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2747         current instruction address - cia - argument.
2748         (sim_read, sim_write): Call address_translation directly.
2749         (sim_engine_run): Rename variable vaddr to cia.
2750         (signal_exception): Pass cia to sim_monitor
2751
2752         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2753         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2754         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2755
2756         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2757         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2758         SIM_ASSERT.
2759
2760         * interp.c (signal_exception): Pass restart address to
2761         sim_engine_restart.
2762
2763         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2764         idecode.o): Add dependency.
2765
2766         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2767         Delete definitions
2768         (DELAY_SLOT): Update NIA not PC with branch address.
2769         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2770
2771         * mips.igen: Use CIA not PC in branch calculations.
2772         (illegal): Call SignalException.
2773         (BEQ, ADDIU): Fix assembler.
2774
2775 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2776
2777         * m16.igen (JALX): Was missing.
2778
2779         * configure.in (enable-sim-igen): New configuration option.
2780         * configure: Re-generate.
2781
2782         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2783
2784         * interp.c (load_memory, store_memory): Delete parameter RAW.
2785         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2786         bypassing {load,store}_memory.
2787
2788         * sim-main.h (ByteSwapMem): Delete definition.
2789
2790         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2791
2792         * interp.c (sim_do_command, sim_commands): Delete mips specific
2793         commands.  Handled by module sim-options.
2794
2795         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2796         (WITH_MODULO_MEMORY): Define.
2797
2798         * interp.c (sim_info): Delete code printing memory size.
2799
2800         * interp.c (mips_size): Nee sim_size, delete function.
2801         (power2): Delete.
2802         (monitor, monitor_base, monitor_size): Delete global variables.
2803         (sim_open, sim_close): Delete code creating monitor and other
2804         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2805         manage memory regions.
2806         (load_memory, store_memory): Use sim-core for memory model.
2807
2808         * interp.c (address_translation): Delete all memory map code
2809         except line forcing 32 bit addresses.
2810
2811 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2812
2813         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2814         trace options.
2815
2816         * interp.c (logfh, logfile): Delete globals.
2817         (sim_open, sim_close): Delete code opening & closing log file.
2818         (mips_option_handler): Delete -l and -n options.
2819         (OPTION mips_options): Ditto.
2820
2821         * interp.c (OPTION mips_options): Rename option trace to dinero.
2822         (mips_option_handler): Update.
2823
2824 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2825
2826         * interp.c (fetch_str): New function.
2827         (sim_monitor): Rewrite using sim_read & sim_write.
2828         (sim_open): Check magic number.
2829         (sim_open): Write monitor vectors into memory using sim_write.
2830         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2831         (sim_read, sim_write): Simplify - transfer data one byte at a
2832         time.
2833         (load_memory, store_memory): Clarify meaning of parameter RAW.
2834
2835         * sim-main.h (isHOST): Defete definition.
2836         (isTARGET): Mark as depreciated.
2837         (address_translation): Delete parameter HOST.
2838
2839         * interp.c (address_translation): Delete parameter HOST.
2840
2841 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2842
2843         * mips.igen:
2844
2845         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2846         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2847
2848 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2849
2850         * mips.igen: Add model filter field to records.
2851
2852 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2853
2854         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2855
2856         interp.c (sim_engine_run): Do not compile function sim_engine_run
2857         when WITH_IGEN == 1.
2858
2859         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2860         target architecture.
2861
2862         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2863         igen. Replace with configuration variables sim_igen_flags /
2864         sim_m16_flags.
2865
2866         * m16.igen: New file.  Copy mips16 insns here.
2867         * mips.igen: From here.
2868
2869 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2870
2871         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2872         to top.
2873         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2874
2875 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2876
2877         * gencode.c (build_instruction): Follow sim_write's lead in using
2878         BigEndianMem instead of !ByteSwapMem.
2879
2880 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2881
2882         * configure.in (sim_gen): Dependent on target, select type of
2883         generator.  Always select old style generator.
2884
2885         configure: Re-generate.
2886
2887         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2888         targets.
2889         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2890         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2891         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2892         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2893         SIM_@sim_gen@_*, set by autoconf.
2894
2895 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2896
2897         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2898
2899         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2900         CURRENT_FLOATING_POINT instead.
2901
2902         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2903         (address_translation): Raise exception InstructionFetch when
2904         translation fails and isINSTRUCTION.
2905
2906         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2907         sim_engine_run): Change type of of vaddr and paddr to
2908         address_word.
2909         (address_translation, prefetch, load_memory, store_memory,
2910         cache_op): Change type of vAddr and pAddr to address_word.
2911
2912         * gencode.c (build_instruction): Change type of vaddr and paddr to
2913         address_word.
2914
2915 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2916
2917         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2918         macro to obtain result of ALU op.
2919
2920 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2921
2922         * interp.c (sim_info): Call profile_print.
2923
2924 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2925
2926         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2927
2928         * sim-main.h (WITH_PROFILE): Do not define, defined in
2929         common/sim-config.h.  Use sim-profile module.
2930         (simPROFILE): Delete defintion.
2931
2932         * interp.c (PROFILE): Delete definition.
2933         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2934         (sim_close): Delete code writing profile histogram.
2935         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2936         Delete.
2937         (sim_engine_run): Delete code profiling the PC.
2938
2939 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2940
2941         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2942
2943         * interp.c (sim_monitor): Make register pointers of type
2944         unsigned_word*.
2945
2946         * sim-main.h: Make registers of type unsigned_word not
2947         signed_word.
2948
2949 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2950
2951         * interp.c (sync_operation): Rename from SyncOperation, make
2952         global, add SD argument.
2953         (prefetch): Rename from Prefetch, make global, add SD argument.
2954         (decode_coproc): Make global.
2955
2956         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2957
2958         * gencode.c (build_instruction): Generate DecodeCoproc not
2959         decode_coproc calls.
2960
2961         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2962         (SizeFGR): Move to sim-main.h
2963         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2964         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2965         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2966         sim-main.h.
2967         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2968         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2969         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2970         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2971         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2972         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2973
2974         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2975         exception.
2976         (sim-alu.h): Include.
2977         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2978         (sim_cia): Typedef to instruction_address.
2979
2980 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2981
2982         * Makefile.in (interp.o): Rename generated file engine.c to
2983         oengine.c.
2984
2985         * interp.c: Update.
2986
2987 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2988
2989         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2990
2991 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2992
2993         * gencode.c (build_instruction): For "FPSQRT", output correct
2994         number of arguments to Recip.
2995
2996 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2997
2998         * Makefile.in (interp.o): Depends on sim-main.h
2999
3000         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3001
3002         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3003         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3004         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3005         STATE, DSSTATE): Define
3006         (GPR, FGRIDX, ..): Define.
3007
3008         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3009         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3010         (GPR, FGRIDX, ...): Delete macros.
3011
3012         * interp.c: Update names to match defines from sim-main.h
3013
3014 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3015
3016         * interp.c (sim_monitor): Add SD argument.
3017         (sim_warning): Delete.  Replace calls with calls to
3018         sim_io_eprintf.
3019         (sim_error): Delete. Replace calls with sim_io_error.
3020         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3021         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3022         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3023         argument.
3024         (mips_size): Rename from sim_size. Add SD argument.
3025
3026         * interp.c (simulator): Delete global variable.
3027         (callback): Delete global variable.
3028         (mips_option_handler, sim_open, sim_write, sim_read,
3029         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3030         sim_size,sim_monitor): Use sim_io_* not callback->*.
3031         (sim_open): ZALLOC simulator struct.
3032         (PROFILE): Do not define.
3033
3034 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3035
3036         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3037         support.h with corresponding code.
3038
3039         * sim-main.h (word64, uword64), support.h: Move definition to
3040         sim-main.h.
3041         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3042
3043         * support.h: Delete
3044         * Makefile.in: Update dependencies
3045         * interp.c: Do not include.
3046
3047 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3048
3049         * interp.c (address_translation, load_memory, store_memory,
3050         cache_op): Rename to from AddressTranslation et.al., make global,
3051         add SD argument
3052
3053         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3054         CacheOp): Define.
3055
3056         * interp.c (SignalException): Rename to signal_exception, make
3057         global.
3058
3059         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3060
3061         * sim-main.h (SignalException, SignalExceptionInterrupt,
3062         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3063         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3064         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3065         Define.
3066
3067         * interp.c, support.h: Use.
3068
3069 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3070
3071         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3072         to value_fpr / store_fpr. Add SD argument.
3073         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3074         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3075
3076         * sim-main.h (ValueFPR, StoreFPR): Define.
3077
3078 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3079
3080         * interp.c (sim_engine_run): Check consistency between configure
3081         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3082         and HASFPU.
3083
3084         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3085         (mips_fpu): Configure WITH_FLOATING_POINT.
3086         (mips_endian): Configure WITH_TARGET_ENDIAN.
3087         * configure: Update.
3088
3089 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3090
3091         * configure: Regenerated to track ../common/aclocal.m4 changes.
3092
3093 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3094
3095         * configure: Regenerated.
3096
3097 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3098
3099         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3100
3101 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3102
3103         * gencode.c (print_igen_insn_models): Assume certain architectures
3104         include all mips* instructions.
3105         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3106         instruction.
3107
3108         * Makefile.in (tmp.igen): Add target. Generate igen input from
3109         gencode file.
3110
3111         * gencode.c (FEATURE_IGEN): Define.
3112         (main): Add --igen option.  Generate output in igen format.
3113         (process_instructions): Format output according to igen option.
3114         (print_igen_insn_format): New function.
3115         (print_igen_insn_models): New function.
3116         (process_instructions): Only issue warnings and ignore
3117         instructions when no FEATURE_IGEN.
3118
3119 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3120
3121         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3122         MIPS targets.
3123
3124 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3125
3126         * configure: Regenerated to track ../common/aclocal.m4 changes.
3127
3128 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3129
3130         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3131         SIM_RESERVED_BITS): Delete, moved to common.
3132         (SIM_EXTRA_CFLAGS): Update.
3133
3134 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3135
3136         * configure.in: Configure non-strict memory alignment.
3137         * configure: Regenerated to track ../common/aclocal.m4 changes.
3138
3139 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3140
3141         * configure: Regenerated to track ../common/aclocal.m4 changes.
3142
3143 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3144
3145         * gencode.c (SDBBP,DERET): Added (3900) insns.
3146         (RFE): Turn on for 3900.
3147         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3148         (dsstate): Made global.
3149         (SUBTARGET_R3900): Added.
3150         (CANCELDELAYSLOT): New.
3151         (SignalException): Ignore SystemCall rather than ignore and
3152         terminate.  Add DebugBreakPoint handling.
3153         (decode_coproc): New insns RFE, DERET; and new registers Debug
3154         and DEPC protected by SUBTARGET_R3900.
3155         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3156         bits explicitly.
3157         * Makefile.in,configure.in: Add mips subtarget option.
3158         * configure: Update.
3159
3160 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3161
3162         * gencode.c: Add r3900 (tx39).
3163
3164
3165 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3166
3167         * gencode.c (build_instruction): Don't need to subtract 4 for
3168         JALR, just 2.
3169
3170 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3171
3172         * interp.c: Correct some HASFPU problems.
3173
3174 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3175
3176         * configure: Regenerated to track ../common/aclocal.m4 changes.
3177
3178 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3179
3180         * interp.c (mips_options): Fix samples option short form, should
3181         be `x'.
3182
3183 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3184
3185         * interp.c (sim_info): Enable info code.  Was just returning.
3186
3187 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3188
3189         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3190         MFC0.
3191
3192 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3193
3194         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3195         constants.
3196         (build_instruction): Ditto for LL.
3197
3198 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3199
3200         * configure: Regenerated to track ../common/aclocal.m4 changes.
3201
3202 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3203
3204         * configure: Regenerated to track ../common/aclocal.m4 changes.
3205         * config.in: Ditto.
3206
3207 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3208
3209         * interp.c (sim_open): Add call to sim_analyze_program, update
3210         call to sim_config.
3211
3212 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3213
3214         * interp.c (sim_kill): Delete.
3215         (sim_create_inferior): Add ABFD argument. Set PC from same.
3216         (sim_load): Move code initializing trap handlers from here.
3217         (sim_open): To here.
3218         (sim_load): Delete, use sim-hload.c.
3219
3220         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3221
3222 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3223
3224         * configure: Regenerated to track ../common/aclocal.m4 changes.
3225         * config.in: Ditto.
3226
3227 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3228
3229         * interp.c (sim_open): Add ABFD argument.
3230         (sim_load): Move call to sim_config from here.
3231         (sim_open): To here.  Check return status.
3232
3233 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3234
3235         * gencode.c (build_instruction): Two arg MADD should
3236         not assign result to $0.
3237
3238 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3239
3240         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3241         * sim/mips/configure.in: Regenerate.
3242
3243 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3244
3245         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3246         signed8, unsigned8 et.al. types.
3247
3248         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3249         hosts when selecting subreg.
3250
3251 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3252
3253         * interp.c (sim_engine_run): Reset the ZERO register to zero
3254         regardless of FEATURE_WARN_ZERO.
3255         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3256
3257 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3258
3259         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3260         (SignalException): For BreakPoints ignore any mode bits and just
3261         save the PC.
3262         (SignalException): Always set the CAUSE register.
3263
3264 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3265
3266         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3267         exception has been taken.
3268
3269         * interp.c: Implement the ERET and mt/f sr instructions.
3270
3271 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3272
3273         * interp.c (SignalException): Don't bother restarting an
3274         interrupt.
3275
3276 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3277
3278         * interp.c (SignalException): Really take an interrupt.
3279         (interrupt_event): Only deliver interrupts when enabled.
3280
3281 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3282
3283         * interp.c (sim_info): Only print info when verbose.
3284         (sim_info) Use sim_io_printf for output.
3285
3286 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3287
3288         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3289         mips architectures.
3290
3291 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3292
3293         * interp.c (sim_do_command): Check for common commands if a
3294         simulator specific command fails.
3295
3296 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3297
3298         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3299         and simBE when DEBUG is defined.
3300
3301 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3302
3303         * interp.c (interrupt_event): New function.  Pass exception event
3304         onto exception handler.
3305
3306         * configure.in: Check for stdlib.h.
3307         * configure: Regenerate.
3308
3309         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3310         variable declaration.
3311         (build_instruction): Initialize memval1.
3312         (build_instruction): Add UNUSED attribute to byte, bigend,
3313         reverse.
3314         (build_operands): Ditto.
3315
3316         * interp.c: Fix GCC warnings.
3317         (sim_get_quit_code): Delete.
3318
3319         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3320         * Makefile.in: Ditto.
3321         * configure: Re-generate.
3322
3323         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3324
3325 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3326
3327         * interp.c (mips_option_handler): New function parse argumes using
3328         sim-options.
3329         (myname): Replace with STATE_MY_NAME.
3330         (sim_open): Delete check for host endianness - performed by
3331         sim_config.
3332         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3333         (sim_open): Move much of the initialization from here.
3334         (sim_load): To here.  After the image has been loaded and
3335         endianness set.
3336         (sim_open): Move ColdReset from here.
3337         (sim_create_inferior): To here.
3338         (sim_open): Make FP check less dependant on host endianness.
3339
3340         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3341         run.
3342         * interp.c (sim_set_callbacks): Delete.
3343
3344         * interp.c (membank, membank_base, membank_size): Replace with
3345         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3346         (sim_open): Remove call to callback->init. gdb/run do this.
3347
3348         * interp.c: Update
3349
3350         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3351
3352         * interp.c (big_endian_p): Delete, replaced by
3353         current_target_byte_order.
3354
3355 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3356
3357         * interp.c (host_read_long, host_read_word, host_swap_word,
3358         host_swap_long): Delete. Using common sim-endian.
3359         (sim_fetch_register, sim_store_register): Use H2T.
3360         (pipeline_ticks): Delete.  Handled by sim-events.
3361         (sim_info): Update.
3362         (sim_engine_run): Update.
3363
3364 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3365
3366         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3367         reason from here.
3368         (SignalException): To here. Signal using sim_engine_halt.
3369         (sim_stop_reason): Delete, moved to common.
3370
3371 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3372
3373         * interp.c (sim_open): Add callback argument.
3374         (sim_set_callbacks): Delete SIM_DESC argument.
3375         (sim_size): Ditto.
3376
3377 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3378
3379         * Makefile.in (SIM_OBJS): Add common modules.
3380
3381         * interp.c (sim_set_callbacks): Also set SD callback.
3382         (set_endianness, xfer_*, swap_*): Delete.
3383         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3384         Change to functions using sim-endian macros.
3385         (control_c, sim_stop): Delete, use common version.
3386         (simulate): Convert into.
3387         (sim_engine_run): This function.
3388         (sim_resume): Delete.
3389
3390         * interp.c (simulation): New variable - the simulator object.
3391         (sim_kind): Delete global - merged into simulation.
3392         (sim_load): Cleanup.  Move PC assignment from here.
3393         (sim_create_inferior): To here.
3394
3395         * sim-main.h: New file.
3396         * interp.c (sim-main.h): Include.
3397
3398 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3399
3400         * configure: Regenerated to track ../common/aclocal.m4 changes.
3401
3402 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3403
3404         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3405
3406 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3407
3408         * gencode.c (build_instruction): DIV instructions: check
3409         for division by zero and integer overflow before using
3410         host's division operation.
3411
3412 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3413
3414         * Makefile.in (SIM_OBJS): Add sim-load.o.
3415         * interp.c: #include bfd.h.
3416         (target_byte_order): Delete.
3417         (sim_kind, myname, big_endian_p): New static locals.
3418         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3419         after argument parsing.  Recognize -E arg, set endianness accordingly.
3420         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3421         load file into simulator.  Set PC from bfd.
3422         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3423         (set_endianness): Use big_endian_p instead of target_byte_order.
3424
3425 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3426
3427         * interp.c (sim_size): Delete prototype - conflicts with
3428         definition in remote-sim.h.  Correct definition.
3429
3430 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3431
3432         * configure: Regenerated to track ../common/aclocal.m4 changes.
3433         * config.in: Ditto.
3434
3435 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3436
3437         * interp.c (sim_open): New arg `kind'.
3438
3439         * configure: Regenerated to track ../common/aclocal.m4 changes.
3440
3441 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3442
3443         * configure: Regenerated to track ../common/aclocal.m4 changes.
3444
3445 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3446
3447         * interp.c (sim_open): Set optind to 0 before calling getopt.
3448
3449 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3450
3451         * configure: Regenerated to track ../common/aclocal.m4 changes.
3452
3453 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3454
3455         * interp.c : Replace uses of pr_addr with pr_uword64
3456         where the bit length is always 64 independent of SIM_ADDR.
3457         (pr_uword64) : added.
3458
3459 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3460
3461         * configure: Re-generate.
3462
3463 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3464
3465         * configure: Regenerate to track ../common/aclocal.m4 changes.
3466
3467 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3468
3469         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3470         in argv form.
3471         (other sim_*): New SIM_DESC argument.
3472
3473 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3474
3475         * interp.c: Fix printing of addresses for non-64-bit targets.
3476         (pr_addr): Add function to print address based on size.
3477
3478 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3479
3480         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3481
3482 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3483
3484         * gencode.c (build_mips16_operands): Correct computation of base
3485         address for extended PC relative instruction.
3486
3487 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3488
3489         * interp.c (mips16_entry): Add support for floating point cases.
3490         (SignalException): Pass floating point cases to mips16_entry.
3491         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3492         registers.
3493         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3494         or fmt_word.
3495         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3496         and then set the state to fmt_uninterpreted.
3497         (COP_SW): Temporarily set the state to fmt_word while calling
3498         ValueFPR.
3499
3500 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3501
3502         * gencode.c (build_instruction): The high order may be set in the
3503         comparison flags at any ISA level, not just ISA 4.
3504
3505 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3506
3507         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3508         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3509         * configure.in: sinclude ../common/aclocal.m4.
3510         * configure: Regenerated.
3511
3512 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3513
3514         * configure: Rebuild after change to aclocal.m4.
3515
3516 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3517
3518         * configure configure.in Makefile.in:  Update to new configure
3519         scheme which is more compatible with WinGDB builds.
3520         * configure.in:  Improve comment on how to run autoconf.
3521         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3522         * Makefile.in:  Use autoconf substitution to install common
3523         makefile fragment.
3524
3525 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3526
3527         * gencode.c (build_instruction): Use BigEndianCPU instead of
3528         ByteSwapMem.
3529
3530 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3531
3532         * interp.c (sim_monitor): Make output to stdout visible in
3533         wingdb's I/O log window.
3534
3535 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3536
3537         * support.h: Undo previous change to SIGTRAP
3538         and SIGQUIT values.
3539
3540 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3541
3542         * interp.c (store_word, load_word): New static functions.
3543         (mips16_entry): New static function.
3544         (SignalException): Look for mips16 entry and exit instructions.
3545         (simulate): Use the correct index when setting fpr_state after
3546         doing a pending move.
3547
3548 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3549
3550         * interp.c: Fix byte-swapping code throughout to work on
3551         both little- and big-endian hosts.
3552
3553 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3554
3555         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3556         with gdb/config/i386/xm-windows.h.
3557
3558 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3559
3560         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3561         that messes up arithmetic shifts.
3562
3563 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3564
3565         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3566         SIGTRAP and SIGQUIT for _WIN32.
3567
3568 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3569
3570         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3571         force a 64 bit multiplication.
3572         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3573         destination register is 0, since that is the default mips16 nop
3574         instruction.
3575
3576 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3577
3578         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3579         (build_endian_shift): Don't check proc64.
3580         (build_instruction): Always set memval to uword64.  Cast op2 to
3581         uword64 when shifting it left in memory instructions.  Always use
3582         the same code for stores--don't special case proc64.
3583
3584         * gencode.c (build_mips16_operands): Fix base PC value for PC
3585         relative operands.
3586         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3587         jal instruction.
3588         * interp.c (simJALDELAYSLOT): Define.
3589         (JALDELAYSLOT): Define.
3590         (INDELAYSLOT, INJALDELAYSLOT): Define.
3591         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3592
3593 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3594
3595         * interp.c (sim_open): add flush_cache as a PMON routine
3596         (sim_monitor): handle flush_cache by ignoring it
3597
3598 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3599
3600         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3601         BigEndianMem.
3602         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3603         (BigEndianMem): Rename to ByteSwapMem and change sense.
3604         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3605         BigEndianMem references to !ByteSwapMem.
3606         (set_endianness): New function, with prototype.
3607         (sim_open): Call set_endianness.
3608         (sim_info): Use simBE instead of BigEndianMem.
3609         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3610         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3611         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3612         ifdefs, keeping the prototype declaration.
3613         (swap_word): Rewrite correctly.
3614         (ColdReset): Delete references to CONFIG.  Delete endianness related
3615         code; moved to set_endianness.
3616
3617 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3618
3619         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3620         * interp.c (CHECKHILO): Define away.
3621         (simSIGINT): New macro.
3622         (membank_size): Increase from 1MB to 2MB.
3623         (control_c): New function.
3624         (sim_resume): Rename parameter signal to signal_number.  Add local
3625         variable prev.  Call signal before and after simulate.
3626         (sim_stop_reason): Add simSIGINT support.
3627         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3628         functions always.
3629         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3630         if logfh is NULL.
3631         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3632         a call to sim_warning.
3633
3634 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3635
3636         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3637         16 bit instructions.
3638
3639 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3640
3641         Add support for mips16 (16 bit MIPS implementation):
3642         * gencode.c (inst_type): Add mips16 instruction encoding types.
3643         (GETDATASIZEINSN): Define.
3644         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3645         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3646         mtlo.
3647         (MIPS16_DECODE): New table, for mips16 instructions.
3648         (bitmap_val): New static function.
3649         (struct mips16_op): Define.
3650         (mips16_op_table): New table, for mips16 operands.
3651         (build_mips16_operands): New static function.
3652         (process_instructions): If PC is odd, decode a mips16
3653         instruction.  Break out instruction handling into new
3654         build_instruction function.
3655         (build_instruction): New static function, broken out of
3656         process_instructions.  Check modifiers rather than flags for SHIFT
3657         bit count and m[ft]{hi,lo} direction.
3658         (usage): Pass program name to fprintf.
3659         (main): Remove unused variable this_option_optind.  Change
3660         ``*loptarg++'' to ``loptarg++''.
3661         (my_strtoul): Parenthesize && within ||.
3662         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3663         (simulate): If PC is odd, fetch a 16 bit instruction, and
3664         increment PC by 2 rather than 4.
3665         * configure.in: Add case for mips16*-*-*.
3666         * configure: Rebuild.
3667
3668 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3669
3670         * interp.c: Allow -t to enable tracing in standalone simulator.
3671         Fix garbage output in trace file and error messages.
3672
3673 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3674
3675         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3676         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3677         * configure.in: Simplify using macros in ../common/aclocal.m4.
3678         * configure: Regenerated.
3679         * tconfig.in: New file.
3680
3681 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3682
3683         * interp.c: Fix bugs in 64-bit port.
3684         Use ansi function declarations for msvc compiler.
3685         Initialize and test file pointer in trace code.
3686         Prevent duplicate definition of LAST_EMED_REGNUM.
3687
3688 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3689
3690         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3691
3692 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3693
3694         * interp.c (SignalException): Check for explicit terminating
3695         breakpoint value.
3696         * gencode.c: Pass instruction value through SignalException()
3697         calls for Trap, Breakpoint and Syscall.
3698
3699 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3700
3701         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3702         only used on those hosts that provide it.
3703         * configure.in: Add sqrt() to list of functions to be checked for.
3704         * config.in: Re-generated.
3705         * configure: Re-generated.
3706
3707 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3708
3709         * gencode.c (process_instructions): Call build_endian_shift when
3710         expanding STORE RIGHT, to fix swr.
3711         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3712         clear the high bits.
3713         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3714         Fix float to int conversions to produce signed values.
3715
3716 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3717
3718         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3719         (process_instructions): Correct handling of nor instruction.
3720         Correct shift count for 32 bit shift instructions. Correct sign
3721         extension for arithmetic shifts to not shift the number of bits in
3722         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3723         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3724         Fix madd.
3725         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3726         It's OK to have a mult follow a mult.  What's not OK is to have a
3727         mult follow an mfhi.
3728         (Convert): Comment out incorrect rounding code.
3729
3730 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3731
3732         * interp.c (sim_monitor): Improved monitor printf
3733         simulation. Tidied up simulator warnings, and added "--log" option
3734         for directing warning message output.
3735         * gencode.c: Use sim_warning() rather than WARNING macro.
3736
3737 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3738
3739         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3740         getopt1.o, rather than on gencode.c.  Link objects together.
3741         Don't link against -liberty.
3742         (gencode.o, getopt.o, getopt1.o): New targets.
3743         * gencode.c: Include <ctype.h> and "ansidecl.h".
3744         (AND): Undefine after including "ansidecl.h".
3745         (ULONG_MAX): Define if not defined.
3746         (OP_*): Don't define macros; now defined in opcode/mips.h.
3747         (main): Call my_strtoul rather than strtoul.
3748         (my_strtoul): New static function.
3749
3750 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3751
3752         * gencode.c (process_instructions):  Generate word64 and uword64
3753         instead of `long long' and `unsigned long long' data types.
3754         * interp.c:  #include sysdep.h to get signals, and define default
3755         for SIGBUS.
3756         * (Convert):  Work around for Visual-C++ compiler bug with type
3757         conversion.
3758         * support.h:  Make things compile under Visual-C++ by using
3759         __int64 instead of `long long'.  Change many refs to long long
3760         into word64/uword64 typedefs.
3761
3762 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3763
3764         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3765         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3766         (docdir): Removed.
3767         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3768         (AC_PROG_INSTALL): Added.
3769         (AC_PROG_CC): Moved to before configure.host call.
3770         * configure: Rebuilt.
3771
3772 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3773
3774         * configure.in: Define @SIMCONF@ depending on mips target.
3775         * configure: Rebuild.
3776         * Makefile.in (run): Add @SIMCONF@ to control simulator
3777         construction.
3778         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3779         * interp.c: Remove some debugging, provide more detailed error
3780         messages, update memory accesses to use LOADDRMASK.
3781
3782 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3783
3784         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3785         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3786         stamp-h.
3787         * configure: Rebuild.
3788         * config.in: New file, generated by autoheader.
3789         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3790         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3791         HAVE_ANINT and HAVE_AINT, as appropriate.
3792         * Makefile.in (run): Use @LIBS@ rather than -lm.
3793         (interp.o): Depend upon config.h.
3794         (Makefile): Just rebuild Makefile.
3795         (clean): Remove stamp-h.
3796         (mostlyclean): Make the same as clean, not as distclean.
3797         (config.h, stamp-h): New targets.
3798
3799 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3800
3801         * interp.c (ColdReset): Fix boolean test. Make all simulator
3802         globals static.
3803
3804 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3805
3806         * interp.c (xfer_direct_word, xfer_direct_long,
3807         swap_direct_word, swap_direct_long, xfer_big_word,
3808         xfer_big_long, xfer_little_word, xfer_little_long,
3809         swap_word,swap_long): Added.
3810         * interp.c (ColdReset): Provide function indirection to
3811         host<->simulated_target transfer routines.
3812         * interp.c (sim_store_register, sim_fetch_register): Updated to
3813         make use of indirected transfer routines.
3814
3815 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3816
3817         * gencode.c (process_instructions): Ensure FP ABS instruction
3818         recognised.
3819         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3820         system call support.
3821
3822 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3823
3824         * interp.c (sim_do_command): Complain if callback structure not
3825         initialised.
3826
3827 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3828
3829         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3830         support for Sun hosts.
3831         * Makefile.in (gencode): Ensure the host compiler and libraries
3832         used for cross-hosted build.
3833
3834 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3835
3836         * interp.c, gencode.c: Some more (TODO) tidying.
3837
3838 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3839
3840         * gencode.c, interp.c: Replaced explicit long long references with
3841         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3842         * support.h (SET64LO, SET64HI): Macros added.
3843
3844 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3845
3846         * configure: Regenerate with autoconf 2.7.
3847
3848 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3849
3850         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3851         * support.h: Remove superfluous "1" from #if.
3852         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3853
3854 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3855
3856         * interp.c (StoreFPR): Control UndefinedResult() call on
3857         WARN_RESULT manifest.
3858
3859 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3860
3861         * gencode.c: Tidied instruction decoding, and added FP instruction
3862         support.
3863
3864         * interp.c: Added dineroIII, and BSD profiling support. Also
3865         run-time FP handling.
3866
3867 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3868
3869         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3870         gencode.c, interp.c, support.h: created.