sim/mips/ChangeLog

   1 2021-04-18  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * configure: Regenerate.
   4
   5 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
   8
   9 2021-04-08  Simon Marchi  <simon.marchi@polymtl.ca>
  10
  11         * Makefile.in: Set ASAN_OPTIONS when running igen.
  12
  13 2021-04-04  Steve Ellcey  <sellcey@mips.com>
  14             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  15
  16         * interp.c (sim_monitor): Add switch entries for unlink (13),
  17         lseek (14), and stat (15).
  18
  19 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  20
  21         * Makefile.in (../igen/igen): Delete rule.
  22         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
  23
  24 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * aclocal.m4, configure: Regenerate.
  27
  28 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
  29
  30         * configure: Regenerate.
  31
  32 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
  33
  34         * Makefile.in (SIM_EXTRA_ALL): Delete.
  35         (all): New target.
  36
  37 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
  38
  39         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
  40         * aclocal.m4, configure: Regenerate.
  41
  42 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
  45         * aclocal.m4, configure: Regenerate.
  46
  47 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  48
  49         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
  50
  51 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  52
  53         * configure: Regenerate.
  54
  55 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  56
  57         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  58
  59 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  60
  61         * config.in, configure: Regenerate.
  62         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  63         and strings.h include.
  64
  65 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  66
  67         * configure: Regenerate.
  68
  69 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  70
  71         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  72         * configure: Regenerate.
  73
  74 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  75
  76         * configure: Regenerate.
  77
  78 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
  79
  80         * configure: Regenerate.
  81
  82 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  83
  84         *  sim-main.c: Include <stdlib.h>.
  85
  86 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  87
  88         * cp1.c: Include <stdlib.h>.
  89
  90 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
  91
  92         * configure: Re-generate.
  93
  94 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
  95
  96         * configure: Regenerate.
  97
  98 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  99
 100         PR sim/20808
 101         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
 102         and SD to sd.
 103
 104 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 105
 106         PR sim/20809
 107         * mips.igen (check_u64): Enable for `r3900'.
 108
 109 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
 110
 111         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
 112         STATE_PROG_BFD (sd).
 113         * configure: Regenerate.
 114
 115 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
 116             Maciej W. Rozycki  <macro@imgtec.com>
 117
 118         PR sim/19441
 119         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 120         `micromips64' and `micromipsdsp' only.
 121         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 122         (do_micromips_jalr, do_micromips_jal): Likewise.
 123         (compute_movep_src_reg): Likewise.
 124         (compute_andi16_imm): Likewise.
 125         (convert_fmt_micromips): Likewise.
 126         (convert_fmt_micromips_cvt_d): Likewise.
 127         (convert_fmt_micromips_cvt_s): Likewise.
 128         (FMT_MICROMIPS): Likewise.
 129         (FMT_MICROMIPS_CVT_D): Likewise.
 130         (FMT_MICROMIPS_CVT_S): Likewise.
 131
 132 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 133
 134         * interp.c: Include elf-bfd.h.
 135         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 136         ELFCLASS32.
 137
 138 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 139
 140         * config.in, configure: Regenerate.
 141
 142 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 143
 144         * configure: Regenerate.
 145
 146 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 147
 148         * configure: Regenerate.
 149
 150 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 151
 152         * configure: Regenerate.
 153
 154 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * configure: Regenerate.
 157
 158 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 159
 160         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 161         * configure: Regenerate.
 162
 163 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 164
 165         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 166         * configure: Regenerate.
 167
 168 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 169
 170         * configure: Regenerate.
 171
 172 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 173
 174         * configure: Regenerate.
 175
 176 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 177
 178         * config.in, configure: Regenerate.
 179
 180 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 181
 182         * interp.c (sim_open): Mark argv const.
 183         (sim_create_inferior): Mark argv and env const.
 184
 185 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 186
 187         * configure: Regenerate.
 188
 189 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 190
 191         * interp.c (sim_open): Update sim_parse_args comment.
 192
 193 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 194
 195         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 196         * configure: Regenerate.
 197
 198 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 199
 200         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 201         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 202         * configure: Regenerate.
 203         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 204
 205 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 206
 207         * dv-tx3904cpu.c (CPU, SD): Delete.
 208
 209 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 210
 211         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 212         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 213         (sim_store_register): Rename to ...
 214         (mips_reg_store): ... this.  Delete local cpu var.
 215         Update sim_io_eprintf calls.
 216         (sim_fetch_register): Rename to ...
 217         (mips_reg_fetch): ... this.  Delete local cpu var.
 218         Update sim_io_eprintf calls.
 219
 220 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 221
 222         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 223
 224 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 225
 226         * config.in, configure: Regenerate.
 227
 228 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 229
 230         * interp.c (sim_write, sim_read): Delete.
 231         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 232         (load_word): Likewise.
 233         * micromips.igen (cache): Likewise.
 234         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 235         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 236         do_store_left, do_store_right, do_load_double, do_store_double):
 237         Likewise.
 238         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 239         (do_prefx): Likewise.
 240         * sim-main.c (address_translation, prefetch): Delete.
 241         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 242         paddr=vaddr.
 243         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 244         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 245         (LoadMemory, StoreMemory): Delete CCA arg.
 246
 247 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 248
 249         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 250         * configure: Regenerated.
 251
 252 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 253
 254         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 255         * tconfig.h: Delete.
 256
 257 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 258
 259         * tconfig.h (SIM_HANDLES_LMA): Delete.
 260
 261 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 262
 263         * sim-main.h (WITH_WATCHPOINTS): Delete.
 264
 265 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 266
 267         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 268
 269 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 270
 271         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 272
 273 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 274
 275         * micromips.igen (process_isa_mode): Fix left shift of negative
 276         value.
 277
 278 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 279
 280         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 281
 282 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 283
 284         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 285
 286 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 287
 288         * interp.c (sim_close): Rename to ...
 289         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 290         sim_io_shutdown.
 291         * sim-main.h (mips_sim_close): Declare.
 292         (SIM_CLOSE_HOOK): Define.
 293
 294 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 295             Ali Lown  <ali.lown@imgtec.com>
 296
 297         * Makefile.in (tmp-micromips): New rule.
 298         (tmp-mach-multi): Add support for micromips.
 299         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 300         that works for both mips64 and micromips64.
 301         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 302         micromips32.
 303         Add build support for micromips.
 304         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 305         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 306         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 307         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 308         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 309         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 310         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 311         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 312         Refactored instruction code to use these functions.
 313         * dsp2.igen: Refactored instruction code to use the new functions.
 314         * interp.c (decode_coproc): Refactored to work with any instruction
 315         encoding.
 316         (isa_mode): New variable
 317         (RSVD_INSTRUCTION): Changed to 0x00000039.
 318         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 319         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 320         * micromips.dc: New file.
 321         * micromips.igen: New file.
 322         * micromips16.dc: New file.
 323         * micromipsdsp.igen: New file.
 324         * micromipsrun.c: New file.
 325         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 326         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 327         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 328         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 329         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 330         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 331         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 332         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 333         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 334         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 335         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 336         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 337         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 338         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 339         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 340         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 341         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 342         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 343         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 344         instructions.
 345         Refactored instruction code to use these functions.
 346         (RSVD): Changed to use new reserved instruction.
 347         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 348         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 349         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 350         do_store_double):  Added micromips32 and micromips64 models.
 351         Added include for micromips.igen and micromipsdsp.igen
 352         Add micromips32 and micromips64 models.
 353         (DecodeCoproc): Updated to use new macro definition.
 354         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 355         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 356         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 357         Refactored instruction code to use these functions.
 358         * sim-main.h (CP0_operation): New enum.
 359         (DecodeCoproc): Updated macro.
 360         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 361         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 362         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 363         ISA_MODE_MICROMIPS): New defines.
 364         (sim_state): Add isa_mode field.
 365
 366 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 367
 368         * configure: Regenerate.
 369
 370 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 371
 372         * configure.ac: Change configure.in to configure.ac.
 373         * configure: Regenerate.
 374
 375 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 376
 377         * configure: Regenerate.
 378
 379 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 380
 381         * interp.c [TRACE]: Delete.
 382         (TRACE): Change to WITH_TRACE_ANY_P.
 383         [!WITH_TRACE_ANY_P] (open_trace): Define.
 384         (mips_option_handler, open_trace, sim_close, dotrace):
 385         Change defined(TRACE) to WITH_TRACE_ANY_P.
 386         (sim_open): Delete TRACE ifdef check.
 387         * sim-main.c (load_memory): Delete TRACE ifdef check.
 388         (store_memory): Likewise.
 389         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 390         [!WITH_TRACE_ANY_P] (dotrace): Define.
 391
 392 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 393
 394         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 395         comments.
 396
 397 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 398
 399         * sim-main.h (SIM_CPU): Delete.
 400
 401 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 402
 403         * sim-main.h (sim_cia): Delete.
 404
 405 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 406
 407         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 408         PU_PC_GET.
 409         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 410         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 411         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 412         CIA_SET to CPU_PC_SET.
 413         * sim-main.h (CIA_GET, CIA_SET): Delete.
 414
 415 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 416
 417         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 418         * sim-main.h (STATE_CPU): Delete.
 419
 420 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 421
 422         * configure: Regenerate.
 423
 424 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 425
 426         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 427         * interp.c (mips_pc_get, mips_pc_set): New functions.
 428         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 429         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 430         (sim_pc_get): Delete.
 431         * sim-main.h (SIM_CPU): Define.
 432         (struct sim_state): Change cpu to an array of pointers.
 433         (STATE_CPU): Drop &.
 434
 435 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 436
 437         * interp.c (mips_option_handler, open_trace, sim_close,
 438         sim_write, sim_read, sim_store_register, sim_fetch_register,
 439         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 440         prototypes.
 441         (sim_open): Convert old style prototype.  Change casts with
 442         sim_write to unsigned char *.
 443         (fetch_str): Change null to unsigned char, and change cast to
 444         unsigned char *.
 445         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 446         unsigned char *.
 447
 448 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 449
 450         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 451
 452 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 453
 454         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 455
 456 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 457
 458         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 459
 460 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 461
 462         * config.in, configure: Regenerate.
 463
 464 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 465
 466         * interp.c (sim_pc_get): New function.
 467
 468 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 469
 470         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 471         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 472
 473 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 474
 475         * configure: Regenerate.
 476
 477 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 478
 479         * configure: Regenerate.
 480
 481 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 482
 483         * configure: Regenerate.
 484         * configure.ac (mips_extra_objs): Delete.
 485         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 486         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 487
 488 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 489
 490         * configure: Regenerate.
 491         * configure.ac: Delete sim_hw checks for dv-sockser.
 492
 493 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 494
 495         * config.in, configure: Regenerate.
 496         * tconfig.in: Rename file ...
 497         * tconfig.h: ... here.
 498
 499 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 500
 501         * tconfig.in: Delete includes.
 502         [HAVE_DV_SOCKSER]: Delete.
 503
 504 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 505
 506         * Makefile.in (SIM_RUN_OBJS): Delete.
 507
 508 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 509
 510         * configure.ac (AC_CHECK_HEADERS): Delete.
 511         * aclocal.m4, configure: Regenerate.
 512
 513 2014-08-19  Alan Modra  <amodra@gmail.com>
 514
 515         * configure: Regenerate.
 516
 517 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 518
 519         * configure: Regenerate.
 520         * config.in: Regenerate.
 521
 522 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 523
 524         * configure: Regenerate.
 525
 526 2013-09-23  Alan Modra  <amodra@gmail.com>
 527
 528         * configure: Regenerate.
 529
 530 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 531
 532         * aclocal.m4, configure: Regenerate.
 533
 534 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 535
 536         * configure: Rebuild.
 537
 538 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 539
 540         * configure: Regenerate.
 541
 542 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 543
 544         * configure.ac: Address use of dv-sockser.o.
 545         * tconfig.in: Conditionalize use of dv_sockser_install.
 546         * configure: Regenerated.
 547         * config.in: Regenerated.
 548
 549 2012-10-04  Chao-ying Fu  <fu@mips.com>
 550             Steve Ellcey  <sellcey@mips.com>
 551
 552         * mips/mips3264r2.igen (rdhwr): New.
 553
 554 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 555
 556         * configure.ac: Always link against dv-sockser.o.
 557         * configure: Regenerate.
 558
 559 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 560
 561         * config.in, configure: Regenerate.
 562
 563 2012-05-18  Nick Clifton  <nickc@redhat.com>
 564
 565         PR 14072
 566         * interp.c: Include config.h before system header files.
 567
 568 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 569
 570         * aclocal.m4, config.in, configure: Regenerate.
 571
 572 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 573
 574         * aclocal.m4: New file.
 575         * configure: Regenerate.
 576
 577 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 578
 579         * configure: Regenerate after common/acinclude.m4 update.
 580
 581 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 582
 583         * configure.ac: Change include to common/acinclude.m4.
 584
 585 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 586
 587         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 588         call.  Replace common.m4 include with SIM_AC_COMMON.
 589         * configure: Regenerate.
 590
 591 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 592
 593         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 594         $(SIM_EXTRA_DEPS).
 595         (tmp-mach-multi): Exit early when igen fails.
 596
 597 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 598
 599         * interp.c (sim_do_command): Delete.
 600
 601 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 602
 603         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 604         (tx3904sio_fifo_reset): Likewise.
 605         * interp.c (sim_monitor): Likewise.
 606
 607 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 608
 609         * interp.c (sim_write): Add const to buffer arg.
 610
 611 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 612
 613         * interp.c: Don't include sysdep.h
 614
 615 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 616
 617         * configure: Regenerate.
 618
 619 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 620
 621         * config.in: Regenerate.
 622         * configure: Likewise.
 623
 624         * configure: Regenerate.
 625
 626 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 627
 628         * configure: Regenerate to track ../common/common.m4 changes.
 629         * config.in: Ditto.
 630
 631 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 632             Daniel Jacobowitz  <dan@codesourcery.com>
 633             Joseph Myers  <joseph@codesourcery.com>
 634
 635         * configure: Regenerate.
 636
 637 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 638
 639         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 640         that unconditionally allows fmt_ps.
 641         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 642         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 643         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 644         filter from 64,f to 32,f.
 645         (PREFX): Change filter from 64 to 32.
 646         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 647         that use do_load_double instead of do_load.  Make both LUXC1
 648         versions unpredictable if SizeFGR () != 64.
 649         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 650         instead of do_store.  Remove unused variable.  Make both SUXC1
 651         versions unpredictable if SizeFGR () != 64.
 652
 653 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 654
 655         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 656         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 657         shifts for that case.
 658
 659 2007-09-04  Nick Clifton  <nickc@redhat.com>
 660
 661         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 662         (display_mem_info): New static variable.
 663         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 664         (mips_options): Add info-memory and memory-info.
 665         (sim_open): After processing the command line and board
 666         specification, check display_mem_info.  If it is set then
 667         call the real handler for the --memory-info command line
 668         switch.
 669
 670 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 671
 672         * configure.ac: Change license of multi-run.c to GPL version 3.
 673         * configure: Regenerate.
 674
 675 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 676
 677         * configure.ac, configure: Revert last patch.
 678
 679 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 680
 681         * configure.ac (sim_mipsisa3264_configs): New variable.
 682         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 683         every configuration support all four targets, using the triplet to
 684         determine the default.
 685         * configure: Regenerate.
 686
 687 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 688
 689         * Makefile.in (m16run.o): New rule.
 690
 691 2007-05-15  Thiemo Seufer  <ths@mips.com>
 692
 693         * mips3264r2.igen (DSHD): Fix compile warning.
 694
 695 2007-05-14  Thiemo Seufer  <ths@mips.com>
 696
 697         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 698         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 699         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 700         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 701         for mips32r2.
 702
 703 2007-03-01  Thiemo Seufer  <ths@mips.com>
 704
 705         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 706         and mips64.
 707
 708 2007-02-20  Thiemo Seufer  <ths@mips.com>
 709
 710         * dsp.igen: Update copyright notice.
 711         * dsp2.igen: Fix copyright notice.
 712
 713 2007-02-20  Thiemo Seufer  <ths@mips.com>
 714             Chao-Ying Fu  <fu@mips.com>
 715
 716         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 717         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 718         Add dsp2 to sim_igen_machine.
 719         * configure: Regenerate.
 720         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 721         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 722         (mulq_rs.ph): Use do_ph_mulq.
 723         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 724         * mips.igen: Add dsp2 model and include dsp2.igen.
 725         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 726         for *mips32r2, *mips64r2, *dsp.
 727         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 728         for *mips32r2, *mips64r2, *dsp2.
 729         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 730
 731 2007-02-19  Thiemo Seufer  <ths@mips.com>
 732             Nigel Stephens  <nigel@mips.com>
 733
 734         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 735         jumps with hazard barrier.
 736
 737 2007-02-19  Thiemo Seufer  <ths@mips.com>
 738             Nigel Stephens  <nigel@mips.com>
 739
 740         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 741         after each call to sim_io_write.
 742
 743 2007-02-19  Thiemo Seufer  <ths@mips.com>
 744             Nigel Stephens  <nigel@mips.com>
 745
 746         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 747         supported by this simulator.
 748         (decode_coproc): Recognise additional CP0 Config registers
 749         correctly.
 750
 751 2007-02-19  Thiemo Seufer  <ths@mips.com>
 752             Nigel Stephens  <nigel@mips.com>
 753             David Ung  <davidu@mips.com>
 754
 755         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 756         uninterpreted formats. If fmt is one of the uninterpreted types
 757         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 758         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 759         (store_fpr): When writing an invalid odd register, set the
 760         matching even register to fmt_unknown, not the following register.
 761         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 762         the the memory window at offset 0 set by --memory-size command
 763         line option.
 764         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 765         point register.
 766         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 767         register.
 768         (sim_monitor): When returning the memory size to the MIPS
 769         application, use the value in STATE_MEM_SIZE, not an arbitrary
 770         hardcoded value.
 771         (cop_lw): Don' mess around with FPR_STATE, just pass
 772         fmt_uninterpreted_32 to StoreFPR.
 773         (cop_sw): Similarly.
 774         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 775         (cop_sd): Similarly.
 776         * mips.igen (not_word_value): Single version for mips32, mips64
 777         and mips16.
 778
 779 2007-02-19  Thiemo Seufer <ths@mips.com>
 780             Nigel Stephens  <nigel@mips.com>
 781
 782         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 783         MBytes.
 784
 785 2007-02-17  Thiemo Seufer  <ths@mips.com>
 786
 787         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 788         configuration.
 789         * configure: Regenerate.
 790
 791 2007-02-17  Thiemo Seufer  <ths@mips.com>
 792
 793         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 794         Add mdmx to sim_igen_machine.
 795         (mipsisa64*-*-*): Likewise. Remove dsp.
 796         (mipsisa32*-*-*): Remove dsp.
 797         * configure: Regenerate.
 798
 799 2007-02-13  Thiemo Seufer  <ths@mips.com>
 800
 801         * configure.ac: Add mips*-sde-elf* target.
 802         * configure: Regenerate.
 803
 804 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 805
 806         * acconfig.h: Remove.
 807         * config.in, configure: Regenerate.
 808
 809 2006-11-07  Thiemo Seufer  <ths@mips.com>
 810
 811         * dsp.igen (do_w_op): Fix compiler warning.
 812
 813 2006-08-29  Thiemo Seufer  <ths@mips.com>
 814             David Ung  <davidu@mips.com>
 815
 816         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 817         sim_igen_machine.
 818         * configure: Regenerate.
 819         * mips.igen (model): Add smartmips.
 820         (MADDU): Increment ACX if carry.
 821         (do_mult): Clear ACX.
 822         (ROR,RORV): Add smartmips.
 823         (include): Include smartmips.igen.
 824         * sim-main.h (ACX): Set to REGISTERS[89].
 825         * smartmips.igen: New file.
 826
 827 2006-08-29  Thiemo Seufer  <ths@mips.com>
 828             David Ung  <davidu@mips.com>
 829
 830         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 831         mips3264r2.igen. Add missing dependency rules.
 832         * m16e.igen: Support for mips16e save/restore instructions.
 833
 834 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 835
 836         * configure: Regenerated.
 837
 838 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 839
 840         * configure: Regenerated.
 841
 842 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 843
 844         * configure: Regenerated.
 845
 846 2006-05-15 Chao-ying Fu  <fu@mips.com>
 847
 848         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 849
 850 2006-04-18  Nick Clifton  <nickc@redhat.com>
 851
 852         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 853         statement.
 854
 855 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 856
 857         * configure: Regenerate.
 858
 859 2005-12-14  Chao-ying Fu  <fu@mips.com>
 860
 861         * Makefile.in (SIM_OBJS): Add dsp.o.
 862         (dsp.o): New dependency.
 863         (IGEN_INCLUDE): Add dsp.igen.
 864         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 865         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 866         * configure: Regenerate.
 867         * mips.igen: Add dsp model and include dsp.igen.
 868         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 869         because these instructions are extended in DSP ASE.
 870         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 871         adding 6 DSP accumulator registers and 1 DSP control register.
 872         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 873         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 874         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 875         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 876         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 877         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 878         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 879         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 880         DSPCR_CCOND_SMASK): New define.
 881         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 882         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 883
 884 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 885
 886         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 887
 888 2005-06-16  David Ung  <davidu@mips.com>
 889             Nigel Stephens  <nigel@mips.com>
 890
 891         * mips.igen: New mips16e model and include m16e.igen.
 892         (check_u64): Add mips16e tag.
 893         * m16e.igen: New file for MIPS16e instructions.
 894         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 895         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 896         models.
 897         * configure: Regenerate.
 898
 899 2005-05-26  David Ung  <davidu@mips.com>
 900
 901         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 902         tags to all instructions which are applicable to the new ISAs.
 903         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 904         vr.igen.
 905         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 906         instructions.
 907         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 908         to mips.igen.
 909         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 910         * configure: Regenerate.
 911
 912 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 913
 914         * configure: Regenerate.
 915
 916 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 917
 918         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 919         explicit call to AC_CONFIG_HEADER.
 920         * configure: Regenerate.
 921
 922 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 923
 924         * configure.ac: Update to use ../common/common.m4.
 925         * configure: Re-generate.
 926
 927 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 928
 929         * configure: Regenerated to track ../common/aclocal.m4 changes.
 930
 931 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 932
 933         * configure.ac: Rename configure.in, require autoconf 2.59.
 934         * configure: Re-generate.
 935
 936 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 937
 938         * configure: Regenerate for ../common/aclocal.m4 update.
 939
 940 2004-09-24  Monika Chaddha  <monika@acmet.com>
 941
 942         Committed by Andrew Cagney.
 943         * m16.igen (CMP, CMPI): Fix assembler.
 944
 945 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 946
 947         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 948         * configure: Regenerate.
 949
 950 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 951
 952         * configure.in (sim_m16_machine): Include mipsIII.
 953         * configure: Regenerate.
 954
 955 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 956
 957         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 958         from COP0_BADVADDR.
 959         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 960
 961 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 962
 963         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 964
 965 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 966
 967         * mips.igen (check_fmt): Remove.
 968         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 969         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 970         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 971         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 972         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 973         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 974         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 975         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 976         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 977         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 978
 979 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 980
 981         * sb1.igen (check_sbx): New function.
 982         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 983
 984 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 985             Richard Sandiford  <rsandifo@redhat.com>
 986
 987         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 988         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 989         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 990         separate implementations for mipsIV and mipsV.  Use new macros to
 991         determine whether the restrictions apply.
 992
 993 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 994
 995         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 996         (check_mult_hilo): Improve comments.
 997         (check_div_hilo): Likewise.  Also, fork off a new version
 998         to handle mips32/mips64 (since there are no hazards to check
 999         in MIPS32/MIPS64).
1000
1001 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
1002
1003         * mips.igen (do_dmultx): Fix check for negative operands.
1004
1005 2003-05-16  Ian Lance Taylor  <ian@airs.com>
1006
1007         * Makefile.in (SHELL): Make sure this is defined.
1008         (various): Use $(SHELL) whenever we invoke move-if-change.
1009
1010 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
1011
1012         * cp1.c: Tweak attribution slightly.
1013         * cp1.h: Likewise.
1014         * mdmx.c: Likewise.
1015         * mdmx.igen: Likewise.
1016         * mips3d.igen: Likewise.
1017         * sb1.igen: Likewise.
1018
1019 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1020
1021         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1022         unsigned operands.
1023
1024 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1025
1026         * interp.c (sim_open): Rename _bfd to bfd.
1027         (sim_create_inferior): Ditto.
1028
1029 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1030
1031         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1032
1033 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1034
1035         * mips.igen (EI, DI): Remove.
1036
1037 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1038
1039         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1040
1041 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1042             Andrew Cagney  <ac131313@redhat.com>
1043             Gavin Romig-Koch  <gavin@redhat.com>
1044             Graydon Hoare  <graydon@redhat.com>
1045             Aldy Hernandez  <aldyh@redhat.com>
1046             Dave Brolley  <brolley@redhat.com>
1047             Chris Demetriou  <cgd@broadcom.com>
1048
1049         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1050         (sim_mach_default): New variable.
1051         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1052         Add a new simulator generator, MULTI.
1053         * configure: Regenerate.
1054         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1055         (multi-run.o): New dependency.
1056         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1057         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1058         (tmp-multi): Combine them.
1059         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1060         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1061         (distclean-extra): New rule.
1062         * sim-main.h: Include bfd.h.
1063         (MIPS_MACH): New macro.
1064         * mips.igen (vr4120, vr5400, vr5500): New models.
1065         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1066         * vr.igen: Replace with new version.
1067
1068 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1069
1070         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1071         * configure: Regenerate.
1072
1073 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1074
1075         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1076         * mips.igen: Remove all invocations of check_branch_bug and
1077         mark_branch_bug.
1078
1079 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1080
1081         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1082
1083 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1084
1085         * mips.igen (do_load_double, do_store_double): New functions.
1086         (LDC1, SDC1): Rename to...
1087         (LDC1b, SDC1b): respectively.
1088         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1089
1090 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1091
1092         * cp1.c (fp_recip2): Modify initialization expression so that
1093         GCC will recognize it as constant.
1094
1095 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1096
1097         * mdmx.c (SD_): Delete.
1098         (Unpredictable): Re-define, for now, to directly invoke
1099         unpredictable_action().
1100         (mdmx_acc_op): Fix error in .ob immediate handling.
1101
1102 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1103
1104         * interp.c (sim_firmware_command): Initialize `address'.
1105
1106 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1107
1108         * configure: Regenerated to track ../common/aclocal.m4 changes.
1109
1110 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1111             Ed Satterthwaite  <ehs@broadcom.com>
1112
1113         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1114         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1115         * mips.igen: Include mips3d.igen.
1116         (mips3d): New model name for MIPS-3D ASE instructions.
1117         (CVT.W.fmt): Don't use this instruction for word (source) format
1118         instructions.
1119         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1120         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1121         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1122         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1123         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1124         (RSquareRoot1, RSquareRoot2): New macros.
1125         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1126         (fp_rsqrt2): New functions.
1127         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1128         * configure: Regenerate.
1129
1130 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1131             Ed Satterthwaite  <ehs@broadcom.com>
1132
1133         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1134         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1135         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1136         (convert): Note that this function is not used for paired-single
1137         format conversions.
1138         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1139         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1140         (check_fmt_p): Enable paired-single support.
1141         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1142         (PUU.PS): New instructions.
1143         (CVT.S.fmt): Don't use this instruction for paired-single format
1144         destinations.
1145         * sim-main.h (FP_formats): New value 'fmt_ps.'
1146         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1147         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1148
1149 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1150
1151         * mips.igen: Fix formatting of function calls in
1152         many FP operations.
1153
1154 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1155
1156         * mips.igen (MOVN, MOVZ): Trace result.
1157         (TNEI): Print "tnei" as the opcode name in traces.
1158         (CEIL.W): Add disassembly string for traces.
1159         (RSQRT.fmt): Make location of disassembly string consistent
1160         with other instructions.
1161
1162 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1163
1164         * mips.igen (X): Delete unused function.
1165
1166 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1167
1168         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1169
1170 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1171             Ed Satterthwaite  <ehs@broadcom.com>
1172
1173         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1174         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1175         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1176         (fp_nmsub): New prototypes.
1177         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1178         (NegMultiplySub): New defines.
1179         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1180         (MADD.D, MADD.S): Replace with...
1181         (MADD.fmt): New instruction.
1182         (MSUB.D, MSUB.S): Replace with...
1183         (MSUB.fmt): New instruction.
1184         (NMADD.D, NMADD.S): Replace with...
1185         (NMADD.fmt): New instruction.
1186         (NMSUB.D, MSUB.S): Replace with...
1187         (NMSUB.fmt): New instruction.
1188
1189 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1190             Ed Satterthwaite  <ehs@broadcom.com>
1191
1192         * cp1.c: Fix more comment spelling and formatting.
1193         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1194         (denorm_mode): New function.
1195         (fpu_unary, fpu_binary): Round results after operation, collect
1196         status from rounding operations, and update the FCSR.
1197         (convert): Collect status from integer conversions and rounding
1198         operations, and update the FCSR.  Adjust NaN values that result
1199         from conversions.  Convert to use sim_io_eprintf rather than
1200         fprintf, and remove some debugging code.
1201         * cp1.h (fenr_FS): New define.
1202
1203 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1204
1205         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1206         rounding mode to sim FP rounding mode flag conversion code into...
1207         (rounding_mode): New function.
1208
1209 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1210
1211         * cp1.c: Clean up formatting of a few comments.
1212         (value_fpr): Reformat switch statement.
1213
1214 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1215             Ed Satterthwaite  <ehs@broadcom.com>
1216
1217         * cp1.h: New file.
1218         * sim-main.h: Include cp1.h.
1219         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1220         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1221         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1222         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1223         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1224         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1225         * cp1.c: Don't include sim-fpu.h; already included by
1226         sim-main.h.  Clean up formatting of some comments.
1227         (NaN, Equal, Less): Remove.
1228         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1229         (fp_cmp): New functions.
1230         * mips.igen (do_c_cond_fmt): Remove.
1231         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1232         Compare.  Add result tracing.
1233         (CxC1): Remove, replace with...
1234         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1235         (DMxC1): Remove, replace with...
1236         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1237         (MxC1): Remove, replace with...
1238         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1239
1240 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1241
1242         * sim-main.h (FGRIDX): Remove, replace all uses with...
1243         (FGR_BASE): New macro.
1244         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1245         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1246         (NR_FGR, FGR): Likewise.
1247         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1248         * mips.igen: Likewise.
1249
1250 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1251
1252         * cp1.c: Add an FSF Copyright notice to this file.
1253
1254 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1255             Ed Satterthwaite  <ehs@broadcom.com>
1256
1257         * cp1.c (Infinity): Remove.
1258         * sim-main.h (Infinity): Likewise.
1259
1260         * cp1.c (fp_unary, fp_binary): New functions.
1261         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1262         (fp_sqrt): New functions, implemented in terms of the above.
1263         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1264         (Recip, SquareRoot): Remove (replaced by functions above).
1265         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1266         (fp_recip, fp_sqrt): New prototypes.
1267         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1268         (Recip, SquareRoot): Replace prototypes with #defines which
1269         invoke the functions above.
1270
1271 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1272
1273         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1274         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1275         file, remove PARAMS from prototypes.
1276         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1277         simulator state arguments.
1278         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1279         pass simulator state arguments.
1280         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1281         (store_fpr, convert): Remove 'sd' argument.
1282         (value_fpr): Likewise.  Convert to use 'SD' instead.
1283
1284 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1285
1286         * cp1.c (Min, Max): Remove #if 0'd functions.
1287         * sim-main.h (Min, Max): Remove.
1288
1289 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1290
1291         * cp1.c: fix formatting of switch case and default labels.
1292         * interp.c: Likewise.
1293         * sim-main.c: Likewise.
1294
1295 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1296
1297         * cp1.c: Clean up comments which describe FP formats.
1298          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1299
1300 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1301             Ed Satterthwaite  <ehs@broadcom.com>
1302
1303         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1304         Broadcom SiByte SB-1 processor configurations.
1305         * configure: Regenerate.
1306         * sb1.igen: New file.
1307         * mips.igen: Include sb1.igen.
1308         (sb1): New model.
1309         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1310         * mdmx.igen: Add "sb1" model to all appropriate functions and
1311         instructions.
1312         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1313         (ob_func, ob_acc): Reference the above.
1314         (qh_acc): Adjust to keep the same size as ob_acc.
1315         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1316         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1317
1318 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1319
1320         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1321
1322 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1323             Ed Satterthwaite  <ehs@broadcom.com>
1324
1325         * mips.igen (mdmx): New (pseudo-)model.
1326         * mdmx.c, mdmx.igen: New files.
1327         * Makefile.in (SIM_OBJS): Add mdmx.o.
1328         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1329         New typedefs.
1330         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1331         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1332         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1333         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1334         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1335         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1336         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1337         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1338         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1339         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1340         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1341         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1342         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1343         (qh_fmtsel): New macros.
1344         (_sim_cpu): New member "acc".
1345         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1346         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1347
1348 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1349
1350         * interp.c: Use 'deprecated' rather than 'depreciated.'
1351         * sim-main.h: Likewise.
1352
1353 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1354
1355         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1356         which wouldn't compile anyway.
1357         * sim-main.h (unpredictable_action): New function prototype.
1358         (Unpredictable): Define to call igen function unpredictable().
1359         (NotWordValue): New macro to call igen function not_word_value().
1360         (UndefinedResult): Remove.
1361         * interp.c (undefined_result): Remove.
1362         (unpredictable_action): New function.
1363         * mips.igen (not_word_value, unpredictable): New functions.
1364         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1365         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1366         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1367         NotWordValue() to check for unpredictable inputs, then
1368         Unpredictable() to handle them.
1369
1370 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1371
1372         * mips.igen: Fix formatting of calls to Unpredictable().
1373
1374 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1375
1376         * interp.c (sim_open): Revert previous change.
1377
1378 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1379
1380         * interp.c (sim_open): Disable chunk of code that wrote code in
1381         vector table entries.
1382
1383 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1384
1385         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1386         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1387         unused definitions.
1388
1389 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1390
1391         * cp1.c: Fix many formatting issues.
1392
1393 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1394
1395         * cp1.c (fpu_format_name): New function to replace...
1396         (DOFMT): This.  Delete, and update all callers.
1397         (fpu_rounding_mode_name): New function to replace...
1398         (RMMODE): This.  Delete, and update all callers.
1399
1400 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1401
1402         * interp.c: Move FPU support routines from here to...
1403         * cp1.c: Here.  New file.
1404         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1405         (cp1.o): New target.
1406
1407 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1408
1409         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1410         * mips.igen (mips32, mips64): New models, add to all instructions
1411         and functions as appropriate.
1412         (loadstore_ea, check_u64): New variant for model mips64.
1413         (check_fmt_p): New variant for models mipsV and mips64, remove
1414         mipsV model marking fro other variant.
1415         (SLL) Rename to...
1416         (SLLa) this.
1417         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1418         for mips32 and mips64.
1419         (DCLO, DCLZ): New instructions for mips64.
1420
1421 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1422
1423         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1424         immediate or code as a hex value with the "%#lx" format.
1425         (ANDI): Likewise, and fix printed instruction name.
1426
1427 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1428
1429         * sim-main.h (UndefinedResult, Unpredictable): New macros
1430         which currently do nothing.
1431
1432 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1433
1434         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1435         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1436         (status_CU3): New definitions.
1437
1438         * sim-main.h (ExceptionCause): Add new values for MIPS32
1439         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1440         for DebugBreakPoint and NMIReset to note their status in
1441         MIPS32 and MIPS64.
1442         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1443         (SignalExceptionCacheErr): New exception macros.
1444
1445 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1446
1447         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1448         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1449         is always enabled.
1450         (SignalExceptionCoProcessorUnusable): Take as argument the
1451         unusable coprocessor number.
1452
1453 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1454
1455         * mips.igen: Fix formatting of all SignalException calls.
1456
1457 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1458
1459         * sim-main.h (SIGNEXTEND): Remove.
1460
1461 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1462
1463         * mips.igen: Remove gencode comment from top of file, fix
1464         spelling in another comment.
1465
1466 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1467
1468         * mips.igen (check_fmt, check_fmt_p): New functions to check
1469         whether specific floating point formats are usable.
1470         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1471         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1472         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1473         Use the new functions.
1474         (do_c_cond_fmt): Remove format checks...
1475         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1476
1477 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1478
1479         * mips.igen: Fix formatting of check_fpu calls.
1480
1481 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1482
1483         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1484
1485 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1486
1487         * mips.igen: Remove whitespace at end of lines.
1488
1489 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1490
1491         * mips.igen (loadstore_ea): New function to do effective
1492         address calculations.
1493         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1494         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1495         CACHE): Use loadstore_ea to do effective address computations.
1496
1497 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1498
1499         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1500         * mips.igen (LL, CxC1, MxC1): Likewise.
1501
1502 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1503
1504         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1505         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1506         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1507         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1508         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1509         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1510         Don't split opcode fields by hand, use the opcode field values
1511         provided by igen.
1512
1513 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1514
1515         * mips.igen (do_divu): Fix spacing.
1516
1517         * mips.igen (do_dsllv): Move to be right before DSLLV,
1518         to match the rest of the do_<shift> functions.
1519
1520 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1521
1522         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1523         DSRL32, do_dsrlv): Trace inputs and results.
1524
1525 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1526
1527         * mips.igen (CACHE): Provide instruction-printing string.
1528
1529         * interp.c (signal_exception): Comment tokens after #endif.
1530
1531 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1532
1533         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1534         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1535         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1536         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1537         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1538         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1539         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1540         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1541
1542 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1543
1544         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1545         instruction-printing string.
1546         (LWU): Use '64' as the filter flag.
1547
1548 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1549
1550         * mips.igen (SDXC1): Fix instruction-printing string.
1551
1552 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1553
1554         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1555         filter flags "32,f".
1556
1557 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1558
1559         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1560         as the filter flag.
1561
1562 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1563
1564         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1565         add a comma) so that it more closely match the MIPS ISA
1566         documentation opcode partitioning.
1567         (PREF): Put useful names on opcode fields, and include
1568         instruction-printing string.
1569
1570 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1571
1572         * mips.igen (check_u64): New function which in the future will
1573         check whether 64-bit instructions are usable and signal an
1574         exception if not.  Currently a no-op.
1575         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1576         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1577         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1578         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1579
1580         * mips.igen (check_fpu): New function which in the future will
1581         check whether FPU instructions are usable and signal an exception
1582         if not.  Currently a no-op.
1583         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1584         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1585         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1586         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1587         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1588         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1589         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1590         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1591
1592 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1593
1594         * mips.igen (do_load_left, do_load_right): Move to be immediately
1595         following do_load.
1596         (do_store_left, do_store_right): Move to be immediately following
1597         do_store.
1598
1599 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1600
1601         * mips.igen (mipsV): New model name.  Also, add it to
1602         all instructions and functions where it is appropriate.
1603
1604 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1605
1606         * mips.igen: For all functions and instructions, list model
1607         names that support that instruction one per line.
1608
1609 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1610
1611         * mips.igen: Add some additional comments about supported
1612         models, and about which instructions go where.
1613         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1614         order as is used in the rest of the file.
1615
1616 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1617
1618         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1619         indicating that ALU32_END or ALU64_END are there to check
1620         for overflow.
1621         (DADD): Likewise, but also remove previous comment about
1622         overflow checking.
1623
1624 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1625
1626         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1627         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1628         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1629         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1630         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1631         fields (i.e., add and move commas) so that they more closely
1632         match the MIPS ISA documentation opcode partitioning.
1633
1634 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1635
1636         * mips.igen (ADDI): Print immediate value.
1637         (BREAK): Print code.
1638         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1639         (SLL): Print "nop" specially, and don't run the code
1640         that does the shift for the "nop" case.
1641
1642 2001-11-17  Fred Fish  <fnf@redhat.com>
1643
1644         * sim-main.h (float_operation): Move enum declaration outside
1645         of _sim_cpu struct declaration.
1646
1647 2001-04-12  Jim Blandy  <jimb@redhat.com>
1648
1649         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1650         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1651         set of the FCSR.
1652         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1653         PENDING_FILL, and you can get the intended effect gracefully by
1654         calling PENDING_SCHED directly.
1655
1656 2001-02-23  Ben Elliston  <bje@redhat.com>
1657
1658         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1659         already defined elsewhere.
1660
1661 2001-02-19  Ben Elliston  <bje@redhat.com>
1662
1663         * sim-main.h (sim_monitor): Return an int.
1664         * interp.c (sim_monitor): Add return values.
1665         (signal_exception): Handle error conditions from sim_monitor.
1666
1667 2001-02-08  Ben Elliston  <bje@redhat.com>
1668
1669         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1670         (store_memory): Likewise, pass cia to sim_core_write*.
1671
1672 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1673
1674         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1675         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1676
1677 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1678
1679         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1680         * Makefile.in: Don't delete *.igen when cleaning directory.
1681
1682 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1683
1684         * m16.igen (break): Call SignalException not sim_engine_halt.
1685
1686 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1687
1688         From Jason Eckhardt:
1689         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1690
1691 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1692
1693         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1694
1695 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1696
1697         * mips.igen (do_dmultx): Fix typo.
1698
1699 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1700
1701         * configure: Regenerated to track ../common/aclocal.m4 changes.
1702
1703 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1704
1705         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1706
1707 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1708
1709         * sim-main.h (GPR_CLEAR): Define macro.
1710
1711 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1712
1713         * interp.c (decode_coproc): Output long using %lx and not %s.
1714
1715 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1716
1717         * interp.c (sim_open): Sort & extend dummy memory regions for
1718         --board=jmr3904 for eCos.
1719
1720 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1721
1722         * configure: Regenerated.
1723
1724 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1725
1726         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1727         calls, conditional on the simulator being in verbose mode.
1728
1729 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1730
1731         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1732         cache don't get ReservedInstruction traps.
1733
1734 1999-11-29  Mark Salter  <msalter@cygnus.com>
1735
1736         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1737         to clear status bits in sdisr register. This is how the hardware works.
1738
1739         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1740         being used by cygmon.
1741
1742 1999-11-11  Andrew Haley  <aph@cygnus.com>
1743
1744         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1745         instructions.
1746
1747 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1748
1749         * mips.igen (MULT): Correct previous mis-applied patch.
1750
1751 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1752
1753         * mips.igen (delayslot32): Handle sequence like
1754         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1755         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1756         (MULT): Actually pass the third register...
1757
1758 1999-09-03  Mark Salter  <msalter@cygnus.com>
1759
1760         * interp.c (sim_open): Added more memory aliases for additional
1761         hardware being touched by cygmon on jmr3904 board.
1762
1763 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1764
1765         * configure: Regenerated to track ../common/aclocal.m4 changes.
1766
1767 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1768
1769         * interp.c (sim_store_register): Handle case where client - GDB -
1770         specifies that a 4 byte register is 8 bytes in size.
1771         (sim_fetch_register): Ditto.
1772
1773 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1774
1775         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1776         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1777         (idt_monitor_base): Base address for IDT monitor traps.
1778         (pmon_monitor_base): Ditto for PMON.
1779         (lsipmon_monitor_base): Ditto for LSI PMON.
1780         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1781         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1782         (sim_firmware_command): New function.
1783         (mips_option_handler): Call it for OPTION_FIRMWARE.
1784         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1785         option was given, add no monitor by default.  Add BREAK hooks only if
1786         monitors are also there.
1787
1788 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1789
1790         * interp.c (sim_monitor): Flush output before reading input.
1791
1792 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1793
1794         * tconfig.in (SIM_HANDLES_LMA): Always define.
1795
1796 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1797
1798         From Mark Salter <msalter@cygnus.com>:
1799         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1800         (sim_open): Add setup for BSP board.
1801
1802 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1803
1804         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1805         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1806         them as unimplemented.
1807
1808 1999-05-08  Felix Lee  <flee@cygnus.com>
1809
1810         * configure: Regenerated to track ../common/aclocal.m4 changes.
1811
1812 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1813
1814         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1815
1816 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1817
1818         * configure.in: Any mips64vr5*-*-* target should have
1819         -DTARGET_ENABLE_FR=1.
1820         (default_endian): Any mips64vr*el-*-* target should default to
1821         LITTLE_ENDIAN.
1822         * configure: Re-generate.
1823
1824 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1825
1826         * mips.igen (ldl): Extend from _16_, not 32.
1827
1828 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1829
1830         * interp.c (sim_store_register): Force registers written to by GDB
1831         into an un-interpreted state.
1832
1833 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1834
1835         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1836         CPU, start periodic background I/O polls.
1837         (tx3904sio_poll): New function: periodic I/O poller.
1838
1839 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1840
1841         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1842
1843 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1844
1845         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1846         case statement.
1847
1848 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1849
1850         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1851         (load_word): Call SIM_CORE_SIGNAL hook on error.
1852         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1853         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1854         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1855         * sim-main.h (COP0_BADVADDR): Define.
1856         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1857         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1858         (_sim_cpu): Add exc_* fields to store register value snapshots.
1859         * mips.igen (*): Replace memory-related SignalException* calls
1860         with references to SIM_CORE_SIGNAL hook.
1861
1862         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1863         fix.
1864         * sim-main.c (*): Minor warning cleanups.
1865
1866 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1867
1868         * m16.igen (DADDIU5): Correct type-o.
1869
1870 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1871
1872         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1873         variables.
1874
1875 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1876
1877         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1878         to include path.
1879         (interp.o): Add dependency on itable.h
1880         (oengine.c, gencode): Delete remaining references.
1881         (BUILT_SRC_FROM_GEN): Clean up.
1882
1883 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1884
1885         * vr4run.c: New.
1886         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1887         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1888         tmp-run-hack) : New.
1889         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1890         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1891         Drop the "64" qualifier to get the HACK generator working.
1892         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1893         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1894         qualifier to get the hack generator working.
1895         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1896         (DSLL): Use do_dsll.
1897         (DSLLV): Use do_dsllv.
1898         (DSRA): Use do_dsra.
1899         (DSRL): Use do_dsrl.
1900         (DSRLV): Use do_dsrlv.
1901         (BC1): Move *vr4100 to get the HACK generator working.
1902         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1903         get the HACK generator working.
1904         (MACC) Rename to get the HACK generator working.
1905         (DMACC,MACCS,DMACCS): Add the 64.
1906
1907 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1908
1909         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1910         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1911
1912 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1913
1914     * mips/interp.c (DEBUG): Cleanups.
1915
1916 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1917
1918         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1919         (tx3904sio_tickle): fflush after a stdout character output.
1920
1921 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1922
1923         * interp.c (sim_close): Uninstall modules.
1924
1925 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1926
1927         * sim-main.h, interp.c (sim_monitor): Change to global
1928         function.
1929
1930 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1931
1932         * configure.in (vr4100): Only include vr4100 instructions in
1933         simulator.
1934         * configure: Re-generate.
1935         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1936
1937 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1938
1939         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1940         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1941         true alternative.
1942
1943         * configure.in (sim_default_gen, sim_use_gen): Replace with
1944         sim_gen.
1945         (--enable-sim-igen): Delete config option. Always using IGEN.
1946         * configure: Re-generate.
1947
1948         * Makefile.in (gencode): Kill, kill, kill.
1949         * gencode.c: Ditto.
1950
1951 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1952
1953         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1954         bit mips16 igen simulator.
1955         * configure: Re-generate.
1956
1957         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1958         as part of vr4100 ISA.
1959         * vr.igen: Mark all instructions as 64 bit only.
1960
1961 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1962
1963         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1964         Pacify GCC.
1965
1966 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1967
1968         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1969         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1970         * configure: Re-generate.
1971
1972         * m16.igen (BREAK): Define breakpoint instruction.
1973         (JALX32): Mark instruction as mips16 and not r3900.
1974         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1975
1976         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1977
1978 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1979
1980         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1981         insn as a debug breakpoint.
1982
1983         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1984         pending.slot_size.
1985         (PENDING_SCHED): Clean up trace statement.
1986         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1987         (PENDING_FILL): Delay write by only one cycle.
1988         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1989
1990         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1991         of pending writes.
1992         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1993         32 & 64.
1994         (pending_tick): Move incrementing of index to FOR statement.
1995         (pending_tick): Only update PENDING_OUT after a write has occured.
1996
1997         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1998         build simulator.
1999         * configure: Re-generate.
2000
2001         * interp.c (sim_engine_run OLD): Delete explicit call to
2002         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2003
2004 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
2005
2006         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2007         interrupt level number to match changed SignalExceptionInterrupt
2008         macro.
2009
2010 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
2011
2012         * interp.c: #include "itable.h" if WITH_IGEN.
2013         (get_insn_name): New function.
2014         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2015         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2016
2017 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2018
2019         * configure: Rebuilt to inhale new common/aclocal.m4.
2020
2021 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2022
2023         * dv-tx3904sio.c: Include sim-assert.h.
2024
2025 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2026
2027         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2028         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2029         Reorganize target-specific sim-hardware checks.
2030         * configure: rebuilt.
2031         * interp.c (sim_open): For tx39 target boards, set
2032         OPERATING_ENVIRONMENT, add tx3904sio devices.
2033         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2034         ROM executables.  Install dv-sockser into sim-modules list.
2035
2036         * dv-tx3904irc.c: Compiler warning clean-up.
2037         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2038         frequent hw-trace messages.
2039
2040 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2041
2042         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2043
2044 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2045
2046         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2047
2048         * vr.igen: New file.
2049         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2050         * mips.igen: Define vr4100 model. Include vr.igen.
2051 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2052
2053         * mips.igen (check_mf_hilo): Correct check.
2054
2055 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2056
2057         * sim-main.h (interrupt_event): Add prototype.
2058
2059         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2060         register_ptr, register_value.
2061         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2062
2063         * sim-main.h (tracefh): Make extern.
2064
2065 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2066
2067         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2068         Reduce unnecessarily high timer event frequency.
2069         * dv-tx3904cpu.c: Ditto for interrupt event.
2070
2071 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2072
2073         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2074         to allay warnings.
2075         (interrupt_event): Made non-static.
2076
2077         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2078         interchange of configuration values for external vs. internal
2079         clock dividers.
2080
2081 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2082
2083         * mips.igen (BREAK): Moved code to here for
2084         simulator-reserved break instructions.
2085         * gencode.c (build_instruction): Ditto.
2086         * interp.c (signal_exception): Code moved from here.  Non-
2087         reserved instructions now use exception vector, rather
2088         than halting sim.
2089         * sim-main.h: Moved magic constants to here.
2090
2091 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2092
2093         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2094         register upon non-zero interrupt event level, clear upon zero
2095         event value.
2096         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2097         by passing zero event value.
2098         (*_io_{read,write}_buffer): Endianness fixes.
2099         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2100         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2101
2102         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2103         serial I/O and timer module at base address 0xFFFF0000.
2104
2105 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2106
2107         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2108         and BigEndianCPU.
2109
2110 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2111
2112         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2113         parts.
2114         * configure: Update.
2115
2116 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2117
2118         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2119         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2120         * configure.in: Include tx3904tmr in hw_device list.
2121         * configure: Rebuilt.
2122         * interp.c (sim_open): Instantiate three timer instances.
2123         Fix address typo of tx3904irc instance.
2124
2125 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2126
2127         * interp.c (signal_exception): SystemCall exception now uses
2128         the exception vector.
2129
2130 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2131
2132         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2133         to allay warnings.
2134
2135 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2136
2137         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2138
2139 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2140
2141         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2142
2143         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2144         sim-main.h. Declare a struct hw_descriptor instead of struct
2145         hw_device_descriptor.
2146
2147 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2148
2149         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2150         right bits and then re-align left hand bytes to correct byte
2151         lanes.  Fix incorrect computation in do_store_left when loading
2152         bytes from second word.
2153
2154 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2155
2156         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2157         * interp.c (sim_open): Only create a device tree when HW is
2158         enabled.
2159
2160         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2161         * interp.c (signal_exception): Ditto.
2162
2163 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2164
2165         * gencode.c: Mark BEGEZALL as LIKELY.
2166
2167 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2168
2169         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2170         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2171
2172 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2173
2174         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2175         modules.  Recognize TX39 target with "mips*tx39" pattern.
2176         * configure: Rebuilt.
2177         * sim-main.h (*): Added many macros defining bits in
2178         TX39 control registers.
2179         (SignalInterrupt): Send actual PC instead of NULL.
2180         (SignalNMIReset): New exception type.
2181         * interp.c (board): New variable for future use to identify
2182         a particular board being simulated.
2183         (mips_option_handler,mips_options): Added "--board" option.
2184         (interrupt_event): Send actual PC.
2185         (sim_open): Make memory layout conditional on board setting.
2186         (signal_exception): Initial implementation of hardware interrupt
2187         handling.  Accept another break instruction variant for simulator
2188         exit.
2189         (decode_coproc): Implement RFE instruction for TX39.
2190         (mips.igen): Decode RFE instruction as such.
2191         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2192         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2193         bbegin to implement memory map.
2194         * dv-tx3904cpu.c: New file.
2195         * dv-tx3904irc.c: New file.
2196
2197 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2198
2199         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2200
2201 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2202
2203         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2204         with calls to check_div_hilo.
2205
2206 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2207
2208         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2209         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2210         Add special r3900 version of do_mult_hilo.
2211         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2212         with calls to check_mult_hilo.
2213         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2214         with calls to check_div_hilo.
2215
2216 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2217
2218         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2219         Document a replacement.
2220
2221 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2222
2223         * interp.c (sim_monitor): Make mon_printf work.
2224
2225 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2226
2227         * sim-main.h (INSN_NAME): New arg `cpu'.
2228
2229 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2230
2231         * configure: Regenerated to track ../common/aclocal.m4 changes.
2232
2233 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2234
2235         * configure: Regenerated to track ../common/aclocal.m4 changes.
2236         * config.in: Ditto.
2237
2238 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2239
2240         * acconfig.h: New file.
2241         * configure.in: Reverted change of Apr 24; use sinclude again.
2242
2243 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2244
2245         * configure: Regenerated to track ../common/aclocal.m4 changes.
2246         * config.in: Ditto.
2247
2248 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2249
2250         * configure.in: Don't call sinclude.
2251
2252 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2253
2254         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2255
2256 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2257
2258         * mips.igen (ERET): Implement.
2259
2260         * interp.c (decode_coproc): Return sign-extended EPC.
2261
2262         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2263
2264         * interp.c (signal_exception): Do not ignore Trap.
2265         (signal_exception): On TRAP, restart at exception address.
2266         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2267         (signal_exception): Update.
2268         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2269         so that TRAP instructions are caught.
2270
2271 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2272
2273         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2274         contains HI/LO access history.
2275         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2276         (HIACCESS, LOACCESS): Delete, replace with
2277         (HIHISTORY, LOHISTORY): New macros.
2278         (CHECKHILO): Delete all, moved to mips.igen
2279
2280         * gencode.c (build_instruction): Do not generate checks for
2281         correct HI/LO register usage.
2282
2283         * interp.c (old_engine_run): Delete checks for correct HI/LO
2284         register usage.
2285
2286         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2287         check_mf_cycles): New functions.
2288         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2289         do_divu, domultx, do_mult, do_multu): Use.
2290
2291         * tx.igen ("madd", "maddu"): Use.
2292
2293 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2294
2295         * mips.igen (DSRAV): Use function do_dsrav.
2296         (SRAV): Use new function do_srav.
2297
2298         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2299         (B): Sign extend 11 bit immediate.
2300         (EXT-B*): Shift 16 bit immediate left by 1.
2301         (ADDIU*): Don't sign extend immediate value.
2302
2303 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2304
2305         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2306
2307         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2308         functions.
2309
2310         * mips.igen (delayslot32, nullify_next_insn): New functions.
2311         (m16.igen): Always include.
2312         (do_*): Add more tracing.
2313
2314         * m16.igen (delayslot16): Add NIA argument, could be called by a
2315         32 bit MIPS16 instruction.
2316
2317         * interp.c (ifetch16): Move function from here.
2318         * sim-main.c (ifetch16): To here.
2319
2320         * sim-main.c (ifetch16, ifetch32): Update to match current
2321         implementations of LH, LW.
2322         (signal_exception): Don't print out incorrect hex value of illegal
2323         instruction.
2324
2325 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2326
2327         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2328         instruction.
2329
2330         * m16.igen: Implement MIPS16 instructions.
2331
2332         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2333         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2334         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2335         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2336         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2337         bodies of corresponding code from 32 bit insn to these.  Also used
2338         by MIPS16 versions of functions.
2339
2340         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2341         (IMEM16): Drop NR argument from macro.
2342
2343 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2344
2345         * Makefile.in (SIM_OBJS): Add sim-main.o.
2346
2347         * sim-main.h (address_translation, load_memory, store_memory,
2348         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2349         as INLINE_SIM_MAIN.
2350         (pr_addr, pr_uword64): Declare.
2351         (sim-main.c): Include when H_REVEALS_MODULE_P.
2352
2353         * interp.c (address_translation, load_memory, store_memory,
2354         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2355         from here.
2356         * sim-main.c: To here. Fix compilation problems.
2357
2358         * configure.in: Enable inlining.
2359         * configure: Re-config.
2360
2361 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2362
2363         * configure: Regenerated to track ../common/aclocal.m4 changes.
2364
2365 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2366
2367         * mips.igen: Include tx.igen.
2368         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2369         * tx.igen: New file, contains MADD and MADDU.
2370
2371         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2372         the hardwired constant `7'.
2373         (store_memory): Ditto.
2374         (LOADDRMASK): Move definition to sim-main.h.
2375
2376         mips.igen (MTC0): Enable for r3900.
2377         (ADDU): Add trace.
2378
2379         mips.igen (do_load_byte): Delete.
2380         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2381         do_store_right): New functions.
2382         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2383
2384         configure.in: Let the tx39 use igen again.
2385         configure: Update.
2386
2387 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2388
2389         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2390         not an address sized quantity.  Return zero for cache sizes.
2391
2392 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2393
2394         * mips.igen (r3900): r3900 does not support 64 bit integer
2395         operations.
2396
2397 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2398
2399         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2400         than igen one.
2401         * configure : Rebuild.
2402
2403 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2404
2405         * configure: Regenerated to track ../common/aclocal.m4 changes.
2406
2407 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2408
2409         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2410
2411 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2412
2413         * configure: Regenerated to track ../common/aclocal.m4 changes.
2414         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2415
2416 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2417
2418         * configure: Regenerated to track ../common/aclocal.m4 changes.
2419
2420 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2421
2422         * interp.c (Max, Min): Comment out functions. Not yet used.
2423
2424 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2425
2426         * configure: Regenerated to track ../common/aclocal.m4 changes.
2427
2428 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2429
2430         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2431         configurable settings for stand-alone simulator.
2432
2433         * configure.in: Added X11 search, just in case.
2434
2435         * configure: Regenerated.
2436
2437 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2438
2439         * interp.c (sim_write, sim_read, load_memory, store_memory):
2440         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2441
2442 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2443
2444         * sim-main.h (GETFCC): Return an unsigned value.
2445
2446 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2447
2448         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2449         (DADD): Result destination is RD not RT.
2450
2451 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2452
2453         * sim-main.h (HIACCESS, LOACCESS): Always define.
2454
2455         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2456
2457         * interp.c (sim_info): Delete.
2458
2459 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2460
2461         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2462         (mips_option_handler): New argument `cpu'.
2463         (sim_open): Update call to sim_add_option_table.
2464
2465 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2466
2467         * mips.igen (CxC1): Add tracing.
2468
2469 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2470
2471         * sim-main.h (Max, Min): Declare.
2472
2473         * interp.c (Max, Min): New functions.
2474
2475         * mips.igen (BC1): Add tracing.
2476
2477 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2478
2479         * interp.c Added memory map for stack in vr4100
2480
2481 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2482
2483         * interp.c (load_memory): Add missing "break"'s.
2484
2485 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2486
2487         * interp.c (sim_store_register, sim_fetch_register): Pass in
2488         length parameter.  Return -1.
2489
2490 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2491
2492         * interp.c: Added hardware init hook, fixed warnings.
2493
2494 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2495
2496         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2497
2498 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2499
2500         * interp.c (ifetch16): New function.
2501
2502         * sim-main.h (IMEM32): Rename IMEM.
2503         (IMEM16_IMMED): Define.
2504         (IMEM16): Define.
2505         (DELAY_SLOT): Update.
2506
2507         * m16run.c (sim_engine_run): New file.
2508
2509         * m16.igen: All instructions except LB.
2510         (LB): Call do_load_byte.
2511         * mips.igen (do_load_byte): New function.
2512         (LB): Call do_load_byte.
2513
2514         * mips.igen: Move spec for insn bit size and high bit from here.
2515         * Makefile.in (tmp-igen, tmp-m16): To here.
2516
2517         * m16.dc: New file, decode mips16 instructions.
2518
2519         * Makefile.in (SIM_NO_ALL): Define.
2520         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2521
2522 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2523
2524         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2525         point unit to 32 bit registers.
2526         * configure: Re-generate.
2527
2528 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2529
2530         * configure.in (sim_use_gen): Make IGEN the default simulator
2531         generator for generic 32 and 64 bit mips targets.
2532         * configure: Re-generate.
2533
2534 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2535
2536         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2537         bitsize.
2538
2539         * interp.c (sim_fetch_register, sim_store_register): Read/write
2540         FGR from correct location.
2541         (sim_open): Set size of FGR's according to
2542         WITH_TARGET_FLOATING_POINT_BITSIZE.
2543
2544         * sim-main.h (FGR): Store floating point registers in a separate
2545         array.
2546
2547 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2548
2549         * configure: Regenerated to track ../common/aclocal.m4 changes.
2550
2551 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2552
2553         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2554
2555         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2556
2557         * interp.c (pending_tick): New function.  Deliver pending writes.
2558
2559         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2560         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2561         it can handle mixed sized quantites and single bits.
2562
2563 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2564
2565         * interp.c (oengine.h): Do not include when building with IGEN.
2566         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2567         (sim_info): Ditto for PROCESSOR_64BIT.
2568         (sim_monitor): Replace ut_reg with unsigned_word.
2569         (*): Ditto for t_reg.
2570         (LOADDRMASK): Define.
2571         (sim_open): Remove defunct check that host FP is IEEE compliant,
2572         using software to emulate floating point.
2573         (value_fpr, ...): Always compile, was conditional on HASFPU.
2574
2575 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2576
2577         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2578         size.
2579
2580         * interp.c (SD, CPU): Define.
2581         (mips_option_handler): Set flags in each CPU.
2582         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2583         (sim_close): Do not clear STATE, deleted anyway.
2584         (sim_write, sim_read): Assume CPU zero's vm should be used for
2585         data transfers.
2586         (sim_create_inferior): Set the PC for all processors.
2587         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2588         argument.
2589         (mips16_entry): Pass correct nr of args to store_word, load_word.
2590         (ColdReset): Cold reset all cpu's.
2591         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2592         (sim_monitor, load_memory, store_memory, signal_exception): Use
2593         `CPU' instead of STATE_CPU.
2594
2595
2596         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2597         SD or CPU_.
2598
2599         * sim-main.h (signal_exception): Add sim_cpu arg.
2600         (SignalException*): Pass both SD and CPU to signal_exception.
2601         * interp.c (signal_exception): Update.
2602
2603         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2604         Ditto
2605         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2606         address_translation): Ditto
2607         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2608
2609 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2610
2611         * configure: Regenerated to track ../common/aclocal.m4 changes.
2612
2613 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2614
2615         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2616
2617         * mips.igen (model): Map processor names onto BFD name.
2618
2619         * sim-main.h (CPU_CIA): Delete.
2620         (SET_CIA, GET_CIA): Define
2621
2622 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2623
2624         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2625         regiser.
2626
2627         * configure.in (default_endian): Configure a big-endian simulator
2628         by default.
2629         * configure: Re-generate.
2630
2631 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2632
2633         * configure: Regenerated to track ../common/aclocal.m4 changes.
2634
2635 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2636
2637         * interp.c (sim_monitor): Handle Densan monitor outbyte
2638         and inbyte functions.
2639
2640 1997-12-29  Felix Lee  <flee@cygnus.com>
2641
2642         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2643
2644 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2645
2646         * Makefile.in (tmp-igen): Arrange for $zero to always be
2647         reset to zero after every instruction.
2648
2649 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2650
2651         * configure: Regenerated to track ../common/aclocal.m4 changes.
2652         * config.in: Ditto.
2653
2654 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2655
2656         * mips.igen (MSUB): Fix to work like MADD.
2657         * gencode.c (MSUB): Similarly.
2658
2659 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2660
2661         * configure: Regenerated to track ../common/aclocal.m4 changes.
2662
2663 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2664
2665         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2666
2667 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2668
2669         * sim-main.h (sim-fpu.h): Include.
2670
2671         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2672         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2673         using host independant sim_fpu module.
2674
2675 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2676
2677         * interp.c (signal_exception): Report internal errors with SIGABRT
2678         not SIGQUIT.
2679
2680         * sim-main.h (C0_CONFIG): New register.
2681         (signal.h): No longer include.
2682
2683         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2684
2685 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2686
2687         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2688
2689 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2690
2691         * mips.igen: Tag vr5000 instructions.
2692         (ANDI): Was missing mipsIV model, fix assembler syntax.
2693         (do_c_cond_fmt): New function.
2694         (C.cond.fmt): Handle mips I-III which do not support CC field
2695         separatly.
2696         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2697         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2698         in IV3.2 spec.
2699         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2700         vr5000 which saves LO in a GPR separatly.
2701
2702         * configure.in (enable-sim-igen): For vr5000, select vr5000
2703         specific instructions.
2704         * configure: Re-generate.
2705
2706 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2707
2708         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2709
2710         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2711         fmt_uninterpreted_64 bit cases to switch.  Convert to
2712         fmt_formatted,
2713
2714         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2715
2716         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2717         as specified in IV3.2 spec.
2718         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2719
2720 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2721
2722         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2723         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2724         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2725         PENDING_FILL versions of instructions.  Simplify.
2726         (X): New function.
2727         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2728         instructions.
2729         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2730         a signed value.
2731         (MTHI, MFHI): Disable code checking HI-LO.
2732
2733         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2734         global.
2735         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2736
2737 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2738
2739         * gencode.c (build_mips16_operands): Replace IPC with cia.
2740
2741         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2742         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2743         IPC to `cia'.
2744         (UndefinedResult): Replace function with macro/function
2745         combination.
2746         (sim_engine_run): Don't save PC in IPC.
2747
2748         * sim-main.h (IPC): Delete.
2749
2750
2751         * interp.c (signal_exception, store_word, load_word,
2752         address_translation, load_memory, store_memory, cache_op,
2753         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2754         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2755         current instruction address - cia - argument.
2756         (sim_read, sim_write): Call address_translation directly.
2757         (sim_engine_run): Rename variable vaddr to cia.
2758         (signal_exception): Pass cia to sim_monitor
2759
2760         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2761         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2762         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2763
2764         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2765         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2766         SIM_ASSERT.
2767
2768         * interp.c (signal_exception): Pass restart address to
2769         sim_engine_restart.
2770
2771         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2772         idecode.o): Add dependency.
2773
2774         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2775         Delete definitions
2776         (DELAY_SLOT): Update NIA not PC with branch address.
2777         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2778
2779         * mips.igen: Use CIA not PC in branch calculations.
2780         (illegal): Call SignalException.
2781         (BEQ, ADDIU): Fix assembler.
2782
2783 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2784
2785         * m16.igen (JALX): Was missing.
2786
2787         * configure.in (enable-sim-igen): New configuration option.
2788         * configure: Re-generate.
2789
2790         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2791
2792         * interp.c (load_memory, store_memory): Delete parameter RAW.
2793         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2794         bypassing {load,store}_memory.
2795
2796         * sim-main.h (ByteSwapMem): Delete definition.
2797
2798         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2799
2800         * interp.c (sim_do_command, sim_commands): Delete mips specific
2801         commands.  Handled by module sim-options.
2802
2803         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2804         (WITH_MODULO_MEMORY): Define.
2805
2806         * interp.c (sim_info): Delete code printing memory size.
2807
2808         * interp.c (mips_size): Nee sim_size, delete function.
2809         (power2): Delete.
2810         (monitor, monitor_base, monitor_size): Delete global variables.
2811         (sim_open, sim_close): Delete code creating monitor and other
2812         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2813         manage memory regions.
2814         (load_memory, store_memory): Use sim-core for memory model.
2815
2816         * interp.c (address_translation): Delete all memory map code
2817         except line forcing 32 bit addresses.
2818
2819 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2820
2821         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2822         trace options.
2823
2824         * interp.c (logfh, logfile): Delete globals.
2825         (sim_open, sim_close): Delete code opening & closing log file.
2826         (mips_option_handler): Delete -l and -n options.
2827         (OPTION mips_options): Ditto.
2828
2829         * interp.c (OPTION mips_options): Rename option trace to dinero.
2830         (mips_option_handler): Update.
2831
2832 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2833
2834         * interp.c (fetch_str): New function.
2835         (sim_monitor): Rewrite using sim_read & sim_write.
2836         (sim_open): Check magic number.
2837         (sim_open): Write monitor vectors into memory using sim_write.
2838         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2839         (sim_read, sim_write): Simplify - transfer data one byte at a
2840         time.
2841         (load_memory, store_memory): Clarify meaning of parameter RAW.
2842
2843         * sim-main.h (isHOST): Defete definition.
2844         (isTARGET): Mark as depreciated.
2845         (address_translation): Delete parameter HOST.
2846
2847         * interp.c (address_translation): Delete parameter HOST.
2848
2849 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2850
2851         * mips.igen:
2852
2853         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2854         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2855
2856 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2857
2858         * mips.igen: Add model filter field to records.
2859
2860 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2861
2862         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2863
2864         interp.c (sim_engine_run): Do not compile function sim_engine_run
2865         when WITH_IGEN == 1.
2866
2867         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2868         target architecture.
2869
2870         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2871         igen. Replace with configuration variables sim_igen_flags /
2872         sim_m16_flags.
2873
2874         * m16.igen: New file.  Copy mips16 insns here.
2875         * mips.igen: From here.
2876
2877 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2878
2879         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2880         to top.
2881         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2882
2883 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2884
2885         * gencode.c (build_instruction): Follow sim_write's lead in using
2886         BigEndianMem instead of !ByteSwapMem.
2887
2888 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2889
2890         * configure.in (sim_gen): Dependent on target, select type of
2891         generator.  Always select old style generator.
2892
2893         configure: Re-generate.
2894
2895         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2896         targets.
2897         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2898         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2899         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2900         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2901         SIM_@sim_gen@_*, set by autoconf.
2902
2903 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2904
2905         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2906
2907         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2908         CURRENT_FLOATING_POINT instead.
2909
2910         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2911         (address_translation): Raise exception InstructionFetch when
2912         translation fails and isINSTRUCTION.
2913
2914         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2915         sim_engine_run): Change type of of vaddr and paddr to
2916         address_word.
2917         (address_translation, prefetch, load_memory, store_memory,
2918         cache_op): Change type of vAddr and pAddr to address_word.
2919
2920         * gencode.c (build_instruction): Change type of vaddr and paddr to
2921         address_word.
2922
2923 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2924
2925         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2926         macro to obtain result of ALU op.
2927
2928 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2929
2930         * interp.c (sim_info): Call profile_print.
2931
2932 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2933
2934         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2935
2936         * sim-main.h (WITH_PROFILE): Do not define, defined in
2937         common/sim-config.h.  Use sim-profile module.
2938         (simPROFILE): Delete defintion.
2939
2940         * interp.c (PROFILE): Delete definition.
2941         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2942         (sim_close): Delete code writing profile histogram.
2943         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2944         Delete.
2945         (sim_engine_run): Delete code profiling the PC.
2946
2947 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2948
2949         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2950
2951         * interp.c (sim_monitor): Make register pointers of type
2952         unsigned_word*.
2953
2954         * sim-main.h: Make registers of type unsigned_word not
2955         signed_word.
2956
2957 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2958
2959         * interp.c (sync_operation): Rename from SyncOperation, make
2960         global, add SD argument.
2961         (prefetch): Rename from Prefetch, make global, add SD argument.
2962         (decode_coproc): Make global.
2963
2964         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2965
2966         * gencode.c (build_instruction): Generate DecodeCoproc not
2967         decode_coproc calls.
2968
2969         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2970         (SizeFGR): Move to sim-main.h
2971         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2972         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2973         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2974         sim-main.h.
2975         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2976         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2977         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2978         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2979         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2980         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2981
2982         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2983         exception.
2984         (sim-alu.h): Include.
2985         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2986         (sim_cia): Typedef to instruction_address.
2987
2988 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2989
2990         * Makefile.in (interp.o): Rename generated file engine.c to
2991         oengine.c.
2992
2993         * interp.c: Update.
2994
2995 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2996
2997         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2998
2999 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3000
3001         * gencode.c (build_instruction): For "FPSQRT", output correct
3002         number of arguments to Recip.
3003
3004 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3005
3006         * Makefile.in (interp.o): Depends on sim-main.h
3007
3008         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3009
3010         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3011         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3012         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3013         STATE, DSSTATE): Define
3014         (GPR, FGRIDX, ..): Define.
3015
3016         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3017         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3018         (GPR, FGRIDX, ...): Delete macros.
3019
3020         * interp.c: Update names to match defines from sim-main.h
3021
3022 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3023
3024         * interp.c (sim_monitor): Add SD argument.
3025         (sim_warning): Delete.  Replace calls with calls to
3026         sim_io_eprintf.
3027         (sim_error): Delete. Replace calls with sim_io_error.
3028         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3029         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3030         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3031         argument.
3032         (mips_size): Rename from sim_size. Add SD argument.
3033
3034         * interp.c (simulator): Delete global variable.
3035         (callback): Delete global variable.
3036         (mips_option_handler, sim_open, sim_write, sim_read,
3037         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3038         sim_size,sim_monitor): Use sim_io_* not callback->*.
3039         (sim_open): ZALLOC simulator struct.
3040         (PROFILE): Do not define.
3041
3042 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3043
3044         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3045         support.h with corresponding code.
3046
3047         * sim-main.h (word64, uword64), support.h: Move definition to
3048         sim-main.h.
3049         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3050
3051         * support.h: Delete
3052         * Makefile.in: Update dependencies
3053         * interp.c: Do not include.
3054
3055 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3056
3057         * interp.c (address_translation, load_memory, store_memory,
3058         cache_op): Rename to from AddressTranslation et.al., make global,
3059         add SD argument
3060
3061         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3062         CacheOp): Define.
3063
3064         * interp.c (SignalException): Rename to signal_exception, make
3065         global.
3066
3067         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3068
3069         * sim-main.h (SignalException, SignalExceptionInterrupt,
3070         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3071         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3072         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3073         Define.
3074
3075         * interp.c, support.h: Use.
3076
3077 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3078
3079         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3080         to value_fpr / store_fpr. Add SD argument.
3081         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3082         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3083
3084         * sim-main.h (ValueFPR, StoreFPR): Define.
3085
3086 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3087
3088         * interp.c (sim_engine_run): Check consistency between configure
3089         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3090         and HASFPU.
3091
3092         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3093         (mips_fpu): Configure WITH_FLOATING_POINT.
3094         (mips_endian): Configure WITH_TARGET_ENDIAN.
3095         * configure: Update.
3096
3097 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3098
3099         * configure: Regenerated to track ../common/aclocal.m4 changes.
3100
3101 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3102
3103         * configure: Regenerated.
3104
3105 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3106
3107         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3108
3109 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3110
3111         * gencode.c (print_igen_insn_models): Assume certain architectures
3112         include all mips* instructions.
3113         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3114         instruction.
3115
3116         * Makefile.in (tmp.igen): Add target. Generate igen input from
3117         gencode file.
3118
3119         * gencode.c (FEATURE_IGEN): Define.
3120         (main): Add --igen option.  Generate output in igen format.
3121         (process_instructions): Format output according to igen option.
3122         (print_igen_insn_format): New function.
3123         (print_igen_insn_models): New function.
3124         (process_instructions): Only issue warnings and ignore
3125         instructions when no FEATURE_IGEN.
3126
3127 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3128
3129         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3130         MIPS targets.
3131
3132 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3133
3134         * configure: Regenerated to track ../common/aclocal.m4 changes.
3135
3136 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3137
3138         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3139         SIM_RESERVED_BITS): Delete, moved to common.
3140         (SIM_EXTRA_CFLAGS): Update.
3141
3142 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3143
3144         * configure.in: Configure non-strict memory alignment.
3145         * configure: Regenerated to track ../common/aclocal.m4 changes.
3146
3147 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3148
3149         * configure: Regenerated to track ../common/aclocal.m4 changes.
3150
3151 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3152
3153         * gencode.c (SDBBP,DERET): Added (3900) insns.
3154         (RFE): Turn on for 3900.
3155         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3156         (dsstate): Made global.
3157         (SUBTARGET_R3900): Added.
3158         (CANCELDELAYSLOT): New.
3159         (SignalException): Ignore SystemCall rather than ignore and
3160         terminate.  Add DebugBreakPoint handling.
3161         (decode_coproc): New insns RFE, DERET; and new registers Debug
3162         and DEPC protected by SUBTARGET_R3900.
3163         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3164         bits explicitly.
3165         * Makefile.in,configure.in: Add mips subtarget option.
3166         * configure: Update.
3167
3168 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3169
3170         * gencode.c: Add r3900 (tx39).
3171
3172
3173 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3174
3175         * gencode.c (build_instruction): Don't need to subtract 4 for
3176         JALR, just 2.
3177
3178 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3179
3180         * interp.c: Correct some HASFPU problems.
3181
3182 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3183
3184         * configure: Regenerated to track ../common/aclocal.m4 changes.
3185
3186 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3187
3188         * interp.c (mips_options): Fix samples option short form, should
3189         be `x'.
3190
3191 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3192
3193         * interp.c (sim_info): Enable info code.  Was just returning.
3194
3195 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3196
3197         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3198         MFC0.
3199
3200 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3201
3202         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3203         constants.
3204         (build_instruction): Ditto for LL.
3205
3206 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3207
3208         * configure: Regenerated to track ../common/aclocal.m4 changes.
3209
3210 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3211
3212         * configure: Regenerated to track ../common/aclocal.m4 changes.
3213         * config.in: Ditto.
3214
3215 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3216
3217         * interp.c (sim_open): Add call to sim_analyze_program, update
3218         call to sim_config.
3219
3220 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3221
3222         * interp.c (sim_kill): Delete.
3223         (sim_create_inferior): Add ABFD argument. Set PC from same.
3224         (sim_load): Move code initializing trap handlers from here.
3225         (sim_open): To here.
3226         (sim_load): Delete, use sim-hload.c.
3227
3228         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3229
3230 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3231
3232         * configure: Regenerated to track ../common/aclocal.m4 changes.
3233         * config.in: Ditto.
3234
3235 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3236
3237         * interp.c (sim_open): Add ABFD argument.
3238         (sim_load): Move call to sim_config from here.
3239         (sim_open): To here.  Check return status.
3240
3241 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3242
3243         * gencode.c (build_instruction): Two arg MADD should
3244         not assign result to $0.
3245
3246 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3247
3248         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3249         * sim/mips/configure.in: Regenerate.
3250
3251 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3252
3253         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3254         signed8, unsigned8 et.al. types.
3255
3256         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3257         hosts when selecting subreg.
3258
3259 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3260
3261         * interp.c (sim_engine_run): Reset the ZERO register to zero
3262         regardless of FEATURE_WARN_ZERO.
3263         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3264
3265 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3266
3267         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3268         (SignalException): For BreakPoints ignore any mode bits and just
3269         save the PC.
3270         (SignalException): Always set the CAUSE register.
3271
3272 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3273
3274         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3275         exception has been taken.
3276
3277         * interp.c: Implement the ERET and mt/f sr instructions.
3278
3279 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3280
3281         * interp.c (SignalException): Don't bother restarting an
3282         interrupt.
3283
3284 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3285
3286         * interp.c (SignalException): Really take an interrupt.
3287         (interrupt_event): Only deliver interrupts when enabled.
3288
3289 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3290
3291         * interp.c (sim_info): Only print info when verbose.
3292         (sim_info) Use sim_io_printf for output.
3293
3294 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3295
3296         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3297         mips architectures.
3298
3299 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3300
3301         * interp.c (sim_do_command): Check for common commands if a
3302         simulator specific command fails.
3303
3304 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3305
3306         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3307         and simBE when DEBUG is defined.
3308
3309 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3310
3311         * interp.c (interrupt_event): New function.  Pass exception event
3312         onto exception handler.
3313
3314         * configure.in: Check for stdlib.h.
3315         * configure: Regenerate.
3316
3317         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3318         variable declaration.
3319         (build_instruction): Initialize memval1.
3320         (build_instruction): Add UNUSED attribute to byte, bigend,
3321         reverse.
3322         (build_operands): Ditto.
3323
3324         * interp.c: Fix GCC warnings.
3325         (sim_get_quit_code): Delete.
3326
3327         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3328         * Makefile.in: Ditto.
3329         * configure: Re-generate.
3330
3331         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3332
3333 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3334
3335         * interp.c (mips_option_handler): New function parse argumes using
3336         sim-options.
3337         (myname): Replace with STATE_MY_NAME.
3338         (sim_open): Delete check for host endianness - performed by
3339         sim_config.
3340         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3341         (sim_open): Move much of the initialization from here.
3342         (sim_load): To here.  After the image has been loaded and
3343         endianness set.
3344         (sim_open): Move ColdReset from here.
3345         (sim_create_inferior): To here.
3346         (sim_open): Make FP check less dependant on host endianness.
3347
3348         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3349         run.
3350         * interp.c (sim_set_callbacks): Delete.
3351
3352         * interp.c (membank, membank_base, membank_size): Replace with
3353         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3354         (sim_open): Remove call to callback->init. gdb/run do this.
3355
3356         * interp.c: Update
3357
3358         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3359
3360         * interp.c (big_endian_p): Delete, replaced by
3361         current_target_byte_order.
3362
3363 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3364
3365         * interp.c (host_read_long, host_read_word, host_swap_word,
3366         host_swap_long): Delete. Using common sim-endian.
3367         (sim_fetch_register, sim_store_register): Use H2T.
3368         (pipeline_ticks): Delete.  Handled by sim-events.
3369         (sim_info): Update.
3370         (sim_engine_run): Update.
3371
3372 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3373
3374         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3375         reason from here.
3376         (SignalException): To here. Signal using sim_engine_halt.
3377         (sim_stop_reason): Delete, moved to common.
3378
3379 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3380
3381         * interp.c (sim_open): Add callback argument.
3382         (sim_set_callbacks): Delete SIM_DESC argument.
3383         (sim_size): Ditto.
3384
3385 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3386
3387         * Makefile.in (SIM_OBJS): Add common modules.
3388
3389         * interp.c (sim_set_callbacks): Also set SD callback.
3390         (set_endianness, xfer_*, swap_*): Delete.
3391         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3392         Change to functions using sim-endian macros.
3393         (control_c, sim_stop): Delete, use common version.
3394         (simulate): Convert into.
3395         (sim_engine_run): This function.
3396         (sim_resume): Delete.
3397
3398         * interp.c (simulation): New variable - the simulator object.
3399         (sim_kind): Delete global - merged into simulation.
3400         (sim_load): Cleanup.  Move PC assignment from here.
3401         (sim_create_inferior): To here.
3402
3403         * sim-main.h: New file.
3404         * interp.c (sim-main.h): Include.
3405
3406 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3407
3408         * configure: Regenerated to track ../common/aclocal.m4 changes.
3409
3410 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3411
3412         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3413
3414 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3415
3416         * gencode.c (build_instruction): DIV instructions: check
3417         for division by zero and integer overflow before using
3418         host's division operation.
3419
3420 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3421
3422         * Makefile.in (SIM_OBJS): Add sim-load.o.
3423         * interp.c: #include bfd.h.
3424         (target_byte_order): Delete.
3425         (sim_kind, myname, big_endian_p): New static locals.
3426         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3427         after argument parsing.  Recognize -E arg, set endianness accordingly.
3428         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3429         load file into simulator.  Set PC from bfd.
3430         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3431         (set_endianness): Use big_endian_p instead of target_byte_order.
3432
3433 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3434
3435         * interp.c (sim_size): Delete prototype - conflicts with
3436         definition in remote-sim.h.  Correct definition.
3437
3438 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3439
3440         * configure: Regenerated to track ../common/aclocal.m4 changes.
3441         * config.in: Ditto.
3442
3443 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3444
3445         * interp.c (sim_open): New arg `kind'.
3446
3447         * configure: Regenerated to track ../common/aclocal.m4 changes.
3448
3449 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3450
3451         * configure: Regenerated to track ../common/aclocal.m4 changes.
3452
3453 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3454
3455         * interp.c (sim_open): Set optind to 0 before calling getopt.
3456
3457 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3458
3459         * configure: Regenerated to track ../common/aclocal.m4 changes.
3460
3461 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3462
3463         * interp.c : Replace uses of pr_addr with pr_uword64
3464         where the bit length is always 64 independent of SIM_ADDR.
3465         (pr_uword64) : added.
3466
3467 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3468
3469         * configure: Re-generate.
3470
3471 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3472
3473         * configure: Regenerate to track ../common/aclocal.m4 changes.
3474
3475 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3476
3477         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3478         in argv form.
3479         (other sim_*): New SIM_DESC argument.
3480
3481 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3482
3483         * interp.c: Fix printing of addresses for non-64-bit targets.
3484         (pr_addr): Add function to print address based on size.
3485
3486 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3487
3488         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3489
3490 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3491
3492         * gencode.c (build_mips16_operands): Correct computation of base
3493         address for extended PC relative instruction.
3494
3495 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3496
3497         * interp.c (mips16_entry): Add support for floating point cases.
3498         (SignalException): Pass floating point cases to mips16_entry.
3499         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3500         registers.
3501         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3502         or fmt_word.
3503         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3504         and then set the state to fmt_uninterpreted.
3505         (COP_SW): Temporarily set the state to fmt_word while calling
3506         ValueFPR.
3507
3508 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3509
3510         * gencode.c (build_instruction): The high order may be set in the
3511         comparison flags at any ISA level, not just ISA 4.
3512
3513 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3514
3515         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3516         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3517         * configure.in: sinclude ../common/aclocal.m4.
3518         * configure: Regenerated.
3519
3520 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3521
3522         * configure: Rebuild after change to aclocal.m4.
3523
3524 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3525
3526         * configure configure.in Makefile.in:  Update to new configure
3527         scheme which is more compatible with WinGDB builds.
3528         * configure.in:  Improve comment on how to run autoconf.
3529         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3530         * Makefile.in:  Use autoconf substitution to install common
3531         makefile fragment.
3532
3533 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3534
3535         * gencode.c (build_instruction): Use BigEndianCPU instead of
3536         ByteSwapMem.
3537
3538 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3539
3540         * interp.c (sim_monitor): Make output to stdout visible in
3541         wingdb's I/O log window.
3542
3543 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3544
3545         * support.h: Undo previous change to SIGTRAP
3546         and SIGQUIT values.
3547
3548 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3549
3550         * interp.c (store_word, load_word): New static functions.
3551         (mips16_entry): New static function.
3552         (SignalException): Look for mips16 entry and exit instructions.
3553         (simulate): Use the correct index when setting fpr_state after
3554         doing a pending move.
3555
3556 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3557
3558         * interp.c: Fix byte-swapping code throughout to work on
3559         both little- and big-endian hosts.
3560
3561 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3562
3563         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3564         with gdb/config/i386/xm-windows.h.
3565
3566 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3567
3568         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3569         that messes up arithmetic shifts.
3570
3571 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3572
3573         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3574         SIGTRAP and SIGQUIT for _WIN32.
3575
3576 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3577
3578         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3579         force a 64 bit multiplication.
3580         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3581         destination register is 0, since that is the default mips16 nop
3582         instruction.
3583
3584 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3585
3586         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3587         (build_endian_shift): Don't check proc64.
3588         (build_instruction): Always set memval to uword64.  Cast op2 to
3589         uword64 when shifting it left in memory instructions.  Always use
3590         the same code for stores--don't special case proc64.
3591
3592         * gencode.c (build_mips16_operands): Fix base PC value for PC
3593         relative operands.
3594         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3595         jal instruction.
3596         * interp.c (simJALDELAYSLOT): Define.
3597         (JALDELAYSLOT): Define.
3598         (INDELAYSLOT, INJALDELAYSLOT): Define.
3599         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3600
3601 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3602
3603         * interp.c (sim_open): add flush_cache as a PMON routine
3604         (sim_monitor): handle flush_cache by ignoring it
3605
3606 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3607
3608         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3609         BigEndianMem.
3610         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3611         (BigEndianMem): Rename to ByteSwapMem and change sense.
3612         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3613         BigEndianMem references to !ByteSwapMem.
3614         (set_endianness): New function, with prototype.
3615         (sim_open): Call set_endianness.
3616         (sim_info): Use simBE instead of BigEndianMem.
3617         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3618         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3619         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3620         ifdefs, keeping the prototype declaration.
3621         (swap_word): Rewrite correctly.
3622         (ColdReset): Delete references to CONFIG.  Delete endianness related
3623         code; moved to set_endianness.
3624
3625 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3626
3627         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3628         * interp.c (CHECKHILO): Define away.
3629         (simSIGINT): New macro.
3630         (membank_size): Increase from 1MB to 2MB.
3631         (control_c): New function.
3632         (sim_resume): Rename parameter signal to signal_number.  Add local
3633         variable prev.  Call signal before and after simulate.
3634         (sim_stop_reason): Add simSIGINT support.
3635         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3636         functions always.
3637         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3638         if logfh is NULL.
3639         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3640         a call to sim_warning.
3641
3642 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3643
3644         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3645         16 bit instructions.
3646
3647 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3648
3649         Add support for mips16 (16 bit MIPS implementation):
3650         * gencode.c (inst_type): Add mips16 instruction encoding types.
3651         (GETDATASIZEINSN): Define.
3652         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3653         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3654         mtlo.
3655         (MIPS16_DECODE): New table, for mips16 instructions.
3656         (bitmap_val): New static function.
3657         (struct mips16_op): Define.
3658         (mips16_op_table): New table, for mips16 operands.
3659         (build_mips16_operands): New static function.
3660         (process_instructions): If PC is odd, decode a mips16
3661         instruction.  Break out instruction handling into new
3662         build_instruction function.
3663         (build_instruction): New static function, broken out of
3664         process_instructions.  Check modifiers rather than flags for SHIFT
3665         bit count and m[ft]{hi,lo} direction.
3666         (usage): Pass program name to fprintf.
3667         (main): Remove unused variable this_option_optind.  Change
3668         ``*loptarg++'' to ``loptarg++''.
3669         (my_strtoul): Parenthesize && within ||.
3670         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3671         (simulate): If PC is odd, fetch a 16 bit instruction, and
3672         increment PC by 2 rather than 4.
3673         * configure.in: Add case for mips16*-*-*.
3674         * configure: Rebuild.
3675
3676 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3677
3678         * interp.c: Allow -t to enable tracing in standalone simulator.
3679         Fix garbage output in trace file and error messages.
3680
3681 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3682
3683         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3684         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3685         * configure.in: Simplify using macros in ../common/aclocal.m4.
3686         * configure: Regenerated.
3687         * tconfig.in: New file.
3688
3689 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3690
3691         * interp.c: Fix bugs in 64-bit port.
3692         Use ansi function declarations for msvc compiler.
3693         Initialize and test file pointer in trace code.
3694         Prevent duplicate definition of LAST_EMED_REGNUM.
3695
3696 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3697
3698         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3699
3700 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3701
3702         * interp.c (SignalException): Check for explicit terminating
3703         breakpoint value.
3704         * gencode.c: Pass instruction value through SignalException()
3705         calls for Trap, Breakpoint and Syscall.
3706
3707 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3708
3709         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3710         only used on those hosts that provide it.
3711         * configure.in: Add sqrt() to list of functions to be checked for.
3712         * config.in: Re-generated.
3713         * configure: Re-generated.
3714
3715 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3716
3717         * gencode.c (process_instructions): Call build_endian_shift when
3718         expanding STORE RIGHT, to fix swr.
3719         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3720         clear the high bits.
3721         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3722         Fix float to int conversions to produce signed values.
3723
3724 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3725
3726         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3727         (process_instructions): Correct handling of nor instruction.
3728         Correct shift count for 32 bit shift instructions. Correct sign
3729         extension for arithmetic shifts to not shift the number of bits in
3730         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3731         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3732         Fix madd.
3733         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3734         It's OK to have a mult follow a mult.  What's not OK is to have a
3735         mult follow an mfhi.
3736         (Convert): Comment out incorrect rounding code.
3737
3738 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3739
3740         * interp.c (sim_monitor): Improved monitor printf
3741         simulation. Tidied up simulator warnings, and added "--log" option
3742         for directing warning message output.
3743         * gencode.c: Use sim_warning() rather than WARNING macro.
3744
3745 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3746
3747         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3748         getopt1.o, rather than on gencode.c.  Link objects together.
3749         Don't link against -liberty.
3750         (gencode.o, getopt.o, getopt1.o): New targets.
3751         * gencode.c: Include <ctype.h> and "ansidecl.h".
3752         (AND): Undefine after including "ansidecl.h".
3753         (ULONG_MAX): Define if not defined.
3754         (OP_*): Don't define macros; now defined in opcode/mips.h.
3755         (main): Call my_strtoul rather than strtoul.
3756         (my_strtoul): New static function.
3757
3758 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3759
3760         * gencode.c (process_instructions):  Generate word64 and uword64
3761         instead of `long long' and `unsigned long long' data types.
3762         * interp.c:  #include sysdep.h to get signals, and define default
3763         for SIGBUS.
3764         * (Convert):  Work around for Visual-C++ compiler bug with type
3765         conversion.
3766         * support.h:  Make things compile under Visual-C++ by using
3767         __int64 instead of `long long'.  Change many refs to long long
3768         into word64/uword64 typedefs.
3769
3770 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3771
3772         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3773         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3774         (docdir): Removed.
3775         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3776         (AC_PROG_INSTALL): Added.
3777         (AC_PROG_CC): Moved to before configure.host call.
3778         * configure: Rebuilt.
3779
3780 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3781
3782         * configure.in: Define @SIMCONF@ depending on mips target.
3783         * configure: Rebuild.
3784         * Makefile.in (run): Add @SIMCONF@ to control simulator
3785         construction.
3786         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3787         * interp.c: Remove some debugging, provide more detailed error
3788         messages, update memory accesses to use LOADDRMASK.
3789
3790 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3791
3792         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3793         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3794         stamp-h.
3795         * configure: Rebuild.
3796         * config.in: New file, generated by autoheader.
3797         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3798         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3799         HAVE_ANINT and HAVE_AINT, as appropriate.
3800         * Makefile.in (run): Use @LIBS@ rather than -lm.
3801         (interp.o): Depend upon config.h.
3802         (Makefile): Just rebuild Makefile.
3803         (clean): Remove stamp-h.
3804         (mostlyclean): Make the same as clean, not as distclean.
3805         (config.h, stamp-h): New targets.
3806
3807 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3808
3809         * interp.c (ColdReset): Fix boolean test. Make all simulator
3810         globals static.
3811
3812 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3813
3814         * interp.c (xfer_direct_word, xfer_direct_long,
3815         swap_direct_word, swap_direct_long, xfer_big_word,
3816         xfer_big_long, xfer_little_word, xfer_little_long,
3817         swap_word,swap_long): Added.
3818         * interp.c (ColdReset): Provide function indirection to
3819         host<->simulated_target transfer routines.
3820         * interp.c (sim_store_register, sim_fetch_register): Updated to
3821         make use of indirected transfer routines.
3822
3823 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3824
3825         * gencode.c (process_instructions): Ensure FP ABS instruction
3826         recognised.
3827         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3828         system call support.
3829
3830 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3831
3832         * interp.c (sim_do_command): Complain if callback structure not
3833         initialised.
3834
3835 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3836
3837         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3838         support for Sun hosts.
3839         * Makefile.in (gencode): Ensure the host compiler and libraries
3840         used for cross-hosted build.
3841
3842 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3843
3844         * interp.c, gencode.c: Some more (TODO) tidying.
3845
3846 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3847
3848         * gencode.c, interp.c: Replaced explicit long long references with
3849         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3850         * support.h (SET64LO, SET64HI): Macros added.
3851
3852 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3853
3854         * configure: Regenerate with autoconf 2.7.
3855
3856 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3857
3858         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3859         * support.h: Remove superfluous "1" from #if.
3860         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3861
3862 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3863
3864         * interp.c (StoreFPR): Control UndefinedResult() call on
3865         WARN_RESULT manifest.
3866
3867 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3868
3869         * gencode.c: Tidied instruction decoding, and added FP instruction
3870         support.
3871
3872         * interp.c: Added dineroIII, and BSD profiling support. Also
3873         run-time FP handling.
3874
3875 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3876
3877         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3878         gencode.c, interp.c, support.h: created.