1 2015-03-24 Mike Frysinger <vapier@gentoo.org>
3 * configure: Regenerate.
5 2015-03-23 Mike Frysinger <vapier@gentoo.org>
7 * configure: Regenerate.
9 2015-03-23 Mike Frysinger <vapier@gentoo.org>
11 * configure: Regenerate.
12 * configure.ac (mips_extra_objs): Delete.
13 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
14 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
16 2015-03-23 Mike Frysinger <vapier@gentoo.org>
18 * configure: Regenerate.
19 * configure.ac: Delete sim_hw checks for dv-sockser.
21 2015-03-16 Mike Frysinger <vapier@gentoo.org>
23 * config.in, configure: Regenerate.
24 * tconfig.in: Rename file ...
25 * tconfig.h: ... here.
27 2015-03-15 Mike Frysinger <vapier@gentoo.org>
29 * tconfig.in: Delete includes.
30 [HAVE_DV_SOCKSER]: Delete.
32 2015-03-14 Mike Frysinger <vapier@gentoo.org>
34 * Makefile.in (SIM_RUN_OBJS): Delete.
36 2015-03-14 Mike Frysinger <vapier@gentoo.org>
38 * configure.ac (AC_CHECK_HEADERS): Delete.
39 * aclocal.m4, configure: Regenerate.
41 2014-08-19 Alan Modra <amodra@gmail.com>
43 * configure: Regenerate.
45 2014-08-15 Roland McGrath <mcgrathr@google.com>
47 * configure: Regenerate.
48 * config.in: Regenerate.
50 2014-03-04 Mike Frysinger <vapier@gentoo.org>
52 * configure: Regenerate.
54 2013-09-23 Alan Modra <amodra@gmail.com>
56 * configure: Regenerate.
58 2013-06-03 Mike Frysinger <vapier@gentoo.org>
60 * aclocal.m4, configure: Regenerate.
62 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
66 2013-03-26 Mike Frysinger <vapier@gentoo.org>
68 * configure: Regenerate.
70 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
72 * configure.ac: Address use of dv-sockser.o.
73 * tconfig.in: Conditionalize use of dv_sockser_install.
74 * configure: Regenerated.
75 * config.in: Regenerated.
77 2012-10-04 Chao-ying Fu <fu@mips.com>
78 Steve Ellcey <sellcey@mips.com>
80 * mips/mips3264r2.igen (rdhwr): New.
82 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
84 * configure.ac: Always link against dv-sockser.o.
85 * configure: Regenerate.
87 2012-06-15 Joel Brobecker <brobecker@adacore.com>
89 * config.in, configure: Regenerate.
91 2012-05-18 Nick Clifton <nickc@redhat.com>
94 * interp.c: Include config.h before system header files.
96 2012-03-24 Mike Frysinger <vapier@gentoo.org>
98 * aclocal.m4, config.in, configure: Regenerate.
100 2011-12-03 Mike Frysinger <vapier@gentoo.org>
102 * aclocal.m4: New file.
103 * configure: Regenerate.
105 2011-10-19 Mike Frysinger <vapier@gentoo.org>
107 * configure: Regenerate after common/acinclude.m4 update.
109 2011-10-17 Mike Frysinger <vapier@gentoo.org>
111 * configure.ac: Change include to common/acinclude.m4.
113 2011-10-17 Mike Frysinger <vapier@gentoo.org>
115 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
116 call. Replace common.m4 include with SIM_AC_COMMON.
117 * configure: Regenerate.
119 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
121 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
123 (tmp-mach-multi): Exit early when igen fails.
125 2011-07-05 Mike Frysinger <vapier@gentoo.org>
127 * interp.c (sim_do_command): Delete.
129 2011-02-14 Mike Frysinger <vapier@gentoo.org>
131 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
132 (tx3904sio_fifo_reset): Likewise.
133 * interp.c (sim_monitor): Likewise.
135 2010-04-14 Mike Frysinger <vapier@gentoo.org>
137 * interp.c (sim_write): Add const to buffer arg.
139 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
141 * interp.c: Don't include sysdep.h
143 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
145 * configure: Regenerate.
147 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
149 * config.in: Regenerate.
150 * configure: Likewise.
152 * configure: Regenerate.
154 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
156 * configure: Regenerate to track ../common/common.m4 changes.
159 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
160 Daniel Jacobowitz <dan@codesourcery.com>
161 Joseph Myers <joseph@codesourcery.com>
163 * configure: Regenerate.
165 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
167 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
168 that unconditionally allows fmt_ps.
169 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
170 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
171 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
172 filter from 64,f to 32,f.
173 (PREFX): Change filter from 64 to 32.
174 (LDXC1, LUXC1): Provide separate mips32r2 implementations
175 that use do_load_double instead of do_load. Make both LUXC1
176 versions unpredictable if SizeFGR () != 64.
177 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
178 instead of do_store. Remove unused variable. Make both SUXC1
179 versions unpredictable if SizeFGR () != 64.
181 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
183 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
184 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
185 shifts for that case.
187 2007-09-04 Nick Clifton <nickc@redhat.com>
189 * interp.c (options enum): Add OPTION_INFO_MEMORY.
190 (display_mem_info): New static variable.
191 (mips_option_handler): Handle OPTION_INFO_MEMORY.
192 (mips_options): Add info-memory and memory-info.
193 (sim_open): After processing the command line and board
194 specification, check display_mem_info. If it is set then
195 call the real handler for the --memory-info command line
198 2007-08-24 Joel Brobecker <brobecker@adacore.com>
200 * configure.ac: Change license of multi-run.c to GPL version 3.
201 * configure: Regenerate.
203 2007-06-28 Richard Sandiford <richard@codesourcery.com>
205 * configure.ac, configure: Revert last patch.
207 2007-06-26 Richard Sandiford <richard@codesourcery.com>
209 * configure.ac (sim_mipsisa3264_configs): New variable.
210 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
211 every configuration support all four targets, using the triplet to
212 determine the default.
213 * configure: Regenerate.
215 2007-06-25 Richard Sandiford <richard@codesourcery.com>
217 * Makefile.in (m16run.o): New rule.
219 2007-05-15 Thiemo Seufer <ths@mips.com>
221 * mips3264r2.igen (DSHD): Fix compile warning.
223 2007-05-14 Thiemo Seufer <ths@mips.com>
225 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
226 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
227 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
228 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
231 2007-03-01 Thiemo Seufer <ths@mips.com>
233 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
236 2007-02-20 Thiemo Seufer <ths@mips.com>
238 * dsp.igen: Update copyright notice.
239 * dsp2.igen: Fix copyright notice.
241 2007-02-20 Thiemo Seufer <ths@mips.com>
242 Chao-Ying Fu <fu@mips.com>
244 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
245 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
246 Add dsp2 to sim_igen_machine.
247 * configure: Regenerate.
248 * dsp.igen (do_ph_op): Add MUL support when op = 2.
249 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
250 (mulq_rs.ph): Use do_ph_mulq.
251 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
252 * mips.igen: Add dsp2 model and include dsp2.igen.
253 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
254 for *mips32r2, *mips64r2, *dsp.
255 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
256 for *mips32r2, *mips64r2, *dsp2.
257 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
259 2007-02-19 Thiemo Seufer <ths@mips.com>
260 Nigel Stephens <nigel@mips.com>
262 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
263 jumps with hazard barrier.
265 2007-02-19 Thiemo Seufer <ths@mips.com>
266 Nigel Stephens <nigel@mips.com>
268 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
269 after each call to sim_io_write.
271 2007-02-19 Thiemo Seufer <ths@mips.com>
272 Nigel Stephens <nigel@mips.com>
274 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
275 supported by this simulator.
276 (decode_coproc): Recognise additional CP0 Config registers
279 2007-02-19 Thiemo Seufer <ths@mips.com>
280 Nigel Stephens <nigel@mips.com>
281 David Ung <davidu@mips.com>
283 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
284 uninterpreted formats. If fmt is one of the uninterpreted types
285 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
286 fmt_word, and fmt_uninterpreted_64 like fmt_long.
287 (store_fpr): When writing an invalid odd register, set the
288 matching even register to fmt_unknown, not the following register.
289 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
290 the the memory window at offset 0 set by --memory-size command
292 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
294 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
296 (sim_monitor): When returning the memory size to the MIPS
297 application, use the value in STATE_MEM_SIZE, not an arbitrary
299 (cop_lw): Don' mess around with FPR_STATE, just pass
300 fmt_uninterpreted_32 to StoreFPR.
302 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
304 * mips.igen (not_word_value): Single version for mips32, mips64
307 2007-02-19 Thiemo Seufer <ths@mips.com>
308 Nigel Stephens <nigel@mips.com>
310 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
313 2007-02-17 Thiemo Seufer <ths@mips.com>
315 * configure.ac (mips*-sde-elf*): Move in front of generic machine
317 * configure: Regenerate.
319 2007-02-17 Thiemo Seufer <ths@mips.com>
321 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
322 Add mdmx to sim_igen_machine.
323 (mipsisa64*-*-*): Likewise. Remove dsp.
324 (mipsisa32*-*-*): Remove dsp.
325 * configure: Regenerate.
327 2007-02-13 Thiemo Seufer <ths@mips.com>
329 * configure.ac: Add mips*-sde-elf* target.
330 * configure: Regenerate.
332 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
334 * acconfig.h: Remove.
335 * config.in, configure: Regenerate.
337 2006-11-07 Thiemo Seufer <ths@mips.com>
339 * dsp.igen (do_w_op): Fix compiler warning.
341 2006-08-29 Thiemo Seufer <ths@mips.com>
342 David Ung <davidu@mips.com>
344 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
346 * configure: Regenerate.
347 * mips.igen (model): Add smartmips.
348 (MADDU): Increment ACX if carry.
349 (do_mult): Clear ACX.
350 (ROR,RORV): Add smartmips.
351 (include): Include smartmips.igen.
352 * sim-main.h (ACX): Set to REGISTERS[89].
353 * smartmips.igen: New file.
355 2006-08-29 Thiemo Seufer <ths@mips.com>
356 David Ung <davidu@mips.com>
358 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
359 mips3264r2.igen. Add missing dependency rules.
360 * m16e.igen: Support for mips16e save/restore instructions.
362 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
364 * configure: Regenerated.
366 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
368 * configure: Regenerated.
370 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
372 * configure: Regenerated.
374 2006-05-15 Chao-ying Fu <fu@mips.com>
376 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
378 2006-04-18 Nick Clifton <nickc@redhat.com>
380 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
383 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
385 * configure: Regenerate.
387 2005-12-14 Chao-ying Fu <fu@mips.com>
389 * Makefile.in (SIM_OBJS): Add dsp.o.
390 (dsp.o): New dependency.
391 (IGEN_INCLUDE): Add dsp.igen.
392 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
393 mipsisa64*-*-*): Add dsp to sim_igen_machine.
394 * configure: Regenerate.
395 * mips.igen: Add dsp model and include dsp.igen.
396 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
397 because these instructions are extended in DSP ASE.
398 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
399 adding 6 DSP accumulator registers and 1 DSP control register.
400 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
401 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
402 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
403 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
404 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
405 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
406 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
407 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
408 DSPCR_CCOND_SMASK): New define.
409 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
410 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
412 2005-07-08 Ian Lance Taylor <ian@airs.com>
414 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
416 2005-06-16 David Ung <davidu@mips.com>
417 Nigel Stephens <nigel@mips.com>
419 * mips.igen: New mips16e model and include m16e.igen.
420 (check_u64): Add mips16e tag.
421 * m16e.igen: New file for MIPS16e instructions.
422 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
423 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
425 * configure: Regenerate.
427 2005-05-26 David Ung <davidu@mips.com>
429 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
430 tags to all instructions which are applicable to the new ISAs.
431 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
433 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
435 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
437 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
438 * configure: Regenerate.
440 2005-03-23 Mark Kettenis <kettenis@gnu.org>
442 * configure: Regenerate.
444 2005-01-14 Andrew Cagney <cagney@gnu.org>
446 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
447 explicit call to AC_CONFIG_HEADER.
448 * configure: Regenerate.
450 2005-01-12 Andrew Cagney <cagney@gnu.org>
452 * configure.ac: Update to use ../common/common.m4.
453 * configure: Re-generate.
455 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
457 * configure: Regenerated to track ../common/aclocal.m4 changes.
459 2005-01-07 Andrew Cagney <cagney@gnu.org>
461 * configure.ac: Rename configure.in, require autoconf 2.59.
462 * configure: Re-generate.
464 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
466 * configure: Regenerate for ../common/aclocal.m4 update.
468 2004-09-24 Monika Chaddha <monika@acmet.com>
470 Committed by Andrew Cagney.
471 * m16.igen (CMP, CMPI): Fix assembler.
473 2004-08-18 Chris Demetriou <cgd@broadcom.com>
475 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
476 * configure: Regenerate.
478 2004-06-25 Chris Demetriou <cgd@broadcom.com>
480 * configure.in (sim_m16_machine): Include mipsIII.
481 * configure: Regenerate.
483 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
485 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
487 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
489 2004-04-10 Chris Demetriou <cgd@broadcom.com>
491 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
493 2004-04-09 Chris Demetriou <cgd@broadcom.com>
495 * mips.igen (check_fmt): Remove.
496 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
497 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
498 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
499 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
500 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
501 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
502 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
503 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
504 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
505 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
507 2004-04-09 Chris Demetriou <cgd@broadcom.com>
509 * sb1.igen (check_sbx): New function.
510 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
512 2004-03-29 Chris Demetriou <cgd@broadcom.com>
513 Richard Sandiford <rsandifo@redhat.com>
515 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
516 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
517 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
518 separate implementations for mipsIV and mipsV. Use new macros to
519 determine whether the restrictions apply.
521 2004-01-19 Chris Demetriou <cgd@broadcom.com>
523 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
524 (check_mult_hilo): Improve comments.
525 (check_div_hilo): Likewise. Also, fork off a new version
526 to handle mips32/mips64 (since there are no hazards to check
529 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
531 * mips.igen (do_dmultx): Fix check for negative operands.
533 2003-05-16 Ian Lance Taylor <ian@airs.com>
535 * Makefile.in (SHELL): Make sure this is defined.
536 (various): Use $(SHELL) whenever we invoke move-if-change.
538 2003-05-03 Chris Demetriou <cgd@broadcom.com>
540 * cp1.c: Tweak attribution slightly.
543 * mdmx.igen: Likewise.
544 * mips3d.igen: Likewise.
545 * sb1.igen: Likewise.
547 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
549 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
552 2003-02-27 Andrew Cagney <cagney@redhat.com>
554 * interp.c (sim_open): Rename _bfd to bfd.
555 (sim_create_inferior): Ditto.
557 2003-01-14 Chris Demetriou <cgd@broadcom.com>
559 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
561 2003-01-14 Chris Demetriou <cgd@broadcom.com>
563 * mips.igen (EI, DI): Remove.
565 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
567 * Makefile.in (tmp-run-multi): Fix mips16 filter.
569 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
570 Andrew Cagney <ac131313@redhat.com>
571 Gavin Romig-Koch <gavin@redhat.com>
572 Graydon Hoare <graydon@redhat.com>
573 Aldy Hernandez <aldyh@redhat.com>
574 Dave Brolley <brolley@redhat.com>
575 Chris Demetriou <cgd@broadcom.com>
577 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
578 (sim_mach_default): New variable.
579 (mips64vr-*-*, mips64vrel-*-*): New configurations.
580 Add a new simulator generator, MULTI.
581 * configure: Regenerate.
582 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
583 (multi-run.o): New dependency.
584 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
585 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
586 (tmp-multi): Combine them.
587 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
588 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
589 (distclean-extra): New rule.
590 * sim-main.h: Include bfd.h.
591 (MIPS_MACH): New macro.
592 * mips.igen (vr4120, vr5400, vr5500): New models.
593 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
594 * vr.igen: Replace with new version.
596 2003-01-04 Chris Demetriou <cgd@broadcom.com>
598 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
599 * configure: Regenerate.
601 2002-12-31 Chris Demetriou <cgd@broadcom.com>
603 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
604 * mips.igen: Remove all invocations of check_branch_bug and
607 2002-12-16 Chris Demetriou <cgd@broadcom.com>
609 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
611 2002-07-30 Chris Demetriou <cgd@broadcom.com>
613 * mips.igen (do_load_double, do_store_double): New functions.
614 (LDC1, SDC1): Rename to...
615 (LDC1b, SDC1b): respectively.
616 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
618 2002-07-29 Michael Snyder <msnyder@redhat.com>
620 * cp1.c (fp_recip2): Modify initialization expression so that
621 GCC will recognize it as constant.
623 2002-06-18 Chris Demetriou <cgd@broadcom.com>
625 * mdmx.c (SD_): Delete.
626 (Unpredictable): Re-define, for now, to directly invoke
627 unpredictable_action().
628 (mdmx_acc_op): Fix error in .ob immediate handling.
630 2002-06-18 Andrew Cagney <cagney@redhat.com>
632 * interp.c (sim_firmware_command): Initialize `address'.
634 2002-06-16 Andrew Cagney <ac131313@redhat.com>
636 * configure: Regenerated to track ../common/aclocal.m4 changes.
638 2002-06-14 Chris Demetriou <cgd@broadcom.com>
639 Ed Satterthwaite <ehs@broadcom.com>
641 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
642 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
643 * mips.igen: Include mips3d.igen.
644 (mips3d): New model name for MIPS-3D ASE instructions.
645 (CVT.W.fmt): Don't use this instruction for word (source) format
647 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
648 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
649 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
650 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
651 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
652 (RSquareRoot1, RSquareRoot2): New macros.
653 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
654 (fp_rsqrt2): New functions.
655 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
656 * configure: Regenerate.
658 2002-06-13 Chris Demetriou <cgd@broadcom.com>
659 Ed Satterthwaite <ehs@broadcom.com>
661 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
662 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
663 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
664 (convert): Note that this function is not used for paired-single
666 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
667 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
668 (check_fmt_p): Enable paired-single support.
669 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
670 (PUU.PS): New instructions.
671 (CVT.S.fmt): Don't use this instruction for paired-single format
673 * sim-main.h (FP_formats): New value 'fmt_ps.'
674 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
675 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
677 2002-06-12 Chris Demetriou <cgd@broadcom.com>
679 * mips.igen: Fix formatting of function calls in
682 2002-06-12 Chris Demetriou <cgd@broadcom.com>
684 * mips.igen (MOVN, MOVZ): Trace result.
685 (TNEI): Print "tnei" as the opcode name in traces.
686 (CEIL.W): Add disassembly string for traces.
687 (RSQRT.fmt): Make location of disassembly string consistent
688 with other instructions.
690 2002-06-12 Chris Demetriou <cgd@broadcom.com>
692 * mips.igen (X): Delete unused function.
694 2002-06-08 Andrew Cagney <cagney@redhat.com>
696 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
698 2002-06-07 Chris Demetriou <cgd@broadcom.com>
699 Ed Satterthwaite <ehs@broadcom.com>
701 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
702 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
703 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
704 (fp_nmsub): New prototypes.
705 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
706 (NegMultiplySub): New defines.
707 * mips.igen (RSQRT.fmt): Use RSquareRoot().
708 (MADD.D, MADD.S): Replace with...
709 (MADD.fmt): New instruction.
710 (MSUB.D, MSUB.S): Replace with...
711 (MSUB.fmt): New instruction.
712 (NMADD.D, NMADD.S): Replace with...
713 (NMADD.fmt): New instruction.
714 (NMSUB.D, MSUB.S): Replace with...
715 (NMSUB.fmt): New instruction.
717 2002-06-07 Chris Demetriou <cgd@broadcom.com>
718 Ed Satterthwaite <ehs@broadcom.com>
720 * cp1.c: Fix more comment spelling and formatting.
721 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
722 (denorm_mode): New function.
723 (fpu_unary, fpu_binary): Round results after operation, collect
724 status from rounding operations, and update the FCSR.
725 (convert): Collect status from integer conversions and rounding
726 operations, and update the FCSR. Adjust NaN values that result
727 from conversions. Convert to use sim_io_eprintf rather than
728 fprintf, and remove some debugging code.
729 * cp1.h (fenr_FS): New define.
731 2002-06-07 Chris Demetriou <cgd@broadcom.com>
733 * cp1.c (convert): Remove unusable debugging code, and move MIPS
734 rounding mode to sim FP rounding mode flag conversion code into...
735 (rounding_mode): New function.
737 2002-06-07 Chris Demetriou <cgd@broadcom.com>
739 * cp1.c: Clean up formatting of a few comments.
740 (value_fpr): Reformat switch statement.
742 2002-06-06 Chris Demetriou <cgd@broadcom.com>
743 Ed Satterthwaite <ehs@broadcom.com>
746 * sim-main.h: Include cp1.h.
747 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
748 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
749 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
750 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
751 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
752 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
753 * cp1.c: Don't include sim-fpu.h; already included by
754 sim-main.h. Clean up formatting of some comments.
755 (NaN, Equal, Less): Remove.
756 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
757 (fp_cmp): New functions.
758 * mips.igen (do_c_cond_fmt): Remove.
759 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
760 Compare. Add result tracing.
761 (CxC1): Remove, replace with...
762 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
763 (DMxC1): Remove, replace with...
764 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
765 (MxC1): Remove, replace with...
766 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
768 2002-06-04 Chris Demetriou <cgd@broadcom.com>
770 * sim-main.h (FGRIDX): Remove, replace all uses with...
771 (FGR_BASE): New macro.
772 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
773 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
774 (NR_FGR, FGR): Likewise.
775 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
776 * mips.igen: Likewise.
778 2002-06-04 Chris Demetriou <cgd@broadcom.com>
780 * cp1.c: Add an FSF Copyright notice to this file.
782 2002-06-04 Chris Demetriou <cgd@broadcom.com>
783 Ed Satterthwaite <ehs@broadcom.com>
785 * cp1.c (Infinity): Remove.
786 * sim-main.h (Infinity): Likewise.
788 * cp1.c (fp_unary, fp_binary): New functions.
789 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
790 (fp_sqrt): New functions, implemented in terms of the above.
791 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
792 (Recip, SquareRoot): Remove (replaced by functions above).
793 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
794 (fp_recip, fp_sqrt): New prototypes.
795 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
796 (Recip, SquareRoot): Replace prototypes with #defines which
797 invoke the functions above.
799 2002-06-03 Chris Demetriou <cgd@broadcom.com>
801 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
802 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
803 file, remove PARAMS from prototypes.
804 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
805 simulator state arguments.
806 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
807 pass simulator state arguments.
808 * cp1.c (SD): Redefine as CPU_STATE(cpu).
809 (store_fpr, convert): Remove 'sd' argument.
810 (value_fpr): Likewise. Convert to use 'SD' instead.
812 2002-06-03 Chris Demetriou <cgd@broadcom.com>
814 * cp1.c (Min, Max): Remove #if 0'd functions.
815 * sim-main.h (Min, Max): Remove.
817 2002-06-03 Chris Demetriou <cgd@broadcom.com>
819 * cp1.c: fix formatting of switch case and default labels.
820 * interp.c: Likewise.
821 * sim-main.c: Likewise.
823 2002-06-03 Chris Demetriou <cgd@broadcom.com>
825 * cp1.c: Clean up comments which describe FP formats.
826 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
828 2002-06-03 Chris Demetriou <cgd@broadcom.com>
829 Ed Satterthwaite <ehs@broadcom.com>
831 * configure.in (mipsisa64sb1*-*-*): New target for supporting
832 Broadcom SiByte SB-1 processor configurations.
833 * configure: Regenerate.
834 * sb1.igen: New file.
835 * mips.igen: Include sb1.igen.
837 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
838 * mdmx.igen: Add "sb1" model to all appropriate functions and
840 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
841 (ob_func, ob_acc): Reference the above.
842 (qh_acc): Adjust to keep the same size as ob_acc.
843 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
844 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
846 2002-06-03 Chris Demetriou <cgd@broadcom.com>
848 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
850 2002-06-02 Chris Demetriou <cgd@broadcom.com>
851 Ed Satterthwaite <ehs@broadcom.com>
853 * mips.igen (mdmx): New (pseudo-)model.
854 * mdmx.c, mdmx.igen: New files.
855 * Makefile.in (SIM_OBJS): Add mdmx.o.
856 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
858 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
859 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
860 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
861 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
862 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
863 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
864 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
865 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
866 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
867 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
868 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
869 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
870 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
871 (qh_fmtsel): New macros.
872 (_sim_cpu): New member "acc".
873 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
874 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
876 2002-05-01 Chris Demetriou <cgd@broadcom.com>
878 * interp.c: Use 'deprecated' rather than 'depreciated.'
879 * sim-main.h: Likewise.
881 2002-05-01 Chris Demetriou <cgd@broadcom.com>
883 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
884 which wouldn't compile anyway.
885 * sim-main.h (unpredictable_action): New function prototype.
886 (Unpredictable): Define to call igen function unpredictable().
887 (NotWordValue): New macro to call igen function not_word_value().
888 (UndefinedResult): Remove.
889 * interp.c (undefined_result): Remove.
890 (unpredictable_action): New function.
891 * mips.igen (not_word_value, unpredictable): New functions.
892 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
893 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
894 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
895 NotWordValue() to check for unpredictable inputs, then
896 Unpredictable() to handle them.
898 2002-02-24 Chris Demetriou <cgd@broadcom.com>
900 * mips.igen: Fix formatting of calls to Unpredictable().
902 2002-04-20 Andrew Cagney <ac131313@redhat.com>
904 * interp.c (sim_open): Revert previous change.
906 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
908 * interp.c (sim_open): Disable chunk of code that wrote code in
909 vector table entries.
911 2002-03-19 Chris Demetriou <cgd@broadcom.com>
913 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
914 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
917 2002-03-19 Chris Demetriou <cgd@broadcom.com>
919 * cp1.c: Fix many formatting issues.
921 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
923 * cp1.c (fpu_format_name): New function to replace...
924 (DOFMT): This. Delete, and update all callers.
925 (fpu_rounding_mode_name): New function to replace...
926 (RMMODE): This. Delete, and update all callers.
928 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
930 * interp.c: Move FPU support routines from here to...
931 * cp1.c: Here. New file.
932 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
935 2002-03-12 Chris Demetriou <cgd@broadcom.com>
937 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
938 * mips.igen (mips32, mips64): New models, add to all instructions
939 and functions as appropriate.
940 (loadstore_ea, check_u64): New variant for model mips64.
941 (check_fmt_p): New variant for models mipsV and mips64, remove
942 mipsV model marking fro other variant.
945 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
946 for mips32 and mips64.
947 (DCLO, DCLZ): New instructions for mips64.
949 2002-03-07 Chris Demetriou <cgd@broadcom.com>
951 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
952 immediate or code as a hex value with the "%#lx" format.
953 (ANDI): Likewise, and fix printed instruction name.
955 2002-03-05 Chris Demetriou <cgd@broadcom.com>
957 * sim-main.h (UndefinedResult, Unpredictable): New macros
958 which currently do nothing.
960 2002-03-05 Chris Demetriou <cgd@broadcom.com>
962 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
963 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
964 (status_CU3): New definitions.
966 * sim-main.h (ExceptionCause): Add new values for MIPS32
967 and MIPS64: MDMX, MCheck, CacheErr. Update comments
968 for DebugBreakPoint and NMIReset to note their status in
970 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
971 (SignalExceptionCacheErr): New exception macros.
973 2002-03-05 Chris Demetriou <cgd@broadcom.com>
975 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
976 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
978 (SignalExceptionCoProcessorUnusable): Take as argument the
979 unusable coprocessor number.
981 2002-03-05 Chris Demetriou <cgd@broadcom.com>
983 * mips.igen: Fix formatting of all SignalException calls.
985 2002-03-05 Chris Demetriou <cgd@broadcom.com>
987 * sim-main.h (SIGNEXTEND): Remove.
989 2002-03-04 Chris Demetriou <cgd@broadcom.com>
991 * mips.igen: Remove gencode comment from top of file, fix
992 spelling in another comment.
994 2002-03-04 Chris Demetriou <cgd@broadcom.com>
996 * mips.igen (check_fmt, check_fmt_p): New functions to check
997 whether specific floating point formats are usable.
998 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
999 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1000 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1001 Use the new functions.
1002 (do_c_cond_fmt): Remove format checks...
1003 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1005 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1007 * mips.igen: Fix formatting of check_fpu calls.
1009 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1011 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1013 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1015 * mips.igen: Remove whitespace at end of lines.
1017 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1019 * mips.igen (loadstore_ea): New function to do effective
1020 address calculations.
1021 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1022 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1023 CACHE): Use loadstore_ea to do effective address computations.
1025 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1027 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1028 * mips.igen (LL, CxC1, MxC1): Likewise.
1030 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1032 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1033 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1034 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1035 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1036 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1037 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1038 Don't split opcode fields by hand, use the opcode field values
1041 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1043 * mips.igen (do_divu): Fix spacing.
1045 * mips.igen (do_dsllv): Move to be right before DSLLV,
1046 to match the rest of the do_<shift> functions.
1048 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1050 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1051 DSRL32, do_dsrlv): Trace inputs and results.
1053 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1055 * mips.igen (CACHE): Provide instruction-printing string.
1057 * interp.c (signal_exception): Comment tokens after #endif.
1059 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1061 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1062 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1063 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1064 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1065 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1066 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1067 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1068 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1070 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1072 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1073 instruction-printing string.
1074 (LWU): Use '64' as the filter flag.
1076 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1078 * mips.igen (SDXC1): Fix instruction-printing string.
1080 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1082 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1083 filter flags "32,f".
1085 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1087 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1090 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1092 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1093 add a comma) so that it more closely match the MIPS ISA
1094 documentation opcode partitioning.
1095 (PREF): Put useful names on opcode fields, and include
1096 instruction-printing string.
1098 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1100 * mips.igen (check_u64): New function which in the future will
1101 check whether 64-bit instructions are usable and signal an
1102 exception if not. Currently a no-op.
1103 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1104 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1105 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1106 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1108 * mips.igen (check_fpu): New function which in the future will
1109 check whether FPU instructions are usable and signal an exception
1110 if not. Currently a no-op.
1111 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1112 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1113 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1114 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1115 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1116 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1117 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1118 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1120 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1122 * mips.igen (do_load_left, do_load_right): Move to be immediately
1124 (do_store_left, do_store_right): Move to be immediately following
1127 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1129 * mips.igen (mipsV): New model name. Also, add it to
1130 all instructions and functions where it is appropriate.
1132 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1134 * mips.igen: For all functions and instructions, list model
1135 names that support that instruction one per line.
1137 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1139 * mips.igen: Add some additional comments about supported
1140 models, and about which instructions go where.
1141 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1142 order as is used in the rest of the file.
1144 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1146 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1147 indicating that ALU32_END or ALU64_END are there to check
1149 (DADD): Likewise, but also remove previous comment about
1152 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1154 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1155 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1156 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1157 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1158 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1159 fields (i.e., add and move commas) so that they more closely
1160 match the MIPS ISA documentation opcode partitioning.
1162 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1164 * mips.igen (ADDI): Print immediate value.
1165 (BREAK): Print code.
1166 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1167 (SLL): Print "nop" specially, and don't run the code
1168 that does the shift for the "nop" case.
1170 2001-11-17 Fred Fish <fnf@redhat.com>
1172 * sim-main.h (float_operation): Move enum declaration outside
1173 of _sim_cpu struct declaration.
1175 2001-04-12 Jim Blandy <jimb@redhat.com>
1177 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1178 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1180 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1181 PENDING_FILL, and you can get the intended effect gracefully by
1182 calling PENDING_SCHED directly.
1184 2001-02-23 Ben Elliston <bje@redhat.com>
1186 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1187 already defined elsewhere.
1189 2001-02-19 Ben Elliston <bje@redhat.com>
1191 * sim-main.h (sim_monitor): Return an int.
1192 * interp.c (sim_monitor): Add return values.
1193 (signal_exception): Handle error conditions from sim_monitor.
1195 2001-02-08 Ben Elliston <bje@redhat.com>
1197 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1198 (store_memory): Likewise, pass cia to sim_core_write*.
1200 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1202 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1203 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1205 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1207 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1208 * Makefile.in: Don't delete *.igen when cleaning directory.
1210 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1212 * m16.igen (break): Call SignalException not sim_engine_halt.
1214 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1216 From Jason Eckhardt:
1217 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1219 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1221 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1223 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1225 * mips.igen (do_dmultx): Fix typo.
1227 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1229 * configure: Regenerated to track ../common/aclocal.m4 changes.
1231 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1233 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1235 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1237 * sim-main.h (GPR_CLEAR): Define macro.
1239 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1241 * interp.c (decode_coproc): Output long using %lx and not %s.
1243 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1245 * interp.c (sim_open): Sort & extend dummy memory regions for
1246 --board=jmr3904 for eCos.
1248 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1250 * configure: Regenerated.
1252 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1254 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1255 calls, conditional on the simulator being in verbose mode.
1257 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1259 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1260 cache don't get ReservedInstruction traps.
1262 1999-11-29 Mark Salter <msalter@cygnus.com>
1264 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1265 to clear status bits in sdisr register. This is how the hardware works.
1267 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1268 being used by cygmon.
1270 1999-11-11 Andrew Haley <aph@cygnus.com>
1272 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1275 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1277 * mips.igen (MULT): Correct previous mis-applied patch.
1279 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1281 * mips.igen (delayslot32): Handle sequence like
1282 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1283 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1284 (MULT): Actually pass the third register...
1286 1999-09-03 Mark Salter <msalter@cygnus.com>
1288 * interp.c (sim_open): Added more memory aliases for additional
1289 hardware being touched by cygmon on jmr3904 board.
1291 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1293 * configure: Regenerated to track ../common/aclocal.m4 changes.
1295 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1297 * interp.c (sim_store_register): Handle case where client - GDB -
1298 specifies that a 4 byte register is 8 bytes in size.
1299 (sim_fetch_register): Ditto.
1301 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1303 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1304 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1305 (idt_monitor_base): Base address for IDT monitor traps.
1306 (pmon_monitor_base): Ditto for PMON.
1307 (lsipmon_monitor_base): Ditto for LSI PMON.
1308 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1309 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1310 (sim_firmware_command): New function.
1311 (mips_option_handler): Call it for OPTION_FIRMWARE.
1312 (sim_open): Allocate memory for idt_monitor region. If "--board"
1313 option was given, add no monitor by default. Add BREAK hooks only if
1314 monitors are also there.
1316 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1318 * interp.c (sim_monitor): Flush output before reading input.
1320 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1322 * tconfig.in (SIM_HANDLES_LMA): Always define.
1324 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1326 From Mark Salter <msalter@cygnus.com>:
1327 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1328 (sim_open): Add setup for BSP board.
1330 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1332 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1333 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1334 them as unimplemented.
1336 1999-05-08 Felix Lee <flee@cygnus.com>
1338 * configure: Regenerated to track ../common/aclocal.m4 changes.
1340 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1342 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1344 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1346 * configure.in: Any mips64vr5*-*-* target should have
1347 -DTARGET_ENABLE_FR=1.
1348 (default_endian): Any mips64vr*el-*-* target should default to
1350 * configure: Re-generate.
1352 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1354 * mips.igen (ldl): Extend from _16_, not 32.
1356 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1358 * interp.c (sim_store_register): Force registers written to by GDB
1359 into an un-interpreted state.
1361 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1363 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1364 CPU, start periodic background I/O polls.
1365 (tx3904sio_poll): New function: periodic I/O poller.
1367 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1369 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1371 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1373 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1376 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1378 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1379 (load_word): Call SIM_CORE_SIGNAL hook on error.
1380 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1381 starting. For exception dispatching, pass PC instead of NULL_CIA.
1382 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1383 * sim-main.h (COP0_BADVADDR): Define.
1384 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1385 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1386 (_sim_cpu): Add exc_* fields to store register value snapshots.
1387 * mips.igen (*): Replace memory-related SignalException* calls
1388 with references to SIM_CORE_SIGNAL hook.
1390 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1392 * sim-main.c (*): Minor warning cleanups.
1394 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1396 * m16.igen (DADDIU5): Correct type-o.
1398 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1400 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1403 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1405 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1407 (interp.o): Add dependency on itable.h
1408 (oengine.c, gencode): Delete remaining references.
1409 (BUILT_SRC_FROM_GEN): Clean up.
1411 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1414 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1415 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1416 tmp-run-hack) : New.
1417 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1418 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1419 Drop the "64" qualifier to get the HACK generator working.
1420 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1421 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1422 qualifier to get the hack generator working.
1423 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1424 (DSLL): Use do_dsll.
1425 (DSLLV): Use do_dsllv.
1426 (DSRA): Use do_dsra.
1427 (DSRL): Use do_dsrl.
1428 (DSRLV): Use do_dsrlv.
1429 (BC1): Move *vr4100 to get the HACK generator working.
1430 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1431 get the HACK generator working.
1432 (MACC) Rename to get the HACK generator working.
1433 (DMACC,MACCS,DMACCS): Add the 64.
1435 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1437 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1438 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1440 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1442 * mips/interp.c (DEBUG): Cleanups.
1444 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1446 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1447 (tx3904sio_tickle): fflush after a stdout character output.
1449 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1451 * interp.c (sim_close): Uninstall modules.
1453 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1455 * sim-main.h, interp.c (sim_monitor): Change to global
1458 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1460 * configure.in (vr4100): Only include vr4100 instructions in
1462 * configure: Re-generate.
1463 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1465 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1467 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1468 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1471 * configure.in (sim_default_gen, sim_use_gen): Replace with
1473 (--enable-sim-igen): Delete config option. Always using IGEN.
1474 * configure: Re-generate.
1476 * Makefile.in (gencode): Kill, kill, kill.
1479 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1481 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1482 bit mips16 igen simulator.
1483 * configure: Re-generate.
1485 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1486 as part of vr4100 ISA.
1487 * vr.igen: Mark all instructions as 64 bit only.
1489 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1491 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1494 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1496 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1497 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1498 * configure: Re-generate.
1500 * m16.igen (BREAK): Define breakpoint instruction.
1501 (JALX32): Mark instruction as mips16 and not r3900.
1502 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1504 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1506 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1508 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1509 insn as a debug breakpoint.
1511 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1513 (PENDING_SCHED): Clean up trace statement.
1514 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1515 (PENDING_FILL): Delay write by only one cycle.
1516 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1518 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1520 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1522 (pending_tick): Move incrementing of index to FOR statement.
1523 (pending_tick): Only update PENDING_OUT after a write has occured.
1525 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1527 * configure: Re-generate.
1529 * interp.c (sim_engine_run OLD): Delete explicit call to
1530 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1532 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1534 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1535 interrupt level number to match changed SignalExceptionInterrupt
1538 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1540 * interp.c: #include "itable.h" if WITH_IGEN.
1541 (get_insn_name): New function.
1542 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1543 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1545 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1547 * configure: Rebuilt to inhale new common/aclocal.m4.
1549 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1551 * dv-tx3904sio.c: Include sim-assert.h.
1553 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1555 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1556 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1557 Reorganize target-specific sim-hardware checks.
1558 * configure: rebuilt.
1559 * interp.c (sim_open): For tx39 target boards, set
1560 OPERATING_ENVIRONMENT, add tx3904sio devices.
1561 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1562 ROM executables. Install dv-sockser into sim-modules list.
1564 * dv-tx3904irc.c: Compiler warning clean-up.
1565 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1566 frequent hw-trace messages.
1568 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1570 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1572 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1574 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1576 * vr.igen: New file.
1577 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1578 * mips.igen: Define vr4100 model. Include vr.igen.
1579 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1581 * mips.igen (check_mf_hilo): Correct check.
1583 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1585 * sim-main.h (interrupt_event): Add prototype.
1587 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1588 register_ptr, register_value.
1589 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1591 * sim-main.h (tracefh): Make extern.
1593 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1595 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1596 Reduce unnecessarily high timer event frequency.
1597 * dv-tx3904cpu.c: Ditto for interrupt event.
1599 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1601 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1603 (interrupt_event): Made non-static.
1605 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1606 interchange of configuration values for external vs. internal
1609 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1611 * mips.igen (BREAK): Moved code to here for
1612 simulator-reserved break instructions.
1613 * gencode.c (build_instruction): Ditto.
1614 * interp.c (signal_exception): Code moved from here. Non-
1615 reserved instructions now use exception vector, rather
1617 * sim-main.h: Moved magic constants to here.
1619 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1621 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1622 register upon non-zero interrupt event level, clear upon zero
1624 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1625 by passing zero event value.
1626 (*_io_{read,write}_buffer): Endianness fixes.
1627 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1628 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1630 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1631 serial I/O and timer module at base address 0xFFFF0000.
1633 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1635 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1638 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1640 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1642 * configure: Update.
1644 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1646 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1647 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1648 * configure.in: Include tx3904tmr in hw_device list.
1649 * configure: Rebuilt.
1650 * interp.c (sim_open): Instantiate three timer instances.
1651 Fix address typo of tx3904irc instance.
1653 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1655 * interp.c (signal_exception): SystemCall exception now uses
1656 the exception vector.
1658 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1660 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1663 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1665 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1667 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1669 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1671 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1672 sim-main.h. Declare a struct hw_descriptor instead of struct
1673 hw_device_descriptor.
1675 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1677 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1678 right bits and then re-align left hand bytes to correct byte
1679 lanes. Fix incorrect computation in do_store_left when loading
1680 bytes from second word.
1682 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1684 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1685 * interp.c (sim_open): Only create a device tree when HW is
1688 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1689 * interp.c (signal_exception): Ditto.
1691 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1693 * gencode.c: Mark BEGEZALL as LIKELY.
1695 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1697 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1698 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1700 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1702 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1703 modules. Recognize TX39 target with "mips*tx39" pattern.
1704 * configure: Rebuilt.
1705 * sim-main.h (*): Added many macros defining bits in
1706 TX39 control registers.
1707 (SignalInterrupt): Send actual PC instead of NULL.
1708 (SignalNMIReset): New exception type.
1709 * interp.c (board): New variable for future use to identify
1710 a particular board being simulated.
1711 (mips_option_handler,mips_options): Added "--board" option.
1712 (interrupt_event): Send actual PC.
1713 (sim_open): Make memory layout conditional on board setting.
1714 (signal_exception): Initial implementation of hardware interrupt
1715 handling. Accept another break instruction variant for simulator
1717 (decode_coproc): Implement RFE instruction for TX39.
1718 (mips.igen): Decode RFE instruction as such.
1719 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1720 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1721 bbegin to implement memory map.
1722 * dv-tx3904cpu.c: New file.
1723 * dv-tx3904irc.c: New file.
1725 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1727 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1729 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1731 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1732 with calls to check_div_hilo.
1734 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1736 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1737 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1738 Add special r3900 version of do_mult_hilo.
1739 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1740 with calls to check_mult_hilo.
1741 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1742 with calls to check_div_hilo.
1744 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1746 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1747 Document a replacement.
1749 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1751 * interp.c (sim_monitor): Make mon_printf work.
1753 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1755 * sim-main.h (INSN_NAME): New arg `cpu'.
1757 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1759 * configure: Regenerated to track ../common/aclocal.m4 changes.
1761 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1763 * configure: Regenerated to track ../common/aclocal.m4 changes.
1766 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1768 * acconfig.h: New file.
1769 * configure.in: Reverted change of Apr 24; use sinclude again.
1771 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1773 * configure: Regenerated to track ../common/aclocal.m4 changes.
1776 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1778 * configure.in: Don't call sinclude.
1780 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1782 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1784 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1786 * mips.igen (ERET): Implement.
1788 * interp.c (decode_coproc): Return sign-extended EPC.
1790 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1792 * interp.c (signal_exception): Do not ignore Trap.
1793 (signal_exception): On TRAP, restart at exception address.
1794 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1795 (signal_exception): Update.
1796 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1797 so that TRAP instructions are caught.
1799 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1801 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1802 contains HI/LO access history.
1803 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1804 (HIACCESS, LOACCESS): Delete, replace with
1805 (HIHISTORY, LOHISTORY): New macros.
1806 (CHECKHILO): Delete all, moved to mips.igen
1808 * gencode.c (build_instruction): Do not generate checks for
1809 correct HI/LO register usage.
1811 * interp.c (old_engine_run): Delete checks for correct HI/LO
1814 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1815 check_mf_cycles): New functions.
1816 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1817 do_divu, domultx, do_mult, do_multu): Use.
1819 * tx.igen ("madd", "maddu"): Use.
1821 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1823 * mips.igen (DSRAV): Use function do_dsrav.
1824 (SRAV): Use new function do_srav.
1826 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1827 (B): Sign extend 11 bit immediate.
1828 (EXT-B*): Shift 16 bit immediate left by 1.
1829 (ADDIU*): Don't sign extend immediate value.
1831 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1833 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1835 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1838 * mips.igen (delayslot32, nullify_next_insn): New functions.
1839 (m16.igen): Always include.
1840 (do_*): Add more tracing.
1842 * m16.igen (delayslot16): Add NIA argument, could be called by a
1843 32 bit MIPS16 instruction.
1845 * interp.c (ifetch16): Move function from here.
1846 * sim-main.c (ifetch16): To here.
1848 * sim-main.c (ifetch16, ifetch32): Update to match current
1849 implementations of LH, LW.
1850 (signal_exception): Don't print out incorrect hex value of illegal
1853 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1855 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1858 * m16.igen: Implement MIPS16 instructions.
1860 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1861 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1862 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1863 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1864 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1865 bodies of corresponding code from 32 bit insn to these. Also used
1866 by MIPS16 versions of functions.
1868 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1869 (IMEM16): Drop NR argument from macro.
1871 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1873 * Makefile.in (SIM_OBJS): Add sim-main.o.
1875 * sim-main.h (address_translation, load_memory, store_memory,
1876 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1878 (pr_addr, pr_uword64): Declare.
1879 (sim-main.c): Include when H_REVEALS_MODULE_P.
1881 * interp.c (address_translation, load_memory, store_memory,
1882 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1884 * sim-main.c: To here. Fix compilation problems.
1886 * configure.in: Enable inlining.
1887 * configure: Re-config.
1889 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1891 * configure: Regenerated to track ../common/aclocal.m4 changes.
1893 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1895 * mips.igen: Include tx.igen.
1896 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1897 * tx.igen: New file, contains MADD and MADDU.
1899 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1900 the hardwired constant `7'.
1901 (store_memory): Ditto.
1902 (LOADDRMASK): Move definition to sim-main.h.
1904 mips.igen (MTC0): Enable for r3900.
1907 mips.igen (do_load_byte): Delete.
1908 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1909 do_store_right): New functions.
1910 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1912 configure.in: Let the tx39 use igen again.
1915 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1917 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1918 not an address sized quantity. Return zero for cache sizes.
1920 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1922 * mips.igen (r3900): r3900 does not support 64 bit integer
1925 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1927 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1929 * configure : Rebuild.
1931 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1933 * configure: Regenerated to track ../common/aclocal.m4 changes.
1935 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1937 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1939 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1941 * configure: Regenerated to track ../common/aclocal.m4 changes.
1942 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1944 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1946 * configure: Regenerated to track ../common/aclocal.m4 changes.
1948 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1950 * interp.c (Max, Min): Comment out functions. Not yet used.
1952 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1954 * configure: Regenerated to track ../common/aclocal.m4 changes.
1956 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1958 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1959 configurable settings for stand-alone simulator.
1961 * configure.in: Added X11 search, just in case.
1963 * configure: Regenerated.
1965 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1967 * interp.c (sim_write, sim_read, load_memory, store_memory):
1968 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1970 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1972 * sim-main.h (GETFCC): Return an unsigned value.
1974 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1976 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1977 (DADD): Result destination is RD not RT.
1979 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1981 * sim-main.h (HIACCESS, LOACCESS): Always define.
1983 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1985 * interp.c (sim_info): Delete.
1987 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1989 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1990 (mips_option_handler): New argument `cpu'.
1991 (sim_open): Update call to sim_add_option_table.
1993 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1995 * mips.igen (CxC1): Add tracing.
1997 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1999 * sim-main.h (Max, Min): Declare.
2001 * interp.c (Max, Min): New functions.
2003 * mips.igen (BC1): Add tracing.
2005 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2007 * interp.c Added memory map for stack in vr4100
2009 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2011 * interp.c (load_memory): Add missing "break"'s.
2013 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2015 * interp.c (sim_store_register, sim_fetch_register): Pass in
2016 length parameter. Return -1.
2018 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2020 * interp.c: Added hardware init hook, fixed warnings.
2022 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2024 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2026 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2028 * interp.c (ifetch16): New function.
2030 * sim-main.h (IMEM32): Rename IMEM.
2031 (IMEM16_IMMED): Define.
2033 (DELAY_SLOT): Update.
2035 * m16run.c (sim_engine_run): New file.
2037 * m16.igen: All instructions except LB.
2038 (LB): Call do_load_byte.
2039 * mips.igen (do_load_byte): New function.
2040 (LB): Call do_load_byte.
2042 * mips.igen: Move spec for insn bit size and high bit from here.
2043 * Makefile.in (tmp-igen, tmp-m16): To here.
2045 * m16.dc: New file, decode mips16 instructions.
2047 * Makefile.in (SIM_NO_ALL): Define.
2048 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2050 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2052 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2053 point unit to 32 bit registers.
2054 * configure: Re-generate.
2056 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2058 * configure.in (sim_use_gen): Make IGEN the default simulator
2059 generator for generic 32 and 64 bit mips targets.
2060 * configure: Re-generate.
2062 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2064 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2067 * interp.c (sim_fetch_register, sim_store_register): Read/write
2068 FGR from correct location.
2069 (sim_open): Set size of FGR's according to
2070 WITH_TARGET_FLOATING_POINT_BITSIZE.
2072 * sim-main.h (FGR): Store floating point registers in a separate
2075 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2077 * configure: Regenerated to track ../common/aclocal.m4 changes.
2079 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2081 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2083 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2085 * interp.c (pending_tick): New function. Deliver pending writes.
2087 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2088 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2089 it can handle mixed sized quantites and single bits.
2091 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2093 * interp.c (oengine.h): Do not include when building with IGEN.
2094 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2095 (sim_info): Ditto for PROCESSOR_64BIT.
2096 (sim_monitor): Replace ut_reg with unsigned_word.
2097 (*): Ditto for t_reg.
2098 (LOADDRMASK): Define.
2099 (sim_open): Remove defunct check that host FP is IEEE compliant,
2100 using software to emulate floating point.
2101 (value_fpr, ...): Always compile, was conditional on HASFPU.
2103 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2105 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2108 * interp.c (SD, CPU): Define.
2109 (mips_option_handler): Set flags in each CPU.
2110 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2111 (sim_close): Do not clear STATE, deleted anyway.
2112 (sim_write, sim_read): Assume CPU zero's vm should be used for
2114 (sim_create_inferior): Set the PC for all processors.
2115 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2117 (mips16_entry): Pass correct nr of args to store_word, load_word.
2118 (ColdReset): Cold reset all cpu's.
2119 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2120 (sim_monitor, load_memory, store_memory, signal_exception): Use
2121 `CPU' instead of STATE_CPU.
2124 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2127 * sim-main.h (signal_exception): Add sim_cpu arg.
2128 (SignalException*): Pass both SD and CPU to signal_exception.
2129 * interp.c (signal_exception): Update.
2131 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2133 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2134 address_translation): Ditto
2135 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2137 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2139 * configure: Regenerated to track ../common/aclocal.m4 changes.
2141 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2143 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2145 * mips.igen (model): Map processor names onto BFD name.
2147 * sim-main.h (CPU_CIA): Delete.
2148 (SET_CIA, GET_CIA): Define
2150 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2152 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2155 * configure.in (default_endian): Configure a big-endian simulator
2157 * configure: Re-generate.
2159 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2161 * configure: Regenerated to track ../common/aclocal.m4 changes.
2163 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2165 * interp.c (sim_monitor): Handle Densan monitor outbyte
2166 and inbyte functions.
2168 1997-12-29 Felix Lee <flee@cygnus.com>
2170 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2172 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2174 * Makefile.in (tmp-igen): Arrange for $zero to always be
2175 reset to zero after every instruction.
2177 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2179 * configure: Regenerated to track ../common/aclocal.m4 changes.
2182 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2184 * mips.igen (MSUB): Fix to work like MADD.
2185 * gencode.c (MSUB): Similarly.
2187 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2189 * configure: Regenerated to track ../common/aclocal.m4 changes.
2191 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2193 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2195 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2197 * sim-main.h (sim-fpu.h): Include.
2199 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2200 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2201 using host independant sim_fpu module.
2203 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2205 * interp.c (signal_exception): Report internal errors with SIGABRT
2208 * sim-main.h (C0_CONFIG): New register.
2209 (signal.h): No longer include.
2211 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2213 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2215 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2217 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2219 * mips.igen: Tag vr5000 instructions.
2220 (ANDI): Was missing mipsIV model, fix assembler syntax.
2221 (do_c_cond_fmt): New function.
2222 (C.cond.fmt): Handle mips I-III which do not support CC field
2224 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2225 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2227 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2228 vr5000 which saves LO in a GPR separatly.
2230 * configure.in (enable-sim-igen): For vr5000, select vr5000
2231 specific instructions.
2232 * configure: Re-generate.
2234 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2236 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2238 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2239 fmt_uninterpreted_64 bit cases to switch. Convert to
2242 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2244 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2245 as specified in IV3.2 spec.
2246 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2248 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2250 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2251 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2252 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2253 PENDING_FILL versions of instructions. Simplify.
2255 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2257 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2259 (MTHI, MFHI): Disable code checking HI-LO.
2261 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2263 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2265 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2267 * gencode.c (build_mips16_operands): Replace IPC with cia.
2269 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2270 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2272 (UndefinedResult): Replace function with macro/function
2274 (sim_engine_run): Don't save PC in IPC.
2276 * sim-main.h (IPC): Delete.
2279 * interp.c (signal_exception, store_word, load_word,
2280 address_translation, load_memory, store_memory, cache_op,
2281 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2282 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2283 current instruction address - cia - argument.
2284 (sim_read, sim_write): Call address_translation directly.
2285 (sim_engine_run): Rename variable vaddr to cia.
2286 (signal_exception): Pass cia to sim_monitor
2288 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2289 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2290 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2292 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2293 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2296 * interp.c (signal_exception): Pass restart address to
2299 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2300 idecode.o): Add dependency.
2302 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2304 (DELAY_SLOT): Update NIA not PC with branch address.
2305 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2307 * mips.igen: Use CIA not PC in branch calculations.
2308 (illegal): Call SignalException.
2309 (BEQ, ADDIU): Fix assembler.
2311 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2313 * m16.igen (JALX): Was missing.
2315 * configure.in (enable-sim-igen): New configuration option.
2316 * configure: Re-generate.
2318 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2320 * interp.c (load_memory, store_memory): Delete parameter RAW.
2321 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2322 bypassing {load,store}_memory.
2324 * sim-main.h (ByteSwapMem): Delete definition.
2326 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2328 * interp.c (sim_do_command, sim_commands): Delete mips specific
2329 commands. Handled by module sim-options.
2331 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2332 (WITH_MODULO_MEMORY): Define.
2334 * interp.c (sim_info): Delete code printing memory size.
2336 * interp.c (mips_size): Nee sim_size, delete function.
2338 (monitor, monitor_base, monitor_size): Delete global variables.
2339 (sim_open, sim_close): Delete code creating monitor and other
2340 memory regions. Use sim-memopts module, via sim_do_commandf, to
2341 manage memory regions.
2342 (load_memory, store_memory): Use sim-core for memory model.
2344 * interp.c (address_translation): Delete all memory map code
2345 except line forcing 32 bit addresses.
2347 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2349 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2352 * interp.c (logfh, logfile): Delete globals.
2353 (sim_open, sim_close): Delete code opening & closing log file.
2354 (mips_option_handler): Delete -l and -n options.
2355 (OPTION mips_options): Ditto.
2357 * interp.c (OPTION mips_options): Rename option trace to dinero.
2358 (mips_option_handler): Update.
2360 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2362 * interp.c (fetch_str): New function.
2363 (sim_monitor): Rewrite using sim_read & sim_write.
2364 (sim_open): Check magic number.
2365 (sim_open): Write monitor vectors into memory using sim_write.
2366 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2367 (sim_read, sim_write): Simplify - transfer data one byte at a
2369 (load_memory, store_memory): Clarify meaning of parameter RAW.
2371 * sim-main.h (isHOST): Defete definition.
2372 (isTARGET): Mark as depreciated.
2373 (address_translation): Delete parameter HOST.
2375 * interp.c (address_translation): Delete parameter HOST.
2377 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2381 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2382 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2384 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2386 * mips.igen: Add model filter field to records.
2388 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2390 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2392 interp.c (sim_engine_run): Do not compile function sim_engine_run
2393 when WITH_IGEN == 1.
2395 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2396 target architecture.
2398 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2399 igen. Replace with configuration variables sim_igen_flags /
2402 * m16.igen: New file. Copy mips16 insns here.
2403 * mips.igen: From here.
2405 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2407 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2409 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2411 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2413 * gencode.c (build_instruction): Follow sim_write's lead in using
2414 BigEndianMem instead of !ByteSwapMem.
2416 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2418 * configure.in (sim_gen): Dependent on target, select type of
2419 generator. Always select old style generator.
2421 configure: Re-generate.
2423 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2425 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2426 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2427 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2428 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2429 SIM_@sim_gen@_*, set by autoconf.
2431 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2433 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2435 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2436 CURRENT_FLOATING_POINT instead.
2438 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2439 (address_translation): Raise exception InstructionFetch when
2440 translation fails and isINSTRUCTION.
2442 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2443 sim_engine_run): Change type of of vaddr and paddr to
2445 (address_translation, prefetch, load_memory, store_memory,
2446 cache_op): Change type of vAddr and pAddr to address_word.
2448 * gencode.c (build_instruction): Change type of vaddr and paddr to
2451 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2453 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2454 macro to obtain result of ALU op.
2456 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * interp.c (sim_info): Call profile_print.
2460 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2462 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2464 * sim-main.h (WITH_PROFILE): Do not define, defined in
2465 common/sim-config.h. Use sim-profile module.
2466 (simPROFILE): Delete defintion.
2468 * interp.c (PROFILE): Delete definition.
2469 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2470 (sim_close): Delete code writing profile histogram.
2471 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2473 (sim_engine_run): Delete code profiling the PC.
2475 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2477 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2479 * interp.c (sim_monitor): Make register pointers of type
2482 * sim-main.h: Make registers of type unsigned_word not
2485 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2487 * interp.c (sync_operation): Rename from SyncOperation, make
2488 global, add SD argument.
2489 (prefetch): Rename from Prefetch, make global, add SD argument.
2490 (decode_coproc): Make global.
2492 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2494 * gencode.c (build_instruction): Generate DecodeCoproc not
2495 decode_coproc calls.
2497 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2498 (SizeFGR): Move to sim-main.h
2499 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2500 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2501 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2503 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2504 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2505 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2506 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2507 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2508 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2510 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2512 (sim-alu.h): Include.
2513 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2514 (sim_cia): Typedef to instruction_address.
2516 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2518 * Makefile.in (interp.o): Rename generated file engine.c to
2523 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2525 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2527 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2529 * gencode.c (build_instruction): For "FPSQRT", output correct
2530 number of arguments to Recip.
2532 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2534 * Makefile.in (interp.o): Depends on sim-main.h
2536 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2538 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2539 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2540 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2541 STATE, DSSTATE): Define
2542 (GPR, FGRIDX, ..): Define.
2544 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2545 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2546 (GPR, FGRIDX, ...): Delete macros.
2548 * interp.c: Update names to match defines from sim-main.h
2550 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2552 * interp.c (sim_monitor): Add SD argument.
2553 (sim_warning): Delete. Replace calls with calls to
2555 (sim_error): Delete. Replace calls with sim_io_error.
2556 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2557 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2558 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2560 (mips_size): Rename from sim_size. Add SD argument.
2562 * interp.c (simulator): Delete global variable.
2563 (callback): Delete global variable.
2564 (mips_option_handler, sim_open, sim_write, sim_read,
2565 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2566 sim_size,sim_monitor): Use sim_io_* not callback->*.
2567 (sim_open): ZALLOC simulator struct.
2568 (PROFILE): Do not define.
2570 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2572 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2573 support.h with corresponding code.
2575 * sim-main.h (word64, uword64), support.h: Move definition to
2577 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2580 * Makefile.in: Update dependencies
2581 * interp.c: Do not include.
2583 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2585 * interp.c (address_translation, load_memory, store_memory,
2586 cache_op): Rename to from AddressTranslation et.al., make global,
2589 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2592 * interp.c (SignalException): Rename to signal_exception, make
2595 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2597 * sim-main.h (SignalException, SignalExceptionInterrupt,
2598 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2599 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2600 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2603 * interp.c, support.h: Use.
2605 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2607 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2608 to value_fpr / store_fpr. Add SD argument.
2609 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2610 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2612 * sim-main.h (ValueFPR, StoreFPR): Define.
2614 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2616 * interp.c (sim_engine_run): Check consistency between configure
2617 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2620 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2621 (mips_fpu): Configure WITH_FLOATING_POINT.
2622 (mips_endian): Configure WITH_TARGET_ENDIAN.
2623 * configure: Update.
2625 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2627 * configure: Regenerated to track ../common/aclocal.m4 changes.
2629 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2631 * configure: Regenerated.
2633 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2635 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2637 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2639 * gencode.c (print_igen_insn_models): Assume certain architectures
2640 include all mips* instructions.
2641 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2644 * Makefile.in (tmp.igen): Add target. Generate igen input from
2647 * gencode.c (FEATURE_IGEN): Define.
2648 (main): Add --igen option. Generate output in igen format.
2649 (process_instructions): Format output according to igen option.
2650 (print_igen_insn_format): New function.
2651 (print_igen_insn_models): New function.
2652 (process_instructions): Only issue warnings and ignore
2653 instructions when no FEATURE_IGEN.
2655 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2657 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2660 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2662 * configure: Regenerated to track ../common/aclocal.m4 changes.
2664 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2666 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2667 SIM_RESERVED_BITS): Delete, moved to common.
2668 (SIM_EXTRA_CFLAGS): Update.
2670 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2672 * configure.in: Configure non-strict memory alignment.
2673 * configure: Regenerated to track ../common/aclocal.m4 changes.
2675 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2677 * configure: Regenerated to track ../common/aclocal.m4 changes.
2679 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2681 * gencode.c (SDBBP,DERET): Added (3900) insns.
2682 (RFE): Turn on for 3900.
2683 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2684 (dsstate): Made global.
2685 (SUBTARGET_R3900): Added.
2686 (CANCELDELAYSLOT): New.
2687 (SignalException): Ignore SystemCall rather than ignore and
2688 terminate. Add DebugBreakPoint handling.
2689 (decode_coproc): New insns RFE, DERET; and new registers Debug
2690 and DEPC protected by SUBTARGET_R3900.
2691 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2693 * Makefile.in,configure.in: Add mips subtarget option.
2694 * configure: Update.
2696 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2698 * gencode.c: Add r3900 (tx39).
2701 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2703 * gencode.c (build_instruction): Don't need to subtract 4 for
2706 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2708 * interp.c: Correct some HASFPU problems.
2710 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2712 * configure: Regenerated to track ../common/aclocal.m4 changes.
2714 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2716 * interp.c (mips_options): Fix samples option short form, should
2719 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2721 * interp.c (sim_info): Enable info code. Was just returning.
2723 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2725 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2728 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2732 (build_instruction): Ditto for LL.
2734 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2736 * configure: Regenerated to track ../common/aclocal.m4 changes.
2738 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2740 * configure: Regenerated to track ../common/aclocal.m4 changes.
2743 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2745 * interp.c (sim_open): Add call to sim_analyze_program, update
2748 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2750 * interp.c (sim_kill): Delete.
2751 (sim_create_inferior): Add ABFD argument. Set PC from same.
2752 (sim_load): Move code initializing trap handlers from here.
2753 (sim_open): To here.
2754 (sim_load): Delete, use sim-hload.c.
2756 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2758 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2760 * configure: Regenerated to track ../common/aclocal.m4 changes.
2763 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2765 * interp.c (sim_open): Add ABFD argument.
2766 (sim_load): Move call to sim_config from here.
2767 (sim_open): To here. Check return status.
2769 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2771 * gencode.c (build_instruction): Two arg MADD should
2772 not assign result to $0.
2774 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2776 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2777 * sim/mips/configure.in: Regenerate.
2779 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2781 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2782 signed8, unsigned8 et.al. types.
2784 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2785 hosts when selecting subreg.
2787 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2789 * interp.c (sim_engine_run): Reset the ZERO register to zero
2790 regardless of FEATURE_WARN_ZERO.
2791 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2793 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2795 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2796 (SignalException): For BreakPoints ignore any mode bits and just
2798 (SignalException): Always set the CAUSE register.
2800 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2802 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2803 exception has been taken.
2805 * interp.c: Implement the ERET and mt/f sr instructions.
2807 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2809 * interp.c (SignalException): Don't bother restarting an
2812 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2814 * interp.c (SignalException): Really take an interrupt.
2815 (interrupt_event): Only deliver interrupts when enabled.
2817 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2819 * interp.c (sim_info): Only print info when verbose.
2820 (sim_info) Use sim_io_printf for output.
2822 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2824 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2827 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2829 * interp.c (sim_do_command): Check for common commands if a
2830 simulator specific command fails.
2832 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2834 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2835 and simBE when DEBUG is defined.
2837 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2839 * interp.c (interrupt_event): New function. Pass exception event
2840 onto exception handler.
2842 * configure.in: Check for stdlib.h.
2843 * configure: Regenerate.
2845 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2846 variable declaration.
2847 (build_instruction): Initialize memval1.
2848 (build_instruction): Add UNUSED attribute to byte, bigend,
2850 (build_operands): Ditto.
2852 * interp.c: Fix GCC warnings.
2853 (sim_get_quit_code): Delete.
2855 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2856 * Makefile.in: Ditto.
2857 * configure: Re-generate.
2859 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2861 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2863 * interp.c (mips_option_handler): New function parse argumes using
2865 (myname): Replace with STATE_MY_NAME.
2866 (sim_open): Delete check for host endianness - performed by
2868 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2869 (sim_open): Move much of the initialization from here.
2870 (sim_load): To here. After the image has been loaded and
2872 (sim_open): Move ColdReset from here.
2873 (sim_create_inferior): To here.
2874 (sim_open): Make FP check less dependant on host endianness.
2876 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2878 * interp.c (sim_set_callbacks): Delete.
2880 * interp.c (membank, membank_base, membank_size): Replace with
2881 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2882 (sim_open): Remove call to callback->init. gdb/run do this.
2886 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2888 * interp.c (big_endian_p): Delete, replaced by
2889 current_target_byte_order.
2891 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2893 * interp.c (host_read_long, host_read_word, host_swap_word,
2894 host_swap_long): Delete. Using common sim-endian.
2895 (sim_fetch_register, sim_store_register): Use H2T.
2896 (pipeline_ticks): Delete. Handled by sim-events.
2898 (sim_engine_run): Update.
2900 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2902 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2904 (SignalException): To here. Signal using sim_engine_halt.
2905 (sim_stop_reason): Delete, moved to common.
2907 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2909 * interp.c (sim_open): Add callback argument.
2910 (sim_set_callbacks): Delete SIM_DESC argument.
2913 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2915 * Makefile.in (SIM_OBJS): Add common modules.
2917 * interp.c (sim_set_callbacks): Also set SD callback.
2918 (set_endianness, xfer_*, swap_*): Delete.
2919 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2920 Change to functions using sim-endian macros.
2921 (control_c, sim_stop): Delete, use common version.
2922 (simulate): Convert into.
2923 (sim_engine_run): This function.
2924 (sim_resume): Delete.
2926 * interp.c (simulation): New variable - the simulator object.
2927 (sim_kind): Delete global - merged into simulation.
2928 (sim_load): Cleanup. Move PC assignment from here.
2929 (sim_create_inferior): To here.
2931 * sim-main.h: New file.
2932 * interp.c (sim-main.h): Include.
2934 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2936 * configure: Regenerated to track ../common/aclocal.m4 changes.
2938 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2940 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2942 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2944 * gencode.c (build_instruction): DIV instructions: check
2945 for division by zero and integer overflow before using
2946 host's division operation.
2948 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2950 * Makefile.in (SIM_OBJS): Add sim-load.o.
2951 * interp.c: #include bfd.h.
2952 (target_byte_order): Delete.
2953 (sim_kind, myname, big_endian_p): New static locals.
2954 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2955 after argument parsing. Recognize -E arg, set endianness accordingly.
2956 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2957 load file into simulator. Set PC from bfd.
2958 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2959 (set_endianness): Use big_endian_p instead of target_byte_order.
2961 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2963 * interp.c (sim_size): Delete prototype - conflicts with
2964 definition in remote-sim.h. Correct definition.
2966 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2968 * configure: Regenerated to track ../common/aclocal.m4 changes.
2971 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2973 * interp.c (sim_open): New arg `kind'.
2975 * configure: Regenerated to track ../common/aclocal.m4 changes.
2977 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2979 * configure: Regenerated to track ../common/aclocal.m4 changes.
2981 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2983 * interp.c (sim_open): Set optind to 0 before calling getopt.
2985 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2987 * configure: Regenerated to track ../common/aclocal.m4 changes.
2989 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2991 * interp.c : Replace uses of pr_addr with pr_uword64
2992 where the bit length is always 64 independent of SIM_ADDR.
2993 (pr_uword64) : added.
2995 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2997 * configure: Re-generate.
2999 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3001 * configure: Regenerate to track ../common/aclocal.m4 changes.
3003 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3005 * interp.c (sim_open): New SIM_DESC result. Argument is now
3007 (other sim_*): New SIM_DESC argument.
3009 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3011 * interp.c: Fix printing of addresses for non-64-bit targets.
3012 (pr_addr): Add function to print address based on size.
3014 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3016 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3018 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3020 * gencode.c (build_mips16_operands): Correct computation of base
3021 address for extended PC relative instruction.
3023 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3025 * interp.c (mips16_entry): Add support for floating point cases.
3026 (SignalException): Pass floating point cases to mips16_entry.
3027 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3029 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3031 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3032 and then set the state to fmt_uninterpreted.
3033 (COP_SW): Temporarily set the state to fmt_word while calling
3036 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3038 * gencode.c (build_instruction): The high order may be set in the
3039 comparison flags at any ISA level, not just ISA 4.
3041 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3043 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3044 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3045 * configure.in: sinclude ../common/aclocal.m4.
3046 * configure: Regenerated.
3048 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3050 * configure: Rebuild after change to aclocal.m4.
3052 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3054 * configure configure.in Makefile.in: Update to new configure
3055 scheme which is more compatible with WinGDB builds.
3056 * configure.in: Improve comment on how to run autoconf.
3057 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3058 * Makefile.in: Use autoconf substitution to install common
3061 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3063 * gencode.c (build_instruction): Use BigEndianCPU instead of
3066 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3068 * interp.c (sim_monitor): Make output to stdout visible in
3069 wingdb's I/O log window.
3071 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3073 * support.h: Undo previous change to SIGTRAP
3076 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3078 * interp.c (store_word, load_word): New static functions.
3079 (mips16_entry): New static function.
3080 (SignalException): Look for mips16 entry and exit instructions.
3081 (simulate): Use the correct index when setting fpr_state after
3082 doing a pending move.
3084 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3086 * interp.c: Fix byte-swapping code throughout to work on
3087 both little- and big-endian hosts.
3089 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3091 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3092 with gdb/config/i386/xm-windows.h.
3094 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3096 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3097 that messes up arithmetic shifts.
3099 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3101 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3102 SIGTRAP and SIGQUIT for _WIN32.
3104 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3106 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3107 force a 64 bit multiplication.
3108 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3109 destination register is 0, since that is the default mips16 nop
3112 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3114 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3115 (build_endian_shift): Don't check proc64.
3116 (build_instruction): Always set memval to uword64. Cast op2 to
3117 uword64 when shifting it left in memory instructions. Always use
3118 the same code for stores--don't special case proc64.
3120 * gencode.c (build_mips16_operands): Fix base PC value for PC
3122 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3124 * interp.c (simJALDELAYSLOT): Define.
3125 (JALDELAYSLOT): Define.
3126 (INDELAYSLOT, INJALDELAYSLOT): Define.
3127 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3129 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3131 * interp.c (sim_open): add flush_cache as a PMON routine
3132 (sim_monitor): handle flush_cache by ignoring it
3134 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3136 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3138 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3139 (BigEndianMem): Rename to ByteSwapMem and change sense.
3140 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3141 BigEndianMem references to !ByteSwapMem.
3142 (set_endianness): New function, with prototype.
3143 (sim_open): Call set_endianness.
3144 (sim_info): Use simBE instead of BigEndianMem.
3145 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3146 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3147 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3148 ifdefs, keeping the prototype declaration.
3149 (swap_word): Rewrite correctly.
3150 (ColdReset): Delete references to CONFIG. Delete endianness related
3151 code; moved to set_endianness.
3153 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3155 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3156 * interp.c (CHECKHILO): Define away.
3157 (simSIGINT): New macro.
3158 (membank_size): Increase from 1MB to 2MB.
3159 (control_c): New function.
3160 (sim_resume): Rename parameter signal to signal_number. Add local
3161 variable prev. Call signal before and after simulate.
3162 (sim_stop_reason): Add simSIGINT support.
3163 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3165 (sim_warning): Delete call to SignalException. Do call printf_filtered
3167 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3168 a call to sim_warning.
3170 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3172 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3173 16 bit instructions.
3175 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3177 Add support for mips16 (16 bit MIPS implementation):
3178 * gencode.c (inst_type): Add mips16 instruction encoding types.
3179 (GETDATASIZEINSN): Define.
3180 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3181 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3183 (MIPS16_DECODE): New table, for mips16 instructions.
3184 (bitmap_val): New static function.
3185 (struct mips16_op): Define.
3186 (mips16_op_table): New table, for mips16 operands.
3187 (build_mips16_operands): New static function.
3188 (process_instructions): If PC is odd, decode a mips16
3189 instruction. Break out instruction handling into new
3190 build_instruction function.
3191 (build_instruction): New static function, broken out of
3192 process_instructions. Check modifiers rather than flags for SHIFT
3193 bit count and m[ft]{hi,lo} direction.
3194 (usage): Pass program name to fprintf.
3195 (main): Remove unused variable this_option_optind. Change
3196 ``*loptarg++'' to ``loptarg++''.
3197 (my_strtoul): Parenthesize && within ||.
3198 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3199 (simulate): If PC is odd, fetch a 16 bit instruction, and
3200 increment PC by 2 rather than 4.
3201 * configure.in: Add case for mips16*-*-*.
3202 * configure: Rebuild.
3204 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3206 * interp.c: Allow -t to enable tracing in standalone simulator.
3207 Fix garbage output in trace file and error messages.
3209 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3211 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3212 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3213 * configure.in: Simplify using macros in ../common/aclocal.m4.
3214 * configure: Regenerated.
3215 * tconfig.in: New file.
3217 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3219 * interp.c: Fix bugs in 64-bit port.
3220 Use ansi function declarations for msvc compiler.
3221 Initialize and test file pointer in trace code.
3222 Prevent duplicate definition of LAST_EMED_REGNUM.
3224 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3226 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3228 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3230 * interp.c (SignalException): Check for explicit terminating
3232 * gencode.c: Pass instruction value through SignalException()
3233 calls for Trap, Breakpoint and Syscall.
3235 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3237 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3238 only used on those hosts that provide it.
3239 * configure.in: Add sqrt() to list of functions to be checked for.
3240 * config.in: Re-generated.
3241 * configure: Re-generated.
3243 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3245 * gencode.c (process_instructions): Call build_endian_shift when
3246 expanding STORE RIGHT, to fix swr.
3247 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3248 clear the high bits.
3249 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3250 Fix float to int conversions to produce signed values.
3252 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3254 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3255 (process_instructions): Correct handling of nor instruction.
3256 Correct shift count for 32 bit shift instructions. Correct sign
3257 extension for arithmetic shifts to not shift the number of bits in
3258 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3259 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3261 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3262 It's OK to have a mult follow a mult. What's not OK is to have a
3263 mult follow an mfhi.
3264 (Convert): Comment out incorrect rounding code.
3266 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3268 * interp.c (sim_monitor): Improved monitor printf
3269 simulation. Tidied up simulator warnings, and added "--log" option
3270 for directing warning message output.
3271 * gencode.c: Use sim_warning() rather than WARNING macro.
3273 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3275 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3276 getopt1.o, rather than on gencode.c. Link objects together.
3277 Don't link against -liberty.
3278 (gencode.o, getopt.o, getopt1.o): New targets.
3279 * gencode.c: Include <ctype.h> and "ansidecl.h".
3280 (AND): Undefine after including "ansidecl.h".
3281 (ULONG_MAX): Define if not defined.
3282 (OP_*): Don't define macros; now defined in opcode/mips.h.
3283 (main): Call my_strtoul rather than strtoul.
3284 (my_strtoul): New static function.
3286 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3288 * gencode.c (process_instructions): Generate word64 and uword64
3289 instead of `long long' and `unsigned long long' data types.
3290 * interp.c: #include sysdep.h to get signals, and define default
3292 * (Convert): Work around for Visual-C++ compiler bug with type
3294 * support.h: Make things compile under Visual-C++ by using
3295 __int64 instead of `long long'. Change many refs to long long
3296 into word64/uword64 typedefs.
3298 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3300 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3301 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3303 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3304 (AC_PROG_INSTALL): Added.
3305 (AC_PROG_CC): Moved to before configure.host call.
3306 * configure: Rebuilt.
3308 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3310 * configure.in: Define @SIMCONF@ depending on mips target.
3311 * configure: Rebuild.
3312 * Makefile.in (run): Add @SIMCONF@ to control simulator
3314 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3315 * interp.c: Remove some debugging, provide more detailed error
3316 messages, update memory accesses to use LOADDRMASK.
3318 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3320 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3321 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3323 * configure: Rebuild.
3324 * config.in: New file, generated by autoheader.
3325 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3326 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3327 HAVE_ANINT and HAVE_AINT, as appropriate.
3328 * Makefile.in (run): Use @LIBS@ rather than -lm.
3329 (interp.o): Depend upon config.h.
3330 (Makefile): Just rebuild Makefile.
3331 (clean): Remove stamp-h.
3332 (mostlyclean): Make the same as clean, not as distclean.
3333 (config.h, stamp-h): New targets.
3335 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3337 * interp.c (ColdReset): Fix boolean test. Make all simulator
3340 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3342 * interp.c (xfer_direct_word, xfer_direct_long,
3343 swap_direct_word, swap_direct_long, xfer_big_word,
3344 xfer_big_long, xfer_little_word, xfer_little_long,
3345 swap_word,swap_long): Added.
3346 * interp.c (ColdReset): Provide function indirection to
3347 host<->simulated_target transfer routines.
3348 * interp.c (sim_store_register, sim_fetch_register): Updated to
3349 make use of indirected transfer routines.
3351 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3353 * gencode.c (process_instructions): Ensure FP ABS instruction
3355 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3356 system call support.
3358 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3360 * interp.c (sim_do_command): Complain if callback structure not
3363 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3365 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3366 support for Sun hosts.
3367 * Makefile.in (gencode): Ensure the host compiler and libraries
3368 used for cross-hosted build.
3370 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3372 * interp.c, gencode.c: Some more (TODO) tidying.
3374 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3376 * gencode.c, interp.c: Replaced explicit long long references with
3377 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3378 * support.h (SET64LO, SET64HI): Macros added.
3380 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3382 * configure: Regenerate with autoconf 2.7.
3384 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3386 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3387 * support.h: Remove superfluous "1" from #if.
3388 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3390 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3392 * interp.c (StoreFPR): Control UndefinedResult() call on
3393 WARN_RESULT manifest.
3395 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3397 * gencode.c: Tidied instruction decoding, and added FP instruction
3400 * interp.c: Added dineroIII, and BSD profiling support. Also
3401 run-time FP handling.
3403 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3405 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3406 gencode.c, interp.c, support.h: created.